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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols\r | |
3 | *\r | |
7365350c | 4 | * Copyright (c) 2009-2016 Frank Meyer - frank(at)fli4l.de\r |
4225a882 | 5 | *\r |
4bcf310e | 6 | * $Id: irmp.c,v 1.188 2016/09/14 06:31:48 fm Exp $\r |
cb8474cc | 7 | *\r |
622f5f59 | 8 | * Supported AVR mikrocontrollers:\r |
7644ac04 | 9 | *\r |
21a4e0ee | 10 | * ATtiny87, ATtiny167\r |
476267f4 | 11 | * ATtiny45, ATtiny85\r |
2ac088b2 | 12 | * ATtiny44, ATtiny84\r |
7644ac04 | 13 | * ATmega8, ATmega16, ATmega32\r |
14 | * ATmega162\r | |
e664a9f3 | 15 | * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r |
7644ac04 | 16 | * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r |
17 | *\r | |
4225a882 | 18 | * This program is free software; you can redistribute it and/or modify\r |
19 | * it under the terms of the GNU General Public License as published by\r | |
20 | * the Free Software Foundation; either version 2 of the License, or\r | |
21 | * (at your option) any later version.\r | |
22 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
23 | */\r | |
24 | \r | |
f5ca0147 | 25 | #include "irmp.h"\r |
4225a882 | 26 | \r |
89e8cafb | 27 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
08f2dd9d | 28 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r |
d155e9ab | 29 | #else\r |
08f2dd9d | 30 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r |
d155e9ab | 31 | #endif\r |
32 | \r | |
12948cf3 | 33 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 || IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r |
08f2dd9d | 34 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r |
12948cf3 | 35 | #else\r |
08f2dd9d | 36 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r |
12948cf3 | 37 | #endif\r |
38 | \r | |
deba2a0a | 39 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || \\r |
c2b70f0b | 40 | IRMP_SUPPORT_S100_PROTOCOL == 1 || \\r |
deba2a0a | 41 | IRMP_SUPPORT_RC6_PROTOCOL == 1 || \\r |
42 | IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \\r | |
43 | IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \\r | |
2fb27bfe | 44 | IRMP_SUPPORT_IR60_PROTOCOL == 1 || \\r |
b85cb27d | 45 | IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1 || \\r |
0715cf5e | 46 | IRMP_SUPPORT_MERLIN_PROTOCOL == 1 || \\r |
b85cb27d | 47 | IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
08f2dd9d | 48 | # define IRMP_SUPPORT_MANCHESTER 1\r |
77f488bb | 49 | #else\r |
08f2dd9d | 50 | # define IRMP_SUPPORT_MANCHESTER 0\r |
77f488bb | 51 | #endif\r |
52 | \r | |
93570cd9 | 53 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
08f2dd9d | 54 | # define IRMP_SUPPORT_SERIAL 1\r |
deba2a0a | 55 | #else\r |
08f2dd9d | 56 | # define IRMP_SUPPORT_SERIAL 0\r |
deba2a0a | 57 | #endif\r |
58 | \r | |
0834784c | 59 | #define IRMP_KEY_REPETITION_LEN (uint_fast16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec\r |
4225a882 | 60 | \r |
fef942f6 | 61 | #define MIN_TOLERANCE_00 1.0 // -0%\r |
62 | #define MAX_TOLERANCE_00 1.0 // +0%\r | |
63 | \r | |
95b27043 | 64 | #define MIN_TOLERANCE_02 0.98 // -2%\r |
65 | #define MAX_TOLERANCE_02 1.02 // +2%\r | |
66 | \r | |
67 | #define MIN_TOLERANCE_03 0.97 // -3%\r | |
68 | #define MAX_TOLERANCE_03 1.03 // +3%\r | |
69 | \r | |
fef942f6 | 70 | #define MIN_TOLERANCE_05 0.95 // -5%\r |
71 | #define MAX_TOLERANCE_05 1.05 // +5%\r | |
72 | \r | |
4225a882 | 73 | #define MIN_TOLERANCE_10 0.9 // -10%\r |
74 | #define MAX_TOLERANCE_10 1.1 // +10%\r | |
75 | \r | |
fef942f6 | 76 | #define MIN_TOLERANCE_15 0.85 // -15%\r |
77 | #define MAX_TOLERANCE_15 1.15 // +15%\r | |
78 | \r | |
4225a882 | 79 | #define MIN_TOLERANCE_20 0.8 // -20%\r |
80 | #define MAX_TOLERANCE_20 1.2 // +20%\r | |
81 | \r | |
82 | #define MIN_TOLERANCE_30 0.7 // -30%\r | |
83 | #define MAX_TOLERANCE_30 1.3 // +30%\r | |
84 | \r | |
85 | #define MIN_TOLERANCE_40 0.6 // -40%\r | |
86 | #define MAX_TOLERANCE_40 1.4 // +40%\r | |
87 | \r | |
88 | #define MIN_TOLERANCE_50 0.5 // -50%\r | |
89 | #define MAX_TOLERANCE_50 1.5 // +50%\r | |
90 | \r | |
91 | #define MIN_TOLERANCE_60 0.4 // -60%\r | |
92 | #define MAX_TOLERANCE_60 1.6 // +60%\r | |
93 | \r | |
9405f84a | 94 | #define MIN_TOLERANCE_70 0.3 // -70%\r |
95 | #define MAX_TOLERANCE_70 1.7 // +70%\r | |
96 | \r | |
0834784c | 97 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
98 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
99 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
deba2a0a | 100 | #if IRMP_SUPPORT_NETBOX_PROTOCOL // only 5% to avoid conflict with NETBOX:\r |
0834784c | 101 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r |
deba2a0a | 102 | #else // only 5% + 1 to avoid conflict with RC6:\r |
0834784c | 103 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r |
deba2a0a | 104 | #endif\r |
0834784c | 105 | #define SIRCS_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
106 | #define SIRCS_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
107 | #define SIRCS_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
108 | #define SIRCS_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
109 | #define SIRCS_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
110 | #define SIRCS_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
111 | \r | |
112 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
113 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
114 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
115 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
116 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
117 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
118 | #define NEC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
119 | #define NEC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
120 | #define NEC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
121 | #define NEC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
122 | #define NEC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
123 | #define NEC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
6db2522c | 124 | // autodetect nec repetition frame within 50 msec:\r |
125 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms\r | |
126 | #if 0\r | |
0834784c | 127 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
6db2522c | 128 | #else\r |
0834784c | 129 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r |
6db2522c | 130 | #endif\r |
fef942f6 | 131 | \r |
0834784c | 132 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
133 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
134 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
135 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
136 | #define SAMSUNG_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
137 | #define SAMSUNG_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
138 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
139 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
140 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
141 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
142 | \r | |
143 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
144 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
145 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
146 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
147 | #define MATSUSHITA_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
148 | #define MATSUSHITA_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
149 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
150 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
151 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
152 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
153 | \r | |
154 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
155 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
156 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
157 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
95b27043 | 158 | #define KASEIKYO_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
159 | #define KASEIKYO_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
160 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
161 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
162 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
163 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
164 | \r | |
7365350c | 165 | #define MITSU_HEAVY_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
166 | #define MITSU_HEAVY_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
167 | #define MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
168 | #define MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
169 | #define MITSU_HEAVY_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
170 | #define MITSU_HEAVY_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
171 | #define MITSU_HEAVY_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
172 | #define MITSU_HEAVY_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
173 | #define MITSU_HEAVY_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
174 | #define MITSU_HEAVY_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
175 | \r | |
4bcf310e | 176 | #define VINCENT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
177 | #define VINCENT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
178 | #define VINCENT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
179 | #define VINCENT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
180 | #define VINCENT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
181 | #define VINCENT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
182 | #define VINCENT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
183 | #define VINCENT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
184 | #define VINCENT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
185 | #define VINCENT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
186 | \r | |
95b27043 | 187 | #define PANASONIC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
188 | #define PANASONIC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
189 | #define PANASONIC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
190 | #define PANASONIC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
191 | #define PANASONIC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
192 | #define PANASONIC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
193 | #define PANASONIC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
194 | #define PANASONIC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
195 | #define PANASONIC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
196 | #define PANASONIC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
0834784c | 197 | \r |
198 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
199 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
200 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
201 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
202 | #define RECS80_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
203 | #define RECS80_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
204 | #define RECS80_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
205 | #define RECS80_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
206 | #define RECS80_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
207 | #define RECS80_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 208 | \r |
3a7e26e1 | 209 | \r |
210 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with RC5, so keep tolerance for RC5 minimal here:\r | |
0834784c | 211 | #define RC5_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r |
212 | #define RC5_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
3a7e26e1 | 213 | #else\r |
0834784c | 214 | #define RC5_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
215 | #define RC5_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
3a7e26e1 | 216 | #endif\r |
31c1f035 | 217 | \r |
0834784c | 218 | #define RC5_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
219 | #define RC5_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 220 | \r |
c2b70f0b | 221 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with S100, so keep tolerance for S100 minimal here:\r |
222 | #define S100_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
223 | #define S100_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
224 | #else\r | |
225 | #define S100_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
226 | #define S100_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
227 | #endif\r | |
228 | \r | |
229 | #define S100_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
230 | #define S100_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
231 | \r | |
0834784c | 232 | #define DENON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
233 | #define DENON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
234 | #define DENON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
235 | #define DENON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
08f2dd9d | 236 | // RUWIDO (see t-home-mediareceiver-15kHz.txt) conflicts here with DENON\r |
0834784c | 237 | #define DENON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
238 | #define DENON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
239 | #define DENON_AUTO_REPETITION_PAUSE_LEN ((uint_fast16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
240 | \r | |
241 | #define THOMSON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
242 | #define THOMSON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
243 | #define THOMSON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
244 | #define THOMSON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
245 | #define THOMSON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
246 | #define THOMSON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
247 | \r | |
248 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
249 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
250 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
251 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
252 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
253 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
254 | #define RC6_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
255 | #define RC6_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_60 + 0.5) + 1) // pulses: 300 - 800\r | |
256 | #define RC6_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
257 | #define RC6_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1) // pauses: 300 - 600\r | |
258 | \r | |
259 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
260 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
261 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
262 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
263 | #define RECS80EXT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
264 | #define RECS80EXT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
265 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
266 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
267 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
268 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
269 | \r | |
270 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
271 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
272 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
273 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
274 | #define NUBERT_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
275 | #define NUBERT_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
276 | #define NUBERT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
277 | #define NUBERT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
278 | #define NUBERT_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
279 | #define NUBERT_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
280 | #define NUBERT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
281 | #define NUBERT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
282 | \r | |
0715cf5e | 283 | #define FAN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
284 | #define FAN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
285 | #define FAN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
286 | #define FAN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
287 | #define FAN_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
288 | #define FAN_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
289 | #define FAN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
290 | #define FAN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
291 | #define FAN_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
292 | #define FAN_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
293 | #define FAN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
294 | #define FAN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
295 | \r | |
0834784c | 296 | #define SPEAKER_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
297 | #define SPEAKER_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
298 | #define SPEAKER_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
299 | #define SPEAKER_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
300 | #define SPEAKER_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
301 | #define SPEAKER_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
302 | #define SPEAKER_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
303 | #define SPEAKER_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
304 | #define SPEAKER_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
305 | #define SPEAKER_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
306 | #define SPEAKER_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
307 | #define SPEAKER_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
308 | \r | |
309 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
310 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
311 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
312 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
313 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
314 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
315 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
316 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
317 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
318 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
319 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
2eab5ec9 | 320 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT\r |
0834784c | 321 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
322 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
323 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
324 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
325 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
326 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
327 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
328 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
329 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
330 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
331 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
332 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
333 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
334 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
335 | \r | |
336 | #define IR60_TIMEOUT_LEN ((uint_fast8_t)(F_INTERRUPTS * IR60_TIMEOUT_TIME * 0.5))\r | |
337 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
338 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
339 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
340 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
341 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)\r | |
342 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
343 | \r | |
344 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
345 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
346 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
347 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
348 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
349 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
350 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
351 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
352 | \r | |
353 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) // 5%: avoid conflict with NETBOX\r | |
354 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
355 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
356 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
357 | #define FDC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
358 | #define FDC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
359 | #define FDC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
360 | #define FDC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
6f750020 | 361 | #if 0\r |
0834784c | 362 | #define FDC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255\r |
6f750020 | 363 | #else\r |
364 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1\r | |
365 | #endif\r | |
0834784c | 366 | #define FDC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r |
367 | \r | |
368 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
369 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
370 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
371 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
372 | #define RCCAR_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
373 | #define RCCAR_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
374 | #define RCCAR_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
375 | #define RCCAR_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
376 | #define RCCAR_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
377 | #define RCCAR_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
378 | \r | |
379 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
380 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
381 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!\r | |
382 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!\r | |
383 | #define JVC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
384 | #define JVC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
385 | #define JVC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
386 | #define JVC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
387 | #define JVC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
388 | #define JVC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
770a1a9d | 389 | // autodetect JVC repetition frame within 50 msec:\r |
0834784c | 390 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
391 | \r | |
392 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
393 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
394 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint_fast16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
395 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint_fast16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
396 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
397 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
398 | #define NIKON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
399 | #define NIKON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
400 | #define NIKON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
401 | #define NIKON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
402 | #define NIKON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
403 | #define NIKON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
404 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
405 | \r | |
406 | #define KATHREIN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
407 | #define KATHREIN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
408 | #define KATHREIN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
409 | #define KATHREIN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
410 | #define KATHREIN_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
411 | #define KATHREIN_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
412 | #define KATHREIN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
413 | #define KATHREIN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
414 | #define KATHREIN_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
415 | #define KATHREIN_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
416 | #define KATHREIN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
417 | #define KATHREIN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
418 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
419 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
420 | \r | |
421 | #define NETBOX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
422 | #define NETBOX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
423 | #define NETBOX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
424 | #define NETBOX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
425 | #define NETBOX_PULSE_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME))\r | |
426 | #define NETBOX_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME))\r | |
427 | #define NETBOX_PULSE_REST_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME / 4))\r | |
428 | #define NETBOX_PAUSE_REST_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME / 4))\r | |
429 | \r | |
430 | #define LEGO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
431 | #define LEGO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
432 | #define LEGO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
433 | #define LEGO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
434 | #define LEGO_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
435 | #define LEGO_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
436 | #define LEGO_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
437 | #define LEGO_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
438 | #define LEGO_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
439 | #define LEGO_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
440 | \r | |
441 | #define BOSE_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
442 | #define BOSE_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
443 | #define BOSE_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
444 | #define BOSE_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
445 | #define BOSE_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
446 | #define BOSE_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
447 | #define BOSE_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
448 | #define BOSE_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
449 | #define BOSE_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
450 | #define BOSE_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
451 | #define BOSE_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
452 | \r | |
453 | #define A1TVBOX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
454 | #define A1TVBOX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
455 | #define A1TVBOX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
456 | #define A1TVBOX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
457 | #define A1TVBOX_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
458 | #define A1TVBOX_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
459 | #define A1TVBOX_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
460 | #define A1TVBOX_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
461 | \r | |
0715cf5e | 462 | #define MERLIN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
463 | #define MERLIN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
464 | #define MERLIN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
465 | #define MERLIN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
466 | #define MERLIN_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
467 | #define MERLIN_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
468 | #define MERLIN_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
469 | #define MERLIN_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
470 | \r | |
0834784c | 471 | #define ORTEK_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
472 | #define ORTEK_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
473 | #define ORTEK_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
474 | #define ORTEK_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
475 | #define ORTEK_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
476 | #define ORTEK_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
477 | #define ORTEK_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
478 | #define ORTEK_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
479 | \r | |
480 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
481 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
482 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
483 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MAX_TOLERANCE_10 + 0.5) - 1)\r | |
484 | #define TELEFUNKEN_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
485 | #define TELEFUNKEN_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
486 | #define TELEFUNKEN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
487 | #define TELEFUNKEN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
488 | #define TELEFUNKEN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
489 | #define TELEFUNKEN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
b85cb27d | 490 | // autodetect TELEFUNKEN repetition frame within 50 msec:\r |
0834784c | 491 | // #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
492 | \r | |
493 | #define ROOMBA_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
494 | #define ROOMBA_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
495 | #define ROOMBA_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
496 | #define ROOMBA_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
497 | #define ROOMBA_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5))\r | |
498 | #define ROOMBA_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
499 | #define ROOMBA_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
500 | #define ROOMBA_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
501 | #define ROOMBA_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
502 | #define ROOMBA_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME))\r | |
503 | #define ROOMBA_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
504 | #define ROOMBA_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
505 | #define ROOMBA_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
506 | #define ROOMBA_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
507 | \r | |
508 | #define RCMM32_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
509 | #define RCMM32_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
510 | #define RCMM32_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
511 | #define RCMM32_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
512 | #define RCMM32_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
513 | #define RCMM32_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
514 | #define RCMM32_BIT_00_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
515 | #define RCMM32_BIT_00_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
516 | #define RCMM32_BIT_01_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
517 | #define RCMM32_BIT_01_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
518 | #define RCMM32_BIT_10_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
519 | #define RCMM32_BIT_10_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
520 | #define RCMM32_BIT_11_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
521 | #define RCMM32_BIT_11_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
522 | \r | |
003c1008 | 523 | #define PENTAX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
524 | #define PENTAX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
525 | #define PENTAX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
526 | #define PENTAX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
527 | #define PENTAX_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5))\r | |
528 | #define PENTAX_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
529 | #define PENTAX_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
530 | #define PENTAX_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
531 | #define PENTAX_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
532 | #define PENTAX_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME))\r | |
533 | #define PENTAX_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
534 | #define PENTAX_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
535 | #define PENTAX_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
536 | #define PENTAX_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
537 | \r | |
43c535be | 538 | #define ACP24_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r |
539 | #define ACP24_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
540 | #define ACP24_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
541 | #define ACP24_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
542 | #define ACP24_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_PULSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
543 | #define ACP24_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_PULSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
544 | #define ACP24_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
545 | #define ACP24_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
546 | #define ACP24_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
547 | #define ACP24_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
548 | \r | |
0834784c | 549 | #define RADIO1_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
550 | #define RADIO1_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
551 | #define RADIO1_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
552 | #define RADIO1_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
553 | #define RADIO1_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME + 0.5))\r | |
554 | #define RADIO1_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
555 | #define RADIO1_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
556 | #define RADIO1_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
557 | #define RADIO1_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
558 | #define RADIO1_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME))\r | |
559 | #define RADIO1_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
560 | #define RADIO1_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
561 | #define RADIO1_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
562 | #define RADIO1_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
563 | \r | |
564 | #define AUTO_FRAME_REPETITION_LEN (uint_fast16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint_fast16_t!\r | |
4225a882 | 565 | \r |
48664931 | 566 | #ifdef ANALYZE\r |
08f2dd9d | 567 | # define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r |
568 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r | |
569 | # define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r | |
775fabfa | 570 | # define ANALYZE_ONLY_NORMAL_PRINTF(...) { if (! silent && !verbose) { printf (__VA_ARGS__); } }\r |
08f2dd9d | 571 | # define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r |
7644ac04 | 572 | static int silent;\r |
573 | static int time_counter;\r | |
574 | static int verbose;\r | |
645fbc69 | 575 | \r |
576 | /******************************* not every PIC compiler knows variadic macros :-(\r | |
4225a882 | 577 | #else\r |
08f2dd9d | 578 | # define ANALYZE_PUTCHAR(a)\r |
579 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r | |
4b9953bf | 580 | # define ANALYZE_PRINTF(...)\r |
581 | # define ANALYZE_ONLY_NORMAL_PRINTF(...)\r | |
4a7dc859 | 582 | # endif\r |
08f2dd9d | 583 | # define ANALYZE_NEWLINE()\r |
645fbc69 | 584 | *********************************/\r |
4225a882 | 585 | #endif\r |
586 | \r | |
7644ac04 | 587 | #if IRMP_USE_CALLBACK == 1\r |
0834784c | 588 | static void (*irmp_callback_ptr) (uint_fast8_t);\r |
7644ac04 | 589 | #endif // IRMP_USE_CALLBACK == 1\r |
590 | \r | |
40ca4604 | 591 | #define PARITY_CHECK_OK 1\r |
592 | #define PARITY_CHECK_FAILED 0\r | |
593 | \r | |
1f54e86c | 594 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
595 | * Protocol names\r | |
596 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
597 | */\r | |
775fabfa | 598 | #if defined(UNIX_OR_WINDOWS) || IRMP_PROTOCOL_NAMES == 1\r |
622f5f59 | 599 | static const char proto_unknown[] PROGMEM = "UNKNOWN";\r |
600 | static const char proto_sircs[] PROGMEM = "SIRCS";\r | |
601 | static const char proto_nec[] PROGMEM = "NEC";\r | |
602 | static const char proto_samsung[] PROGMEM = "SAMSUNG";\r | |
603 | static const char proto_matsushita[] PROGMEM = "MATSUSH";\r | |
604 | static const char proto_kaseikyo[] PROGMEM = "KASEIKYO";\r | |
605 | static const char proto_recs80[] PROGMEM = "RECS80";\r | |
606 | static const char proto_rc5[] PROGMEM = "RC5";\r | |
607 | static const char proto_denon[] PROGMEM = "DENON";\r | |
608 | static const char proto_rc6[] PROGMEM = "RC6";\r | |
609 | static const char proto_samsung32[] PROGMEM = "SAMSG32";\r | |
610 | static const char proto_apple[] PROGMEM = "APPLE";\r | |
611 | static const char proto_recs80ext[] PROGMEM = "RECS80EX";\r | |
612 | static const char proto_nubert[] PROGMEM = "NUBERT";\r | |
613 | static const char proto_bang_olufsen[] PROGMEM = "BANG OLU";\r | |
614 | static const char proto_grundig[] PROGMEM = "GRUNDIG";\r | |
615 | static const char proto_nokia[] PROGMEM = "NOKIA";\r | |
616 | static const char proto_siemens[] PROGMEM = "SIEMENS";\r | |
617 | static const char proto_fdc[] PROGMEM = "FDC";\r | |
618 | static const char proto_rccar[] PROGMEM = "RCCAR";\r | |
619 | static const char proto_jvc[] PROGMEM = "JVC";\r | |
620 | static const char proto_rc6a[] PROGMEM = "RC6A";\r | |
621 | static const char proto_nikon[] PROGMEM = "NIKON";\r | |
622 | static const char proto_ruwido[] PROGMEM = "RUWIDO";\r | |
623 | static const char proto_ir60[] PROGMEM = "IR60";\r | |
624 | static const char proto_kathrein[] PROGMEM = "KATHREIN";\r | |
625 | static const char proto_netbox[] PROGMEM = "NETBOX";\r | |
626 | static const char proto_nec16[] PROGMEM = "NEC16";\r | |
627 | static const char proto_nec42[] PROGMEM = "NEC42";\r | |
628 | static const char proto_lego[] PROGMEM = "LEGO";\r | |
629 | static const char proto_thomson[] PROGMEM = "THOMSON";\r | |
630 | static const char proto_bose[] PROGMEM = "BOSE";\r | |
631 | static const char proto_a1tvbox[] PROGMEM = "A1TVBOX";\r | |
632 | static const char proto_ortek[] PROGMEM = "ORTEK";\r | |
633 | static const char proto_telefunken[] PROGMEM = "TELEFUNKEN";\r | |
634 | static const char proto_roomba[] PROGMEM = "ROOMBA";\r | |
635 | static const char proto_rcmm32[] PROGMEM = "RCMM32";\r | |
636 | static const char proto_rcmm24[] PROGMEM = "RCMM24";\r | |
637 | static const char proto_rcmm12[] PROGMEM = "RCMM12";\r | |
638 | static const char proto_speaker[] PROGMEM = "SPEAKER";\r | |
639 | static const char proto_lgair[] PROGMEM = "LGAIR";\r | |
640 | static const char proto_samsung48[] PROGMEM = "SAMSG48";\r | |
003c1008 | 641 | static const char proto_merlin[] PROGMEM = "MERLIN";\r |
642 | static const char proto_pentax[] PROGMEM = "PENTAX";\r | |
0715cf5e | 643 | static const char proto_fan[] PROGMEM = "FAN";\r |
c2b70f0b | 644 | static const char proto_s100[] PROGMEM = "S100";\r |
43c535be | 645 | static const char proto_acp24[] PROGMEM = "ACP24";\r |
3d2da98a | 646 | static const char proto_technics[] PROGMEM = "TECHNICS";\r |
95b27043 | 647 | static const char proto_panasonic[] PROGMEM = "PANASONIC";\r |
7365350c | 648 | static const char proto_mitsu_heavy[] PROGMEM = "MITSU_HEAVY";\r |
4bcf310e | 649 | static const char proto_vincent[] PROGMEM = "VINCENT";\r |
8aaafe9d | 650 | \r |
622f5f59 | 651 | static const char proto_radio1[] PROGMEM = "RADIO1";\r |
652 | \r | |
653 | const char * const\r | |
654 | irmp_protocol_names[IRMP_N_PROTOCOLS + 1] PROGMEM =\r | |
1f54e86c | 655 | {\r |
622f5f59 | 656 | proto_unknown,\r |
657 | proto_sircs,\r | |
658 | proto_nec,\r | |
659 | proto_samsung,\r | |
660 | proto_matsushita,\r | |
661 | proto_kaseikyo,\r | |
662 | proto_recs80,\r | |
663 | proto_rc5,\r | |
664 | proto_denon,\r | |
665 | proto_rc6,\r | |
666 | proto_samsung32,\r | |
667 | proto_apple,\r | |
668 | proto_recs80ext,\r | |
669 | proto_nubert,\r | |
670 | proto_bang_olufsen,\r | |
671 | proto_grundig,\r | |
672 | proto_nokia,\r | |
673 | proto_siemens,\r | |
674 | proto_fdc,\r | |
675 | proto_rccar,\r | |
676 | proto_jvc,\r | |
677 | proto_rc6a,\r | |
678 | proto_nikon,\r | |
679 | proto_ruwido,\r | |
680 | proto_ir60,\r | |
681 | proto_kathrein,\r | |
682 | proto_netbox,\r | |
683 | proto_nec16,\r | |
684 | proto_nec42,\r | |
685 | proto_lego,\r | |
686 | proto_thomson,\r | |
687 | proto_bose,\r | |
688 | proto_a1tvbox,\r | |
689 | proto_ortek,\r | |
690 | proto_telefunken,\r | |
691 | proto_roomba,\r | |
692 | proto_rcmm32,\r | |
693 | proto_rcmm24,\r | |
694 | proto_rcmm12,\r | |
695 | proto_speaker,\r | |
696 | proto_lgair,\r | |
697 | proto_samsung48,\r | |
003c1008 | 698 | proto_merlin,\r |
699 | proto_pentax,\r | |
0715cf5e | 700 | proto_fan,\r |
c2b70f0b | 701 | proto_s100,\r |
43c535be | 702 | proto_acp24,\r |
3d2da98a | 703 | proto_technics,\r |
95b27043 | 704 | proto_panasonic,\r |
7365350c | 705 | proto_mitsu_heavy,\r |
4bcf310e | 706 | proto_vincent,\r |
622f5f59 | 707 | proto_radio1\r |
1f54e86c | 708 | };\r |
40ca4604 | 709 | \r |
1f54e86c | 710 | #endif\r |
711 | \r | |
712 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
713 | * Logging\r | |
714 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
715 | */\r | |
9045767c | 716 | #if IRMP_LOGGING == 1 // logging via UART\r |
6c3c57e6 | 717 | \r |
6f153888 | 718 | #if defined(ARM_STM32F4XX)\r |
9045767c | 719 | # define STM32_GPIO_CLOCK RCC_AHB1Periph_GPIOA // UART2 on PA2\r |
6f153888 | 720 | # define STM32_UART_CLOCK RCC_APB1Periph_USART2\r |
721 | # define STM32_GPIO_PORT GPIOA\r | |
722 | # define STM32_GPIO_PIN GPIO_Pin_2\r | |
723 | # define STM32_GPIO_SOURCE GPIO_PinSource2\r | |
724 | # define STM32_UART_AF GPIO_AF_USART2\r | |
725 | # define STM32_UART_COM USART2\r | |
9045767c | 726 | # define STM32_UART_BAUD 115200 // 115200 Baud\r |
6f153888 | 727 | # include "stm32f4xx_usart.h"\r |
9045767c | 728 | #elif defined(ARM_STM32F10X)\r |
729 | # define STM32_UART_COM USART3 // UART3 on PB10\r | |
df24bb50 | 730 | #elif defined(ARDUINO) // Arduino Serial implementation\r |
95b27043 | 731 | # if defined(USB_SERIAL)\r |
732 | # include "usb_serial.h"\r | |
733 | # else\r | |
734 | # error USB_SERIAL not defined in ARDUINO Environment\r | |
735 | # endif\r | |
6f153888 | 736 | #else\r |
9045767c | 737 | # if IRMP_EXT_LOGGING == 1 // use external logging\r |
6f153888 | 738 | # include "irmpextlog.h"\r |
9045767c | 739 | # else // normal UART log (IRMP_EXT_LOGGING == 0)\r |
6f153888 | 740 | # define BAUD 9600L\r |
741 | # ifndef UNIX_OR_WINDOWS\r | |
742 | # include <util/setbaud.h>\r | |
743 | # endif\r | |
879b06c2 | 744 | \r |
745 | #ifdef UBRR0H\r | |
746 | \r | |
747 | #define UART0_UBRRH UBRR0H\r | |
748 | #define UART0_UBRRL UBRR0L\r | |
749 | #define UART0_UCSRA UCSR0A\r | |
750 | #define UART0_UCSRB UCSR0B\r | |
751 | #define UART0_UCSRC UCSR0C\r | |
752 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r | |
753 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r | |
754 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r | |
755 | #ifdef URSEL0\r | |
756 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r | |
757 | #else\r | |
758 | #define UART0_URSEL_BIT_VALUE (0)\r | |
759 | #endif\r | |
760 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r | |
e92413eb | 761 | #define UART0_UDR UDR0\r |
c7a47e89 | 762 | #define UART0_U2X U2X0\r |
0834784c | 763 | \r |
879b06c2 | 764 | #else\r |
4225a882 | 765 | \r |
879b06c2 | 766 | #define UART0_UBRRH UBRRH\r |
767 | #define UART0_UBRRL UBRRL\r | |
768 | #define UART0_UCSRA UCSRA\r | |
769 | #define UART0_UCSRB UCSRB\r | |
770 | #define UART0_UCSRC UCSRC\r | |
771 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)\r | |
772 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r | |
773 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r | |
774 | #ifdef URSEL\r | |
775 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)\r | |
776 | #else\r | |
777 | #define UART0_URSEL_BIT_VALUE (0)\r | |
778 | #endif\r | |
779 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)\r | |
e92413eb | 780 | #define UART0_UDR UDR\r |
c7a47e89 | 781 | #define UART0_U2X U2X\r |
4225a882 | 782 | \r |
6c3c57e6 | 783 | #endif //UBRR0H\r |
784 | #endif //IRMP_EXT_LOGGING\r | |
6f153888 | 785 | #endif //ARM_STM32F4XX\r |
4225a882 | 786 | \r |
4225a882 | 787 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
788 | * Initialize UART\r | |
789 | * @details Initializes UART\r | |
790 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
791 | */\r | |
792 | void\r | |
793 | irmp_uart_init (void)\r | |
794 | {\r | |
775fabfa | 795 | #ifndef UNIX_OR_WINDOWS\r |
6f153888 | 796 | #if defined(ARM_STM32F4XX)\r |
797 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
798 | USART_InitTypeDef USART_InitStructure;\r | |
799 | \r | |
800 | // Clock enable vom TX Pin\r | |
801 | RCC_AHB1PeriphClockCmd(STM32_GPIO_CLOCK, ENABLE);\r | |
802 | \r | |
803 | // Clock enable der UART\r | |
804 | RCC_APB1PeriphClockCmd(STM32_UART_CLOCK, ENABLE);\r | |
805 | \r | |
806 | // UART Alternative-Funktion mit dem IO-Pin verbinden\r | |
807 | GPIO_PinAFConfig(STM32_GPIO_PORT,STM32_GPIO_SOURCE,STM32_UART_AF);\r | |
808 | \r | |
809 | // UART als Alternative-Funktion mit PushPull\r | |
810 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r | |
811 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;\r | |
812 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
813 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;\r | |
814 | \r | |
815 | // TX-Pin\r | |
816 | GPIO_InitStructure.GPIO_Pin = STM32_GPIO_PIN;\r | |
817 | GPIO_Init(STM32_GPIO_PORT, &GPIO_InitStructure);\r | |
818 | \r | |
819 | // Oversampling\r | |
820 | USART_OverSampling8Cmd(STM32_UART_COM, ENABLE);\r | |
821 | \r | |
ea29682a | 822 | // init baud rate, 8 data bits, 1 stop bit, no parity, no RTS+CTS\r |
6f153888 | 823 | USART_InitStructure.USART_BaudRate = STM32_UART_BAUD;\r |
824 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r | |
825 | USART_InitStructure.USART_StopBits = USART_StopBits_1;\r | |
826 | USART_InitStructure.USART_Parity = USART_Parity_No;\r | |
827 | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r | |
828 | USART_InitStructure.USART_Mode = USART_Mode_Tx;\r | |
829 | USART_Init(STM32_UART_COM, &USART_InitStructure);\r | |
830 | \r | |
831 | // UART enable\r | |
832 | USART_Cmd(STM32_UART_COM, ENABLE);\r | |
833 | \r | |
9045767c | 834 | #elif defined(ARM_STM32F10X)\r |
835 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
836 | USART_InitTypeDef USART_InitStructure;\r | |
837 | \r | |
838 | // Clock enable vom TX Pin\r | |
839 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); // UART3 an PB10\r | |
840 | \r | |
841 | // Clock enable der UART\r | |
842 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);\r | |
843 | \r | |
844 | // UART als Alternative-Funktion mit PushPull\r | |
845 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r | |
846 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r | |
847 | \r | |
848 | // TX-Pin\r | |
849 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;\r | |
850 | GPIO_Init(GPIOB, &GPIO_InitStructure);\r | |
851 | \r | |
852 | // Oversampling\r | |
853 | USART_OverSampling8Cmd(STM32_UART_COM, ENABLE);\r | |
854 | \r | |
ea29682a | 855 | // init baud rate, 8 data bits, 1 stop bit, no parity, no RTS+CTS\r |
9045767c | 856 | USART_InitStructure.USART_BaudRate = 115200;\r |
857 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r | |
858 | USART_InitStructure.USART_StopBits = USART_StopBits_1;\r | |
859 | USART_InitStructure.USART_Parity = USART_Parity_No;\r | |
860 | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r | |
861 | USART_InitStructure.USART_Mode = USART_Mode_Tx;\r | |
862 | USART_Init(STM32_UART_COM, &USART_InitStructure);\r | |
863 | \r | |
864 | // UART enable\r | |
327b855b | 865 | USART_Cmd(STM32_UART_COM, ENABLE);\r |
df24bb50 | 866 | \r |
95b27043 | 867 | #elif defined(ARDUINO)\r |
868 | // we use the Arduino Serial Imlementation\r | |
869 | // you have to call Serial.begin(SER_BAUD); in Arduino setup() function\r | |
870 | \r | |
458a6d64 | 871 | #elif defined (__AVR_XMEGA__)\r |
872 | \r | |
95b27043 | 873 | PMIC.CTRL |= PMIC_HILVLEN_bm;\r |
874 | \r | |
875 | USARTC1.BAUDCTRLB = 0;\r | |
876 | USARTC1.BAUDCTRLA = F_CPU / 153600 - 1;\r | |
ea29682a | 877 | USARTC1.CTRLA = USART_RXCINTLVL_HI_gc; // high INT level (receive)\r |
878 | USARTC1.CTRLB = USART_TXEN_bm | USART_RXEN_bm; // activated RX and TX\r | |
879 | USARTC1.CTRLC = USART_CHSIZE_8BIT_gc; // 8 Bit\r | |
880 | PORTC.DIR |= (1<<7); // TXD is output\r | |
95b27043 | 881 | PORTC.DIR &= ~(1<<6);\r |
458a6d64 | 882 | \r |
327b855b | 883 | #else\r |
9045767c | 884 | \r |
6c3c57e6 | 885 | #if (IRMP_EXT_LOGGING == 0) // use UART\r |
879b06c2 | 886 | UART0_UBRRH = UBRRH_VALUE; // set baud rate\r |
887 | UART0_UBRRL = UBRRL_VALUE;\r | |
888 | \r | |
889 | #if USE_2X\r | |
c7a47e89 | 890 | UART0_UCSRA |= (1<<UART0_U2X);\r |
879b06c2 | 891 | #else\r |
c7a47e89 | 892 | UART0_UCSRA &= ~(1<<UART0_U2X);\r |
879b06c2 | 893 | #endif\r |
894 | \r | |
895 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r | |
896 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r | |
6c3c57e6 | 897 | #else // other log method\r |
0834784c | 898 | initextlog();\r |
6c3c57e6 | 899 | #endif //IRMP_EXT_LOGGING\r |
6f153888 | 900 | #endif //ARM_STM32F4XX\r |
775fabfa | 901 | #endif // UNIX_OR_WINDOWS\r |
4225a882 | 902 | }\r |
903 | \r | |
904 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
905 | * Send character\r | |
906 | * @details Sends character\r | |
907 | * @param ch character to be transmitted\r | |
908 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
909 | */\r | |
910 | void\r | |
911 | irmp_uart_putc (unsigned char ch)\r | |
912 | {\r | |
775fabfa | 913 | #ifndef UNIX_OR_WINDOWS\r |
9045767c | 914 | #if defined(ARM_STM32F4XX) || defined(ARM_STM32F10X)\r |
6f153888 | 915 | // warten bis altes Byte gesendet wurde\r |
916 | while (USART_GetFlagStatus(STM32_UART_COM, USART_FLAG_TXE) == RESET)\r | |
917 | {\r | |
df24bb50 | 918 | ;\r |
6f153888 | 919 | }\r |
920 | \r | |
921 | USART_SendData(STM32_UART_COM, ch);\r | |
922 | \r | |
923 | if (ch == '\n')\r | |
924 | {\r | |
df24bb50 | 925 | while (USART_GetFlagStatus(STM32_UART_COM, USART_FLAG_TXE) == RESET);\r |
926 | USART_SendData(STM32_UART_COM, '\r');\r | |
6f153888 | 927 | }\r |
928 | \r | |
95b27043 | 929 | #elif defined(ARDUINO)\r |
930 | // we use the Arduino Serial Imlementation\r | |
931 | usb_serial_putchar(ch);\r | |
932 | \r | |
6f153888 | 933 | #else\r |
6c3c57e6 | 934 | #if (IRMP_EXT_LOGGING == 0)\r |
df24bb50 | 935 | \r |
936 | # if defined (__AVR_XMEGA__)\r | |
937 | while (!(USARTC1.STATUS & USART_DREIF_bm));\r | |
938 | USARTC1.DATA = ch;\r | |
939 | \r | |
940 | # else //AVR_MEGA\r | |
879b06c2 | 941 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r |
4225a882 | 942 | {\r |
df24bb50 | 943 | ;\r |
4225a882 | 944 | }\r |
945 | \r | |
879b06c2 | 946 | UART0_UDR = ch;\r |
df24bb50 | 947 | #endif //__AVR_XMEGA__\r |
6c3c57e6 | 948 | #else\r |
6f153888 | 949 | \r |
950 | sendextlog(ch); // use external log\r | |
951 | \r | |
952 | #endif //IRMP_EXT_LOGGING\r | |
953 | #endif //ARM_STM32F4XX\r | |
775fabfa | 954 | #else\r |
955 | fputc (ch, stderr);\r | |
956 | #endif // UNIX_OR_WINDOWS\r | |
4225a882 | 957 | }\r |
958 | \r | |
959 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
960 | * Log IR signal\r | |
961 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
962 | */\r | |
d155e9ab | 963 | \r |
964 | #define STARTCYCLES 2 // min count of zeros before start of logging\r | |
965 | #define ENDBITS 1000 // number of sequenced highbits to detect end\r | |
966 | #define DATALEN 700 // log buffer size\r | |
4225a882 | 967 | \r |
775fabfa | 968 | static void\r |
0834784c | 969 | irmp_log (uint_fast8_t val)\r |
775fabfa | 970 | {\r |
0834784c | 971 | static uint8_t buf[DATALEN]; // logging buffer\r |
972 | static uint_fast16_t buf_idx; // index\r | |
973 | static uint_fast8_t startcycles; // current number of start-zeros\r | |
974 | static uint_fast16_t cnt; // counts sequenced highbits - to detect end\r | |
975 | static uint_fast8_t last_val = 1;\r | |
775fabfa | 976 | \r |
977 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r | |
978 | {\r | |
df24bb50 | 979 | startcycles++;\r |
775fabfa | 980 | }\r |
981 | else\r | |
982 | {\r | |
df24bb50 | 983 | startcycles = 0;\r |
984 | \r | |
985 | if (! val || buf_idx != 0) // start or continue logging on "0", "1" cannot init logging\r | |
986 | {\r | |
987 | if (last_val == val)\r | |
988 | {\r | |
989 | cnt++;\r | |
990 | \r | |
991 | if (val && cnt > ENDBITS) // if high received then look at log-stop condition\r | |
992 | { // if stop condition is true, output on uart\r | |
993 | uint_fast8_t i8;\r | |
994 | uint_fast16_t i;\r | |
995 | uint_fast16_t j;\r | |
996 | uint_fast8_t v = '1';\r | |
997 | uint_fast16_t d;\r | |
998 | \r | |
999 | for (i8 = 0; i8 < STARTCYCLES; i8++)\r | |
1000 | {\r | |
1001 | irmp_uart_putc ('0'); // the ignored starting zeros\r | |
1002 | }\r | |
1003 | \r | |
1004 | for (i = 0; i < buf_idx; i++)\r | |
1005 | {\r | |
1006 | d = buf[i];\r | |
1007 | \r | |
1008 | if (d == 0xff)\r | |
1009 | {\r | |
1010 | i++;\r | |
1011 | d = buf[i];\r | |
1012 | i++;\r | |
1013 | d |= ((uint_fast16_t) buf[i] << 8);\r | |
1014 | }\r | |
1015 | \r | |
1016 | for (j = 0; j < d; j++)\r | |
1017 | {\r | |
1018 | irmp_uart_putc (v);\r | |
1019 | }\r | |
1020 | \r | |
1021 | v = (v == '1') ? '0' : '1';\r | |
1022 | }\r | |
1023 | \r | |
1024 | for (i8 = 0; i8 < 20; i8++)\r | |
1025 | {\r | |
1026 | irmp_uart_putc ('1');\r | |
1027 | }\r | |
1028 | \r | |
1029 | irmp_uart_putc ('\n');\r | |
1030 | buf_idx = 0;\r | |
1031 | last_val = 1;\r | |
1032 | cnt = 0;\r | |
1033 | }\r | |
1034 | }\r | |
1035 | else if (buf_idx < DATALEN - 3)\r | |
1036 | {\r | |
1037 | if (cnt >= 0xff)\r | |
1038 | {\r | |
1039 | buf[buf_idx++] = 0xff;\r | |
1040 | buf[buf_idx++] = (cnt & 0xff);\r | |
1041 | buf[buf_idx] = (cnt >> 8);\r | |
1042 | }\r | |
1043 | else\r | |
1044 | {\r | |
1045 | buf[buf_idx] = cnt;\r | |
1046 | }\r | |
1047 | \r | |
1048 | buf_idx++;\r | |
1049 | cnt = 1;\r | |
1050 | last_val = val;\r | |
1051 | }\r | |
1052 | }\r | |
775fabfa | 1053 | }\r |
1054 | }\r | |
1055 | \r | |
4225a882 | 1056 | #else\r |
d155e9ab | 1057 | #define irmp_log(val)\r |
6c3c57e6 | 1058 | #endif //IRMP_LOGGING\r |
4225a882 | 1059 | \r |
1060 | typedef struct\r | |
1061 | {\r | |
0834784c | 1062 | uint_fast8_t protocol; // ir protocol\r |
1063 | uint_fast8_t pulse_1_len_min; // minimum length of pulse with bit value 1\r | |
1064 | uint_fast8_t pulse_1_len_max; // maximum length of pulse with bit value 1\r | |
1065 | uint_fast8_t pause_1_len_min; // minimum length of pause with bit value 1\r | |
1066 | uint_fast8_t pause_1_len_max; // maximum length of pause with bit value 1\r | |
1067 | uint_fast8_t pulse_0_len_min; // minimum length of pulse with bit value 0\r | |
1068 | uint_fast8_t pulse_0_len_max; // maximum length of pulse with bit value 0\r | |
1069 | uint_fast8_t pause_0_len_min; // minimum length of pause with bit value 0\r | |
1070 | uint_fast8_t pause_0_len_max; // maximum length of pause with bit value 0\r | |
1071 | uint_fast8_t address_offset; // address offset\r | |
1072 | uint_fast8_t address_end; // end of address\r | |
1073 | uint_fast8_t command_offset; // command offset\r | |
1074 | uint_fast8_t command_end; // end of command\r | |
1075 | uint_fast8_t complete_len; // complete length of frame\r | |
1076 | uint_fast8_t stop_bit; // flag: frame has stop bit\r | |
1077 | uint_fast8_t lsb_first; // flag: LSB first\r | |
1078 | uint_fast8_t flags; // some flags\r | |
4225a882 | 1079 | } IRMP_PARAMETER;\r |
1080 | \r | |
1081 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
1082 | \r | |
63b94f48 | 1083 | static const PROGMEM IRMP_PARAMETER sircs_param =\r |
4225a882 | 1084 | {\r |
d155e9ab | 1085 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol\r |
1086 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1087 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1088 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1089 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1090 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1091 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1092 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1093 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1094 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset\r | |
1095 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address\r | |
1096 | SIRCS_COMMAND_OFFSET, // command_offset: command offset\r | |
1097 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command\r | |
1098 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1099 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1100 | SIRCS_LSB, // lsb_first: flag: LSB first\r |
1101 | SIRCS_FLAGS // flags: some flags\r | |
4225a882 | 1102 | };\r |
1103 | \r | |
1104 | #endif\r | |
1105 | \r | |
1106 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1107 | \r | |
63b94f48 | 1108 | static const PROGMEM IRMP_PARAMETER nec_param =\r |
4225a882 | 1109 | {\r |
d155e9ab | 1110 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
1111 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1112 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1113 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1114 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1115 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1116 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1117 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1118 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1119 | NEC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1120 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address\r | |
1121 | NEC_COMMAND_OFFSET, // command_offset: command offset\r | |
1122 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command\r | |
1123 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1124 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1125 | NEC_LSB, // lsb_first: flag: LSB first\r |
1126 | NEC_FLAGS // flags: some flags\r | |
4225a882 | 1127 | };\r |
1128 | \r | |
63b94f48 | 1129 | static const PROGMEM IRMP_PARAMETER nec_rep_param =\r |
46dd89b7 | 1130 | {\r |
d155e9ab | 1131 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
1132 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1133 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1134 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1135 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1136 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1137 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1138 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1139 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1140 | 0, // address_offset: address offset\r | |
1141 | 0, // address_end: end of address\r | |
1142 | 0, // command_offset: command offset\r | |
1143 | 0, // command_end: end of command\r | |
1144 | 0, // complete_len: complete length of frame\r | |
1145 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1146 | NEC_LSB, // lsb_first: flag: LSB first\r |
1147 | NEC_FLAGS // flags: some flags\r | |
46dd89b7 | 1148 | };\r |
1149 | \r | |
4225a882 | 1150 | #endif\r |
1151 | \r | |
35213800 | 1152 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
fc80d688 | 1153 | \r |
63b94f48 | 1154 | static const PROGMEM IRMP_PARAMETER nec42_param =\r |
fc80d688 | 1155 | {\r |
35213800 | 1156 | IRMP_NEC42_PROTOCOL, // protocol: ir protocol\r |
fc80d688 | 1157 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
1158 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1159 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1160 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1161 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1162 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1163 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1164 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
35213800 | 1165 | NEC42_ADDRESS_OFFSET, // address_offset: address offset\r |
7644ac04 | 1166 | NEC42_ADDRESS_OFFSET + NEC42_ADDRESS_LEN, // address_end: end of address\r |
35213800 | 1167 | NEC42_COMMAND_OFFSET, // command_offset: command offset\r |
7644ac04 | 1168 | NEC42_COMMAND_OFFSET + NEC42_COMMAND_LEN, // command_end: end of command\r |
35213800 | 1169 | NEC42_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r |
1170 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1171 | NEC_LSB, // lsb_first: flag: LSB first\r | |
1172 | NEC_FLAGS // flags: some flags\r | |
fc80d688 | 1173 | };\r |
1174 | \r | |
1175 | #endif\r | |
1176 | \r | |
69da6090 | 1177 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
1178 | \r | |
1179 | static const PROGMEM IRMP_PARAMETER lgair_param =\r | |
1180 | {\r | |
1181 | IRMP_LGAIR_PROTOCOL, // protocol: ir protocol\r | |
1182 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1183 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1184 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1185 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1186 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1187 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1188 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1189 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1190 | LGAIR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1191 | LGAIR_ADDRESS_OFFSET + LGAIR_ADDRESS_LEN, // address_end: end of address\r | |
1192 | LGAIR_COMMAND_OFFSET, // command_offset: command offset\r | |
1193 | LGAIR_COMMAND_OFFSET + LGAIR_COMMAND_LEN, // command_end: end of command\r | |
1194 | LGAIR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1195 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1196 | NEC_LSB, // lsb_first: flag: LSB first\r | |
1197 | NEC_FLAGS // flags: some flags\r | |
1198 | };\r | |
1199 | \r | |
1200 | #endif\r | |
1201 | \r | |
4225a882 | 1202 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
1203 | \r | |
63b94f48 | 1204 | static const PROGMEM IRMP_PARAMETER samsung_param =\r |
4225a882 | 1205 | {\r |
d155e9ab | 1206 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol\r |
1207 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1208 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1209 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1210 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1211 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1212 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1213 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1214 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1215 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset\r | |
1216 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address\r | |
1217 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset\r | |
1218 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command\r | |
1219 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1220 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1221 | SAMSUNG_LSB, // lsb_first: flag: LSB first\r |
1222 | SAMSUNG_FLAGS // flags: some flags\r | |
4225a882 | 1223 | };\r |
1224 | \r | |
1225 | #endif\r | |
1226 | \r | |
b85cb27d | 1227 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
1228 | \r | |
1229 | static const PROGMEM IRMP_PARAMETER telefunken_param =\r | |
1230 | {\r | |
1231 | IRMP_TELEFUNKEN_PROTOCOL, // protocol: ir protocol\r | |
1232 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1233 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1234 | TELEFUNKEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1235 | TELEFUNKEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1236 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1237 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1238 | TELEFUNKEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1239 | TELEFUNKEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1240 | TELEFUNKEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1241 | TELEFUNKEN_ADDRESS_OFFSET + TELEFUNKEN_ADDRESS_LEN, // address_end: end of address\r | |
1242 | TELEFUNKEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1243 | TELEFUNKEN_COMMAND_OFFSET + TELEFUNKEN_COMMAND_LEN, // command_end: end of command\r | |
1244 | TELEFUNKEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1245 | TELEFUNKEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1246 | TELEFUNKEN_LSB, // lsb_first: flag: LSB first\r | |
1247 | TELEFUNKEN_FLAGS // flags: some flags\r | |
1248 | };\r | |
1249 | \r | |
1250 | #endif\r | |
1251 | \r | |
4225a882 | 1252 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
1253 | \r | |
63b94f48 | 1254 | static const PROGMEM IRMP_PARAMETER matsushita_param =\r |
4225a882 | 1255 | {\r |
d155e9ab | 1256 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol\r |
1257 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1258 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1259 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1260 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1261 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1262 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1263 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1264 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1265 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1266 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address\r | |
1267 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset\r | |
1268 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command\r | |
1269 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1270 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1271 | MATSUSHITA_LSB, // lsb_first: flag: LSB first\r |
1272 | MATSUSHITA_FLAGS // flags: some flags\r | |
4225a882 | 1273 | };\r |
1274 | \r | |
1275 | #endif\r | |
1276 | \r | |
1277 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1278 | \r | |
63b94f48 | 1279 | static const PROGMEM IRMP_PARAMETER kaseikyo_param =\r |
4225a882 | 1280 | {\r |
d155e9ab | 1281 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol\r |
1282 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1283 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1284 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1285 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1286 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1287 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1288 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1289 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1290 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1291 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address\r | |
1292 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset\r | |
1293 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command\r | |
1294 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1295 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1296 | KASEIKYO_LSB, // lsb_first: flag: LSB first\r |
1297 | KASEIKYO_FLAGS // flags: some flags\r | |
4225a882 | 1298 | };\r |
1299 | \r | |
1300 | #endif\r | |
1301 | \r | |
95b27043 | 1302 | #if IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
1303 | \r | |
1304 | static const PROGMEM IRMP_PARAMETER panasonic_param =\r | |
1305 | {\r | |
1306 | IRMP_PANASONIC_PROTOCOL, // protocol: ir protocol\r | |
1307 | PANASONIC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1308 | PANASONIC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1309 | PANASONIC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1310 | PANASONIC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1311 | PANASONIC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1312 | PANASONIC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1313 | PANASONIC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1314 | PANASONIC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1315 | PANASONIC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1316 | PANASONIC_ADDRESS_OFFSET + PANASONIC_ADDRESS_LEN, // address_end: end of address\r | |
1317 | PANASONIC_COMMAND_OFFSET, // command_offset: command offset\r | |
1318 | PANASONIC_COMMAND_OFFSET + PANASONIC_COMMAND_LEN, // command_end: end of command\r | |
1319 | PANASONIC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1320 | PANASONIC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1321 | PANASONIC_LSB, // lsb_first: flag: LSB first\r | |
1322 | PANASONIC_FLAGS // flags: some flags\r | |
1323 | };\r | |
1324 | \r | |
1325 | #endif\r | |
1326 | \r | |
7365350c | 1327 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
1328 | \r | |
1329 | static const PROGMEM IRMP_PARAMETER mitsu_heavy_param =\r | |
1330 | {\r | |
1331 | IRMP_MITSU_HEAVY_PROTOCOL, // protocol: ir protocol\r | |
1332 | MITSU_HEAVY_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1333 | MITSU_HEAVY_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1334 | MITSU_HEAVY_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1335 | MITSU_HEAVY_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1336 | MITSU_HEAVY_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1337 | MITSU_HEAVY_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1338 | MITSU_HEAVY_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1339 | MITSU_HEAVY_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1340 | MITSU_HEAVY_ADDRESS_OFFSET, // address_offset: address offset\r | |
1341 | MITSU_HEAVY_ADDRESS_OFFSET + MITSU_HEAVY_ADDRESS_LEN, // address_end: end of address\r | |
1342 | MITSU_HEAVY_COMMAND_OFFSET, // command_offset: command offset\r | |
1343 | MITSU_HEAVY_COMMAND_OFFSET + MITSU_HEAVY_COMMAND_LEN, // command_end: end of command\r | |
1344 | MITSU_HEAVY_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1345 | MITSU_HEAVY_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1346 | MITSU_HEAVY_LSB, // lsb_first: flag: LSB first\r | |
1347 | MITSU_HEAVY_FLAGS // flags: some flags\r | |
1348 | };\r | |
1349 | \r | |
1350 | #endif\r | |
1351 | \r | |
4bcf310e | 1352 | #if IRMP_SUPPORT_VINCENT_PROTOCOL == 1\r |
1353 | \r | |
1354 | static const PROGMEM IRMP_PARAMETER vincent_param =\r | |
1355 | {\r | |
1356 | IRMP_VINCENT_PROTOCOL, // protocol: ir protocol\r | |
1357 | VINCENT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1358 | VINCENT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1359 | VINCENT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1360 | VINCENT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1361 | VINCENT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1362 | VINCENT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1363 | VINCENT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1364 | VINCENT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1365 | VINCENT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1366 | VINCENT_ADDRESS_OFFSET + VINCENT_ADDRESS_LEN, // address_end: end of address\r | |
1367 | VINCENT_COMMAND_OFFSET, // command_offset: command offset\r | |
1368 | VINCENT_COMMAND_OFFSET + VINCENT_COMMAND_LEN, // command_end: end of command\r | |
1369 | VINCENT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1370 | VINCENT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1371 | VINCENT_LSB, // lsb_first: flag: LSB first\r | |
1372 | VINCENT_FLAGS // flags: some flags\r | |
1373 | };\r | |
1374 | \r | |
1375 | #endif\r | |
1376 | \r | |
4225a882 | 1377 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
1378 | \r | |
63b94f48 | 1379 | static const PROGMEM IRMP_PARAMETER recs80_param =\r |
4225a882 | 1380 | {\r |
d155e9ab | 1381 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol\r |
1382 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1383 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1384 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1385 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1386 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1387 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1388 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1389 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1390 | RECS80_ADDRESS_OFFSET, // address_offset: address offset\r | |
1391 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address\r | |
1392 | RECS80_COMMAND_OFFSET, // command_offset: command offset\r | |
1393 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command\r | |
1394 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1395 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1396 | RECS80_LSB, // lsb_first: flag: LSB first\r |
1397 | RECS80_FLAGS // flags: some flags\r | |
4225a882 | 1398 | };\r |
1399 | \r | |
1400 | #endif\r | |
1401 | \r | |
1402 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1403 | \r | |
63b94f48 | 1404 | static const PROGMEM IRMP_PARAMETER rc5_param =\r |
4225a882 | 1405 | {\r |
d155e9ab | 1406 | IRMP_RC5_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1407 | RC5_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1408 | RC5_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1409 | RC5_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1410 | RC5_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1411 | 0, // pulse_0_len_min: here: not used\r |
1412 | 0, // pulse_0_len_max: here: not used\r | |
1413 | 0, // pause_0_len_min: here: not used\r | |
1414 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1415 | RC5_ADDRESS_OFFSET, // address_offset: address offset\r |
1416 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address\r | |
1417 | RC5_COMMAND_OFFSET, // command_offset: command offset\r | |
1418 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command\r | |
1419 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1420 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1421 | RC5_LSB, // lsb_first: flag: LSB first\r |
1422 | RC5_FLAGS // flags: some flags\r | |
4225a882 | 1423 | };\r |
1424 | \r | |
1425 | #endif\r | |
1426 | \r | |
c2b70f0b | 1427 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
1428 | \r | |
1429 | static const PROGMEM IRMP_PARAMETER s100_param =\r | |
1430 | {\r | |
1431 | IRMP_S100_PROTOCOL, // protocol: ir protocol\r | |
1432 | S100_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1433 | S100_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1434 | S100_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1435 | S100_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1436 | 0, // pulse_0_len_min: here: not used\r | |
1437 | 0, // pulse_0_len_max: here: not used\r | |
1438 | 0, // pause_0_len_min: here: not used\r | |
1439 | 0, // pause_0_len_max: here: not used\r | |
1440 | S100_ADDRESS_OFFSET, // address_offset: address offset\r | |
1441 | S100_ADDRESS_OFFSET + S100_ADDRESS_LEN, // address_end: end of address\r | |
1442 | S100_COMMAND_OFFSET, // command_offset: command offset\r | |
1443 | S100_COMMAND_OFFSET + S100_COMMAND_LEN, // command_end: end of command\r | |
1444 | S100_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1445 | S100_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1446 | S100_LSB, // lsb_first: flag: LSB first\r | |
1447 | S100_FLAGS // flags: some flags\r | |
1448 | };\r | |
1449 | \r | |
1450 | #endif\r | |
1451 | \r | |
4225a882 | 1452 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
1453 | \r | |
63b94f48 | 1454 | static const PROGMEM IRMP_PARAMETER denon_param =\r |
4225a882 | 1455 | {\r |
d155e9ab | 1456 | IRMP_DENON_PROTOCOL, // protocol: ir protocol\r |
1457 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1458 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1459 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1460 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1461 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1462 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1463 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1464 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1465 | DENON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1466 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address\r | |
1467 | DENON_COMMAND_OFFSET, // command_offset: command offset\r | |
1468 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command\r | |
1469 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1470 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1471 | DENON_LSB, // lsb_first: flag: LSB first\r |
1472 | DENON_FLAGS // flags: some flags\r | |
4225a882 | 1473 | };\r |
1474 | \r | |
1475 | #endif\r | |
1476 | \r | |
1477 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
1478 | \r | |
63b94f48 | 1479 | static const PROGMEM IRMP_PARAMETER rc6_param =\r |
4225a882 | 1480 | {\r |
d155e9ab | 1481 | IRMP_RC6_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1482 | \r |
1483 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1484 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1485 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1486 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1487 | 0, // pulse_0_len_min: here: not used\r |
1488 | 0, // pulse_0_len_max: here: not used\r | |
1489 | 0, // pause_0_len_min: here: not used\r | |
1490 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1491 | RC6_ADDRESS_OFFSET, // address_offset: address offset\r |
1492 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address\r | |
1493 | RC6_COMMAND_OFFSET, // command_offset: command offset\r | |
1494 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command\r | |
1495 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame\r | |
1496 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1497 | RC6_LSB, // lsb_first: flag: LSB first\r |
1498 | RC6_FLAGS // flags: some flags\r | |
4225a882 | 1499 | };\r |
1500 | \r | |
1501 | #endif\r | |
1502 | \r | |
1503 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1504 | \r | |
63b94f48 | 1505 | static const PROGMEM IRMP_PARAMETER recs80ext_param =\r |
4225a882 | 1506 | {\r |
d155e9ab | 1507 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol\r |
1508 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1509 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1510 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1511 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1512 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1513 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1514 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1515 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1516 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1517 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address\r | |
1518 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset\r | |
1519 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command\r | |
1520 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1521 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1522 | RECS80EXT_LSB, // lsb_first: flag: LSB first\r |
1523 | RECS80EXT_FLAGS // flags: some flags\r | |
4225a882 | 1524 | };\r |
1525 | \r | |
1526 | #endif\r | |
1527 | \r | |
504d9df9 | 1528 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
4225a882 | 1529 | \r |
63b94f48 | 1530 | static const PROGMEM IRMP_PARAMETER nubert_param =\r |
4225a882 | 1531 | {\r |
d155e9ab | 1532 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol\r |
1533 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1534 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1535 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1536 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1537 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1538 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1539 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1540 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1541 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1542 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address\r | |
1543 | NUBERT_COMMAND_OFFSET, // command_offset: command offset\r | |
1544 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command\r | |
1545 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1546 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1547 | NUBERT_LSB, // lsb_first: flag: LSB first\r |
1548 | NUBERT_FLAGS // flags: some flags\r | |
4225a882 | 1549 | };\r |
1550 | \r | |
1551 | #endif\r | |
1552 | \r | |
0715cf5e | 1553 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
1554 | \r | |
1555 | static const PROGMEM IRMP_PARAMETER fan_param =\r | |
1556 | {\r | |
1557 | IRMP_FAN_PROTOCOL, // protocol: ir protocol\r | |
1558 | FAN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1559 | FAN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1560 | FAN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1561 | FAN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1562 | FAN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1563 | FAN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1564 | FAN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1565 | FAN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1566 | FAN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1567 | FAN_ADDRESS_OFFSET + FAN_ADDRESS_LEN, // address_end: end of address\r | |
1568 | FAN_COMMAND_OFFSET, // command_offset: command offset\r | |
1569 | FAN_COMMAND_OFFSET + FAN_COMMAND_LEN, // command_end: end of command\r | |
1570 | FAN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1571 | FAN_STOP_BIT, // stop_bit: flag: frame has NO stop bit\r | |
1572 | FAN_LSB, // lsb_first: flag: LSB first\r | |
1573 | FAN_FLAGS // flags: some flags\r | |
1574 | };\r | |
1575 | \r | |
1576 | #endif\r | |
1577 | \r | |
0a2f634b | 1578 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
1579 | \r | |
1580 | static const PROGMEM IRMP_PARAMETER speaker_param =\r | |
1581 | {\r | |
1582 | IRMP_SPEAKER_PROTOCOL, // protocol: ir protocol\r | |
1583 | SPEAKER_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1584 | SPEAKER_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1585 | SPEAKER_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1586 | SPEAKER_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1587 | SPEAKER_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1588 | SPEAKER_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1589 | SPEAKER_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1590 | SPEAKER_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1591 | SPEAKER_ADDRESS_OFFSET, // address_offset: address offset\r | |
1592 | SPEAKER_ADDRESS_OFFSET + SPEAKER_ADDRESS_LEN, // address_end: end of address\r | |
1593 | SPEAKER_COMMAND_OFFSET, // command_offset: command offset\r | |
1594 | SPEAKER_COMMAND_OFFSET + SPEAKER_COMMAND_LEN, // command_end: end of command\r | |
1595 | SPEAKER_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1596 | SPEAKER_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1597 | SPEAKER_LSB, // lsb_first: flag: LSB first\r | |
1598 | SPEAKER_FLAGS // flags: some flags\r | |
1599 | };\r | |
1600 | \r | |
1601 | #endif\r | |
1602 | \r | |
504d9df9 | 1603 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
1604 | \r | |
63b94f48 | 1605 | static const PROGMEM IRMP_PARAMETER bang_olufsen_param =\r |
504d9df9 | 1606 | {\r |
d155e9ab | 1607 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol\r |
1608 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1609 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1610 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1611 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1612 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1613 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1614 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1615 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1616 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1617 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address\r | |
1618 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1619 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command\r | |
1620 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1621 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1622 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first\r |
1623 | BANG_OLUFSEN_FLAGS // flags: some flags\r | |
504d9df9 | 1624 | };\r |
1625 | \r | |
1626 | #endif\r | |
1627 | \r | |
89e8cafb | 1628 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
1629 | \r | |
0834784c | 1630 | static uint_fast8_t first_bit;\r |
592411d1 | 1631 | \r |
63b94f48 | 1632 | static const PROGMEM IRMP_PARAMETER grundig_param =\r |
592411d1 | 1633 | {\r |
d155e9ab | 1634 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1635 | \r |
89e8cafb | 1636 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1637 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1638 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1639 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1640 | 0, // pulse_0_len_min: here: not used\r |
1641 | 0, // pulse_0_len_max: here: not used\r | |
1642 | 0, // pause_0_len_min: here: not used\r | |
1643 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1644 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset\r |
1645 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address\r | |
1646 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset\r | |
1647 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!)\r | |
1648 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG!\r | |
89e8cafb | 1649 | GRUNDIG_NOKIA_IR60_STOP_BIT, // stop_bit: flag: frame has stop bit\r |
1650 | GRUNDIG_NOKIA_IR60_LSB, // lsb_first: flag: LSB first\r | |
1651 | GRUNDIG_NOKIA_IR60_FLAGS // flags: some flags\r | |
592411d1 | 1652 | };\r |
1653 | \r | |
1654 | #endif\r | |
1655 | \r | |
12948cf3 | 1656 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
a7054daf | 1657 | \r |
63b94f48 | 1658 | static const PROGMEM IRMP_PARAMETER ruwido_param =\r |
a7054daf | 1659 | {\r |
12948cf3 | 1660 | IRMP_RUWIDO_PROTOCOL, // protocol: ir protocol\r |
1661 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1662 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1663 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1664 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1665 | 0, // pulse_0_len_min: here: not used\r |
1666 | 0, // pulse_0_len_max: here: not used\r | |
1667 | 0, // pause_0_len_min: here: not used\r | |
1668 | 0, // pause_0_len_max: here: not used\r | |
12948cf3 | 1669 | RUWIDO_ADDRESS_OFFSET, // address_offset: address offset\r |
1670 | RUWIDO_ADDRESS_OFFSET + RUWIDO_ADDRESS_LEN, // address_end: end of address\r | |
1671 | RUWIDO_COMMAND_OFFSET, // command_offset: command offset\r | |
1672 | RUWIDO_COMMAND_OFFSET + RUWIDO_COMMAND_LEN, // command_end: end of command\r | |
1673 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: SIEMENS instead of RUWIDO!\r | |
1674 | SIEMENS_OR_RUWIDO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1675 | SIEMENS_OR_RUWIDO_LSB, // lsb_first: flag: LSB first\r | |
1676 | SIEMENS_OR_RUWIDO_FLAGS // flags: some flags\r | |
a7054daf | 1677 | };\r |
1678 | \r | |
1679 | #endif\r | |
1680 | \r | |
48664931 | 1681 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
b5ea7869 | 1682 | \r |
63b94f48 | 1683 | static const PROGMEM IRMP_PARAMETER fdc_param =\r |
b5ea7869 | 1684 | {\r |
48664931 | 1685 | IRMP_FDC_PROTOCOL, // protocol: ir protocol\r |
1686 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1687 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1688 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1689 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1690 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1691 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1692 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1693 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1694 | FDC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1695 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r | |
1696 | FDC_COMMAND_OFFSET, // command_offset: command offset\r | |
1697 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r | |
1698 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1699 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1700 | FDC_LSB, // lsb_first: flag: LSB first\r | |
1701 | FDC_FLAGS // flags: some flags\r | |
b5ea7869 | 1702 | };\r |
1703 | \r | |
1704 | #endif\r | |
1705 | \r | |
9e16d699 | 1706 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
1707 | \r | |
63b94f48 | 1708 | static const PROGMEM IRMP_PARAMETER rccar_param =\r |
9e16d699 | 1709 | {\r |
1710 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol\r | |
1711 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1712 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1713 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1714 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1715 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1716 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1717 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1718 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1719 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1720 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address\r | |
1721 | RCCAR_COMMAND_OFFSET, // command_offset: command offset\r | |
1722 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command\r | |
1723 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1724 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1725 | RCCAR_LSB, // lsb_first: flag: LSB first\r | |
1726 | RCCAR_FLAGS // flags: some flags\r | |
1727 | };\r | |
1728 | \r | |
1729 | #endif\r | |
1730 | \r | |
9405f84a | 1731 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
1732 | \r | |
63b94f48 | 1733 | static const PROGMEM IRMP_PARAMETER nikon_param =\r |
9405f84a | 1734 | {\r |
1735 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol\r | |
1736 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1737 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1738 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1739 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1740 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1741 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1742 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1743 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1744 | NIKON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1745 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address\r | |
1746 | NIKON_COMMAND_OFFSET, // command_offset: command offset\r | |
1747 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command\r | |
1748 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1749 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1750 | NIKON_LSB, // lsb_first: flag: LSB first\r | |
1751 | NIKON_FLAGS // flags: some flags\r | |
1752 | };\r | |
1753 | \r | |
1754 | #endif\r | |
1755 | \r | |
111d6191 | 1756 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
1757 | \r | |
63b94f48 | 1758 | static const PROGMEM IRMP_PARAMETER kathrein_param =\r |
111d6191 | 1759 | {\r |
1760 | IRMP_KATHREIN_PROTOCOL, // protocol: ir protocol\r | |
1761 | KATHREIN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1762 | KATHREIN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1763 | KATHREIN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1764 | KATHREIN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1765 | KATHREIN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1766 | KATHREIN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1767 | KATHREIN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1768 | KATHREIN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1769 | KATHREIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1770 | KATHREIN_ADDRESS_OFFSET + KATHREIN_ADDRESS_LEN, // address_end: end of address\r | |
1771 | KATHREIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1772 | KATHREIN_COMMAND_OFFSET + KATHREIN_COMMAND_LEN, // command_end: end of command\r | |
1773 | KATHREIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1774 | KATHREIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1775 | KATHREIN_LSB, // lsb_first: flag: LSB first\r | |
1776 | KATHREIN_FLAGS // flags: some flags\r | |
1777 | };\r | |
1778 | \r | |
1779 | #endif\r | |
1780 | \r | |
deba2a0a | 1781 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
1782 | \r | |
63b94f48 | 1783 | static const PROGMEM IRMP_PARAMETER netbox_param =\r |
deba2a0a | 1784 | {\r |
1785 | IRMP_NETBOX_PROTOCOL, // protocol: ir protocol\r | |
a42d1ee6 | 1786 | NETBOX_PULSE_LEN, // pulse_1_len_min: minimum length of pulse with bit value 1, here: exact value\r |
1787 | NETBOX_PULSE_REST_LEN, // pulse_1_len_max: maximum length of pulse with bit value 1, here: rest value\r | |
1788 | NETBOX_PAUSE_LEN, // pause_1_len_min: minimum length of pause with bit value 1, here: exact value\r | |
1789 | NETBOX_PAUSE_REST_LEN, // pause_1_len_max: maximum length of pause with bit value 1, here: rest value\r | |
1790 | NETBOX_PULSE_LEN, // pulse_0_len_min: minimum length of pulse with bit value 0, here: exact value\r | |
1791 | NETBOX_PULSE_REST_LEN, // pulse_0_len_max: maximum length of pulse with bit value 0, here: rest value\r | |
1792 | NETBOX_PAUSE_LEN, // pause_0_len_min: minimum length of pause with bit value 0, here: exact value\r | |
1793 | NETBOX_PAUSE_REST_LEN, // pause_0_len_max: maximum length of pause with bit value 0, here: rest value\r | |
deba2a0a | 1794 | NETBOX_ADDRESS_OFFSET, // address_offset: address offset\r |
1795 | NETBOX_ADDRESS_OFFSET + NETBOX_ADDRESS_LEN, // address_end: end of address\r | |
1796 | NETBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1797 | NETBOX_COMMAND_OFFSET + NETBOX_COMMAND_LEN, // command_end: end of command\r | |
1798 | NETBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1799 | NETBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1800 | NETBOX_LSB, // lsb_first: flag: LSB first\r | |
1801 | NETBOX_FLAGS // flags: some flags\r | |
1802 | };\r | |
1803 | \r | |
1804 | #endif\r | |
1805 | \r | |
f50e01e7 | 1806 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
1807 | \r | |
63b94f48 | 1808 | static const PROGMEM IRMP_PARAMETER lego_param =\r |
f50e01e7 | 1809 | {\r |
1810 | IRMP_LEGO_PROTOCOL, // protocol: ir protocol\r | |
1811 | LEGO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1812 | LEGO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1813 | LEGO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1814 | LEGO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1815 | LEGO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1816 | LEGO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1817 | LEGO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1818 | LEGO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1819 | LEGO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1820 | LEGO_ADDRESS_OFFSET + LEGO_ADDRESS_LEN, // address_end: end of address\r | |
1821 | LEGO_COMMAND_OFFSET, // command_offset: command offset\r | |
1822 | LEGO_COMMAND_OFFSET + LEGO_COMMAND_LEN, // command_end: end of command\r | |
1823 | LEGO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1824 | LEGO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1825 | LEGO_LSB, // lsb_first: flag: LSB first\r | |
1826 | LEGO_FLAGS // flags: some flags\r | |
1827 | };\r | |
1828 | \r | |
1829 | #endif\r | |
1830 | \r | |
beda975f | 1831 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
1832 | \r | |
63b94f48 | 1833 | static const PROGMEM IRMP_PARAMETER thomson_param =\r |
beda975f | 1834 | {\r |
1835 | IRMP_THOMSON_PROTOCOL, // protocol: ir protocol\r | |
1836 | THOMSON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1837 | THOMSON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1838 | THOMSON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1839 | THOMSON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1840 | THOMSON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1841 | THOMSON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1842 | THOMSON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1843 | THOMSON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1844 | THOMSON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1845 | THOMSON_ADDRESS_OFFSET + THOMSON_ADDRESS_LEN, // address_end: end of address\r | |
1846 | THOMSON_COMMAND_OFFSET, // command_offset: command offset\r | |
1847 | THOMSON_COMMAND_OFFSET + THOMSON_COMMAND_LEN, // command_end: end of command\r | |
1848 | THOMSON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1849 | THOMSON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1850 | THOMSON_LSB, // lsb_first: flag: LSB first\r | |
1851 | THOMSON_FLAGS // flags: some flags\r | |
1852 | };\r | |
1853 | \r | |
1854 | #endif\r | |
1855 | \r | |
3a7e26e1 | 1856 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
1857 | \r | |
1858 | static const PROGMEM IRMP_PARAMETER bose_param =\r | |
1859 | {\r | |
1860 | IRMP_BOSE_PROTOCOL, // protocol: ir protocol\r | |
1861 | BOSE_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1862 | BOSE_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1863 | BOSE_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1864 | BOSE_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1865 | BOSE_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1866 | BOSE_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1867 | BOSE_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1868 | BOSE_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1869 | BOSE_ADDRESS_OFFSET, // address_offset: address offset\r | |
1870 | BOSE_ADDRESS_OFFSET + BOSE_ADDRESS_LEN, // address_end: end of address\r | |
1871 | BOSE_COMMAND_OFFSET, // command_offset: command offset\r | |
1872 | BOSE_COMMAND_OFFSET + BOSE_COMMAND_LEN, // command_end: end of command\r | |
1873 | BOSE_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1874 | BOSE_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1875 | BOSE_LSB, // lsb_first: flag: LSB first\r | |
1876 | BOSE_FLAGS // flags: some flags\r | |
1877 | };\r | |
1878 | \r | |
1879 | #endif\r | |
1880 | \r | |
2fb27bfe | 1881 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
1882 | \r | |
1883 | static const PROGMEM IRMP_PARAMETER a1tvbox_param =\r | |
1884 | {\r | |
1885 | IRMP_A1TVBOX_PROTOCOL, // protocol: ir protocol\r | |
1886 | \r | |
1887 | A1TVBOX_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1888 | A1TVBOX_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1889 | A1TVBOX_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1890 | A1TVBOX_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1891 | 0, // pulse_0_len_min: here: not used\r | |
1892 | 0, // pulse_0_len_max: here: not used\r | |
1893 | 0, // pause_0_len_min: here: not used\r | |
1894 | 0, // pause_0_len_max: here: not used\r | |
1895 | A1TVBOX_ADDRESS_OFFSET, // address_offset: address offset\r | |
1896 | A1TVBOX_ADDRESS_OFFSET + A1TVBOX_ADDRESS_LEN, // address_end: end of address\r | |
1897 | A1TVBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1898 | A1TVBOX_COMMAND_OFFSET + A1TVBOX_COMMAND_LEN, // command_end: end of command\r | |
1899 | A1TVBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1900 | A1TVBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1901 | A1TVBOX_LSB, // lsb_first: flag: LSB first\r | |
1902 | A1TVBOX_FLAGS // flags: some flags\r | |
1903 | };\r | |
1904 | \r | |
1905 | #endif\r | |
1906 | \r | |
0715cf5e | 1907 | #if IRMP_SUPPORT_MERLIN_PROTOCOL == 1\r |
1908 | \r | |
1909 | static const PROGMEM IRMP_PARAMETER merlin_param =\r | |
1910 | {\r | |
1911 | IRMP_MERLIN_PROTOCOL, // protocol: ir protocol\r | |
1912 | \r | |
1913 | MERLIN_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1914 | MERLIN_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1915 | MERLIN_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1916 | MERLIN_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1917 | 0, // pulse_0_len_min: here: not used\r | |
1918 | 0, // pulse_0_len_max: here: not used\r | |
1919 | 0, // pause_0_len_min: here: not used\r | |
1920 | 0, // pause_0_len_max: here: not used\r | |
1921 | MERLIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1922 | MERLIN_ADDRESS_OFFSET + MERLIN_ADDRESS_LEN, // address_end: end of address\r | |
1923 | MERLIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1924 | MERLIN_COMMAND_OFFSET + MERLIN_COMMAND_LEN, // command_end: end of command\r | |
1925 | MERLIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1926 | MERLIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1927 | MERLIN_LSB, // lsb_first: flag: LSB first\r | |
1928 | MERLIN_FLAGS // flags: some flags\r | |
1929 | };\r | |
1930 | \r | |
1931 | #endif\r | |
1932 | \r | |
b85cb27d | 1933 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1934 | \r | |
1935 | static const PROGMEM IRMP_PARAMETER ortek_param =\r | |
1936 | {\r | |
1937 | IRMP_ORTEK_PROTOCOL, // protocol: ir protocol\r | |
1938 | \r | |
1939 | ORTEK_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1940 | ORTEK_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1941 | ORTEK_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1942 | ORTEK_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1943 | 0, // pulse_0_len_min: here: not used\r | |
1944 | 0, // pulse_0_len_max: here: not used\r | |
1945 | 0, // pause_0_len_min: here: not used\r | |
1946 | 0, // pause_0_len_max: here: not used\r | |
1947 | ORTEK_ADDRESS_OFFSET, // address_offset: address offset\r | |
1948 | ORTEK_ADDRESS_OFFSET + ORTEK_ADDRESS_LEN, // address_end: end of address\r | |
1949 | ORTEK_COMMAND_OFFSET, // command_offset: command offset\r | |
1950 | ORTEK_COMMAND_OFFSET + ORTEK_COMMAND_LEN, // command_end: end of command\r | |
1951 | ORTEK_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1952 | ORTEK_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1953 | ORTEK_LSB, // lsb_first: flag: LSB first\r | |
1954 | ORTEK_FLAGS // flags: some flags\r | |
1955 | };\r | |
1956 | \r | |
1957 | #endif\r | |
1958 | \r | |
40ca4604 | 1959 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
1960 | \r | |
1961 | static const PROGMEM IRMP_PARAMETER roomba_param =\r | |
1962 | {\r | |
1963 | IRMP_ROOMBA_PROTOCOL, // protocol: ir protocol\r | |
1964 | ROOMBA_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1965 | ROOMBA_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1966 | ROOMBA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1967 | ROOMBA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1968 | ROOMBA_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1969 | ROOMBA_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1970 | ROOMBA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1971 | ROOMBA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1972 | ROOMBA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1973 | ROOMBA_ADDRESS_OFFSET + ROOMBA_ADDRESS_LEN, // address_end: end of address\r | |
1974 | ROOMBA_COMMAND_OFFSET, // command_offset: command offset\r | |
1975 | ROOMBA_COMMAND_OFFSET + ROOMBA_COMMAND_LEN, // command_end: end of command\r | |
1976 | ROOMBA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1977 | ROOMBA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1978 | ROOMBA_LSB, // lsb_first: flag: LSB first\r | |
1979 | ROOMBA_FLAGS // flags: some flags\r | |
1980 | };\r | |
1981 | \r | |
1982 | #endif\r | |
1983 | \r | |
cb93f9e9 | 1984 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
1985 | \r | |
1986 | static const PROGMEM IRMP_PARAMETER rcmm_param =\r | |
1987 | {\r | |
faf6479d | 1988 | IRMP_RCMM32_PROTOCOL, // protocol: ir protocol\r |
0834784c | 1989 | \r |
faf6479d | 1990 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1991 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
cb93f9e9 | 1992 | 0, // pause_1_len_min: here: minimum length of short pause\r |
1993 | 0, // pause_1_len_max: here: maximum length of short pause\r | |
faf6479d | 1994 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_0_len_min: here: not used\r |
1995 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_0_len_max: here: not used\r | |
cb93f9e9 | 1996 | 0, // pause_0_len_min: here: not used\r |
1997 | 0, // pause_0_len_max: here: not used\r | |
faf6479d | 1998 | RCMM32_ADDRESS_OFFSET, // address_offset: address offset\r |
1999 | RCMM32_ADDRESS_OFFSET + RCMM32_ADDRESS_LEN, // address_end: end of address\r | |
2000 | RCMM32_COMMAND_OFFSET, // command_offset: command offset\r | |
2001 | RCMM32_COMMAND_OFFSET + RCMM32_COMMAND_LEN, // command_end: end of command\r | |
2002 | RCMM32_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2003 | RCMM32_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2004 | RCMM32_LSB, // lsb_first: flag: LSB first\r | |
2005 | RCMM32_FLAGS // flags: some flags\r | |
2006 | };\r | |
2007 | \r | |
2008 | #endif\r | |
2009 | \r | |
003c1008 | 2010 | #if IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
2011 | \r | |
2012 | static const PROGMEM IRMP_PARAMETER pentax_param =\r | |
2013 | {\r | |
2014 | IRMP_PENTAX_PROTOCOL, // protocol: ir protocol\r | |
2015 | PENTAX_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
2016 | PENTAX_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2017 | PENTAX_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2018 | PENTAX_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2019 | PENTAX_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2020 | PENTAX_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2021 | PENTAX_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2022 | PENTAX_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2023 | PENTAX_ADDRESS_OFFSET, // address_offset: address offset\r | |
2024 | PENTAX_ADDRESS_OFFSET + PENTAX_ADDRESS_LEN, // address_end: end of address\r | |
2025 | PENTAX_COMMAND_OFFSET, // command_offset: command offset\r | |
2026 | PENTAX_COMMAND_OFFSET + PENTAX_COMMAND_LEN, // command_end: end of command\r | |
2027 | PENTAX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2028 | PENTAX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2029 | PENTAX_LSB, // lsb_first: flag: LSB first\r | |
2030 | PENTAX_FLAGS // flags: some flags\r | |
2031 | };\r | |
2032 | \r | |
2033 | #endif\r | |
2034 | \r | |
43c535be | 2035 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
2036 | \r | |
2037 | static const PROGMEM IRMP_PARAMETER acp24_param =\r | |
2038 | {\r | |
2039 | IRMP_ACP24_PROTOCOL, // protocol: ir protocol\r | |
2040 | ACP24_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
2041 | ACP24_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2042 | ACP24_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2043 | ACP24_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2044 | ACP24_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2045 | ACP24_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2046 | ACP24_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2047 | ACP24_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2048 | ACP24_ADDRESS_OFFSET, // address_offset: address offset\r | |
2049 | ACP24_ADDRESS_OFFSET + ACP24_ADDRESS_LEN, // address_end: end of address\r | |
2050 | ACP24_COMMAND_OFFSET, // command_offset: command offset\r | |
2051 | ACP24_COMMAND_OFFSET + ACP24_COMMAND_LEN, // command_end: end of command\r | |
2052 | ACP24_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2053 | ACP24_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2054 | ACP24_LSB, // lsb_first: flag: LSB first\r | |
2055 | ACP24_FLAGS // flags: some flags\r | |
2056 | };\r | |
2057 | \r | |
2058 | #endif\r | |
2059 | \r | |
faf6479d | 2060 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r |
2061 | \r | |
2062 | static const PROGMEM IRMP_PARAMETER radio1_param =\r | |
2063 | {\r | |
2064 | IRMP_RADIO1_PROTOCOL, // protocol: ir protocol\r | |
0834784c | 2065 | \r |
faf6479d | 2066 | RADIO1_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
2067 | RADIO1_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2068 | RADIO1_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2069 | RADIO1_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2070 | RADIO1_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2071 | RADIO1_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2072 | RADIO1_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2073 | RADIO1_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2074 | RADIO1_ADDRESS_OFFSET, // address_offset: address offset\r | |
2075 | RADIO1_ADDRESS_OFFSET + RADIO1_ADDRESS_LEN, // address_end: end of address\r | |
2076 | RADIO1_COMMAND_OFFSET, // command_offset: command offset\r | |
2077 | RADIO1_COMMAND_OFFSET + RADIO1_COMMAND_LEN, // command_end: end of command\r | |
2078 | RADIO1_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2079 | RADIO1_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2080 | RADIO1_LSB, // lsb_first: flag: LSB first\r | |
2081 | RADIO1_FLAGS // flags: some flags\r | |
cb93f9e9 | 2082 | };\r |
2083 | \r | |
2084 | #endif\r | |
2085 | \r | |
c2b70f0b | 2086 | static uint_fast8_t irmp_bit; // current bit position\r |
2087 | static IRMP_PARAMETER irmp_param;\r | |
4225a882 | 2088 | \r |
6f750020 | 2089 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
c2b70f0b | 2090 | static IRMP_PARAMETER irmp_param2;\r |
6f750020 | 2091 | #endif\r |
2092 | \r | |
ea29682a | 2093 | static volatile uint_fast8_t irmp_ir_detected = FALSE;\r |
2094 | static volatile uint_fast8_t irmp_protocol;\r | |
2095 | static volatile uint_fast16_t irmp_address;\r | |
2096 | static volatile uint_fast16_t irmp_command;\r | |
2097 | static volatile uint_fast16_t irmp_id; // only used for SAMSUNG protocol\r | |
2098 | static volatile uint_fast8_t irmp_flags;\r | |
2099 | // static volatile uint_fast8_t irmp_busy_flag;\r | |
2100 | \r | |
2101 | #if defined(__MBED__)\r | |
2102 | // DigitalIn inputPin(IRMP_PIN, PullUp); // this requires mbed.h and source to be compiled as cpp\r | |
2103 | gpio_t gpioIRin; // use low level c function instead\r | |
2104 | #endif\r | |
2105 | \r | |
4225a882 | 2106 | \r |
48664931 | 2107 | #ifdef ANALYZE\r |
ea29682a | 2108 | #define input(x) (x)\r |
2109 | static uint_fast8_t IRMP_PIN;\r | |
2110 | static uint_fast8_t radio;\r | |
4225a882 | 2111 | #endif\r |
2112 | \r | |
2113 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2114 | * Initialize IRMP decoder\r | |
2115 | * @details Configures IRMP input pin\r | |
2116 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2117 | */\r | |
48664931 | 2118 | #ifndef ANALYZE\r |
4225a882 | 2119 | void\r |
2120 | irmp_init (void)\r | |
2121 | {\r | |
08f2dd9d | 2122 | #if defined(PIC_CCS) || defined(PIC_C18) // PIC: do nothing\r |
2123 | #elif defined (ARM_STM32) // STM32\r | |
95b27043 | 2124 | GPIO_InitTypeDef GPIO_InitStructure;\r |
2125 | \r | |
2126 | /* GPIOx clock enable */\r | |
2127 | # if defined (ARM_STM32L1XX)\r | |
2128 | RCC_AHBPeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2129 | # elif defined (ARM_STM32F10X)\r | |
2130 | RCC_APB2PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2131 | # elif defined (ARM_STM32F4XX)\r | |
2132 | RCC_AHB1PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2133 | # endif\r | |
2134 | \r | |
2135 | /* GPIO Configuration */\r | |
2136 | GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r | |
2137 | # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r | |
2138 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r | |
2139 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
2140 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
2141 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r | |
2142 | # elif defined (ARM_STM32F10X)\r | |
2143 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
2144 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r | |
2145 | # endif\r | |
2146 | GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r | |
2147 | \r | |
afd1e690 | 2148 | #elif defined(STELLARIS_ARM_CORTEX_M4)\r |
95b27043 | 2149 | // Enable the GPIO port\r |
2150 | ROM_SysCtlPeripheralEnable(IRMP_PORT_PERIPH);\r | |
2151 | \r | |
2152 | // Set as an input\r | |
2153 | ROM_GPIODirModeSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_DIR_MODE_IN);\r | |
2154 | ROM_GPIOPadConfigSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);\r | |
2155 | \r | |
aa276d72 | 2156 | #elif defined(__SDCC_stm8) // STM8\r |
aa276d72 | 2157 | IRMP_GPIO_STRUCT->DDR &= ~(1<<IRMP_BIT); // pin is input\r |
95b27043 | 2158 | IRMP_GPIO_STRUCT->CR1 |= (1<<IRMP_BIT); // activate pullup\r |
2159 | \r | |
df24bb50 | 2160 | #elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r |
95b27043 | 2161 | pinMode(IRMP_PIN, INPUT);\r |
2162 | \r | |
ea29682a | 2163 | #elif defined(__xtensa__) // ESP8266\r |
2164 | // select pin function\r | |
2165 | # if (IRMP_BIT_NUMBER == 12)\r | |
2166 | PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, FUNC_GPIO12);\r | |
2167 | // doesn't work for me:\r | |
2168 | // # elif (IRMP_BIT_NUMBER == 13)\r | |
2169 | // PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U , FUNC_GPIO13);\r | |
2170 | # else\r | |
2171 | # warning Please add PIN_FUNC_SELECT when necessary.\r | |
2172 | # endif\r | |
2173 | GPIO_DIS_OUTPUT(IRMP_BIT_NUMBER);\r | |
2174 | \r | |
2175 | #elif defined(__MBED__)\r | |
2176 | gpio_init_in_ex(&gpioIRin, IRMP_PIN, IRMP_PINMODE); // initialize input for IR diode\r | |
2177 | \r | |
08f2dd9d | 2178 | #else // AVR\r |
d155e9ab | 2179 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup\r |
2180 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input\r | |
93ba2e01 | 2181 | #endif\r |
4225a882 | 2182 | \r |
2183 | #if IRMP_LOGGING == 1\r | |
2184 | irmp_uart_init ();\r | |
2185 | #endif\r | |
2186 | }\r | |
2187 | #endif\r | |
2188 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2189 | * Get IRMP data\r | |
2190 | * @details gets decoded IRMP data\r | |
2191 | * @param pointer in order to store IRMP data\r | |
2192 | * @return TRUE: successful, FALSE: failed\r | |
2193 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2194 | */\r | |
716f8772 | 2195 | uint_fast8_t\r |
4225a882 | 2196 | irmp_get_data (IRMP_DATA * irmp_data_p)\r |
2197 | {\r | |
0834784c | 2198 | uint_fast8_t rtc = FALSE;\r |
4225a882 | 2199 | \r |
2200 | if (irmp_ir_detected)\r | |
2201 | {\r | |
df24bb50 | 2202 | switch (irmp_protocol)\r |
2203 | {\r | |
4225a882 | 2204 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 2205 | case IRMP_SAMSUNG_PROTOCOL:\r |
2206 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2207 | {\r | |
2208 | irmp_command &= 0xff;\r | |
2209 | irmp_command |= irmp_id << 8;\r | |
2210 | rtc = TRUE;\r | |
2211 | }\r | |
2212 | break;\r | |
956ea3ea | 2213 | \r |
2214 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r | |
df24bb50 | 2215 | case IRMP_SAMSUNG48_PROTOCOL:\r |
2216 | irmp_command = (irmp_command & 0x00FF) | ((irmp_id & 0x00FF) << 8);\r | |
2217 | rtc = TRUE;\r | |
2218 | break;\r | |
956ea3ea | 2219 | #endif\r |
4225a882 | 2220 | #endif\r |
956ea3ea | 2221 | \r |
4225a882 | 2222 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 2223 | case IRMP_NEC_PROTOCOL:\r |
2224 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2225 | {\r | |
2226 | irmp_command &= 0xff;\r | |
2227 | rtc = TRUE;\r | |
2228 | }\r | |
2229 | else if (irmp_address == 0x87EE)\r | |
2230 | {\r | |
2231 | #ifdef ANALYZE\r | |
2232 | ANALYZE_PRINTF ("Switching to APPLE protocol\n");\r | |
2233 | #endif // ANALYZE\r | |
2234 | irmp_protocol = IRMP_APPLE_PROTOCOL;\r | |
2235 | irmp_address = (irmp_command & 0xFF00) >> 8;\r | |
2236 | irmp_command &= 0x00FF;\r | |
2237 | rtc = TRUE;\r | |
2238 | }\r | |
2239 | break;\r | |
48664931 | 2240 | #endif\r |
4bcf310e | 2241 | \r |
2242 | \r | |
2243 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
2244 | case IRMP_VINCENT_PROTOCOL:\r | |
2245 | if ((irmp_command >> 8) == (irmp_command & 0x00FF))\r | |
2246 | {\r | |
2247 | irmp_command &= 0xff;\r | |
2248 | rtc = TRUE;\r | |
2249 | }\r | |
2250 | break;\r | |
2251 | #endif\r | |
2252 | \r | |
3a7e26e1 | 2253 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
df24bb50 | 2254 | case IRMP_BOSE_PROTOCOL:\r |
2255 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2256 | {\r | |
2257 | irmp_command &= 0xff;\r | |
2258 | rtc = TRUE;\r | |
2259 | }\r | |
2260 | break;\r | |
3a7e26e1 | 2261 | #endif\r |
12948cf3 | 2262 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 2263 | case IRMP_SIEMENS_PROTOCOL:\r |
2264 | case IRMP_RUWIDO_PROTOCOL:\r | |
2265 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001))\r | |
2266 | {\r | |
2267 | irmp_command >>= 1;\r | |
2268 | rtc = TRUE;\r | |
2269 | }\r | |
2270 | break;\r | |
9405f84a | 2271 | #endif\r |
111d6191 | 2272 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
df24bb50 | 2273 | case IRMP_KATHREIN_PROTOCOL:\r |
2274 | if (irmp_command != 0x0000)\r | |
2275 | {\r | |
2276 | rtc = TRUE;\r | |
2277 | }\r | |
2278 | break;\r | |
111d6191 | 2279 | #endif\r |
03780b34 | 2280 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
df24bb50 | 2281 | case IRMP_RC5_PROTOCOL:\r |
2282 | irmp_address &= ~0x20; // clear toggle bit\r | |
2283 | rtc = TRUE;\r | |
2284 | break;\r | |
03780b34 | 2285 | #endif\r |
c2b70f0b | 2286 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 2287 | case IRMP_S100_PROTOCOL:\r |
2288 | irmp_address &= ~0x20; // clear toggle bit\r | |
2289 | rtc = TRUE;\r | |
2290 | break;\r | |
c2b70f0b | 2291 | #endif\r |
89e8cafb | 2292 | #if IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
df24bb50 | 2293 | case IRMP_IR60_PROTOCOL:\r |
2294 | if (irmp_command != 0x007d) // 0x007d (== 62<<1 + 1) is start instruction frame\r | |
2295 | {\r | |
2296 | rtc = TRUE;\r | |
2297 | }\r | |
2298 | else\r | |
2299 | {\r | |
2300 | #ifdef ANALYZE\r | |
2301 | ANALYZE_PRINTF("Info IR60: got start instruction frame\n");\r | |
2302 | #endif // ANALYZE\r | |
2303 | }\r | |
2304 | break;\r | |
89e8cafb | 2305 | #endif\r |
48664931 | 2306 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 2307 | case IRMP_RCCAR_PROTOCOL:\r |
2308 | // frame in irmp_data:\r | |
2309 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0\r | |
2310 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0\r | |
2311 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0\r | |
2312 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0\r | |
2313 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0\r | |
2314 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0\r | |
2315 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0\r | |
2316 | break;\r | |
4225a882 | 2317 | #endif\r |
beda975f | 2318 | \r |
2319 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1 // squeeze code to 8 bit, upper bit indicates release-key\r | |
df24bb50 | 2320 | case IRMP_NETBOX_PROTOCOL:\r |
2321 | if (irmp_command & 0x1000) // last bit set?\r | |
2322 | {\r | |
2323 | if ((irmp_command & 0x1f) == 0x15) // key pressed: 101 01 (LSB)\r | |
2324 | {\r | |
2325 | irmp_command >>= 5;\r | |
2326 | irmp_command &= 0x7F;\r | |
2327 | rtc = TRUE;\r | |
2328 | }\r | |
2329 | else if ((irmp_command & 0x1f) == 0x10) // key released: 000 01 (LSB)\r | |
2330 | {\r | |
2331 | irmp_command >>= 5;\r | |
2332 | irmp_command |= 0x80;\r | |
2333 | rtc = TRUE;\r | |
2334 | }\r | |
2335 | else\r | |
2336 | {\r | |
2337 | #ifdef ANALYZE\r | |
2338 | ANALYZE_PRINTF("error NETBOX: bit6/7 must be 0/1\n");\r | |
2339 | #endif // ANALYZE\r | |
2340 | }\r | |
2341 | }\r | |
2342 | else\r | |
2343 | {\r | |
2344 | #ifdef ANALYZE\r | |
2345 | ANALYZE_PRINTF("error NETBOX: last bit not set\n");\r | |
2346 | #endif // ANALYZE\r | |
2347 | }\r | |
2348 | break;\r | |
deba2a0a | 2349 | #endif\r |
f50e01e7 | 2350 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
df24bb50 | 2351 | case IRMP_LEGO_PROTOCOL:\r |
2352 | {\r | |
2353 | uint_fast8_t crc = 0x0F ^ ((irmp_command & 0xF000) >> 12) ^ ((irmp_command & 0x0F00) >> 8) ^ ((irmp_command & 0x00F0) >> 4);\r | |
2354 | \r | |
2355 | if ((irmp_command & 0x000F) == crc)\r | |
2356 | {\r | |
2357 | irmp_command >>= 4;\r | |
2358 | rtc = TRUE;\r | |
2359 | }\r | |
2360 | else\r | |
2361 | {\r | |
2362 | #ifdef ANALYZE\r | |
2363 | ANALYZE_PRINTF ("CRC error in LEGO protocol\n");\r | |
2364 | #endif // ANALYZE\r | |
2365 | // rtc = TRUE; // don't accept codes with CRC errors\r | |
2366 | }\r | |
2367 | break;\r | |
2368 | }\r | |
f50e01e7 | 2369 | #endif\r |
cb93f9e9 | 2370 | \r |
df24bb50 | 2371 | default:\r |
2372 | {\r | |
2373 | rtc = TRUE;\r | |
2374 | break;\r | |
2375 | }\r | |
2376 | }\r | |
2377 | \r | |
2378 | if (rtc)\r | |
2379 | {\r | |
2380 | irmp_data_p->protocol = irmp_protocol;\r | |
2381 | irmp_data_p->address = irmp_address;\r | |
2382 | irmp_data_p->command = irmp_command;\r | |
2383 | irmp_data_p->flags = irmp_flags;\r | |
2384 | irmp_command = 0;\r | |
2385 | irmp_address = 0;\r | |
2386 | irmp_flags = 0;\r | |
2387 | }\r | |
2388 | \r | |
2389 | irmp_ir_detected = FALSE;\r | |
4225a882 | 2390 | }\r |
2391 | \r | |
2392 | return rtc;\r | |
2393 | }\r | |
2394 | \r | |
7644ac04 | 2395 | #if IRMP_USE_CALLBACK == 1\r |
2396 | void\r | |
0834784c | 2397 | irmp_set_callback_ptr (void (*cb)(uint_fast8_t))\r |
7644ac04 | 2398 | {\r |
2399 | irmp_callback_ptr = cb;\r | |
2400 | }\r | |
2401 | #endif // IRMP_USE_CALLBACK == 1\r | |
2402 | \r | |
4225a882 | 2403 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()\r |
0834784c | 2404 | static uint_fast16_t irmp_tmp_address; // ir address\r |
2405 | static uint_fast16_t irmp_tmp_command; // ir command\r | |
6f750020 | 2406 | \r |
956ea3ea | 2407 | #if (IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
0834784c | 2408 | static uint_fast16_t irmp_tmp_address2; // ir address\r |
2409 | static uint_fast16_t irmp_tmp_command2; // ir command\r | |
6f750020 | 2410 | #endif\r |
2411 | \r | |
69da6090 | 2412 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
0834784c | 2413 | static uint_fast16_t irmp_lgair_address; // ir address\r |
2414 | static uint_fast16_t irmp_lgair_command; // ir command\r | |
69da6090 | 2415 | #endif\r |
2416 | \r | |
4225a882 | 2417 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
0834784c | 2418 | static uint_fast16_t irmp_tmp_id; // ir id (only SAMSUNG)\r |
770a1a9d | 2419 | #endif\r |
2420 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
0834784c | 2421 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits\r |
2422 | static uint_fast8_t genre2; // save genre2 bits here, later copied to MSB in flags\r | |
4225a882 | 2423 | #endif\r |
2424 | \r | |
40ca4604 | 2425 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
0834784c | 2426 | static uint_fast8_t parity; // number of '1' of the first 14 bits, check if even.\r |
40ca4604 | 2427 | #endif\r |
2428 | \r | |
7365350c | 2429 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
2430 | static uint_fast8_t check; // number of '1' of the first 14 bits, check if even.\r | |
2431 | static uint_fast8_t mitsu_parity; // number of '1' of the first 14 bits, check if even.\r | |
2432 | #endif\r | |
2433 | \r | |
4225a882 | 2434 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2435 | * store bit\r | |
2436 | * @details store bit in temp address or temp command\r | |
2437 | * @param value to store: 0 or 1\r | |
2438 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2439 | */\r | |
d823e852 | 2440 | // verhindert, dass irmp_store_bit() inline compiliert wird:\r |
0834784c | 2441 | // static void irmp_store_bit (uint_fast8_t) __attribute__ ((noinline));\r |
d823e852 | 2442 | \r |
4225a882 | 2443 | static void\r |
0834784c | 2444 | irmp_store_bit (uint_fast8_t value)\r |
4225a882 | 2445 | {\r |
43c535be | 2446 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
2447 | if (irmp_param.protocol == IRMP_ACP24_PROTOCOL) // squeeze 64 bits into 16 bits:\r | |
2448 | {\r | |
df24bb50 | 2449 | if (value)\r |
2450 | {\r | |
2451 | // ACP24-Frame:\r | |
2452 | // 1 2 3 4 5 6\r | |
2453 | // 0123456789012345678901234567890123456789012345678901234567890123456789\r | |
2454 | // N VVMMM ? ??? t vmA x y TTTT\r | |
2455 | //\r | |
2456 | // irmp_data_p->command:\r | |
2457 | //\r | |
2458 | // 5432109876543210\r | |
2459 | // NAVVvMMMmtxyTTTT\r | |
2460 | \r | |
2461 | switch (irmp_bit)\r | |
2462 | {\r | |
2463 | case 0: irmp_tmp_command |= (1<<15); break; // N\r | |
2464 | case 2: irmp_tmp_command |= (1<<13); break; // V\r | |
2465 | case 3: irmp_tmp_command |= (1<<12); break; // V\r | |
2466 | case 4: irmp_tmp_command |= (1<<10); break; // M\r | |
2467 | case 5: irmp_tmp_command |= (1<< 9); break; // M\r | |
2468 | case 6: irmp_tmp_command |= (1<< 8); break; // M\r | |
2469 | case 20: irmp_tmp_command |= (1<< 6); break; // t\r | |
2470 | case 22: irmp_tmp_command |= (1<<11); break; // v\r | |
2471 | case 23: irmp_tmp_command |= (1<< 7); break; // m\r | |
2472 | case 24: irmp_tmp_command |= (1<<14); break; // A\r | |
2473 | case 26: irmp_tmp_command |= (1<< 5); break; // x\r | |
2474 | case 44: irmp_tmp_command |= (1<< 4); break; // y\r | |
2475 | case 66: irmp_tmp_command |= (1<< 3); break; // T\r | |
2476 | case 67: irmp_tmp_command |= (1<< 2); break; // T\r | |
2477 | case 68: irmp_tmp_command |= (1<< 1); break; // T\r | |
2478 | case 69: irmp_tmp_command |= (1<< 0); break; // T\r | |
2479 | }\r | |
2480 | }\r | |
43c535be | 2481 | }\r |
2482 | else\r | |
2483 | #endif // IRMP_SUPPORT_ACP24_PROTOCOL\r | |
2484 | \r | |
40ca4604 | 2485 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
2486 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r | |
2487 | {\r | |
df24bb50 | 2488 | if (irmp_bit < 14)\r |
2489 | {\r | |
2490 | if (value)\r | |
2491 | {\r | |
2492 | parity++;\r | |
2493 | }\r | |
2494 | }\r | |
2495 | else if (irmp_bit == 14)\r | |
2496 | {\r | |
2497 | if (value) // value == 1: even parity\r | |
2498 | {\r | |
2499 | if (parity & 0x01)\r | |
2500 | {\r | |
2501 | parity = PARITY_CHECK_FAILED;\r | |
2502 | }\r | |
2503 | else\r | |
2504 | {\r | |
2505 | parity = PARITY_CHECK_OK;\r | |
2506 | }\r | |
2507 | }\r | |
2508 | else\r | |
2509 | {\r | |
2510 | if (parity & 0x01) // value == 0: odd parity\r | |
2511 | {\r | |
2512 | parity = PARITY_CHECK_OK;\r | |
2513 | }\r | |
2514 | else\r | |
2515 | {\r | |
2516 | parity = PARITY_CHECK_FAILED;\r | |
2517 | }\r | |
2518 | }\r | |
2519 | }\r | |
40ca4604 | 2520 | }\r |
43c535be | 2521 | else\r |
40ca4604 | 2522 | #endif\r |
43c535be | 2523 | {\r |
df24bb50 | 2524 | ;\r |
43c535be | 2525 | }\r |
40ca4604 | 2526 | \r |
89e8cafb | 2527 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
2528 | if (irmp_bit == 0 && irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL)\r | |
2529 | {\r | |
df24bb50 | 2530 | first_bit = value;\r |
89e8cafb | 2531 | }\r |
2532 | else\r | |
2533 | #endif\r | |
770a1a9d | 2534 | \r |
4225a882 | 2535 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end)\r |
2536 | {\r | |
df24bb50 | 2537 | if (irmp_param.lsb_first)\r |
2538 | {\r | |
2539 | irmp_tmp_address |= (((uint_fast16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast\r | |
2540 | }\r | |
2541 | else\r | |
2542 | {\r | |
2543 | irmp_tmp_address <<= 1;\r | |
2544 | irmp_tmp_address |= value;\r | |
2545 | }\r | |
4225a882 | 2546 | }\r |
2547 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end)\r | |
2548 | {\r | |
df24bb50 | 2549 | if (irmp_param.lsb_first)\r |
2550 | {\r | |
956ea3ea | 2551 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r |
df24bb50 | 2552 | if (irmp_param.protocol == IRMP_SAMSUNG48_PROTOCOL && irmp_bit >= 32)\r |
2553 | {\r | |
2554 | irmp_tmp_id |= (((uint_fast16_t) (value)) << (irmp_bit - 32)); // CV wants cast\r | |
2555 | }\r | |
2556 | else\r | |
956ea3ea | 2557 | #endif\r |
df24bb50 | 2558 | {\r |
2559 | irmp_tmp_command |= (((uint_fast16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast\r | |
2560 | }\r | |
2561 | }\r | |
2562 | else\r | |
2563 | {\r | |
2564 | irmp_tmp_command <<= 1;\r | |
2565 | irmp_tmp_command |= value;\r | |
2566 | }\r | |
4225a882 | 2567 | }\r |
770a1a9d | 2568 | \r |
69da6090 | 2569 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
2570 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL || irmp_param.protocol == IRMP_NEC42_PROTOCOL)\r | |
2571 | {\r | |
df24bb50 | 2572 | if (irmp_bit < 8)\r |
2573 | {\r | |
2574 | irmp_lgair_address <<= 1; // LGAIR uses MSB\r | |
2575 | irmp_lgair_address |= value;\r | |
2576 | }\r | |
2577 | else if (irmp_bit < 24)\r | |
2578 | {\r | |
2579 | irmp_lgair_command <<= 1; // LGAIR uses MSB\r | |
2580 | irmp_lgair_command |= value;\r | |
2581 | }\r | |
69da6090 | 2582 | }\r |
2583 | // NO else!\r | |
2584 | #endif\r | |
2585 | \r | |
35213800 | 2586 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
f60c4644 | 2587 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit >= 13 && irmp_bit < 26)\r |
35213800 | 2588 | {\r |
df24bb50 | 2589 | irmp_tmp_address2 |= (((uint_fast16_t) (value)) << (irmp_bit - 13)); // CV wants cast\r |
35213800 | 2590 | }\r |
f60c4644 | 2591 | else\r |
35213800 | 2592 | #endif\r |
2593 | \r | |
4225a882 | 2594 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
f60c4644 | 2595 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN)\r |
4225a882 | 2596 | {\r |
df24bb50 | 2597 | irmp_tmp_id |= (((uint_fast16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first\r |
4225a882 | 2598 | }\r |
f60c4644 | 2599 | else\r |
4225a882 | 2600 | #endif\r |
770a1a9d | 2601 | \r |
2602 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
f60c4644 | 2603 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r |
770a1a9d | 2604 | {\r |
df24bb50 | 2605 | if (irmp_bit >= 20 && irmp_bit < 24)\r |
2606 | {\r | |
7365350c | 2607 | irmp_tmp_command |= (((uint_fast16_t) (value)) << (irmp_bit - 8)); // store 4 system bits (genre 1) in upper nibble with LSB first\r |
df24bb50 | 2608 | }\r |
2609 | else if (irmp_bit >= 24 && irmp_bit < 28)\r | |
2610 | {\r | |
7365350c | 2611 | genre2 |= (((uint_fast8_t) (value)) << (irmp_bit - 20)); // store 4 system bits (genre 2) in upper nibble with LSB first\r |
df24bb50 | 2612 | }\r |
2613 | \r | |
2614 | if (irmp_bit < KASEIKYO_COMPLETE_DATA_LEN)\r | |
2615 | {\r | |
2616 | if (value)\r | |
2617 | {\r | |
2618 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8);\r | |
2619 | }\r | |
2620 | else\r | |
2621 | {\r | |
2622 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8));\r | |
2623 | }\r | |
2624 | }\r | |
0f700c8e | 2625 | }\r |
26b6c304 | 2626 | else\r |
770a1a9d | 2627 | #endif\r |
7365350c | 2628 | \r |
2629 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r | |
2630 | if (irmp_param.protocol == IRMP_MITSU_HEAVY_PROTOCOL) // squeeze 64 bits into 16 bits:\r | |
2631 | {\r | |
2632 | if (irmp_bit == 72 )\r | |
2633 | { // irmp_tmp_address, irmp_tmp_command received: check parity & compress\r | |
2634 | mitsu_parity = PARITY_CHECK_OK;\r | |
2635 | \r | |
2636 | check = irmp_tmp_address >> 8; // inverted upper byte == lower byte?\r | |
2637 | check = ~ check;\r | |
2638 | \r | |
2639 | if (check == (irmp_tmp_address & 0xFF))\r | |
2640 | { // ok:\r | |
2641 | irmp_tmp_address <<= 8; // throw away upper byte\r | |
2642 | }\r | |
2643 | else\r | |
2644 | {\r | |
2645 | mitsu_parity = PARITY_CHECK_FAILED;\r | |
2646 | }\r | |
2647 | \r | |
2648 | check = irmp_tmp_command >> 8; // inverted upper byte == lower byte?\r | |
2649 | check = ~ check;\r | |
2650 | if (check == (irmp_tmp_command & 0xFF))\r | |
2651 | { // ok: pack together\r | |
2652 | irmp_tmp_address |= irmp_tmp_command & 0xFF; // byte 1, byte2 in irmp_tmp_address, irmp_tmp_command can be used for byte 3\r | |
2653 | }\r | |
2654 | else\r | |
2655 | {\r | |
2656 | mitsu_parity = PARITY_CHECK_FAILED;\r | |
2657 | }\r | |
2658 | irmp_tmp_command = 0;\r | |
2659 | }\r | |
2660 | \r | |
2661 | if (irmp_bit >= 72 )\r | |
2662 | { // receive 3. word in irmp_tmp_command\r | |
2663 | irmp_tmp_command <<= 1;\r | |
2664 | irmp_tmp_command |= value;\r | |
2665 | }\r | |
2666 | }\r | |
2667 | else\r | |
2668 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL\r | |
26b6c304 | 2669 | {\r |
df24bb50 | 2670 | ;\r |
26b6c304 | 2671 | }\r |
770a1a9d | 2672 | \r |
4225a882 | 2673 | irmp_bit++;\r |
2674 | }\r | |
2675 | \r | |
6f750020 | 2676 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2677 | * store bit\r | |
2678 | * @details store bit in temp address or temp command\r | |
2679 | * @param value to store: 0 or 1\r | |
2680 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2681 | */\r | |
2682 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2683 | static void\r | |
0834784c | 2684 | irmp_store_bit2 (uint_fast8_t value)\r |
6f750020 | 2685 | {\r |
0834784c | 2686 | uint_fast8_t irmp_bit2;\r |
6f750020 | 2687 | \r |
2688 | if (irmp_param.protocol)\r | |
2689 | {\r | |
df24bb50 | 2690 | irmp_bit2 = irmp_bit - 2;\r |
6f750020 | 2691 | }\r |
2692 | else\r | |
2693 | {\r | |
df24bb50 | 2694 | irmp_bit2 = irmp_bit - 1;\r |
6f750020 | 2695 | }\r |
2696 | \r | |
2697 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end)\r | |
2698 | {\r | |
df24bb50 | 2699 | irmp_tmp_address2 |= (((uint_fast16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast\r |
6f750020 | 2700 | }\r |
2701 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end)\r | |
2702 | {\r | |
df24bb50 | 2703 | irmp_tmp_command2 |= (((uint_fast16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast\r |
6f750020 | 2704 | }\r |
2705 | }\r | |
2706 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2707 | \r | |
4225a882 | 2708 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2709 | * ISR routine\r | |
2710 | * @details ISR routine, called 10000 times per second\r | |
2711 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2712 | */\r | |
716f8772 | 2713 | uint_fast8_t\r |
4225a882 | 2714 | irmp_ISR (void)\r |
2715 | {\r | |
0834784c | 2716 | static uint_fast8_t irmp_start_bit_detected; // flag: start bit detected\r |
2717 | static uint_fast8_t wait_for_space; // flag: wait for data bit space\r | |
2718 | static uint_fast8_t wait_for_start_space; // flag: wait for start bit space\r | |
2719 | static uint_fast8_t irmp_pulse_time; // count bit time for pulse\r | |
2720 | static PAUSE_LEN irmp_pause_time; // count bit time for pause\r | |
2721 | static uint_fast16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition\r | |
2722 | static uint_fast16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition\r | |
2723 | static uint_fast16_t key_repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause\r | |
2724 | static uint_fast8_t repetition_frame_number;\r | |
4225a882 | 2725 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
0834784c | 2726 | static uint_fast16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition\r |
2727 | static uint_fast16_t denon_repetition_len = 0xFFFF; // denon repetition len of 2nd auto generated frame\r | |
4225a882 | 2728 | #endif\r |
c2b70f0b | 2729 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_S100_PROTOCOL == 1\r |
0834784c | 2730 | static uint_fast8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r |
4225a882 | 2731 | #endif\r |
77f488bb | 2732 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
0834784c | 2733 | static PAUSE_LEN last_pause; // last pause value\r |
504d9df9 | 2734 | #endif\r |
77f488bb | 2735 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
0834784c | 2736 | static uint_fast8_t last_value; // last bit value\r |
4225a882 | 2737 | #endif\r |
0834784c | 2738 | uint_fast8_t irmp_input; // input value\r |
4225a882 | 2739 | \r |
48664931 | 2740 | #ifdef ANALYZE\r |
592411d1 | 2741 | time_counter++;\r |
1082ecf2 | 2742 | #endif // ANALYZE\r |
592411d1 | 2743 | \r |
aa276d72 | 2744 | #if defined(__SDCC_stm8)\r |
2745 | irmp_input = input(IRMP_GPIO_STRUCT->IDR)\r | |
ea29682a | 2746 | #elif defined(__MBED__)\r |
2747 | //irmp_input = inputPin;\r | |
2748 | irmp_input = gpio_read (&gpioIRin);\r | |
aa276d72 | 2749 | #else\r |
4225a882 | 2750 | irmp_input = input(IRMP_PIN);\r |
aa276d72 | 2751 | #endif\r |
4225a882 | 2752 | \r |
7644ac04 | 2753 | #if IRMP_USE_CALLBACK == 1\r |
2754 | if (irmp_callback_ptr)\r | |
2755 | {\r | |
df24bb50 | 2756 | static uint_fast8_t last_inverted_input;\r |
7644ac04 | 2757 | \r |
df24bb50 | 2758 | if (last_inverted_input != !irmp_input)\r |
2759 | {\r | |
2760 | (*irmp_callback_ptr) (! irmp_input);\r | |
2761 | last_inverted_input = !irmp_input;\r | |
2762 | }\r | |
7644ac04 | 2763 | }\r |
2764 | #endif // IRMP_USE_CALLBACK == 1\r | |
2765 | \r | |
d155e9ab | 2766 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined\r |
4225a882 | 2767 | \r |
2768 | if (! irmp_ir_detected) // ir code already detected?\r | |
2769 | { // no...\r | |
df24bb50 | 2770 | if (! irmp_start_bit_detected) // start bit detected?\r |
2771 | { // no...\r | |
2772 | if (! irmp_input) // receiving burst?\r | |
2773 | { // yes...\r | |
1f54e86c | 2774 | // irmp_busy_flag = TRUE;\r |
48664931 | 2775 | #ifdef ANALYZE\r |
df24bb50 | 2776 | if (! irmp_pulse_time)\r |
2777 | {\r | |
2778 | ANALYZE_PRINTF("%8.3fms [starting pulse]\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
2779 | }\r | |
2780 | #endif // ANALYZE\r | |
2781 | irmp_pulse_time++; // increment counter\r | |
2782 | }\r | |
2783 | else\r | |
2784 | { // no...\r | |
2785 | if (irmp_pulse_time) // it's dark....\r | |
2786 | { // set flags for counting the time of darkness...\r | |
2787 | irmp_start_bit_detected = 1;\r | |
2788 | wait_for_start_space = 1;\r | |
2789 | wait_for_space = 0;\r | |
2790 | irmp_tmp_command = 0;\r | |
2791 | irmp_tmp_address = 0;\r | |
0f700c8e | 2792 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
df24bb50 | 2793 | genre2 = 0;\r |
0f700c8e | 2794 | #endif\r |
80b3a55d | 2795 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 2796 | irmp_tmp_id = 0;\r |
80b3a55d | 2797 | #endif\r |
6f750020 | 2798 | \r |
35213800 | 2799 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
df24bb50 | 2800 | irmp_tmp_command2 = 0;\r |
2801 | irmp_tmp_address2 = 0;\r | |
6f750020 | 2802 | #endif\r |
69da6090 | 2803 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
df24bb50 | 2804 | irmp_lgair_command = 0;\r |
2805 | irmp_lgair_address = 0;\r | |
69da6090 | 2806 | #endif\r |
df24bb50 | 2807 | irmp_bit = 0xff;\r |
2808 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0!\r | |
c2b70f0b | 2809 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 2810 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame!\r |
4225a882 | 2811 | #endif\r |
df24bb50 | 2812 | }\r |
2813 | else\r | |
2814 | {\r | |
2815 | if (key_repetition_len < 0xFFFF) // avoid overflow of counter\r | |
2816 | {\r | |
2817 | key_repetition_len++;\r | |
08f2dd9d | 2818 | \r |
2819 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 2820 | if (denon_repetition_len < 0xFFFF) // avoid overflow of counter\r |
2821 | {\r | |
2822 | denon_repetition_len++;\r | |
775fabfa | 2823 | \r |
df24bb50 | 2824 | if (denon_repetition_len >= DENON_AUTO_REPETITION_PAUSE_LEN && last_irmp_denon_command != 0)\r |
2825 | {\r | |
645fbc69 | 2826 | #ifdef ANALYZE\r |
df24bb50 | 2827 | ANALYZE_PRINTF ("%8.3fms warning: did not receive inverted command repetition\n",\r |
2828 | (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
66f8fd93 | 2829 | #endif // ANALYZE\r |
df24bb50 | 2830 | last_irmp_denon_command = 0;\r |
2831 | denon_repetition_len = 0xFFFF;\r | |
2832 | }\r | |
2833 | }\r | |
08f2dd9d | 2834 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
df24bb50 | 2835 | }\r |
2836 | }\r | |
2837 | }\r | |
2838 | }\r | |
2839 | else\r | |
2840 | {\r | |
2841 | if (wait_for_start_space) // we have received start bit...\r | |
2842 | { // ...and are counting the time of darkness\r | |
2843 | if (irmp_input) // still dark?\r | |
2844 | { // yes\r | |
2845 | irmp_pause_time++; // increment counter\r | |
4225a882 | 2846 | \r |
9405f84a | 2847 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
df24bb50 | 2848 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) ||\r |
2849 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN)\r | |
9405f84a | 2850 | #else\r |
df24bb50 | 2851 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
9405f84a | 2852 | #endif\r |
df24bb50 | 2853 | { // yes...\r |
c7a47e89 | 2854 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2855 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below!\r |
2856 | {\r | |
2857 | ;\r | |
2858 | }\r | |
2859 | else\r | |
c7a47e89 | 2860 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2861 | {\r |
645fbc69 | 2862 | #ifdef ANALYZE\r |
df24bb50 | 2863 | ANALYZE_PRINTF ("%8.3fms error 1: pause after start bit pulse %d too long: %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
2864 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1082ecf2 | 2865 | #endif // ANALYZE\r |
df24bb50 | 2866 | }\r |
1082ecf2 | 2867 | \r |
df24bb50 | 2868 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit\r |
2869 | irmp_pulse_time = 0;\r | |
2870 | irmp_pause_time = 0;\r | |
2871 | }\r | |
2872 | }\r | |
2873 | else\r | |
2874 | { // receiving first data pulse!\r | |
2875 | IRMP_PARAMETER * irmp_param_p;\r | |
2876 | irmp_param_p = (IRMP_PARAMETER *) 0;\r | |
46dd89b7 | 2877 | \r |
6f750020 | 2878 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 2879 | irmp_param2.protocol = 0;\r |
6f750020 | 2880 | #endif\r |
2881 | \r | |
645fbc69 | 2882 | #ifdef ANALYZE\r |
df24bb50 | 2883 | ANALYZE_PRINTF ("%8.3fms [start-bit: pulse = %2d, pause = %2d]\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 2884 | #endif // ANALYZE\r |
4225a882 | 2885 | \r |
2886 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 2887 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX &&\r |
2888 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX)\r | |
2889 | { // it's SIRCS\r | |
645fbc69 | 2890 | #ifdef ANALYZE\r |
df24bb50 | 2891 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2892 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX,\r | |
2893 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2894 | #endif // ANALYZE\r |
df24bb50 | 2895 | irmp_param_p = (IRMP_PARAMETER *) &sircs_param;\r |
2896 | }\r | |
2897 | else\r | |
4225a882 | 2898 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r |
2899 | \r | |
770a1a9d | 2900 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2901 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r |
2902 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX &&\r | |
2903 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2904 | {\r | |
2905 | #ifdef ANALYZE\r | |
2906 | ANALYZE_PRINTF ("protocol = NEC or JVC (type 1) repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2907 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX,\r | |
2908 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
2909 | #endif // ANALYZE\r | |
2910 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
2911 | }\r | |
2912 | else\r | |
770a1a9d | 2913 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2914 | \r | |
4225a882 | 2915 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 2916 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r |
2917 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r | |
2918 | {\r | |
35213800 | 2919 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
645fbc69 | 2920 | #ifdef ANALYZE\r |
df24bb50 | 2921 | ANALYZE_PRINTF ("protocol = NEC42, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2922 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2923 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2924 | #endif // ANALYZE\r |
df24bb50 | 2925 | irmp_param_p = (IRMP_PARAMETER *) &nec42_param;\r |
35213800 | 2926 | #else\r |
645fbc69 | 2927 | #ifdef ANALYZE\r |
df24bb50 | 2928 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2929 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2930 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2931 | #endif // ANALYZE\r |
df24bb50 | 2932 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
35213800 | 2933 | #endif\r |
df24bb50 | 2934 | }\r |
2935 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2936 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2937 | { // it's NEC\r | |
93ba2e01 | 2938 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2939 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // last protocol was JVC, awaiting repeat frame\r |
2940 | { // some jvc remote controls use nec repetition frame for jvc repetition frame\r | |
645fbc69 | 2941 | #ifdef ANALYZE\r |
df24bb50 | 2942 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 2, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2943 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2944 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2945 | #endif // ANALYZE\r |
df24bb50 | 2946 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
2947 | }\r | |
2948 | else\r | |
93ba2e01 | 2949 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2950 | {\r |
645fbc69 | 2951 | #ifdef ANALYZE\r |
df24bb50 | 2952 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2953 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2954 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2955 | #endif // ANALYZE\r |
46dd89b7 | 2956 | \r |
df24bb50 | 2957 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param;\r |
2958 | }\r | |
2959 | }\r | |
2960 | else\r | |
93ba2e01 | 2961 | \r |
2962 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
df24bb50 | 2963 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r |
2964 | irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2965 | irmp_pause_time >= NEC_0_PAUSE_LEN_MIN && irmp_pause_time <= NEC_0_PAUSE_LEN_MAX)\r | |
2966 | { // it's JVC repetition type 3\r | |
2967 | #ifdef ANALYZE\r | |
2968 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 3, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2969 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2970 | NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX);\r | |
2971 | #endif // ANALYZE\r | |
2972 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
2973 | }\r | |
2974 | else\r | |
93ba2e01 | 2975 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2976 | \r | |
4225a882 | 2977 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
2978 | \r | |
b85cb27d | 2979 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
df24bb50 | 2980 | if (irmp_pulse_time >= TELEFUNKEN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= TELEFUNKEN_START_BIT_PULSE_LEN_MAX &&\r |
2981 | irmp_pause_time >= TELEFUNKEN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= TELEFUNKEN_START_BIT_PAUSE_LEN_MAX)\r | |
2982 | {\r | |
645fbc69 | 2983 | #ifdef ANALYZE\r |
df24bb50 | 2984 | ANALYZE_PRINTF ("protocol = TELEFUNKEN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2985 | TELEFUNKEN_START_BIT_PULSE_LEN_MIN, TELEFUNKEN_START_BIT_PULSE_LEN_MAX,\r | |
2986 | TELEFUNKEN_START_BIT_PAUSE_LEN_MIN, TELEFUNKEN_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2987 | #endif // ANALYZE\r |
df24bb50 | 2988 | irmp_param_p = (IRMP_PARAMETER *) &telefunken_param;\r |
2989 | }\r | |
2990 | else\r | |
b85cb27d | 2991 | #endif // IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
2992 | \r | |
40ca4604 | 2993 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
df24bb50 | 2994 | if (irmp_pulse_time >= ROOMBA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_START_BIT_PULSE_LEN_MAX &&\r |
2995 | irmp_pause_time >= ROOMBA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ROOMBA_START_BIT_PAUSE_LEN_MAX)\r | |
2996 | {\r | |
645fbc69 | 2997 | #ifdef ANALYZE\r |
df24bb50 | 2998 | ANALYZE_PRINTF ("protocol = ROOMBA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2999 | ROOMBA_START_BIT_PULSE_LEN_MIN, ROOMBA_START_BIT_PULSE_LEN_MAX,\r | |
3000 | ROOMBA_START_BIT_PAUSE_LEN_MIN, ROOMBA_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3001 | #endif // ANALYZE\r |
df24bb50 | 3002 | irmp_param_p = (IRMP_PARAMETER *) &roomba_param;\r |
3003 | }\r | |
3004 | else\r | |
40ca4604 | 3005 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
3006 | \r | |
43c535be | 3007 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
df24bb50 | 3008 | if (irmp_pulse_time >= ACP24_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ACP24_START_BIT_PULSE_LEN_MAX &&\r |
3009 | irmp_pause_time >= ACP24_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ACP24_START_BIT_PAUSE_LEN_MAX)\r | |
3010 | {\r | |
43c535be | 3011 | #ifdef ANALYZE\r |
df24bb50 | 3012 | ANALYZE_PRINTF ("protocol = ACP24, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3013 | ACP24_START_BIT_PULSE_LEN_MIN, ACP24_START_BIT_PULSE_LEN_MAX,\r | |
3014 | ACP24_START_BIT_PAUSE_LEN_MIN, ACP24_START_BIT_PAUSE_LEN_MAX);\r | |
43c535be | 3015 | #endif // ANALYZE\r |
df24bb50 | 3016 | irmp_param_p = (IRMP_PARAMETER *) &acp24_param;\r |
3017 | }\r | |
3018 | else\r | |
43c535be | 3019 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
3020 | \r | |
003c1008 | 3021 | #if IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
df24bb50 | 3022 | if (irmp_pulse_time >= PENTAX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= PENTAX_START_BIT_PULSE_LEN_MAX &&\r |
3023 | irmp_pause_time >= PENTAX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= PENTAX_START_BIT_PAUSE_LEN_MAX)\r | |
3024 | {\r | |
003c1008 | 3025 | #ifdef ANALYZE\r |
df24bb50 | 3026 | ANALYZE_PRINTF ("protocol = PENTAX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3027 | PENTAX_START_BIT_PULSE_LEN_MIN, PENTAX_START_BIT_PULSE_LEN_MAX,\r | |
3028 | PENTAX_START_BIT_PAUSE_LEN_MIN, PENTAX_START_BIT_PAUSE_LEN_MAX);\r | |
003c1008 | 3029 | #endif // ANALYZE\r |
df24bb50 | 3030 | irmp_param_p = (IRMP_PARAMETER *) &pentax_param;\r |
3031 | }\r | |
3032 | else\r | |
003c1008 | 3033 | #endif // IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
3034 | \r | |
9405f84a | 3035 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
df24bb50 | 3036 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX &&\r |
3037 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX)\r | |
3038 | {\r | |
645fbc69 | 3039 | #ifdef ANALYZE\r |
df24bb50 | 3040 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3041 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX,\r | |
3042 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3043 | #endif // ANALYZE\r |
df24bb50 | 3044 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param;\r |
3045 | }\r | |
3046 | else\r | |
9405f84a | 3047 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
3048 | \r | |
4225a882 | 3049 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 3050 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX &&\r |
3051 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
3052 | { // it's SAMSUNG\r | |
645fbc69 | 3053 | #ifdef ANALYZE\r |
df24bb50 | 3054 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3055 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX,\r | |
3056 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3057 | #endif // ANALYZE\r |
df24bb50 | 3058 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param;\r |
3059 | }\r | |
3060 | else\r | |
4225a882 | 3061 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3062 | \r | |
3063 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
df24bb50 | 3064 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX &&\r |
3065 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX)\r | |
3066 | { // it's MATSUSHITA\r | |
645fbc69 | 3067 | #ifdef ANALYZE\r |
df24bb50 | 3068 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3069 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX,\r | |
3070 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3071 | #endif // ANALYZE\r |
df24bb50 | 3072 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param;\r |
3073 | }\r | |
3074 | else\r | |
4225a882 | 3075 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
3076 | \r | |
3077 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
df24bb50 | 3078 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX &&\r |
3079 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX)\r | |
3080 | { // it's KASEIKYO\r | |
645fbc69 | 3081 | #ifdef ANALYZE\r |
df24bb50 | 3082 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3083 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX,\r | |
3084 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3085 | #endif // ANALYZE\r |
df24bb50 | 3086 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param;\r |
3087 | }\r | |
3088 | else\r | |
4225a882 | 3089 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
3090 | \r | |
95b27043 | 3091 | #if IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
df24bb50 | 3092 | if (irmp_pulse_time >= PANASONIC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= PANASONIC_START_BIT_PULSE_LEN_MAX &&\r |
3093 | irmp_pause_time >= PANASONIC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= PANASONIC_START_BIT_PAUSE_LEN_MAX)\r | |
3094 | { // it's PANASONIC\r | |
95b27043 | 3095 | #ifdef ANALYZE\r |
df24bb50 | 3096 | ANALYZE_PRINTF ("protocol = PANASONIC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3097 | PANASONIC_START_BIT_PULSE_LEN_MIN, PANASONIC_START_BIT_PULSE_LEN_MAX,\r | |
3098 | PANASONIC_START_BIT_PAUSE_LEN_MIN, PANASONIC_START_BIT_PAUSE_LEN_MAX);\r | |
95b27043 | 3099 | #endif // ANALYZE\r |
df24bb50 | 3100 | irmp_param_p = (IRMP_PARAMETER *) &panasonic_param;\r |
3101 | }\r | |
3102 | else\r | |
95b27043 | 3103 | #endif // IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
3104 | \r | |
7365350c | 3105 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
3106 | if (irmp_pulse_time >= MITSU_HEAVY_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MITSU_HEAVY_START_BIT_PULSE_LEN_MAX &&\r | |
3107 | irmp_pause_time >= MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX)\r | |
3108 | { // it's MITSU_HEAVY\r | |
3109 | #ifdef ANALYZE\r | |
3110 | ANALYZE_PRINTF ("protocol = MITSU_HEAVY, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3111 | MITSU_HEAVY_START_BIT_PULSE_LEN_MIN, MITSU_HEAVY_START_BIT_PULSE_LEN_MAX,\r | |
3112 | MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN, MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX);\r | |
3113 | #endif // ANALYZE\r | |
3114 | irmp_param_p = (IRMP_PARAMETER *) &mitsu_heavy_param;\r | |
3115 | }\r | |
3116 | else\r | |
3117 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r | |
3118 | \r | |
4bcf310e | 3119 | #if IRMP_SUPPORT_VINCENT_PROTOCOL == 1\r |
3120 | if (irmp_pulse_time >= VINCENT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= VINCENT_START_BIT_PULSE_LEN_MAX &&\r | |
3121 | irmp_pause_time >= VINCENT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= VINCENT_START_BIT_PAUSE_LEN_MAX)\r | |
3122 | { // it's VINCENT\r | |
3123 | #ifdef ANALYZE\r | |
3124 | ANALYZE_PRINTF ("protocol = VINCENT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3125 | VINCENT_START_BIT_PULSE_LEN_MIN, VINCENT_START_BIT_PULSE_LEN_MAX,\r | |
3126 | VINCENT_START_BIT_PAUSE_LEN_MIN, VINCENT_START_BIT_PAUSE_LEN_MAX);\r | |
3127 | #endif // ANALYZE\r | |
3128 | irmp_param_p = (IRMP_PARAMETER *) &vincent_param;\r | |
3129 | }\r | |
3130 | else\r | |
3131 | #endif // IRMP_SUPPORT_VINCENT_PROTOCOL == 1\r | |
3132 | \r | |
faf6479d | 3133 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r |
df24bb50 | 3134 | if (irmp_pulse_time >= RADIO1_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RADIO1_START_BIT_PULSE_LEN_MAX &&\r |
3135 | irmp_pause_time >= RADIO1_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RADIO1_START_BIT_PAUSE_LEN_MAX)\r | |
3136 | {\r | |
645fbc69 | 3137 | #ifdef ANALYZE\r |
df24bb50 | 3138 | ANALYZE_PRINTF ("protocol = RADIO1, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3139 | RADIO1_START_BIT_PULSE_LEN_MIN, RADIO1_START_BIT_PULSE_LEN_MAX,\r | |
3140 | RADIO1_START_BIT_PAUSE_LEN_MIN, RADIO1_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3141 | #endif // ANALYZE\r |
df24bb50 | 3142 | irmp_param_p = (IRMP_PARAMETER *) &radio1_param;\r |
3143 | }\r | |
3144 | else\r | |
faf6479d | 3145 | #endif // IRMP_SUPPORT_RRADIO1_PROTOCOL == 1\r |
3146 | \r | |
4225a882 | 3147 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
df24bb50 | 3148 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX &&\r |
3149 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX)\r | |
3150 | { // it's RECS80\r | |
645fbc69 | 3151 | #ifdef ANALYZE\r |
df24bb50 | 3152 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3153 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX,\r | |
3154 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3155 | #endif // ANALYZE\r |
df24bb50 | 3156 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param;\r |
3157 | }\r | |
3158 | else\r | |
4225a882 | 3159 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
3160 | \r | |
c2b70f0b | 3161 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 3162 | if (((irmp_pulse_time >= S100_START_BIT_LEN_MIN && irmp_pulse_time <= S100_START_BIT_LEN_MAX) ||\r |
3163 | (irmp_pulse_time >= 2 * S100_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * S100_START_BIT_LEN_MAX)) &&\r | |
3164 | ((irmp_pause_time >= S100_START_BIT_LEN_MIN && irmp_pause_time <= S100_START_BIT_LEN_MAX) ||\r | |
3165 | (irmp_pause_time >= 2 * S100_START_BIT_LEN_MIN && irmp_pause_time <= 2 * S100_START_BIT_LEN_MAX)))\r | |
3166 | { // it's S100\r | |
3167 | #ifdef ANALYZE\r | |
3168 | ANALYZE_PRINTF ("protocol = S100, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3169 | S100_START_BIT_LEN_MIN, S100_START_BIT_LEN_MAX,\r | |
3170 | 2 * S100_START_BIT_LEN_MIN, 2 * S100_START_BIT_LEN_MAX,\r | |
3171 | S100_START_BIT_LEN_MIN, S100_START_BIT_LEN_MAX,\r | |
3172 | 2 * S100_START_BIT_LEN_MIN, 2 * S100_START_BIT_LEN_MAX);\r | |
3173 | #endif // ANALYZE\r | |
3174 | \r | |
3175 | irmp_param_p = (IRMP_PARAMETER *) &s100_param;\r | |
3176 | last_pause = irmp_pause_time;\r | |
3177 | \r | |
3178 | if ((irmp_pulse_time > S100_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * S100_START_BIT_LEN_MAX) ||\r | |
3179 | (irmp_pause_time > S100_START_BIT_LEN_MAX && irmp_pause_time <= 2 * S100_START_BIT_LEN_MAX))\r | |
3180 | {\r | |
3181 | last_value = 0;\r | |
3182 | rc5_cmd_bit6 = 1<<6;\r | |
3183 | }\r | |
3184 | else\r | |
3185 | {\r | |
3186 | last_value = 1;\r | |
3187 | }\r | |
3188 | }\r | |
3189 | else\r | |
c2b70f0b | 3190 | #endif // IRMP_SUPPORT_S100_PROTOCOL == 1\r |
3191 | \r | |
4225a882 | 3192 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
df24bb50 | 3193 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) ||\r |
3194 | (irmp_pulse_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX)) &&\r | |
3195 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) ||\r | |
3196 | (irmp_pause_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX)))\r | |
3197 | { // it's RC5\r | |
6f750020 | 3198 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 3199 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r |
3200 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
3201 | {\r | |
3202 | #ifdef ANALYZE\r | |
3203 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n");\r | |
3204 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3205 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
3206 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
3207 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3208 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3209 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
3210 | #endif // ANALYZE\r | |
3211 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER));\r | |
3212 | }\r | |
3213 | else\r | |
6f750020 | 3214 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 3215 | \r |
6f750020 | 3216 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3217 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r |
3218 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
3219 | {\r | |
3220 | #ifdef ANALYZE\r | |
3221 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n");\r | |
3222 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3223 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
3224 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
3225 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3226 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3227 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
3228 | #endif // ANALYZE\r | |
3229 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER));\r | |
3230 | }\r | |
3231 | else\r | |
6f750020 | 3232 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3233 | {\r |
3234 | #ifdef ANALYZE\r | |
3235 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3236 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3237 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX,\r | |
3238 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3239 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX);\r | |
3240 | #endif // ANALYZE\r | |
3241 | }\r | |
3242 | \r | |
3243 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param;\r | |
3244 | last_pause = irmp_pause_time;\r | |
3245 | \r | |
3246 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX) ||\r | |
3247 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX))\r | |
3248 | {\r | |
3249 | last_value = 0;\r | |
3250 | rc5_cmd_bit6 = 1<<6;\r | |
3251 | }\r | |
3252 | else\r | |
3253 | {\r | |
3254 | last_value = 1;\r | |
3255 | }\r | |
3256 | }\r | |
3257 | else\r | |
4225a882 | 3258 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
3259 | \r | |
3260 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 3261 | if ( (irmp_pulse_time >= DENON_PULSE_LEN_MIN && irmp_pulse_time <= DENON_PULSE_LEN_MAX) &&\r |
3262 | ((irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX) ||\r | |
3263 | (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)))\r | |
3264 | { // it's DENON\r | |
3265 | #ifdef ANALYZE\r | |
3266 | ANALYZE_PRINTF ("protocol = DENON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3267 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r | |
3268 | DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX,\r | |
3269 | DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX);\r | |
3270 | #endif // ANALYZE\r | |
3271 | irmp_param_p = (IRMP_PARAMETER *) &denon_param;\r | |
3272 | }\r | |
3273 | else\r | |
4225a882 | 3274 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
3275 | \r | |
beda975f | 3276 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3277 | if ( (irmp_pulse_time >= THOMSON_PULSE_LEN_MIN && irmp_pulse_time <= THOMSON_PULSE_LEN_MAX) &&\r |
3278 | ((irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX) ||\r | |
3279 | (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)))\r | |
3280 | { // it's THOMSON\r | |
3281 | #ifdef ANALYZE\r | |
3282 | ANALYZE_PRINTF ("protocol = THOMSON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3283 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX,\r | |
3284 | THOMSON_1_PAUSE_LEN_MIN, THOMSON_1_PAUSE_LEN_MAX,\r | |
3285 | THOMSON_0_PAUSE_LEN_MIN, THOMSON_0_PAUSE_LEN_MAX);\r | |
3286 | #endif // ANALYZE\r | |
3287 | irmp_param_p = (IRMP_PARAMETER *) &thomson_param;\r | |
3288 | }\r | |
3289 | else\r | |
beda975f | 3290 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
3291 | \r | |
3a7e26e1 | 3292 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
df24bb50 | 3293 | if (irmp_pulse_time >= BOSE_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= BOSE_START_BIT_PULSE_LEN_MAX &&\r |
3294 | irmp_pause_time >= BOSE_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BOSE_START_BIT_PAUSE_LEN_MAX)\r | |
3295 | {\r | |
645fbc69 | 3296 | #ifdef ANALYZE\r |
df24bb50 | 3297 | ANALYZE_PRINTF ("protocol = BOSE, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3298 | BOSE_START_BIT_PULSE_LEN_MIN, BOSE_START_BIT_PULSE_LEN_MAX,\r | |
3299 | BOSE_START_BIT_PAUSE_LEN_MIN, BOSE_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3300 | #endif // ANALYZE\r |
df24bb50 | 3301 | irmp_param_p = (IRMP_PARAMETER *) &bose_param;\r |
3302 | }\r | |
3303 | else\r | |
3a7e26e1 | 3304 | #endif // IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
3305 | \r | |
4225a882 | 3306 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 3307 | if (irmp_pulse_time >= RC6_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RC6_START_BIT_PULSE_LEN_MAX &&\r |
3308 | irmp_pause_time >= RC6_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RC6_START_BIT_PAUSE_LEN_MAX)\r | |
3309 | { // it's RC6\r | |
3310 | #ifdef ANALYZE\r | |
3311 | ANALYZE_PRINTF ("protocol = RC6, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3312 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX,\r | |
3313 | RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX);\r | |
3314 | #endif // ANALYZE\r | |
3315 | irmp_param_p = (IRMP_PARAMETER *) &rc6_param;\r | |
3316 | last_pause = 0;\r | |
3317 | last_value = 1;\r | |
3318 | }\r | |
3319 | else\r | |
4225a882 | 3320 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
3321 | \r | |
3322 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
df24bb50 | 3323 | if (irmp_pulse_time >= RECS80EXT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80EXT_START_BIT_PULSE_LEN_MAX &&\r |
3324 | irmp_pause_time >= RECS80EXT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80EXT_START_BIT_PAUSE_LEN_MAX)\r | |
3325 | { // it's RECS80EXT\r | |
645fbc69 | 3326 | #ifdef ANALYZE\r |
df24bb50 | 3327 | ANALYZE_PRINTF ("protocol = RECS80EXT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3328 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX,\r | |
3329 | RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3330 | #endif // ANALYZE\r |
df24bb50 | 3331 | irmp_param_p = (IRMP_PARAMETER *) &recs80ext_param;\r |
3332 | }\r | |
3333 | else\r | |
4225a882 | 3334 | #endif // IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r |
3335 | \r | |
3336 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
df24bb50 | 3337 | if (irmp_pulse_time >= NUBERT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NUBERT_START_BIT_PULSE_LEN_MAX &&\r |
3338 | irmp_pause_time >= NUBERT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NUBERT_START_BIT_PAUSE_LEN_MAX)\r | |
3339 | { // it's NUBERT\r | |
645fbc69 | 3340 | #ifdef ANALYZE\r |
df24bb50 | 3341 | ANALYZE_PRINTF ("protocol = NUBERT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3342 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX,\r | |
3343 | NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3344 | #endif // ANALYZE\r |
df24bb50 | 3345 | irmp_param_p = (IRMP_PARAMETER *) &nubert_param;\r |
3346 | }\r | |
3347 | else\r | |
4225a882 | 3348 | #endif // IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
3349 | \r | |
0715cf5e | 3350 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
df24bb50 | 3351 | if (irmp_pulse_time >= FAN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FAN_START_BIT_PULSE_LEN_MAX &&\r |
3352 | irmp_pause_time >= FAN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FAN_START_BIT_PAUSE_LEN_MAX)\r | |
3353 | { // it's FAN\r | |
0715cf5e | 3354 | #ifdef ANALYZE\r |
df24bb50 | 3355 | ANALYZE_PRINTF ("protocol = FAN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3356 | FAN_START_BIT_PULSE_LEN_MIN, FAN_START_BIT_PULSE_LEN_MAX,\r | |
3357 | FAN_START_BIT_PAUSE_LEN_MIN, FAN_START_BIT_PAUSE_LEN_MAX);\r | |
0715cf5e | 3358 | #endif // ANALYZE\r |
df24bb50 | 3359 | irmp_param_p = (IRMP_PARAMETER *) &fan_param;\r |
3360 | }\r | |
3361 | else\r | |
0715cf5e | 3362 | #endif // IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
3363 | \r | |
0a2f634b | 3364 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
df24bb50 | 3365 | if (irmp_pulse_time >= SPEAKER_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SPEAKER_START_BIT_PULSE_LEN_MAX &&\r |
3366 | irmp_pause_time >= SPEAKER_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SPEAKER_START_BIT_PAUSE_LEN_MAX)\r | |
3367 | { // it's SPEAKER\r | |
645fbc69 | 3368 | #ifdef ANALYZE\r |
df24bb50 | 3369 | ANALYZE_PRINTF ("protocol = SPEAKER, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3370 | SPEAKER_START_BIT_PULSE_LEN_MIN, SPEAKER_START_BIT_PULSE_LEN_MAX,\r | |
3371 | SPEAKER_START_BIT_PAUSE_LEN_MIN, SPEAKER_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3372 | #endif // ANALYZE\r |
df24bb50 | 3373 | irmp_param_p = (IRMP_PARAMETER *) &speaker_param;\r |
3374 | }\r | |
3375 | else\r | |
0a2f634b | 3376 | #endif // IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
3377 | \r | |
504d9df9 | 3378 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 3379 | if (irmp_pulse_time >= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX &&\r |
3380 | irmp_pause_time >= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX)\r | |
3381 | { // it's BANG_OLUFSEN\r | |
3382 | #ifdef ANALYZE\r | |
3383 | ANALYZE_PRINTF ("protocol = BANG_OLUFSEN\n");\r | |
3384 | ANALYZE_PRINTF ("start bit 1 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3385 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r | |
3386 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
3387 | ANALYZE_PRINTF ("start bit 2 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3388 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r | |
3389 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
3390 | ANALYZE_PRINTF ("start bit 3 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3391 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r | |
3392 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
3393 | ANALYZE_PRINTF ("start bit 4 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3394 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r | |
3395 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
3396 | #endif // ANALYZE\r | |
3397 | irmp_param_p = (IRMP_PARAMETER *) &bang_olufsen_param;\r | |
3398 | last_value = 0;\r | |
3399 | }\r | |
3400 | else\r | |
504d9df9 | 3401 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
3402 | \r | |
89e8cafb | 3403 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
df24bb50 | 3404 | if (irmp_pulse_time >= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN && irmp_pulse_time <= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX &&\r |
3405 | irmp_pause_time >= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN && irmp_pause_time <= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX)\r | |
3406 | { // it's GRUNDIG\r | |
3407 | #ifdef ANALYZE\r | |
3408 | ANALYZE_PRINTF ("protocol = GRUNDIG, pre bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3409 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r | |
3410 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX);\r | |
3411 | #endif // ANALYZE\r | |
3412 | irmp_param_p = (IRMP_PARAMETER *) &grundig_param;\r | |
3413 | last_pause = irmp_pause_time;\r | |
3414 | last_value = 1;\r | |
3415 | }\r | |
3416 | else\r | |
89e8cafb | 3417 | #endif // IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
592411d1 | 3418 | \r |
0715cf5e | 3419 | #if IRMP_SUPPORT_MERLIN_PROTOCOL == 1 // check MERLIN before RUWIDO!\r |
df24bb50 | 3420 | if (irmp_pulse_time >= MERLIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MERLIN_START_BIT_PULSE_LEN_MAX &&\r |
3421 | irmp_pause_time >= MERLIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MERLIN_START_BIT_PAUSE_LEN_MAX)\r | |
3422 | { // it's MERLIN\r | |
3423 | #ifdef ANALYZE\r | |
3424 | ANALYZE_PRINTF ("protocol = MERLIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3425 | MERLIN_START_BIT_PULSE_LEN_MIN, MERLIN_START_BIT_PULSE_LEN_MAX,\r | |
3426 | MERLIN_START_BIT_PAUSE_LEN_MIN, MERLIN_START_BIT_PAUSE_LEN_MAX);\r | |
3427 | #endif // ANALYZE\r | |
3428 | irmp_param_p = (IRMP_PARAMETER *) &merlin_param;\r | |
3429 | last_pause = 0;\r | |
3430 | last_value = 1;\r | |
3431 | }\r | |
3432 | else\r | |
0715cf5e | 3433 | #endif // IRMP_SUPPORT_MERLIN_PROTOCOL == 1\r |
3434 | \r | |
12948cf3 | 3435 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 3436 | if (((irmp_pulse_time >= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX) ||\r |
3437 | (irmp_pulse_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX)) &&\r | |
3438 | ((irmp_pause_time >= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX) ||\r | |
3439 | (irmp_pause_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX)))\r | |
3440 | { // it's RUWIDO or SIEMENS\r | |
3441 | #ifdef ANALYZE\r | |
3442 | ANALYZE_PRINTF ("protocol = RUWIDO, start bit timings: pulse: %3d - %3d or %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3443 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3444 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3445 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r | |
3446 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX);\r | |
3447 | #endif // ANALYZE\r | |
3448 | irmp_param_p = (IRMP_PARAMETER *) &ruwido_param;\r | |
3449 | last_pause = irmp_pause_time;\r | |
3450 | last_value = 1;\r | |
3451 | }\r | |
3452 | else\r | |
12948cf3 | 3453 | #endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
3454 | \r | |
48664931 | 3455 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 3456 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r |
3457 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
3458 | {\r | |
645fbc69 | 3459 | #ifdef ANALYZE\r |
df24bb50 | 3460 | ANALYZE_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3461 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
3462 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3463 | #endif // ANALYZE\r |
df24bb50 | 3464 | irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r |
3465 | }\r | |
3466 | else\r | |
48664931 | 3467 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 3468 | \r |
9e16d699 | 3469 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3470 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r |
3471 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
3472 | {\r | |
645fbc69 | 3473 | #ifdef ANALYZE\r |
df24bb50 | 3474 | ANALYZE_PRINTF ("protocol = RCCAR, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3475 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
3476 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3477 | #endif // ANALYZE\r |
df24bb50 | 3478 | irmp_param_p = (IRMP_PARAMETER *) &rccar_param;\r |
3479 | }\r | |
3480 | else\r | |
9e16d699 | 3481 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
89e8cafb | 3482 | \r |
111d6191 | 3483 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
df24bb50 | 3484 | if (irmp_pulse_time >= KATHREIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_START_BIT_PULSE_LEN_MAX &&\r |
3485 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)\r | |
3486 | { // it's KATHREIN\r | |
645fbc69 | 3487 | #ifdef ANALYZE\r |
df24bb50 | 3488 | ANALYZE_PRINTF ("protocol = KATHREIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3489 | KATHREIN_START_BIT_PULSE_LEN_MIN, KATHREIN_START_BIT_PULSE_LEN_MAX,\r | |
3490 | KATHREIN_START_BIT_PAUSE_LEN_MIN, KATHREIN_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3491 | #endif // ANALYZE\r |
df24bb50 | 3492 | irmp_param_p = (IRMP_PARAMETER *) &kathrein_param;\r |
3493 | }\r | |
3494 | else\r | |
111d6191 | 3495 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
3496 | \r | |
deba2a0a | 3497 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
df24bb50 | 3498 | if (irmp_pulse_time >= NETBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NETBOX_START_BIT_PULSE_LEN_MAX &&\r |
3499 | irmp_pause_time >= NETBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NETBOX_START_BIT_PAUSE_LEN_MAX)\r | |
3500 | { // it's NETBOX\r | |
645fbc69 | 3501 | #ifdef ANALYZE\r |
df24bb50 | 3502 | ANALYZE_PRINTF ("protocol = NETBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3503 | NETBOX_START_BIT_PULSE_LEN_MIN, NETBOX_START_BIT_PULSE_LEN_MAX,\r | |
3504 | NETBOX_START_BIT_PAUSE_LEN_MIN, NETBOX_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3505 | #endif // ANALYZE\r |
df24bb50 | 3506 | irmp_param_p = (IRMP_PARAMETER *) &netbox_param;\r |
3507 | }\r | |
3508 | else\r | |
deba2a0a | 3509 | #endif // IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
3510 | \r | |
f50e01e7 | 3511 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
df24bb50 | 3512 | if (irmp_pulse_time >= LEGO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= LEGO_START_BIT_PULSE_LEN_MAX &&\r |
3513 | irmp_pause_time >= LEGO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= LEGO_START_BIT_PAUSE_LEN_MAX)\r | |
3514 | {\r | |
645fbc69 | 3515 | #ifdef ANALYZE\r |
df24bb50 | 3516 | ANALYZE_PRINTF ("protocol = LEGO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3517 | LEGO_START_BIT_PULSE_LEN_MIN, LEGO_START_BIT_PULSE_LEN_MAX,\r | |
3518 | LEGO_START_BIT_PAUSE_LEN_MIN, LEGO_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3519 | #endif // ANALYZE\r |
df24bb50 | 3520 | irmp_param_p = (IRMP_PARAMETER *) &lego_param;\r |
3521 | }\r | |
3522 | else\r | |
93ba2e01 | 3523 | #endif // IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
f50e01e7 | 3524 | \r |
2fb27bfe | 3525 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
df24bb50 | 3526 | if (irmp_pulse_time >= A1TVBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= A1TVBOX_START_BIT_PULSE_LEN_MAX &&\r |
3527 | irmp_pause_time >= A1TVBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= A1TVBOX_START_BIT_PAUSE_LEN_MAX)\r | |
3528 | { // it's A1TVBOX\r | |
3529 | #ifdef ANALYZE\r | |
3530 | ANALYZE_PRINTF ("protocol = A1TVBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3531 | A1TVBOX_START_BIT_PULSE_LEN_MIN, A1TVBOX_START_BIT_PULSE_LEN_MAX,\r | |
3532 | A1TVBOX_START_BIT_PAUSE_LEN_MIN, A1TVBOX_START_BIT_PAUSE_LEN_MAX);\r | |
3533 | #endif // ANALYZE\r | |
3534 | irmp_param_p = (IRMP_PARAMETER *) &a1tvbox_param;\r | |
3535 | last_pause = 0;\r | |
3536 | last_value = 1;\r | |
3537 | }\r | |
3538 | else\r | |
b85cb27d | 3539 | #endif // IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
3540 | \r | |
3541 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
df24bb50 | 3542 | if (irmp_pulse_time >= ORTEK_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ORTEK_START_BIT_PULSE_LEN_MAX &&\r |
3543 | irmp_pause_time >= ORTEK_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ORTEK_START_BIT_PAUSE_LEN_MAX)\r | |
3544 | { // it's ORTEK (Hama)\r | |
3545 | #ifdef ANALYZE\r | |
3546 | ANALYZE_PRINTF ("protocol = ORTEK, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3547 | ORTEK_START_BIT_PULSE_LEN_MIN, ORTEK_START_BIT_PULSE_LEN_MAX,\r | |
3548 | ORTEK_START_BIT_PAUSE_LEN_MIN, ORTEK_START_BIT_PAUSE_LEN_MAX);\r | |
3549 | #endif // ANALYZE\r | |
3550 | irmp_param_p = (IRMP_PARAMETER *) &ortek_param;\r | |
3551 | last_pause = 0;\r | |
3552 | last_value = 1;\r | |
3553 | parity = 0;\r | |
3554 | }\r | |
3555 | else\r | |
cb93f9e9 | 3556 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
2fb27bfe | 3557 | \r |
cb93f9e9 | 3558 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 3559 | if (irmp_pulse_time >= RCMM32_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCMM32_START_BIT_PULSE_LEN_MAX &&\r |
3560 | irmp_pause_time >= RCMM32_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_START_BIT_PAUSE_LEN_MAX)\r | |
3561 | { // it's RCMM\r | |
645fbc69 | 3562 | #ifdef ANALYZE\r |
df24bb50 | 3563 | ANALYZE_PRINTF ("protocol = RCMM, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3564 | RCMM32_START_BIT_PULSE_LEN_MIN, RCMM32_START_BIT_PULSE_LEN_MAX,\r | |
3565 | RCMM32_START_BIT_PAUSE_LEN_MIN, RCMM32_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3566 | #endif // ANALYZE\r |
df24bb50 | 3567 | irmp_param_p = (IRMP_PARAMETER *) &rcmm_param;\r |
3568 | }\r | |
3569 | else\r | |
cb93f9e9 | 3570 | #endif // IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 3571 | {\r |
645fbc69 | 3572 | #ifdef ANALYZE\r |
df24bb50 | 3573 | ANALYZE_PRINTF ("protocol = UNKNOWN\n");\r |
1082ecf2 | 3574 | #endif // ANALYZE\r |
df24bb50 | 3575 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
3576 | }\r | |
4225a882 | 3577 | \r |
df24bb50 | 3578 | if (irmp_start_bit_detected)\r |
3579 | {\r | |
3580 | memcpy_P (&irmp_param, irmp_param_p, sizeof (IRMP_PARAMETER));\r | |
46dd89b7 | 3581 | \r |
df24bb50 | 3582 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
3583 | {\r | |
645fbc69 | 3584 | #ifdef ANALYZE\r |
df24bb50 | 3585 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max);\r |
3586 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max);\r | |
1082ecf2 | 3587 | #endif // ANALYZE\r |
df24bb50 | 3588 | }\r |
3589 | else\r | |
3590 | {\r | |
645fbc69 | 3591 | #ifdef ANALYZE\r |
df24bb50 | 3592 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max,\r |
3593 | 2 * irmp_param.pulse_1_len_min, 2 * irmp_param.pulse_1_len_max);\r | |
3594 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max,\r | |
3595 | 2 * irmp_param.pause_1_len_min, 2 * irmp_param.pause_1_len_max);\r | |
1082ecf2 | 3596 | #endif // ANALYZE\r |
df24bb50 | 3597 | }\r |
46dd89b7 | 3598 | \r |
6f750020 | 3599 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 3600 | if (irmp_param2.protocol)\r |
3601 | {\r | |
645fbc69 | 3602 | #ifdef ANALYZE\r |
df24bb50 | 3603 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param2.pulse_0_len_min, irmp_param2.pulse_0_len_max);\r |
3604 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param2.pause_0_len_min, irmp_param2.pause_0_len_max);\r | |
3605 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param2.pulse_1_len_min, irmp_param2.pulse_1_len_max);\r | |
3606 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param2.pause_1_len_min, irmp_param2.pause_1_len_max);\r | |
1082ecf2 | 3607 | #endif // ANALYZE\r |
df24bb50 | 3608 | }\r |
6f750020 | 3609 | #endif\r |
3610 | \r | |
d823e852 | 3611 | \r |
504d9df9 | 3612 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 3613 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL)\r |
3614 | {\r | |
645fbc69 | 3615 | #ifdef ANALYZE\r |
df24bb50 | 3616 | ANALYZE_PRINTF ("pulse_toggle: %3d - %3d\n", RC6_TOGGLE_BIT_LEN_MIN, RC6_TOGGLE_BIT_LEN_MAX);\r |
1082ecf2 | 3617 | #endif // ANALYZE\r |
df24bb50 | 3618 | }\r |
504d9df9 | 3619 | #endif\r |
77f488bb | 3620 | \r |
df24bb50 | 3621 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
3622 | {\r | |
645fbc69 | 3623 | #ifdef ANALYZE\r |
df24bb50 | 3624 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r |
3625 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max);\r | |
1082ecf2 | 3626 | #endif // ANALYZE\r |
df24bb50 | 3627 | }\r |
3628 | else\r | |
3629 | {\r | |
645fbc69 | 3630 | #ifdef ANALYZE\r |
df24bb50 | 3631 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max,\r |
3632 | 2 * irmp_param.pulse_0_len_min, 2 * irmp_param.pulse_0_len_max);\r | |
3633 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max,\r | |
3634 | 2 * irmp_param.pause_0_len_min, 2 * irmp_param.pause_0_len_max);\r | |
1082ecf2 | 3635 | #endif // ANALYZE\r |
df24bb50 | 3636 | }\r |
46dd89b7 | 3637 | \r |
1082ecf2 | 3638 | #ifdef ANALYZE\r |
504d9df9 | 3639 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 3640 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r |
3641 | {\r | |
3642 | ANALYZE_PRINTF ("pulse_r: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
3643 | ANALYZE_PRINTF ("pause_r: %3d - %3d\n", BANG_OLUFSEN_R_PAUSE_LEN_MIN, BANG_OLUFSEN_R_PAUSE_LEN_MAX);\r | |
3644 | }\r | |
504d9df9 | 3645 | #endif\r |
3646 | \r | |
df24bb50 | 3647 | ANALYZE_PRINTF ("command_offset: %2d\n", irmp_param.command_offset);\r |
3648 | ANALYZE_PRINTF ("command_len: %3d\n", irmp_param.command_end - irmp_param.command_offset);\r | |
3649 | ANALYZE_PRINTF ("complete_len: %3d\n", irmp_param.complete_len);\r | |
3650 | ANALYZE_PRINTF ("stop_bit: %3d\n", irmp_param.stop_bit);\r | |
48664931 | 3651 | #endif // ANALYZE\r |
df24bb50 | 3652 | }\r |
4225a882 | 3653 | \r |
df24bb50 | 3654 | irmp_bit = 0;\r |
4225a882 | 3655 | \r |
77f488bb | 3656 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3657 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
3658 | irmp_param.protocol != IRMP_RUWIDO_PROTOCOL && // Manchester, but not RUWIDO\r | |
3659 | irmp_param.protocol != IRMP_RC6_PROTOCOL) // Manchester, but not RC6\r | |
3660 | {\r | |
3661 | if (irmp_pause_time > irmp_param.pulse_1_len_max && irmp_pause_time <= 2 * irmp_param.pulse_1_len_max)\r | |
3662 | {\r | |
3663 | #ifdef ANALYZE\r | |
3664 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
3665 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r | |
3666 | ANALYZE_NEWLINE ();\r | |
3667 | #endif // ANALYZE\r | |
3668 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1);\r | |
3669 | }\r | |
3670 | else if (! last_value) // && irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
3671 | {\r | |
3672 | #ifdef ANALYZE\r | |
3673 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
3674 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r | |
3675 | ANALYZE_NEWLINE ();\r | |
3676 | #endif // ANALYZE\r | |
3677 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0);\r | |
3678 | }\r | |
3679 | }\r | |
3680 | else\r | |
77f488bb | 3681 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
a7054daf | 3682 | \r |
deba2a0a | 3683 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 3684 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r |
3685 | {\r | |
3686 | ; // do nothing\r | |
3687 | }\r | |
3688 | else\r | |
deba2a0a | 3689 | #endif // IRMP_SUPPORT_SERIAL == 1\r |
3690 | \r | |
3691 | \r | |
4225a882 | 3692 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
df24bb50 | 3693 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r |
3694 | {\r | |
645fbc69 | 3695 | #ifdef ANALYZE\r |
df24bb50 | 3696 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 3697 | #endif // ANALYZE\r |
4225a882 | 3698 | \r |
df24bb50 | 3699 | if (irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX)\r |
3700 | { // pause timings correct for "1"?\r | |
645fbc69 | 3701 | #ifdef ANALYZE\r |
df24bb50 | 3702 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
3703 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3704 | #endif // ANALYZE\r |
df24bb50 | 3705 | irmp_store_bit (1);\r |
3706 | }\r | |
3707 | else // if (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)\r | |
3708 | { // pause timings correct for "0"?\r | |
645fbc69 | 3709 | #ifdef ANALYZE\r |
df24bb50 | 3710 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
3711 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3712 | #endif // ANALYZE\r |
df24bb50 | 3713 | irmp_store_bit (0);\r |
3714 | }\r | |
3715 | }\r | |
3716 | else\r | |
4225a882 | 3717 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
beda975f | 3718 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3719 | if (irmp_param.protocol == IRMP_THOMSON_PROTOCOL)\r |
3720 | {\r | |
645fbc69 | 3721 | #ifdef ANALYZE\r |
df24bb50 | 3722 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 3723 | #endif // ANALYZE\r |
beda975f | 3724 | \r |
df24bb50 | 3725 | if (irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX)\r |
3726 | { // pause timings correct for "1"?\r | |
645fbc69 | 3727 | #ifdef ANALYZE\r |
df24bb50 | 3728 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
3729 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3730 | #endif // ANALYZE\r |
df24bb50 | 3731 | irmp_store_bit (1);\r |
3732 | }\r | |
3733 | else // if (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)\r | |
3734 | { // pause timings correct for "0"?\r | |
645fbc69 | 3735 | #ifdef ANALYZE\r |
df24bb50 | 3736 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
3737 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3738 | #endif // ANALYZE\r |
df24bb50 | 3739 | irmp_store_bit (0);\r |
3740 | }\r | |
3741 | }\r | |
3742 | else\r | |
beda975f | 3743 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3744 | {\r |
3745 | ; // else do nothing\r | |
3746 | }\r | |
3747 | \r | |
3748 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
3749 | irmp_pause_time = 0;\r | |
3750 | wait_for_start_space = 0;\r | |
3751 | }\r | |
3752 | }\r | |
3753 | else if (wait_for_space) // the data section....\r | |
3754 | { // counting the time of darkness....\r | |
3755 | uint_fast8_t got_light = FALSE;\r | |
3756 | \r | |
3757 | if (irmp_input) // still dark?\r | |
3758 | { // yes...\r | |
3759 | if (irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 1)\r | |
3760 | {\r | |
3761 | if (\r | |
a42d1ee6 | 3762 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3763 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) ||\r |
a42d1ee6 | 3764 | #endif\r |
3765 | #if IRMP_SUPPORT_SERIAL == 1\r | |
df24bb50 | 3766 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) ||\r |
a42d1ee6 | 3767 | #endif\r |
df24bb50 | 3768 | (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max))\r |
3769 | {\r | |
3770 | #ifdef ANALYZE\r | |
3771 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
3772 | {\r | |
3773 | ANALYZE_PRINTF ("stop bit detected\n");\r | |
3774 | }\r | |
3775 | #endif // ANALYZE\r | |
3776 | irmp_param.stop_bit = 0;\r | |
3777 | }\r | |
3778 | else\r | |
3779 | {\r | |
3780 | #ifdef ANALYZE\r | |
3781 | ANALYZE_PRINTF ("error: stop bit timing wrong, irmp_bit = %d, irmp_pulse_time = %d, pulse_0_len_min = %d, pulse_0_len_max = %d\n",\r | |
3782 | irmp_bit, irmp_pulse_time, irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
3783 | #endif // ANALYZE\r | |
3784 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
3785 | irmp_pulse_time = 0;\r | |
3786 | irmp_pause_time = 0;\r | |
3787 | }\r | |
3788 | }\r | |
3789 | else\r | |
3790 | {\r | |
3791 | irmp_pause_time++; // increment counter\r | |
4225a882 | 3792 | \r |
3793 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 3794 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && // Sony has a variable number of bits:\r |
3795 | irmp_pause_time > SIRCS_PAUSE_LEN_MAX && // minimum is 12\r | |
3796 | irmp_bit >= 12 - 1) // pause too long?\r | |
3797 | { // yes, break and close this frame\r | |
3798 | irmp_param.complete_len = irmp_bit + 1; // set new complete length\r | |
3799 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3800 | irmp_tmp_address |= (irmp_bit - SIRCS_MINIMUM_DATA_LEN + 1) << 8; // new: store number of additional bits in upper byte of address!\r | |
3801 | irmp_param.command_end = irmp_param.command_offset + irmp_bit + 1; // correct command length\r | |
3802 | irmp_pause_time = SIRCS_PAUSE_LEN_MAX - 1; // correct pause length\r | |
3803 | }\r | |
3804 | else\r | |
4225a882 | 3805 | #endif\r |
0715cf5e | 3806 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
df24bb50 | 3807 | if (irmp_param.protocol == IRMP_FAN_PROTOCOL && // FAN has no stop bit.\r |
3808 | irmp_bit >= FAN_COMPLETE_DATA_LEN - 1) // last bit in frame\r | |
3809 | { // yes, break and close this frame\r | |
3810 | if (irmp_pulse_time <= FAN_0_PULSE_LEN_MAX && irmp_pause_time >= FAN_0_PAUSE_LEN_MIN)\r | |
3811 | {\r | |
458a6d64 | 3812 | #ifdef ANALYZE\r |
df24bb50 | 3813 | ANALYZE_PRINTF ("Generating virtual stop bit\n");\r |
458a6d64 | 3814 | #endif // ANALYZE\r |
df24bb50 | 3815 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r |
3816 | }\r | |
3817 | else if (irmp_pulse_time >= FAN_1_PULSE_LEN_MIN && irmp_pause_time >= FAN_1_PAUSE_LEN_MIN)\r | |
3818 | {\r | |
458a6d64 | 3819 | #ifdef ANALYZE\r |
df24bb50 | 3820 | ANALYZE_PRINTF ("Generating virtual stop bit\n");\r |
458a6d64 | 3821 | #endif // ANALYZE\r |
df24bb50 | 3822 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r |
3823 | }\r | |
3824 | }\r | |
3825 | else\r | |
0715cf5e | 3826 | #endif\r |
deba2a0a | 3827 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 3828 | // NETBOX generates no stop bit, here is the timeout condition:\r |
3829 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) && irmp_param.protocol == IRMP_NETBOX_PROTOCOL &&\r | |
3830 | irmp_pause_time >= NETBOX_PULSE_LEN * (NETBOX_COMPLETE_DATA_LEN - irmp_bit))\r | |
3831 | {\r | |
3832 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3833 | }\r | |
3834 | else\r | |
deba2a0a | 3835 | #endif\r |
89e8cafb | 3836 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
df24bb50 | 3837 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && !irmp_param.stop_bit)\r |
3838 | {\r | |
3839 | if (irmp_pause_time > IR60_TIMEOUT_LEN && (irmp_bit == 5 || irmp_bit == 6))\r | |
3840 | {\r | |
3841 | #ifdef ANALYZE\r | |
3842 | ANALYZE_PRINTF ("Switching to IR60 protocol\n");\r | |
3843 | #endif // ANALYZE\r | |
3844 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3845 | irmp_param.stop_bit = TRUE; // set flag\r | |
3846 | \r | |
3847 | irmp_param.protocol = IRMP_IR60_PROTOCOL; // change protocol\r | |
3848 | irmp_param.complete_len = IR60_COMPLETE_DATA_LEN; // correct complete len\r | |
3849 | irmp_param.address_offset = IR60_ADDRESS_OFFSET;\r | |
3850 | irmp_param.address_end = IR60_ADDRESS_OFFSET + IR60_ADDRESS_LEN;\r | |
3851 | irmp_param.command_offset = IR60_COMMAND_OFFSET;\r | |
3852 | irmp_param.command_end = IR60_COMMAND_OFFSET + IR60_COMMAND_LEN;\r | |
3853 | \r | |
3854 | irmp_tmp_command <<= 1;\r | |
3855 | irmp_tmp_command |= first_bit;\r | |
3856 | }\r | |
3857 | else if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN - 2)\r | |
3858 | { // special manchester decoder\r | |
3859 | irmp_param.complete_len = GRUNDIG_COMPLETE_DATA_LEN; // correct complete len\r | |
3860 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3861 | irmp_param.stop_bit = TRUE; // set flag\r | |
3862 | }\r | |
3863 | else if (irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN)\r | |
3864 | {\r | |
3865 | #ifdef ANALYZE\r | |
3866 | ANALYZE_PRINTF ("Switching to NOKIA protocol, irmp_bit = %d\n", irmp_bit);\r | |
3867 | #endif // ANALYZE\r | |
3868 | irmp_param.protocol = IRMP_NOKIA_PROTOCOL; // change protocol\r | |
3869 | irmp_param.address_offset = NOKIA_ADDRESS_OFFSET;\r | |
3870 | irmp_param.address_end = NOKIA_ADDRESS_OFFSET + NOKIA_ADDRESS_LEN;\r | |
3871 | irmp_param.command_offset = NOKIA_COMMAND_OFFSET;\r | |
3872 | irmp_param.command_end = NOKIA_COMMAND_OFFSET + NOKIA_COMMAND_LEN;\r | |
3873 | \r | |
3874 | if (irmp_tmp_command & 0x300)\r | |
3875 | {\r | |
3876 | irmp_tmp_address = (irmp_tmp_command >> 8);\r | |
3877 | irmp_tmp_command &= 0xFF;\r | |
3878 | }\r | |
3879 | }\r | |
3880 | }\r | |
3881 | else\r | |
d155e9ab | 3882 | #endif\r |
12948cf3 | 3883 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 3884 | if (irmp_param.protocol == IRMP_RUWIDO_PROTOCOL && !irmp_param.stop_bit)\r |
3885 | {\r | |
3886 | if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= RUWIDO_COMPLETE_DATA_LEN - 2)\r | |
3887 | { // special manchester decoder\r | |
3888 | irmp_param.complete_len = RUWIDO_COMPLETE_DATA_LEN; // correct complete len\r | |
3889 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3890 | irmp_param.stop_bit = TRUE; // set flag\r | |
3891 | }\r | |
3892 | else if (irmp_bit >= RUWIDO_COMPLETE_DATA_LEN)\r | |
3893 | {\r | |
3894 | #ifdef ANALYZE\r | |
3895 | ANALYZE_PRINTF ("Switching to SIEMENS protocol\n");\r | |
3896 | #endif // ANALYZE\r | |
3897 | irmp_param.protocol = IRMP_SIEMENS_PROTOCOL; // change protocol\r | |
3898 | irmp_param.address_offset = SIEMENS_ADDRESS_OFFSET;\r | |
3899 | irmp_param.address_end = SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN;\r | |
3900 | irmp_param.command_offset = SIEMENS_COMMAND_OFFSET;\r | |
3901 | irmp_param.command_end = SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN;\r | |
3902 | \r | |
3903 | // 76543210\r | |
3904 | // RUWIDO: AAAAAAAAACCCCCCCp\r | |
3905 | // SIEMENS: AAAAAAAAAAACCCCCCCCCCp\r | |
3906 | irmp_tmp_address <<= 2;\r | |
3907 | irmp_tmp_address |= (irmp_tmp_command >> 6);\r | |
3908 | irmp_tmp_command &= 0x003F;\r | |
cb93f9e9 | 3909 | // irmp_tmp_command <<= 4;\r |
df24bb50 | 3910 | irmp_tmp_command |= last_value;\r |
3911 | }\r | |
3912 | }\r | |
3913 | else\r | |
12948cf3 | 3914 | #endif\r |
40ca4604 | 3915 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
df24bb50 | 3916 | if (irmp_param.protocol == IRMP_ROOMBA_PROTOCOL && // Roomba has no stop bit\r |
3917 | irmp_bit >= ROOMBA_COMPLETE_DATA_LEN - 1) // it's the last data bit...\r | |
3918 | { // break and close this frame\r | |
3919 | if (irmp_pulse_time >= ROOMBA_1_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_1_PULSE_LEN_MAX)\r | |
3920 | {\r | |
3921 | irmp_pause_time = ROOMBA_1_PAUSE_LEN_EXACT;\r | |
3922 | }\r | |
3923 | else if (irmp_pulse_time >= ROOMBA_0_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_0_PULSE_LEN_MAX)\r | |
3924 | {\r | |
3925 | irmp_pause_time = ROOMBA_0_PAUSE_LEN;\r | |
3926 | }\r | |
3927 | \r | |
3928 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3929 | }\r | |
3930 | else\r | |
40ca4604 | 3931 | #endif\r |
77f488bb | 3932 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3933 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
3934 | irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= irmp_param.complete_len - 2 && !irmp_param.stop_bit)\r | |
3935 | { // special manchester decoder\r | |
3936 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3937 | irmp_param.stop_bit = TRUE; // set flag\r | |
3938 | }\r | |
3939 | else\r | |
77f488bb | 3940 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3941 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
3942 | { // yes...\r | |
3943 | if (irmp_bit == irmp_param.complete_len - 1 && irmp_param.stop_bit == 0)\r | |
3944 | {\r | |
3945 | irmp_bit++;\r | |
3946 | }\r | |
770a1a9d | 3947 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 3948 | else if (irmp_param.protocol == IRMP_NEC_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r |
3949 | {\r | |
3950 | #ifdef ANALYZE\r | |
3951 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r | |
3952 | #endif // ANALYZE\r | |
3953 | irmp_param.stop_bit = TRUE; // set flag\r | |
3954 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
3955 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3956 | irmp_tmp_command = (irmp_tmp_address >> 4); // set command: upper 12 bits are command bits\r | |
3957 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
3958 | irmp_start_bit_detected = 1; // tricky: don't wait for another start bit...\r | |
3959 | }\r | |
770a1a9d | 3960 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
69da6090 | 3961 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
df24bb50 | 3962 | else if (irmp_param.protocol == IRMP_NEC_PROTOCOL && (irmp_bit == 28 || irmp_bit == 29)) // it was a LGAIR stop bit\r |
3963 | {\r | |
3964 | #ifdef ANALYZE\r | |
3965 | ANALYZE_PRINTF ("Switching to LGAIR protocol, irmp_bit = %d\n", irmp_bit);\r | |
3966 | #endif // ANALYZE\r | |
3967 | irmp_param.stop_bit = TRUE; // set flag\r | |
3968 | irmp_param.protocol = IRMP_LGAIR_PROTOCOL; // switch protocol\r | |
3969 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3970 | irmp_tmp_command = irmp_lgair_command; // set command: upper 8 bits are command bits\r | |
3971 | irmp_tmp_address = irmp_lgair_address; // lower 4 bits are address bits\r | |
3972 | irmp_start_bit_detected = 1; // tricky: don't wait for another start bit...\r | |
3973 | }\r | |
69da6090 | 3974 | #endif // IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
35213800 | 3975 | \r |
3976 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
3977 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
df24bb50 | 3978 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 32) // it was a NEC stop bit\r |
3979 | {\r | |
645fbc69 | 3980 | #ifdef ANALYZE\r |
df24bb50 | 3981 | ANALYZE_PRINTF ("Switching to NEC protocol\n");\r |
1082ecf2 | 3982 | #endif // ANALYZE\r |
df24bb50 | 3983 | irmp_param.stop_bit = TRUE; // set flag\r |
3984 | irmp_param.protocol = IRMP_NEC_PROTOCOL; // switch protocol\r | |
3985 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
35213800 | 3986 | \r |
df24bb50 | 3987 | // 0123456789ABC0123456789ABC0123456701234567\r |
3988 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
3989 | // NEC: AAAAAAAAaaaaaaaaCCCCCCCCcccccccc\r | |
3990 | irmp_tmp_address |= (irmp_tmp_address2 & 0x0007) << 13; // fm 2012-02-13: 12 -> 13\r | |
3991 | irmp_tmp_command = (irmp_tmp_address2 >> 3) | (irmp_tmp_command << 10);\r | |
3992 | }\r | |
35213800 | 3993 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
69da6090 | 3994 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
df24bb50 | 3995 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 28) // it was a NEC stop bit\r |
3996 | {\r | |
645fbc69 | 3997 | #ifdef ANALYZE\r |
df24bb50 | 3998 | ANALYZE_PRINTF ("Switching to LGAIR protocol\n");\r |
1082ecf2 | 3999 | #endif // ANALYZE\r |
df24bb50 | 4000 | irmp_param.stop_bit = TRUE; // set flag\r |
4001 | irmp_param.protocol = IRMP_LGAIR_PROTOCOL; // switch protocol\r | |
4002 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
4003 | irmp_tmp_address = irmp_lgair_address;\r | |
4004 | irmp_tmp_command = irmp_lgair_command;\r | |
4005 | }\r | |
69da6090 | 4006 | #endif // IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
35213800 | 4007 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 4008 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r |
4009 | {\r | |
645fbc69 | 4010 | #ifdef ANALYZE\r |
df24bb50 | 4011 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r |
1082ecf2 | 4012 | #endif // ANALYZE\r |
df24bb50 | 4013 | irmp_param.stop_bit = TRUE; // set flag\r |
4014 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
4015 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
35213800 | 4016 | \r |
df24bb50 | 4017 | // 0123456789ABC0123456789ABC0123456701234567\r |
4018 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
4019 | // JVC: AAAACCCCCCCCCCCC\r | |
4020 | irmp_tmp_command = (irmp_tmp_address >> 4) | (irmp_tmp_address2 << 9); // set command: upper 12 bits are command bits\r | |
4021 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
4022 | }\r | |
35213800 | 4023 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
4024 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
956ea3ea | 4025 | \r |
4026 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r | |
df24bb50 | 4027 | else if (irmp_param.protocol == IRMP_SAMSUNG48_PROTOCOL && irmp_bit == 32) // it was a SAMSUNG32 stop bit\r |
4028 | {\r | |
956ea3ea | 4029 | #ifdef ANALYZE\r |
df24bb50 | 4030 | ANALYZE_PRINTF ("Switching to SAMSUNG32 protocol\n");\r |
956ea3ea | 4031 | #endif // ANALYZE\r |
df24bb50 | 4032 | irmp_param.protocol = IRMP_SAMSUNG32_PROTOCOL;\r |
4033 | irmp_param.command_offset = SAMSUNG32_COMMAND_OFFSET;\r | |
4034 | irmp_param.command_end = SAMSUNG32_COMMAND_OFFSET + SAMSUNG32_COMMAND_LEN;\r | |
4035 | irmp_param.complete_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
4036 | }\r | |
956ea3ea | 4037 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
4038 | \r | |
cb93f9e9 | 4039 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 4040 | else if (irmp_param.protocol == IRMP_RCMM32_PROTOCOL && (irmp_bit == 12 || irmp_bit == 24)) // it was a RCMM stop bit\r |
4041 | {\r | |
4042 | if (irmp_bit == 12)\r | |
4043 | {\r | |
4044 | irmp_tmp_command = (irmp_tmp_address & 0xFF); // set command: lower 8 bits are command bits\r | |
4045 | irmp_tmp_address >>= 8; // upper 4 bits are address bits\r | |
cb93f9e9 | 4046 | \r |
645fbc69 | 4047 | #ifdef ANALYZE\r |
df24bb50 | 4048 | ANALYZE_PRINTF ("Switching to RCMM12 protocol, irmp_bit = %d\n", irmp_bit);\r |
1082ecf2 | 4049 | #endif // ANALYZE\r |
df24bb50 | 4050 | irmp_param.protocol = IRMP_RCMM12_PROTOCOL; // switch protocol\r |
4051 | }\r | |
4052 | else // if ((irmp_bit == 24)\r | |
4053 | {\r | |
645fbc69 | 4054 | #ifdef ANALYZE\r |
df24bb50 | 4055 | ANALYZE_PRINTF ("Switching to RCMM24 protocol, irmp_bit = %d\n", irmp_bit);\r |
1082ecf2 | 4056 | #endif // ANALYZE\r |
df24bb50 | 4057 | irmp_param.protocol = IRMP_RCMM24_PROTOCOL; // switch protocol\r |
4058 | }\r | |
4059 | irmp_param.stop_bit = TRUE; // set flag\r | |
4060 | irmp_param.complete_len = irmp_bit; // patch length\r | |
4061 | }\r | |
cb93f9e9 | 4062 | #endif // IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
3d2da98a | 4063 | \r |
4064 | #if IRMP_SUPPORT_TECHNICS_PROTOCOL == 1\r | |
df24bb50 | 4065 | else if (irmp_param.protocol == IRMP_MATSUSHITA_PROTOCOL && irmp_bit == 22) // it was a TECHNICS stop bit\r |
4066 | {\r | |
4067 | #ifdef ANALYZE\r | |
4068 | ANALYZE_PRINTF ("Switching to TECHNICS protocol, irmp_bit = %d\n", irmp_bit);\r | |
4069 | #endif // ANALYZE\r | |
4070 | // Situation:\r | |
4071 | // The first 12 bits have been stored in irmp_tmp_command (LSB first)\r | |
4072 | // The following 10 bits have been stored in irmp_tmp_address (LSB first)\r | |
4073 | // The code of TECHNICS is:\r | |
4074 | // cccccccccccCCCCCCCCCCC (11 times c and 11 times C)\r | |
4075 | // ccccccccccccaaaaaaaaaa\r | |
4076 | // where C is inverted value of c\r | |
4077 | \r | |
4078 | irmp_tmp_address <<= 1;\r | |
4079 | if (irmp_tmp_command & (1<<11))\r | |
4080 | {\r | |
4081 | irmp_tmp_address |= 1;\r | |
4082 | irmp_tmp_command &= ~(1<<11);\r | |
4083 | }\r | |
4084 | \r | |
4085 | if (irmp_tmp_command == ((~irmp_tmp_address) & 0x07FF))\r | |
4086 | {\r | |
4087 | irmp_tmp_address = 0;\r | |
4088 | \r | |
4089 | irmp_param.protocol = IRMP_TECHNICS_PROTOCOL; // switch protocol\r | |
4090 | irmp_param.complete_len = irmp_bit; // patch length\r | |
4091 | }\r | |
4092 | else\r | |
4093 | {\r | |
4094 | #ifdef ANALYZE\r | |
4095 | ANALYZE_PRINTF ("error 8: TECHNICS frame error\n");\r | |
4096 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4097 | #endif // ANALYZE\r | |
4098 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
4099 | irmp_pulse_time = 0;\r | |
4100 | irmp_pause_time = 0;\r | |
4101 | }\r | |
4102 | }\r | |
3d2da98a | 4103 | #endif // IRMP_SUPPORT_TECHNICS_PROTOCOL == 1\r |
df24bb50 | 4104 | else\r |
4105 | {\r | |
645fbc69 | 4106 | #ifdef ANALYZE\r |
df24bb50 | 4107 | ANALYZE_PRINTF ("error 2: pause %d after data bit %d too long\n", irmp_pause_time, irmp_bit);\r |
4108 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1082ecf2 | 4109 | #endif // ANALYZE\r |
df24bb50 | 4110 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
4111 | irmp_pulse_time = 0;\r | |
4112 | irmp_pause_time = 0;\r | |
4113 | }\r | |
4114 | }\r | |
4115 | }\r | |
4116 | }\r | |
4117 | else\r | |
4118 | { // got light now!\r | |
4119 | got_light = TRUE;\r | |
4120 | }\r | |
4225a882 | 4121 | \r |
df24bb50 | 4122 | if (got_light)\r |
4123 | {\r | |
645fbc69 | 4124 | #ifdef ANALYZE\r |
df24bb50 | 4125 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 4126 | #endif // ANALYZE\r |
4225a882 | 4127 | \r |
77f488bb | 4128 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 4129 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER)) // Manchester\r |
4130 | {\r | |
31c1f035 | 4131 | #if 1\r |
df24bb50 | 4132 | if (irmp_pulse_time > irmp_param.pulse_1_len_max /* && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max */)\r |
31c1f035 | 4133 | #else // better, but some IR-RCs use asymmetric timings :-/\r |
df24bb50 | 4134 | if (irmp_pulse_time > irmp_param.pulse_1_len_max && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max &&\r |
4135 | irmp_pause_time <= 2 * irmp_param.pause_1_len_max)\r | |
fc80d688 | 4136 | #endif\r |
df24bb50 | 4137 | {\r |
c7a47e89 | 4138 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4139 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r |
4140 | {\r | |
4141 | #ifdef ANALYZE\r | |
4142 | ANALYZE_PUTCHAR ('T');\r | |
4143 | #endif // ANALYZE\r | |
4144 | if (irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode 6A\r | |
4145 | {\r | |
4146 | irmp_store_bit (1);\r | |
4147 | last_value = 1;\r | |
4148 | }\r | |
4149 | else // RC6 mode 0\r | |
4150 | {\r | |
4151 | irmp_store_bit (0);\r | |
4152 | last_value = 0;\r | |
4153 | }\r | |
4154 | #ifdef ANALYZE\r | |
4155 | ANALYZE_NEWLINE ();\r | |
4156 | #endif // ANALYZE\r | |
4157 | }\r | |
4158 | else\r | |
c7a47e89 | 4159 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4160 | {\r |
645fbc69 | 4161 | #ifdef ANALYZE\r |
df24bb50 | 4162 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r |
1082ecf2 | 4163 | #endif // ANALYZE\r |
df24bb50 | 4164 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1 );\r |
4225a882 | 4165 | \r |
c7a47e89 | 4166 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4167 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r |
4168 | {\r | |
645fbc69 | 4169 | #ifdef ANALYZE\r |
df24bb50 | 4170 | ANALYZE_PUTCHAR ('T');\r |
1082ecf2 | 4171 | #endif // ANALYZE\r |
df24bb50 | 4172 | irmp_store_bit (1);\r |
c7a47e89 | 4173 | \r |
df24bb50 | 4174 | if (irmp_pause_time > 2 * irmp_param.pause_1_len_max)\r |
4175 | {\r | |
4176 | last_value = 0;\r | |
4177 | }\r | |
4178 | else\r | |
4179 | {\r | |
4180 | last_value = 1;\r | |
4181 | }\r | |
645fbc69 | 4182 | #ifdef ANALYZE\r |
df24bb50 | 4183 | ANALYZE_NEWLINE ();\r |
1082ecf2 | 4184 | #endif // ANALYZE\r |
df24bb50 | 4185 | }\r |
4186 | else\r | |
77f488bb | 4187 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4188 | {\r |
645fbc69 | 4189 | #ifdef ANALYZE\r |
df24bb50 | 4190 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r |
1082ecf2 | 4191 | #endif // ANALYZE\r |
df24bb50 | 4192 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0 );\r |
6f750020 | 4193 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 4194 | if (! irmp_param2.protocol)\r |
6f750020 | 4195 | #endif\r |
df24bb50 | 4196 | {\r |
645fbc69 | 4197 | #ifdef ANALYZE\r |
df24bb50 | 4198 | ANALYZE_NEWLINE ();\r |
1082ecf2 | 4199 | #endif // ANALYZE\r |
df24bb50 | 4200 | }\r |
4201 | last_value = (irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0;\r | |
4202 | }\r | |
4203 | }\r | |
4204 | }\r | |
4205 | else if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max\r | |
4206 | /* && irmp_pause_time <= 2 * irmp_param.pause_1_len_max */)\r | |
4207 | {\r | |
4208 | uint_fast8_t manchester_value;\r | |
592411d1 | 4209 | \r |
df24bb50 | 4210 | if (last_pause > irmp_param.pause_1_len_max && last_pause <= 2 * irmp_param.pause_1_len_max)\r |
4211 | {\r | |
4212 | manchester_value = last_value ? 0 : 1;\r | |
4213 | last_value = manchester_value;\r | |
4214 | }\r | |
4215 | else\r | |
4216 | {\r | |
4217 | manchester_value = last_value;\r | |
4218 | }\r | |
592411d1 | 4219 | \r |
645fbc69 | 4220 | #ifdef ANALYZE\r |
df24bb50 | 4221 | ANALYZE_PUTCHAR (manchester_value + '0');\r |
1082ecf2 | 4222 | #endif // ANALYZE\r |
c7a47e89 | 4223 | \r |
6f750020 | 4224 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 4225 | if (! irmp_param2.protocol)\r |
6f750020 | 4226 | #endif\r |
df24bb50 | 4227 | {\r |
645fbc69 | 4228 | #ifdef ANALYZE\r |
df24bb50 | 4229 | ANALYZE_NEWLINE ();\r |
1082ecf2 | 4230 | #endif // ANALYZE\r |
df24bb50 | 4231 | }\r |
c7a47e89 | 4232 | \r |
4233 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
df24bb50 | 4234 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 1 && manchester_value == 1) // RC6 mode != 0 ???\r |
4235 | {\r | |
4236 | #ifdef ANALYZE\r | |
4237 | ANALYZE_PRINTF ("Switching to RC6A protocol\n");\r | |
4238 | #endif // ANALYZE\r | |
4239 | irmp_param.complete_len = RC6_COMPLETE_DATA_LEN_LONG;\r | |
4240 | irmp_param.address_offset = 5;\r | |
4241 | irmp_param.address_end = irmp_param.address_offset + 15;\r | |
4242 | irmp_param.command_offset = irmp_param.address_end + 1; // skip 1 system bit, changes like a toggle bit\r | |
4243 | irmp_param.command_end = irmp_param.command_offset + 16 - 1;\r | |
4244 | irmp_tmp_address = 0;\r | |
4245 | }\r | |
c7a47e89 | 4246 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
4247 | \r | |
df24bb50 | 4248 | irmp_store_bit (manchester_value);\r |
4249 | }\r | |
4250 | else\r | |
4251 | {\r | |
6f750020 | 4252 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 4253 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL &&\r |
4254 | irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX &&\r | |
4255 | ((irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX) ||\r | |
4256 | (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)))\r | |
4257 | {\r | |
645fbc69 | 4258 | #ifdef ANALYZE\r |
df24bb50 | 4259 | ANALYZE_PUTCHAR ('?');\r |
1082ecf2 | 4260 | #endif // ANALYZE\r |
df24bb50 | 4261 | irmp_param.protocol = 0; // switch to FDC, see below\r |
4262 | }\r | |
4263 | else\r | |
6f750020 | 4264 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
4265 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
df24bb50 | 4266 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL &&\r |
4267 | irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX &&\r | |
4268 | ((irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX) ||\r | |
4269 | (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)))\r | |
4270 | {\r | |
645fbc69 | 4271 | #ifdef ANALYZE\r |
df24bb50 | 4272 | ANALYZE_PUTCHAR ('?');\r |
1082ecf2 | 4273 | #endif // ANALYZE\r |
df24bb50 | 4274 | irmp_param.protocol = 0; // switch to RCCAR, see below\r |
4275 | }\r | |
4276 | else\r | |
6f750020 | 4277 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 4278 | {\r |
645fbc69 | 4279 | #ifdef ANALYZE\r |
df24bb50 | 4280 | ANALYZE_PUTCHAR ('?');\r |
4281 | ANALYZE_NEWLINE ();\r | |
4282 | ANALYZE_PRINTF ("error 3 manchester: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4283 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1082ecf2 | 4284 | #endif // ANALYZE\r |
df24bb50 | 4285 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
4286 | irmp_pause_time = 0;\r | |
4287 | }\r | |
4288 | }\r | |
6f750020 | 4289 | \r |
4290 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
df24bb50 | 4291 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL && irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX)\r |
4292 | {\r | |
4293 | if (irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX)\r | |
4294 | {\r | |
645fbc69 | 4295 | #ifdef ANALYZE\r |
df24bb50 | 4296 | ANALYZE_PRINTF (" 1 (FDC)\n");\r |
1082ecf2 | 4297 | #endif // ANALYZE\r |
df24bb50 | 4298 | irmp_store_bit2 (1);\r |
4299 | }\r | |
4300 | else if (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)\r | |
4301 | {\r | |
645fbc69 | 4302 | #ifdef ANALYZE\r |
df24bb50 | 4303 | ANALYZE_PRINTF (" 0 (FDC)\n");\r |
1082ecf2 | 4304 | #endif // ANALYZE\r |
df24bb50 | 4305 | irmp_store_bit2 (0);\r |
4306 | }\r | |
6f750020 | 4307 | \r |
df24bb50 | 4308 | if (! irmp_param.protocol)\r |
4309 | {\r | |
645fbc69 | 4310 | #ifdef ANALYZE\r |
df24bb50 | 4311 | ANALYZE_PRINTF ("Switching to FDC protocol\n");\r |
1082ecf2 | 4312 | #endif // ANALYZE\r |
df24bb50 | 4313 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r |
4314 | irmp_param2.protocol = 0;\r | |
4315 | irmp_tmp_address = irmp_tmp_address2;\r | |
4316 | irmp_tmp_command = irmp_tmp_command2;\r | |
4317 | }\r | |
4318 | }\r | |
6f750020 | 4319 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
4320 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
df24bb50 | 4321 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL && irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX)\r |
4322 | {\r | |
4323 | if (irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX)\r | |
4324 | {\r | |
645fbc69 | 4325 | #ifdef ANALYZE\r |
df24bb50 | 4326 | ANALYZE_PRINTF (" 1 (RCCAR)\n");\r |
1082ecf2 | 4327 | #endif // ANALYZE\r |
df24bb50 | 4328 | irmp_store_bit2 (1);\r |
4329 | }\r | |
4330 | else if (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)\r | |
4331 | {\r | |
645fbc69 | 4332 | #ifdef ANALYZE\r |
df24bb50 | 4333 | ANALYZE_PRINTF (" 0 (RCCAR)\n");\r |
1082ecf2 | 4334 | #endif // ANALYZE\r |
df24bb50 | 4335 | irmp_store_bit2 (0);\r |
4336 | }\r | |
6f750020 | 4337 | \r |
df24bb50 | 4338 | if (! irmp_param.protocol)\r |
4339 | {\r | |
645fbc69 | 4340 | #ifdef ANALYZE\r |
df24bb50 | 4341 | ANALYZE_PRINTF ("Switching to RCCAR protocol\n");\r |
1082ecf2 | 4342 | #endif // ANALYZE\r |
df24bb50 | 4343 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r |
4344 | irmp_param2.protocol = 0;\r | |
4345 | irmp_tmp_address = irmp_tmp_address2;\r | |
4346 | irmp_tmp_command = irmp_tmp_command2;\r | |
4347 | }\r | |
4348 | }\r | |
6f750020 | 4349 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
a7054daf | 4350 | \r |
df24bb50 | 4351 | last_pause = irmp_pause_time;\r |
4352 | wait_for_space = 0;\r | |
4353 | }\r | |
4354 | else\r | |
77f488bb | 4355 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
4356 | \r | |
deba2a0a | 4357 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 4358 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r |
4359 | {\r | |
4360 | while (irmp_bit < irmp_param.complete_len && irmp_pulse_time > irmp_param.pulse_1_len_max)\r | |
4361 | {\r | |
4362 | #ifdef ANALYZE\r | |
4363 | ANALYZE_PUTCHAR ('1');\r | |
4364 | #endif // ANALYZE\r | |
4365 | irmp_store_bit (1);\r | |
4366 | \r | |
4367 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min)\r | |
4368 | {\r | |
4369 | irmp_pulse_time -= irmp_param.pulse_1_len_min;\r | |
4370 | }\r | |
4371 | else\r | |
4372 | {\r | |
4373 | irmp_pulse_time = 0;\r | |
4374 | }\r | |
4375 | }\r | |
4376 | \r | |
4377 | while (irmp_bit < irmp_param.complete_len && irmp_pause_time > irmp_param.pause_1_len_max)\r | |
4378 | {\r | |
4379 | #ifdef ANALYZE\r | |
4380 | ANALYZE_PUTCHAR ('0');\r | |
4381 | #endif // ANALYZE\r | |
4382 | irmp_store_bit (0);\r | |
4383 | \r | |
4384 | if (irmp_pause_time >= irmp_param.pause_1_len_min)\r | |
4385 | {\r | |
4386 | irmp_pause_time -= irmp_param.pause_1_len_min;\r | |
4387 | }\r | |
4388 | else\r | |
4389 | {\r | |
4390 | irmp_pause_time = 0;\r | |
4391 | }\r | |
4392 | }\r | |
4393 | #ifdef ANALYZE\r | |
4394 | ANALYZE_NEWLINE ();\r | |
4395 | #endif // ANALYZE\r | |
4396 | wait_for_space = 0;\r | |
4397 | }\r | |
4398 | else\r | |
deba2a0a | 4399 | #endif // IRMP_SUPPORT_SERIAL == 1\r |
a7054daf | 4400 | \r |
4225a882 | 4401 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 4402 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit == 16) // Samsung: 16th bit\r |
4403 | {\r | |
4404 | if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX &&\r | |
4405 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
4406 | {\r | |
4407 | #ifdef ANALYZE\r | |
4408 | ANALYZE_PRINTF ("SYNC\n");\r | |
4409 | #endif // ANALYZE\r | |
4410 | wait_for_space = 0;\r | |
4411 | irmp_bit++;\r | |
4412 | }\r | |
4413 | else if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX)\r | |
4414 | {\r | |
956ea3ea | 4415 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r |
4416 | #ifdef ANALYZE\r | |
df24bb50 | 4417 | ANALYZE_PRINTF ("Switching to SAMSUNG48 protocol ");\r |
956ea3ea | 4418 | #endif // ANALYZE\r |
df24bb50 | 4419 | irmp_param.protocol = IRMP_SAMSUNG48_PROTOCOL;\r |
4420 | irmp_param.command_offset = SAMSUNG48_COMMAND_OFFSET;\r | |
4421 | irmp_param.command_end = SAMSUNG48_COMMAND_OFFSET + SAMSUNG48_COMMAND_LEN;\r | |
4422 | irmp_param.complete_len = SAMSUNG48_COMPLETE_DATA_LEN;\r | |
956ea3ea | 4423 | #else\r |
4424 | #ifdef ANALYZE\r | |
df24bb50 | 4425 | ANALYZE_PRINTF ("Switching to SAMSUNG32 protocol ");\r |
956ea3ea | 4426 | #endif // ANALYZE\r |
df24bb50 | 4427 | irmp_param.protocol = IRMP_SAMSUNG32_PROTOCOL;\r |
4428 | irmp_param.command_offset = SAMSUNG32_COMMAND_OFFSET;\r | |
4429 | irmp_param.command_end = SAMSUNG32_COMMAND_OFFSET + SAMSUNG32_COMMAND_LEN;\r | |
4430 | irmp_param.complete_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
956ea3ea | 4431 | #endif\r |
df24bb50 | 4432 | if (irmp_pause_time >= SAMSUNG_1_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_1_PAUSE_LEN_MAX)\r |
4433 | {\r | |
4434 | #ifdef ANALYZE\r | |
4435 | ANALYZE_PUTCHAR ('1');\r | |
4436 | ANALYZE_NEWLINE ();\r | |
4437 | #endif // ANALYZE\r | |
4438 | irmp_store_bit (1);\r | |
4439 | wait_for_space = 0;\r | |
4440 | }\r | |
4441 | else\r | |
4442 | {\r | |
4443 | #ifdef ANALYZE\r | |
4444 | ANALYZE_PUTCHAR ('0');\r | |
4445 | ANALYZE_NEWLINE ();\r | |
4446 | #endif // ANALYZE\r | |
4447 | irmp_store_bit (0);\r | |
4448 | wait_for_space = 0;\r | |
4449 | }\r | |
4450 | }\r | |
4451 | else\r | |
4452 | { // timing incorrect!\r | |
4453 | #ifdef ANALYZE\r | |
4454 | ANALYZE_PRINTF ("error 3 Samsung: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4455 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4456 | #endif // ANALYZE\r | |
4457 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4458 | irmp_pause_time = 0;\r | |
4459 | }\r | |
4460 | }\r | |
4461 | else\r | |
4225a882 | 4462 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL\r |
4463 | \r | |
fc80d688 | 4464 | #if IRMP_SUPPORT_NEC16_PROTOCOL\r |
35213800 | 4465 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
df24bb50 | 4466 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL &&\r |
35213800 | 4467 | #else // IRMP_SUPPORT_NEC_PROTOCOL instead\r |
df24bb50 | 4468 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL &&\r |
35213800 | 4469 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
df24bb50 | 4470 | irmp_bit == 8 && irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r |
4471 | {\r | |
4472 | #ifdef ANALYZE\r | |
4473 | ANALYZE_PRINTF ("Switching to NEC16 protocol\n");\r | |
4474 | #endif // ANALYZE\r | |
4475 | irmp_param.protocol = IRMP_NEC16_PROTOCOL;\r | |
4476 | irmp_param.address_offset = NEC16_ADDRESS_OFFSET;\r | |
4477 | irmp_param.address_end = NEC16_ADDRESS_OFFSET + NEC16_ADDRESS_LEN;\r | |
4478 | irmp_param.command_offset = NEC16_COMMAND_OFFSET;\r | |
4479 | irmp_param.command_end = NEC16_COMMAND_OFFSET + NEC16_COMMAND_LEN;\r | |
4480 | irmp_param.complete_len = NEC16_COMPLETE_DATA_LEN;\r | |
4481 | wait_for_space = 0;\r | |
4482 | }\r | |
4483 | else\r | |
fc80d688 | 4484 | #endif // IRMP_SUPPORT_NEC16_PROTOCOL\r |
4485 | \r | |
504d9df9 | 4486 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 4487 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r |
4488 | {\r | |
4489 | if (irmp_pulse_time >= BANG_OLUFSEN_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_PULSE_LEN_MAX)\r | |
4490 | {\r | |
4491 | if (irmp_bit == 1) // Bang & Olufsen: 3rd bit\r | |
4492 | {\r | |
4493 | if (irmp_pause_time >= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX)\r | |
4494 | {\r | |
4495 | #ifdef ANALYZE\r | |
4496 | ANALYZE_PRINTF ("3rd start bit\n");\r | |
4497 | #endif // ANALYZE\r | |
4498 | wait_for_space = 0;\r | |
4499 | irmp_bit++;\r | |
4500 | }\r | |
4501 | else\r | |
4502 | { // timing incorrect!\r | |
4503 | #ifdef ANALYZE\r | |
4504 | ANALYZE_PRINTF ("error 3a B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4505 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4506 | #endif // ANALYZE\r | |
4507 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4508 | irmp_pause_time = 0;\r | |
4509 | }\r | |
4510 | }\r | |
4511 | else if (irmp_bit == 19) // Bang & Olufsen: trailer bit\r | |
4512 | {\r | |
4513 | if (irmp_pause_time >= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX)\r | |
4514 | {\r | |
4515 | #ifdef ANALYZE\r | |
4516 | ANALYZE_PRINTF ("trailer bit\n");\r | |
4517 | #endif // ANALYZE\r | |
4518 | wait_for_space = 0;\r | |
4519 | irmp_bit++;\r | |
4520 | }\r | |
4521 | else\r | |
4522 | { // timing incorrect!\r | |
4523 | #ifdef ANALYZE\r | |
4524 | ANALYZE_PRINTF ("error 3b B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4525 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4526 | #endif // ANALYZE\r | |
4527 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4528 | irmp_pause_time = 0;\r | |
4529 | }\r | |
4530 | }\r | |
4531 | else\r | |
4532 | {\r | |
4533 | if (irmp_pause_time >= BANG_OLUFSEN_1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_1_PAUSE_LEN_MAX)\r | |
4534 | { // pulse & pause timings correct for "1"?\r | |
4535 | #ifdef ANALYZE\r | |
4536 | ANALYZE_PUTCHAR ('1');\r | |
4537 | ANALYZE_NEWLINE ();\r | |
4538 | #endif // ANALYZE\r | |
4539 | irmp_store_bit (1);\r | |
4540 | last_value = 1;\r | |
4541 | wait_for_space = 0;\r | |
4542 | }\r | |
4543 | else if (irmp_pause_time >= BANG_OLUFSEN_0_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_0_PAUSE_LEN_MAX)\r | |
4544 | { // pulse & pause timings correct for "0"?\r | |
4545 | #ifdef ANALYZE\r | |
4546 | ANALYZE_PUTCHAR ('0');\r | |
4547 | ANALYZE_NEWLINE ();\r | |
4548 | #endif // ANALYZE\r | |
4549 | irmp_store_bit (0);\r | |
4550 | last_value = 0;\r | |
4551 | wait_for_space = 0;\r | |
4552 | }\r | |
4553 | else if (irmp_pause_time >= BANG_OLUFSEN_R_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_R_PAUSE_LEN_MAX)\r | |
4554 | {\r | |
4555 | #ifdef ANALYZE\r | |
4556 | ANALYZE_PUTCHAR (last_value + '0');\r | |
4557 | ANALYZE_NEWLINE ();\r | |
4558 | #endif // ANALYZE\r | |
4559 | irmp_store_bit (last_value);\r | |
4560 | wait_for_space = 0;\r | |
4561 | }\r | |
4562 | else\r | |
4563 | { // timing incorrect!\r | |
4564 | #ifdef ANALYZE\r | |
4565 | ANALYZE_PRINTF ("error 3c B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4566 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4567 | #endif // ANALYZE\r | |
4568 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4569 | irmp_pause_time = 0;\r | |
4570 | }\r | |
4571 | }\r | |
4572 | }\r | |
4573 | else\r | |
4574 | { // timing incorrect!\r | |
4575 | #ifdef ANALYZE\r | |
4576 | ANALYZE_PRINTF ("error 3d B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4577 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4578 | #endif // ANALYZE\r | |
4579 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4580 | irmp_pause_time = 0;\r | |
4581 | }\r | |
4582 | }\r | |
4583 | else\r | |
504d9df9 | 4584 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL\r |
4585 | \r | |
cb93f9e9 | 4586 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 4587 | if (irmp_param.protocol == IRMP_RCMM32_PROTOCOL)\r |
4588 | {\r | |
4589 | if (irmp_pause_time >= RCMM32_BIT_00_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_00_PAUSE_LEN_MAX)\r | |
4590 | {\r | |
4591 | #ifdef ANALYZE\r | |
4592 | ANALYZE_PUTCHAR ('0');\r | |
4593 | ANALYZE_PUTCHAR ('0');\r | |
4594 | #endif // ANALYZE\r | |
4595 | irmp_store_bit (0);\r | |
4596 | irmp_store_bit (0);\r | |
4597 | }\r | |
4598 | else if (irmp_pause_time >= RCMM32_BIT_01_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_01_PAUSE_LEN_MAX)\r | |
4599 | {\r | |
4600 | #ifdef ANALYZE\r | |
4601 | ANALYZE_PUTCHAR ('0');\r | |
4602 | ANALYZE_PUTCHAR ('1');\r | |
4603 | #endif // ANALYZE\r | |
4604 | irmp_store_bit (0);\r | |
4605 | irmp_store_bit (1);\r | |
4606 | }\r | |
4607 | else if (irmp_pause_time >= RCMM32_BIT_10_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_10_PAUSE_LEN_MAX)\r | |
4608 | {\r | |
4609 | #ifdef ANALYZE\r | |
4610 | ANALYZE_PUTCHAR ('1');\r | |
4611 | ANALYZE_PUTCHAR ('0');\r | |
4612 | #endif // ANALYZE\r | |
4613 | irmp_store_bit (1);\r | |
4614 | irmp_store_bit (0);\r | |
4615 | }\r | |
4616 | else if (irmp_pause_time >= RCMM32_BIT_11_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_11_PAUSE_LEN_MAX)\r | |
4617 | {\r | |
4618 | #ifdef ANALYZE\r | |
4619 | ANALYZE_PUTCHAR ('1');\r | |
4620 | ANALYZE_PUTCHAR ('1');\r | |
4621 | #endif // ANALYZE\r | |
4622 | irmp_store_bit (1);\r | |
4623 | irmp_store_bit (1);\r | |
4624 | }\r | |
4625 | #ifdef ANALYZE\r | |
4626 | ANALYZE_PRINTF ("\n");\r | |
4627 | #endif // ANALYZE\r | |
4628 | wait_for_space = 0;\r | |
4629 | }\r | |
4630 | else\r | |
cb93f9e9 | 4631 | #endif\r |
0834784c | 4632 | \r |
df24bb50 | 4633 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max &&\r |
4634 | irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
4635 | { // pulse & pause timings correct for "1"?\r | |
645fbc69 | 4636 | #ifdef ANALYZE\r |
df24bb50 | 4637 | ANALYZE_PUTCHAR ('1');\r |
4638 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 4639 | #endif // ANALYZE\r |
df24bb50 | 4640 | irmp_store_bit (1);\r |
4641 | wait_for_space = 0;\r | |
4642 | }\r | |
4643 | else if (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max &&\r | |
4644 | irmp_pause_time >= irmp_param.pause_0_len_min && irmp_pause_time <= irmp_param.pause_0_len_max)\r | |
4645 | { // pulse & pause timings correct for "0"?\r | |
645fbc69 | 4646 | #ifdef ANALYZE\r |
df24bb50 | 4647 | ANALYZE_PUTCHAR ('0');\r |
4648 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 4649 | #endif // ANALYZE\r |
df24bb50 | 4650 | irmp_store_bit (0);\r |
4651 | wait_for_space = 0;\r | |
4652 | }\r | |
4653 | else\r | |
111d6191 | 4654 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL\r |
4655 | \r | |
df24bb50 | 4656 | if (irmp_param.protocol == IRMP_KATHREIN_PROTOCOL &&\r |
4657 | irmp_pulse_time >= KATHREIN_1_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_1_PULSE_LEN_MAX &&\r | |
4658 | (((irmp_bit == 8 || irmp_bit == 6) &&\r | |
4659 | irmp_pause_time >= KATHREIN_SYNC_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_SYNC_BIT_PAUSE_LEN_MAX) ||\r | |
4660 | (irmp_bit == 12 &&\r | |
4661 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)))\r | |
4662 | \r | |
4663 | {\r | |
4664 | if (irmp_bit == 8)\r | |
4665 | {\r | |
4666 | irmp_bit++;\r | |
4667 | #ifdef ANALYZE\r | |
4668 | ANALYZE_PUTCHAR ('S');\r | |
4669 | ANALYZE_NEWLINE ();\r | |
4670 | #endif // ANALYZE\r | |
4671 | irmp_tmp_command <<= 1;\r | |
4672 | }\r | |
4673 | else\r | |
4674 | {\r | |
4675 | #ifdef ANALYZE\r | |
4676 | ANALYZE_PUTCHAR ('S');\r | |
4677 | ANALYZE_NEWLINE ();\r | |
4678 | #endif // ANALYZE\r | |
4679 | irmp_store_bit (1);\r | |
4680 | }\r | |
4681 | wait_for_space = 0;\r | |
4682 | }\r | |
4683 | else\r | |
111d6191 | 4684 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL\r |
df24bb50 | 4685 | { // timing incorrect!\r |
4686 | #ifdef ANALYZE\r | |
4687 | ANALYZE_PRINTF ("error 3: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4688 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4689 | #endif // ANALYZE\r | |
4690 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4691 | irmp_pause_time = 0;\r | |
4692 | }\r | |
4693 | \r | |
4694 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
4695 | }\r | |
4696 | }\r | |
4697 | else\r | |
4698 | { // counting the pulse length ...\r | |
4699 | if (! irmp_input) // still light?\r | |
4700 | { // yes...\r | |
4701 | irmp_pulse_time++; // increment counter\r | |
4702 | }\r | |
4703 | else\r | |
4704 | { // now it's dark!\r | |
4705 | wait_for_space = 1; // let's count the time (see above)\r | |
4706 | irmp_pause_time = 1; // set pause counter to 1, not 0\r | |
4707 | }\r | |
4708 | }\r | |
4709 | \r | |
4710 | if (irmp_start_bit_detected && irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 0) // enough bits received?\r | |
4711 | {\r | |
4712 | if (last_irmp_command == irmp_tmp_command && key_repetition_len < AUTO_FRAME_REPETITION_LEN)\r | |
4713 | {\r | |
4714 | repetition_frame_number++;\r | |
4715 | }\r | |
4716 | else\r | |
4717 | {\r | |
4718 | repetition_frame_number = 0;\r | |
4719 | }\r | |
592411d1 | 4720 | \r |
4721 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 4722 | // if SIRCS protocol and the code will be repeated within 50 ms, we will ignore 2nd and 3rd repetition frame\r |
4723 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && (repetition_frame_number == 1 || repetition_frame_number == 2))\r | |
4724 | {\r | |
645fbc69 | 4725 | #ifdef ANALYZE\r |
df24bb50 | 4726 | ANALYZE_PRINTF ("code skipped: SIRCS auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4727 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4728 | #endif // ANALYZE\r |
df24bb50 | 4729 | key_repetition_len = 0;\r |
4730 | }\r | |
4731 | else\r | |
592411d1 | 4732 | #endif\r |
4733 | \r | |
40ca4604 | 4734 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
df24bb50 | 4735 | // if ORTEK protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r |
4736 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL && repetition_frame_number == 1)\r | |
4737 | {\r | |
645fbc69 | 4738 | #ifdef ANALYZE\r |
df24bb50 | 4739 | ANALYZE_PRINTF ("code skipped: ORTEK auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4740 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4741 | #endif // ANALYZE\r |
df24bb50 | 4742 | key_repetition_len = 0;\r |
4743 | }\r | |
4744 | else\r | |
40ca4604 | 4745 | #endif\r |
4746 | \r | |
173b00a6 | 4747 | #if 0 && IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1 // fm 2015-12-02: don't ignore every 2nd frame\r |
df24bb50 | 4748 | // if KASEIKYO protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r |
4749 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && repetition_frame_number == 1)\r | |
4750 | {\r | |
645fbc69 | 4751 | #ifdef ANALYZE\r |
df24bb50 | 4752 | ANALYZE_PRINTF ("code skipped: KASEIKYO auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4753 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4754 | #endif // ANALYZE\r |
df24bb50 | 4755 | key_repetition_len = 0;\r |
4756 | }\r | |
4757 | else\r | |
770a1a9d | 4758 | #endif\r |
4759 | \r | |
173b00a6 | 4760 | #if 0 && IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1 // fm 2015-12-02: don't ignore every 2nd frame\r |
df24bb50 | 4761 | // if SAMSUNG32 or SAMSUNG48 protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
4762 | if ((irmp_param.protocol == IRMP_SAMSUNG32_PROTOCOL || irmp_param.protocol == IRMP_SAMSUNG48_PROTOCOL) && (repetition_frame_number & 0x01))\r | |
4763 | {\r | |
645fbc69 | 4764 | #ifdef ANALYZE\r |
df24bb50 | 4765 | ANALYZE_PRINTF ("code skipped: SAMSUNG32/SAMSUNG48 auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4766 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4767 | #endif // ANALYZE\r |
df24bb50 | 4768 | key_repetition_len = 0;\r |
4769 | }\r | |
4770 | else\r | |
592411d1 | 4771 | #endif\r |
4772 | \r | |
4773 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
df24bb50 | 4774 | // if NUBERT protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
4775 | if (irmp_param.protocol == IRMP_NUBERT_PROTOCOL && (repetition_frame_number & 0x01))\r | |
4776 | {\r | |
645fbc69 | 4777 | #ifdef ANALYZE\r |
df24bb50 | 4778 | ANALYZE_PRINTF ("code skipped: NUBERT auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4779 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4780 | #endif // ANALYZE\r |
df24bb50 | 4781 | key_repetition_len = 0;\r |
4782 | }\r | |
4783 | else\r | |
592411d1 | 4784 | #endif\r |
4785 | \r | |
0a2f634b | 4786 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
df24bb50 | 4787 | // if SPEAKER protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
4788 | if (irmp_param.protocol == IRMP_SPEAKER_PROTOCOL && (repetition_frame_number & 0x01))\r | |
4789 | {\r | |
645fbc69 | 4790 | #ifdef ANALYZE\r |
df24bb50 | 4791 | ANALYZE_PRINTF ("code skipped: SPEAKER auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4792 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4793 | #endif // ANALYZE\r |
df24bb50 | 4794 | key_repetition_len = 0;\r |
4795 | }\r | |
4796 | else\r | |
0a2f634b | 4797 | #endif\r |
4798 | \r | |
df24bb50 | 4799 | {\r |
645fbc69 | 4800 | #ifdef ANALYZE\r |
df24bb50 | 4801 | ANALYZE_PRINTF ("%8.3fms code detected, length = %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit);\r |
1082ecf2 | 4802 | #endif // ANALYZE\r |
df24bb50 | 4803 | irmp_ir_detected = TRUE;\r |
4225a882 | 4804 | \r |
4805 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 4806 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r |
4807 | { // check for repetition frame\r | |
4808 | if ((~irmp_tmp_command & 0x3FF) == last_irmp_denon_command) // command bits must be inverted\r | |
4809 | {\r | |
4810 | irmp_tmp_command = last_irmp_denon_command; // use command received before!\r | |
4811 | last_irmp_denon_command = 0;\r | |
4812 | \r | |
4813 | irmp_protocol = irmp_param.protocol; // store protocol\r | |
4814 | irmp_address = irmp_tmp_address; // store address\r | |
4815 | irmp_command = irmp_tmp_command; // store command\r | |
4816 | }\r | |
4817 | else\r | |
4818 | {\r | |
4819 | if ((irmp_tmp_command & 0x01) == 0x00)\r | |
4820 | {\r | |
4821 | #ifdef ANALYZE\r | |
4822 | ANALYZE_PRINTF ("%8.3fms info Denon: waiting for inverted command repetition\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
4823 | #endif // ANALYZE\r | |
4824 | last_irmp_denon_command = irmp_tmp_command;\r | |
4825 | denon_repetition_len = 0;\r | |
4826 | irmp_ir_detected = FALSE;\r | |
4827 | }\r | |
4828 | else\r | |
4829 | {\r | |
4830 | #ifdef ANALYZE\r | |
4831 | ANALYZE_PRINTF ("%8.3fms warning Denon: got unexpected inverted command, ignoring it\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
4832 | #endif // ANALYZE\r | |
4833 | last_irmp_denon_command = 0;\r | |
4834 | irmp_ir_detected = FALSE;\r | |
4835 | }\r | |
4836 | }\r | |
4837 | }\r | |
4838 | else\r | |
4225a882 | 4839 | #endif // IRMP_SUPPORT_DENON_PROTOCOL\r |
592411d1 | 4840 | \r |
4841 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
df24bb50 | 4842 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && irmp_tmp_command == 0x01ff)\r |
4843 | { // Grundig start frame?\r | |
645fbc69 | 4844 | #ifdef ANALYZE\r |
df24bb50 | 4845 | ANALYZE_PRINTF ("Detected GRUNDIG start frame, ignoring it\n");\r |
1082ecf2 | 4846 | #endif // ANALYZE\r |
df24bb50 | 4847 | irmp_ir_detected = FALSE;\r |
4848 | }\r | |
4849 | else\r | |
d155e9ab | 4850 | #endif // IRMP_SUPPORT_GRUNDIG_PROTOCOL\r |
4851 | \r | |
4852 | #if IRMP_SUPPORT_NOKIA_PROTOCOL == 1\r | |
df24bb50 | 4853 | if (irmp_param.protocol == IRMP_NOKIA_PROTOCOL && irmp_tmp_address == 0x00ff && irmp_tmp_command == 0x00fe)\r |
4854 | { // Nokia start frame?\r | |
645fbc69 | 4855 | #ifdef ANALYZE\r |
df24bb50 | 4856 | ANALYZE_PRINTF ("Detected NOKIA start frame, ignoring it\n");\r |
1082ecf2 | 4857 | #endif // ANALYZE\r |
df24bb50 | 4858 | irmp_ir_detected = FALSE;\r |
4859 | }\r | |
4860 | else\r | |
d155e9ab | 4861 | #endif // IRMP_SUPPORT_NOKIA_PROTOCOL\r |
df24bb50 | 4862 | {\r |
cb8474cc | 4863 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 4864 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL && irmp_bit == 0) // repetition frame\r |
4865 | {\r | |
4866 | if (key_repetition_len < NEC_FRAME_REPEAT_PAUSE_LEN_MAX)\r | |
4867 | {\r | |
4868 | #ifdef ANALYZE\r | |
4869 | ANALYZE_PRINTF ("Detected NEC repetition frame, key_repetition_len = %d\n", key_repetition_len);\r | |
4870 | ANALYZE_ONLY_NORMAL_PRINTF("REPETETION FRAME ");\r | |
4871 | #endif // ANALYZE\r | |
4872 | irmp_tmp_address = last_irmp_address; // address is last address\r | |
4873 | irmp_tmp_command = last_irmp_command; // command is last command\r | |
4874 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
4875 | key_repetition_len = 0;\r | |
4876 | }\r | |
4877 | else\r | |
4878 | {\r | |
4879 | #ifdef ANALYZE\r | |
4880 | ANALYZE_PRINTF ("Detected NEC repetition frame, ignoring it: timeout occured, key_repetition_len = %d > %d\n",\r | |
4881 | key_repetition_len, NEC_FRAME_REPEAT_PAUSE_LEN_MAX);\r | |
4882 | #endif // ANALYZE\r | |
4883 | irmp_ir_detected = FALSE;\r | |
4884 | }\r | |
4885 | }\r | |
4225a882 | 4886 | #endif // IRMP_SUPPORT_NEC_PROTOCOL\r |
770a1a9d | 4887 | \r |
4888 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
df24bb50 | 4889 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r |
4890 | {\r | |
4891 | uint_fast8_t xor_value;\r | |
770a1a9d | 4892 | \r |
df24bb50 | 4893 | xor_value = (xor_check[0] & 0x0F) ^ ((xor_check[0] & 0xF0) >> 4) ^ (xor_check[1] & 0x0F) ^ ((xor_check[1] & 0xF0) >> 4);\r |
770a1a9d | 4894 | \r |
df24bb50 | 4895 | if (xor_value != (xor_check[2] & 0x0F))\r |
4896 | {\r | |
645fbc69 | 4897 | #ifdef ANALYZE\r |
df24bb50 | 4898 | ANALYZE_PRINTF ("error 4: wrong XOR check for customer id: 0x%1x 0x%1x\n", xor_value, xor_check[2] & 0x0F);\r |
1082ecf2 | 4899 | #endif // ANALYZE\r |
df24bb50 | 4900 | irmp_ir_detected = FALSE;\r |
4901 | }\r | |
770a1a9d | 4902 | \r |
df24bb50 | 4903 | xor_value = xor_check[2] ^ xor_check[3] ^ xor_check[4];\r |
770a1a9d | 4904 | \r |
df24bb50 | 4905 | if (xor_value != xor_check[5])\r |
4906 | {\r | |
645fbc69 | 4907 | #ifdef ANALYZE\r |
df24bb50 | 4908 | ANALYZE_PRINTF ("error 5: wrong XOR check for data bits: 0x%02x 0x%02x\n", xor_value, xor_check[5]);\r |
1082ecf2 | 4909 | #endif // ANALYZE\r |
df24bb50 | 4910 | irmp_ir_detected = FALSE;\r |
4911 | }\r | |
0f700c8e | 4912 | \r |
df24bb50 | 4913 | irmp_flags |= genre2; // write the genre2 bits into MSB of the flag byte\r |
4914 | }\r | |
770a1a9d | 4915 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
4916 | \r | |
40ca4604 | 4917 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
df24bb50 | 4918 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r |
4919 | {\r | |
4920 | if (parity == PARITY_CHECK_FAILED)\r | |
4921 | {\r | |
645fbc69 | 4922 | #ifdef ANALYZE\r |
df24bb50 | 4923 | ANALYZE_PRINTF ("error 6: parity check failed\n");\r |
1082ecf2 | 4924 | #endif // ANALYZE\r |
df24bb50 | 4925 | irmp_ir_detected = FALSE;\r |
4926 | }\r | |
40ca4604 | 4927 | \r |
df24bb50 | 4928 | if ((irmp_tmp_address & 0x03) == 0x02)\r |
4929 | {\r | |
645fbc69 | 4930 | #ifdef ANALYZE\r |
df24bb50 | 4931 | ANALYZE_PRINTF ("code skipped: ORTEK end of transmission frame (key release)\n");\r |
1082ecf2 | 4932 | #endif // ANALYZE\r |
df24bb50 | 4933 | irmp_ir_detected = FALSE;\r |
4934 | }\r | |
4935 | irmp_tmp_address >>= 2;\r | |
4936 | }\r | |
40ca4604 | 4937 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
4938 | \r | |
7365350c | 4939 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
4940 | if (irmp_param.protocol == IRMP_MITSU_HEAVY_PROTOCOL)\r | |
4941 | {\r | |
4942 | check = irmp_tmp_command >> 8; // inverted upper byte == lower byte?\r | |
4943 | check = ~ check;\r | |
4944 | if (check == (irmp_tmp_command & 0xFF)) { //ok:\r | |
4945 | irmp_tmp_command &= 0xFF;\r | |
4946 | }\r | |
4947 | else mitsu_parity = PARITY_CHECK_FAILED;\r | |
4948 | if (mitsu_parity == PARITY_CHECK_FAILED)\r | |
4949 | {\r | |
4950 | #ifdef ANALYZE\r | |
4951 | ANALYZE_PRINTF ("error 7: parity check failed\n");\r | |
4952 | #endif // ANALYZE\r | |
4953 | irmp_ir_detected = FALSE;\r | |
4954 | }\r | |
4955 | }\r | |
4956 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL\r | |
4957 | \r | |
c7a47e89 | 4958 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4959 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode = 6?\r |
4960 | {\r | |
4961 | irmp_protocol = IRMP_RC6A_PROTOCOL;\r | |
4962 | }\r | |
4963 | else\r | |
c7a47e89 | 4964 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4965 | {\r |
4966 | irmp_protocol = irmp_param.protocol;\r | |
4967 | }\r | |
d823e852 | 4968 | \r |
4969 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
df24bb50 | 4970 | if (irmp_param.protocol == IRMP_FDC_PROTOCOL)\r |
4971 | {\r | |
4972 | if (irmp_tmp_command & 0x000F) // released key?\r | |
4973 | {\r | |
4974 | irmp_tmp_command = (irmp_tmp_command >> 4) | 0x80; // yes, set bit 7\r | |
4975 | }\r | |
4976 | else\r | |
4977 | {\r | |
4978 | irmp_tmp_command >>= 4; // no, it's a pressed key\r | |
4979 | }\r | |
4980 | irmp_tmp_command |= (irmp_tmp_address << 2) & 0x0F00; // 000000CCCCAAAAAA -> 0000CCCC00000000\r | |
4981 | irmp_tmp_address &= 0x003F;\r | |
4982 | }\r | |
d823e852 | 4983 | #endif\r |
4984 | \r | |
df24bb50 | 4985 | irmp_address = irmp_tmp_address; // store address\r |
4225a882 | 4986 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 4987 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL)\r |
4988 | {\r | |
4989 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
4990 | }\r | |
4225a882 | 4991 | #endif\r |
4992 | \r | |
4993 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
df24bb50 | 4994 | if (irmp_param.protocol == IRMP_RC5_PROTOCOL)\r |
4995 | {\r | |
4996 | irmp_tmp_command |= rc5_cmd_bit6; // store bit 6\r | |
4997 | }\r | |
c2b70f0b | 4998 | #endif\r |
4999 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r | |
df24bb50 | 5000 | if (irmp_param.protocol == IRMP_S100_PROTOCOL)\r |
5001 | {\r | |
5002 | irmp_tmp_command |= rc5_cmd_bit6; // store bit 6\r | |
5003 | }\r | |
4225a882 | 5004 | #endif\r |
df24bb50 | 5005 | irmp_command = irmp_tmp_command; // store command\r |
4225a882 | 5006 | \r |
5007 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
df24bb50 | 5008 | irmp_id = irmp_tmp_id;\r |
4225a882 | 5009 | #endif\r |
df24bb50 | 5010 | }\r |
5011 | }\r | |
4225a882 | 5012 | \r |
df24bb50 | 5013 | if (irmp_ir_detected)\r |
5014 | {\r | |
5015 | if (last_irmp_command == irmp_tmp_command &&\r | |
5016 | last_irmp_address == irmp_tmp_address &&\r | |
5017 | key_repetition_len < IRMP_KEY_REPETITION_LEN)\r | |
5018 | {\r | |
5019 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
5020 | }\r | |
4225a882 | 5021 | \r |
df24bb50 | 5022 | last_irmp_address = irmp_tmp_address; // store as last address, too\r |
5023 | last_irmp_command = irmp_tmp_command; // store as last command, too\r | |
4225a882 | 5024 | \r |
df24bb50 | 5025 | key_repetition_len = 0;\r |
5026 | }\r | |
5027 | else\r | |
5028 | {\r | |
645fbc69 | 5029 | #ifdef ANALYZE\r |
df24bb50 | 5030 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
1082ecf2 | 5031 | #endif // ANALYZE\r |
df24bb50 | 5032 | }\r |
4225a882 | 5033 | \r |
df24bb50 | 5034 | irmp_start_bit_detected = 0; // and wait for next start bit\r |
5035 | irmp_tmp_command = 0;\r | |
5036 | irmp_pulse_time = 0;\r | |
5037 | irmp_pause_time = 0;\r | |
770a1a9d | 5038 | \r |
5039 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
df24bb50 | 5040 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // the stop bit of JVC frame is also start bit of next frame\r |
5041 | { // set pulse time here!\r | |
5042 | irmp_pulse_time = ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME));\r | |
5043 | }\r | |
770a1a9d | 5044 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 5045 | }\r |
5046 | }\r | |
4225a882 | 5047 | }\r |
afd1e690 | 5048 | \r |
5049 | #if defined(STELLARIS_ARM_CORTEX_M4)\r | |
5050 | // Clear the timer interrupt\r | |
5051 | TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT);\r | |
5052 | #endif\r | |
5053 | \r | |
879b06c2 | 5054 | return (irmp_ir_detected);\r |
4225a882 | 5055 | }\r |
5056 | \r | |
48664931 | 5057 | #ifdef ANALYZE\r |
4225a882 | 5058 | \r |
2eab5ec9 | 5059 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
5060 | * main functions - for Unix/Linux + Windows only!\r | |
5061 | *\r | |
5062 | * AVR: see main.c!\r | |
5063 | *\r | |
5064 | * Compile it under linux with:\r | |
5065 | * cc irmp.c -o irmp\r | |
5066 | *\r | |
95b27043 | 5067 | * usage: ./irmp [-v|-s|-a|-l] < file\r |
2eab5ec9 | 5068 | *\r |
5069 | * options:\r | |
5070 | * -v verbose\r | |
5071 | * -s silent\r | |
5072 | * -a analyze\r | |
5073 | * -l list pulse/pauses\r | |
2eab5ec9 | 5074 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
5075 | */\r | |
4225a882 | 5076 | \r |
77f488bb | 5077 | void\r |
48664931 | 5078 | print_spectrum (char * text, int * buf, int is_pulse)\r |
77f488bb | 5079 | {\r |
5080 | int i;\r | |
5081 | int j;\r | |
48664931 | 5082 | int min;\r |
5083 | int max;\r | |
5084 | int max_value = 0;\r | |
77f488bb | 5085 | int value;\r |
5086 | int sum = 0;\r | |
5087 | int counter = 0;\r | |
5088 | double average = 0;\r | |
48664931 | 5089 | double tolerance;\r |
77f488bb | 5090 | \r |
43c535be | 5091 | puts ("-----------------------------------------------------------------------------");\r |
77f488bb | 5092 | printf ("%s:\n", text);\r |
5093 | \r | |
5094 | for (i = 0; i < 256; i++)\r | |
5095 | {\r | |
df24bb50 | 5096 | if (buf[i] > max_value)\r |
5097 | {\r | |
5098 | max_value = buf[i];\r | |
5099 | }\r | |
77f488bb | 5100 | }\r |
5101 | \r | |
faf6479d | 5102 | for (i = 1; i < 200; i++)\r |
77f488bb | 5103 | {\r |
df24bb50 | 5104 | if (buf[i] > 0)\r |
5105 | {\r | |
5106 | printf ("%3d ", i);\r | |
5107 | value = (buf[i] * 60) / max_value;\r | |
5108 | \r | |
5109 | for (j = 0; j < value; j++)\r | |
5110 | {\r | |
5111 | putchar ('o');\r | |
5112 | }\r | |
5113 | printf (" %d\n", buf[i]);\r | |
5114 | \r | |
5115 | sum += i * buf[i];\r | |
5116 | counter += buf[i];\r | |
5117 | }\r | |
5118 | else\r | |
5119 | {\r | |
5120 | max = i - 1;\r | |
5121 | \r | |
5122 | if (counter > 0)\r | |
5123 | {\r | |
5124 | average = (float) sum / (float) counter;\r | |
5125 | \r | |
5126 | if (is_pulse)\r | |
5127 | {\r | |
5128 | printf ("pulse ");\r | |
5129 | }\r | |
5130 | else\r | |
5131 | {\r | |
5132 | printf ("pause ");\r | |
5133 | }\r | |
5134 | \r | |
5135 | printf ("avg: %4.1f=%6.1f us, ", average, (1000000. * average) / (float) F_INTERRUPTS);\r | |
5136 | printf ("min: %2d=%6.1f us, ", min, (1000000. * min) / (float) F_INTERRUPTS);\r | |
5137 | printf ("max: %2d=%6.1f us, ", max, (1000000. * max) / (float) F_INTERRUPTS);\r | |
5138 | \r | |
5139 | tolerance = (max - average);\r | |
5140 | \r | |
5141 | if (average - min > tolerance)\r | |
5142 | {\r | |
5143 | tolerance = average - min;\r | |
5144 | }\r | |
5145 | \r | |
5146 | tolerance = tolerance * 100 / average;\r | |
5147 | printf ("tol: %4.1f%%\n", tolerance);\r | |
5148 | }\r | |
5149 | \r | |
5150 | counter = 0;\r | |
5151 | sum = 0;\r | |
5152 | min = i + 1;\r | |
5153 | }\r | |
77f488bb | 5154 | }\r |
5155 | }\r | |
5156 | \r | |
d823e852 | 5157 | #define STATE_LEFT_SHIFT 0x01\r |
5158 | #define STATE_RIGHT_SHIFT 0x02\r | |
5159 | #define STATE_LEFT_CTRL 0x04\r | |
5160 | #define STATE_LEFT_ALT 0x08\r | |
5161 | #define STATE_RIGHT_ALT 0x10\r | |
5162 | \r | |
5163 | #define KEY_ESCAPE 0x1B // keycode = 0x006e\r | |
5164 | #define KEY_MENUE 0x80 // keycode = 0x0070\r | |
5165 | #define KEY_BACK 0x81 // keycode = 0x0071\r | |
5166 | #define KEY_FORWARD 0x82 // keycode = 0x0072\r | |
5167 | #define KEY_ADDRESS 0x83 // keycode = 0x0073\r | |
5168 | #define KEY_WINDOW 0x84 // keycode = 0x0074\r | |
5169 | #define KEY_1ST_PAGE 0x85 // keycode = 0x0075\r | |
5170 | #define KEY_STOP 0x86 // keycode = 0x0076\r | |
5171 | #define KEY_MAIL 0x87 // keycode = 0x0077\r | |
5172 | #define KEY_FAVORITES 0x88 // keycode = 0x0078\r | |
c6ade1d2 | 5173 | #define KEY_NEW_PAGE 0x89 // keycode = 0x0079\r |
5174 | #define KEY_SETUP 0x8A // keycode = 0x007a\r | |
5175 | #define KEY_FONT 0x8B // keycode = 0x007b\r | |
5176 | #define KEY_PRINT 0x8C // keycode = 0x007c\r | |
5177 | #define KEY_ON_OFF 0x8E // keycode = 0x007c\r | |
5178 | \r | |
5179 | #define KEY_INSERT 0x90 // keycode = 0x004b\r | |
5180 | #define KEY_DELETE 0x91 // keycode = 0x004c\r | |
5181 | #define KEY_LEFT 0x92 // keycode = 0x004f\r | |
5182 | #define KEY_HOME 0x93 // keycode = 0x0050\r | |
5183 | #define KEY_END 0x94 // keycode = 0x0051\r | |
5184 | #define KEY_UP 0x95 // keycode = 0x0053\r | |
5185 | #define KEY_DOWN 0x96 // keycode = 0x0054\r | |
5186 | #define KEY_PAGE_UP 0x97 // keycode = 0x0055\r | |
5187 | #define KEY_PAGE_DOWN 0x98 // keycode = 0x0056\r | |
5188 | #define KEY_RIGHT 0x99 // keycode = 0x0059\r | |
5189 | #define KEY_MOUSE_1 0x9E // keycode = 0x0400\r | |
5190 | #define KEY_MOUSE_2 0x9F // keycode = 0x0800\r | |
d823e852 | 5191 | \r |
0834784c | 5192 | static uint_fast8_t\r |
5193 | get_fdc_key (uint_fast16_t cmd)\r | |
d823e852 | 5194 | {\r |
5195 | static uint8_t key_table[128] =\r | |
5196 | {\r | |
7365350c | 5197 | // 0 1 2 3 4 5 6 7 8 9 A B C D E F\r |
5198 | Content-type: text/html ]>