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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols\r | |
3 | *\r | |
7365350c | 4 | * Copyright (c) 2009-2016 Frank Meyer - frank(at)fli4l.de\r |
4225a882 | 5 | *\r |
30d1689d | 6 | * $Id: irmp.c,v 1.192 2017/02/17 09:13:06 fm Exp $\r |
cb8474cc | 7 | *\r |
622f5f59 | 8 | * Supported AVR mikrocontrollers:\r |
7644ac04 | 9 | *\r |
21a4e0ee | 10 | * ATtiny87, ATtiny167\r |
476267f4 | 11 | * ATtiny45, ATtiny85\r |
2ac088b2 | 12 | * ATtiny44, ATtiny84\r |
7644ac04 | 13 | * ATmega8, ATmega16, ATmega32\r |
14 | * ATmega162\r | |
e664a9f3 | 15 | * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r |
7644ac04 | 16 | * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r |
17 | *\r | |
4225a882 | 18 | * This program is free software; you can redistribute it and/or modify\r |
19 | * it under the terms of the GNU General Public License as published by\r | |
20 | * the Free Software Foundation; either version 2 of the License, or\r | |
21 | * (at your option) any later version.\r | |
22 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
23 | */\r | |
24 | \r | |
f5ca0147 | 25 | #include "irmp.h"\r |
4225a882 | 26 | \r |
89e8cafb | 27 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
08f2dd9d | 28 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r |
d155e9ab | 29 | #else\r |
08f2dd9d | 30 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r |
d155e9ab | 31 | #endif\r |
32 | \r | |
12948cf3 | 33 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 || IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r |
08f2dd9d | 34 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r |
12948cf3 | 35 | #else\r |
08f2dd9d | 36 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r |
12948cf3 | 37 | #endif\r |
38 | \r | |
deba2a0a | 39 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || \\r |
c2b70f0b | 40 | IRMP_SUPPORT_S100_PROTOCOL == 1 || \\r |
deba2a0a | 41 | IRMP_SUPPORT_RC6_PROTOCOL == 1 || \\r |
42 | IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \\r | |
43 | IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \\r | |
2fb27bfe | 44 | IRMP_SUPPORT_IR60_PROTOCOL == 1 || \\r |
b85cb27d | 45 | IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1 || \\r |
0715cf5e | 46 | IRMP_SUPPORT_MERLIN_PROTOCOL == 1 || \\r |
b85cb27d | 47 | IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
08f2dd9d | 48 | # define IRMP_SUPPORT_MANCHESTER 1\r |
77f488bb | 49 | #else\r |
08f2dd9d | 50 | # define IRMP_SUPPORT_MANCHESTER 0\r |
77f488bb | 51 | #endif\r |
52 | \r | |
93570cd9 | 53 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
08f2dd9d | 54 | # define IRMP_SUPPORT_SERIAL 1\r |
deba2a0a | 55 | #else\r |
08f2dd9d | 56 | # define IRMP_SUPPORT_SERIAL 0\r |
deba2a0a | 57 | #endif\r |
58 | \r | |
0834784c | 59 | #define IRMP_KEY_REPETITION_LEN (uint_fast16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec\r |
4225a882 | 60 | \r |
fef942f6 | 61 | #define MIN_TOLERANCE_00 1.0 // -0%\r |
62 | #define MAX_TOLERANCE_00 1.0 // +0%\r | |
63 | \r | |
95b27043 | 64 | #define MIN_TOLERANCE_02 0.98 // -2%\r |
65 | #define MAX_TOLERANCE_02 1.02 // +2%\r | |
66 | \r | |
67 | #define MIN_TOLERANCE_03 0.97 // -3%\r | |
68 | #define MAX_TOLERANCE_03 1.03 // +3%\r | |
69 | \r | |
fef942f6 | 70 | #define MIN_TOLERANCE_05 0.95 // -5%\r |
71 | #define MAX_TOLERANCE_05 1.05 // +5%\r | |
72 | \r | |
4225a882 | 73 | #define MIN_TOLERANCE_10 0.9 // -10%\r |
74 | #define MAX_TOLERANCE_10 1.1 // +10%\r | |
75 | \r | |
fef942f6 | 76 | #define MIN_TOLERANCE_15 0.85 // -15%\r |
77 | #define MAX_TOLERANCE_15 1.15 // +15%\r | |
78 | \r | |
4225a882 | 79 | #define MIN_TOLERANCE_20 0.8 // -20%\r |
80 | #define MAX_TOLERANCE_20 1.2 // +20%\r | |
81 | \r | |
82 | #define MIN_TOLERANCE_30 0.7 // -30%\r | |
83 | #define MAX_TOLERANCE_30 1.3 // +30%\r | |
84 | \r | |
85 | #define MIN_TOLERANCE_40 0.6 // -40%\r | |
86 | #define MAX_TOLERANCE_40 1.4 // +40%\r | |
87 | \r | |
88 | #define MIN_TOLERANCE_50 0.5 // -50%\r | |
89 | #define MAX_TOLERANCE_50 1.5 // +50%\r | |
90 | \r | |
91 | #define MIN_TOLERANCE_60 0.4 // -60%\r | |
92 | #define MAX_TOLERANCE_60 1.6 // +60%\r | |
93 | \r | |
9405f84a | 94 | #define MIN_TOLERANCE_70 0.3 // -70%\r |
95 | #define MAX_TOLERANCE_70 1.7 // +70%\r | |
96 | \r | |
0834784c | 97 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
98 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
99 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
deba2a0a | 100 | #if IRMP_SUPPORT_NETBOX_PROTOCOL // only 5% to avoid conflict with NETBOX:\r |
0834784c | 101 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r |
deba2a0a | 102 | #else // only 5% + 1 to avoid conflict with RC6:\r |
0834784c | 103 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r |
deba2a0a | 104 | #endif\r |
0834784c | 105 | #define SIRCS_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
106 | #define SIRCS_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
107 | #define SIRCS_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
108 | #define SIRCS_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
109 | #define SIRCS_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
110 | #define SIRCS_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
111 | \r | |
112 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
113 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
114 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
115 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
116 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
117 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
118 | #define NEC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
119 | #define NEC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
120 | #define NEC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
121 | #define NEC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
122 | #define NEC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
123 | #define NEC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
6db2522c | 124 | // autodetect nec repetition frame within 50 msec:\r |
125 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms\r | |
126 | #if 0\r | |
0834784c | 127 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
6db2522c | 128 | #else\r |
0834784c | 129 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r |
6db2522c | 130 | #endif\r |
fef942f6 | 131 | \r |
0834784c | 132 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
133 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
134 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
135 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
136 | #define SAMSUNG_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
137 | #define SAMSUNG_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
138 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
139 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
140 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
141 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
142 | \r | |
30d1689d | 143 | #define SAMSUNGAH_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
144 | #define SAMSUNGAH_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
145 | #define SAMSUNGAH_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
146 | #define SAMSUNGAH_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
147 | #define SAMSUNGAH_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
148 | #define SAMSUNGAH_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
149 | #define SAMSUNGAH_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
150 | #define SAMSUNGAH_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
151 | #define SAMSUNGAH_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
152 | #define SAMSUNGAH_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNGAH_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
153 | \r | |
0834784c | 154 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
155 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
156 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
157 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
158 | #define MATSUSHITA_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
159 | #define MATSUSHITA_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
160 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
161 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
162 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
163 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
164 | \r | |
165 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
166 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
167 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
168 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
95b27043 | 169 | #define KASEIKYO_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
170 | #define KASEIKYO_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
171 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
172 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
173 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
174 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
175 | \r | |
7365350c | 176 | #define MITSU_HEAVY_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
177 | #define MITSU_HEAVY_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
178 | #define MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
179 | #define MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
180 | #define MITSU_HEAVY_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
181 | #define MITSU_HEAVY_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
182 | #define MITSU_HEAVY_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
183 | #define MITSU_HEAVY_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
184 | #define MITSU_HEAVY_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
185 | #define MITSU_HEAVY_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
186 | \r | |
4bcf310e | 187 | #define VINCENT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
188 | #define VINCENT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
189 | #define VINCENT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
190 | #define VINCENT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
191 | #define VINCENT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
192 | #define VINCENT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
193 | #define VINCENT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
194 | #define VINCENT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
195 | #define VINCENT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * VINCENT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
196 | #define VINCENT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * VINCENT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
197 | \r | |
95b27043 | 198 | #define PANASONIC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
199 | #define PANASONIC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
200 | #define PANASONIC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
201 | #define PANASONIC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
202 | #define PANASONIC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
203 | #define PANASONIC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
204 | #define PANASONIC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
205 | #define PANASONIC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
206 | #define PANASONIC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
207 | #define PANASONIC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
0834784c | 208 | \r |
209 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
210 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
211 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
212 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
213 | #define RECS80_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
214 | #define RECS80_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
215 | #define RECS80_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
216 | #define RECS80_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
217 | #define RECS80_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
218 | #define RECS80_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 219 | \r |
3a7e26e1 | 220 | \r |
221 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with RC5, so keep tolerance for RC5 minimal here:\r | |
0834784c | 222 | #define RC5_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r |
223 | #define RC5_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
3a7e26e1 | 224 | #else\r |
0834784c | 225 | #define RC5_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
226 | #define RC5_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
3a7e26e1 | 227 | #endif\r |
31c1f035 | 228 | \r |
0834784c | 229 | #define RC5_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
230 | #define RC5_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 231 | \r |
c2b70f0b | 232 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with S100, so keep tolerance for S100 minimal here:\r |
233 | #define S100_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
234 | #define S100_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
235 | #else\r | |
236 | #define S100_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
237 | #define S100_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
238 | #endif\r | |
239 | \r | |
240 | #define S100_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
241 | #define S100_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
242 | \r | |
0834784c | 243 | #define DENON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
244 | #define DENON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
245 | #define DENON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
246 | #define DENON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
08f2dd9d | 247 | // RUWIDO (see t-home-mediareceiver-15kHz.txt) conflicts here with DENON\r |
0834784c | 248 | #define DENON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
249 | #define DENON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
250 | #define DENON_AUTO_REPETITION_PAUSE_LEN ((uint_fast16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
251 | \r | |
252 | #define THOMSON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
253 | #define THOMSON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
254 | #define THOMSON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
255 | #define THOMSON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
256 | #define THOMSON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
257 | #define THOMSON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
258 | \r | |
259 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
260 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
261 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
262 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
263 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
264 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
265 | #define RC6_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
266 | #define RC6_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_60 + 0.5) + 1) // pulses: 300 - 800\r | |
267 | #define RC6_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
268 | #define RC6_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1) // pauses: 300 - 600\r | |
269 | \r | |
270 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
271 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
272 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
273 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
274 | #define RECS80EXT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
275 | #define RECS80EXT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
276 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
277 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
278 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
279 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
280 | \r | |
281 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
282 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
283 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
284 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
285 | #define NUBERT_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
286 | #define NUBERT_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
287 | #define NUBERT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
288 | #define NUBERT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
289 | #define NUBERT_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
290 | #define NUBERT_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
291 | #define NUBERT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
292 | #define NUBERT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
293 | \r | |
0715cf5e | 294 | #define FAN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
295 | #define FAN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
296 | #define FAN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
297 | #define FAN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
298 | #define FAN_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
299 | #define FAN_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
300 | #define FAN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
301 | #define FAN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
302 | #define FAN_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
303 | #define FAN_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
304 | #define FAN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
305 | #define FAN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
306 | \r | |
0834784c | 307 | #define SPEAKER_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
308 | #define SPEAKER_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
309 | #define SPEAKER_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
310 | #define SPEAKER_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
311 | #define SPEAKER_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
312 | #define SPEAKER_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
313 | #define SPEAKER_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
314 | #define SPEAKER_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
315 | #define SPEAKER_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
316 | #define SPEAKER_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
317 | #define SPEAKER_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
318 | #define SPEAKER_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
319 | \r | |
320 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
321 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
322 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
323 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
324 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
325 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
326 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
327 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
328 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
329 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
330 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
2eab5ec9 | 331 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT\r |
0834784c | 332 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
333 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
334 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
335 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
336 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
337 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
338 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
339 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
340 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
341 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
342 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
343 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
344 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
345 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
346 | \r | |
347 | #define IR60_TIMEOUT_LEN ((uint_fast8_t)(F_INTERRUPTS * IR60_TIMEOUT_TIME * 0.5))\r | |
348 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
349 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
350 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
351 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
352 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)\r | |
353 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
354 | \r | |
355 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
356 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
357 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
358 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
359 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
360 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
361 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
362 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
363 | \r | |
364 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) // 5%: avoid conflict with NETBOX\r | |
365 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
366 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
367 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
368 | #define FDC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
369 | #define FDC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
370 | #define FDC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
371 | #define FDC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
6f750020 | 372 | #if 0\r |
0834784c | 373 | #define FDC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255\r |
6f750020 | 374 | #else\r |
375 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1\r | |
376 | #endif\r | |
0834784c | 377 | #define FDC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r |
378 | \r | |
379 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
380 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
381 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
382 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
383 | #define RCCAR_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
384 | #define RCCAR_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
385 | #define RCCAR_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
386 | #define RCCAR_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
387 | #define RCCAR_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
388 | #define RCCAR_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
389 | \r | |
390 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
391 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
392 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!\r | |
393 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!\r | |
394 | #define JVC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
395 | #define JVC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
396 | #define JVC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
397 | #define JVC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
398 | #define JVC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
399 | #define JVC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
770a1a9d | 400 | // autodetect JVC repetition frame within 50 msec:\r |
0834784c | 401 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
402 | \r | |
403 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
404 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
405 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint_fast16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
406 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint_fast16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
407 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
408 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
409 | #define NIKON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
410 | #define NIKON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
411 | #define NIKON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
412 | #define NIKON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
413 | #define NIKON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
414 | #define NIKON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
415 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
416 | \r | |
417 | #define KATHREIN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
418 | #define KATHREIN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
419 | #define KATHREIN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
420 | #define KATHREIN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
421 | #define KATHREIN_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
422 | #define KATHREIN_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
423 | #define KATHREIN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
424 | #define KATHREIN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
425 | #define KATHREIN_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
426 | #define KATHREIN_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
427 | #define KATHREIN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
428 | #define KATHREIN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
429 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
430 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
431 | \r | |
432 | #define NETBOX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
433 | #define NETBOX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
434 | #define NETBOX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
435 | #define NETBOX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
436 | #define NETBOX_PULSE_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME))\r | |
437 | #define NETBOX_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME))\r | |
438 | #define NETBOX_PULSE_REST_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME / 4))\r | |
439 | #define NETBOX_PAUSE_REST_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME / 4))\r | |
440 | \r | |
441 | #define LEGO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
442 | #define LEGO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
443 | #define LEGO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
444 | #define LEGO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
445 | #define LEGO_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
446 | #define LEGO_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
447 | #define LEGO_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
448 | #define LEGO_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
449 | #define LEGO_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
450 | #define LEGO_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
451 | \r | |
452 | #define BOSE_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
453 | #define BOSE_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
454 | #define BOSE_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
455 | #define BOSE_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
456 | #define BOSE_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
457 | #define BOSE_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
458 | #define BOSE_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
459 | #define BOSE_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
460 | #define BOSE_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
461 | #define BOSE_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
462 | #define BOSE_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
463 | \r | |
464 | #define A1TVBOX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
465 | #define A1TVBOX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
466 | #define A1TVBOX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
467 | #define A1TVBOX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
468 | #define A1TVBOX_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
469 | #define A1TVBOX_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
470 | #define A1TVBOX_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
471 | #define A1TVBOX_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
472 | \r | |
0715cf5e | 473 | #define MERLIN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
474 | #define MERLIN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
475 | #define MERLIN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
476 | #define MERLIN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
477 | #define MERLIN_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
478 | #define MERLIN_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
479 | #define MERLIN_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
480 | #define MERLIN_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
481 | \r | |
0834784c | 482 | #define ORTEK_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
483 | #define ORTEK_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
484 | #define ORTEK_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
485 | #define ORTEK_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
486 | #define ORTEK_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
487 | #define ORTEK_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
488 | #define ORTEK_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
489 | #define ORTEK_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
490 | \r | |
491 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
492 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
493 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
494 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MAX_TOLERANCE_10 + 0.5) - 1)\r | |
495 | #define TELEFUNKEN_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
496 | #define TELEFUNKEN_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
497 | #define TELEFUNKEN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
498 | #define TELEFUNKEN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
499 | #define TELEFUNKEN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
500 | #define TELEFUNKEN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
b85cb27d | 501 | // autodetect TELEFUNKEN repetition frame within 50 msec:\r |
0834784c | 502 | // #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
503 | \r | |
504 | #define ROOMBA_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
505 | #define ROOMBA_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
506 | #define ROOMBA_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
507 | #define ROOMBA_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
508 | #define ROOMBA_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5))\r | |
509 | #define ROOMBA_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
510 | #define ROOMBA_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
511 | #define ROOMBA_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
512 | #define ROOMBA_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
513 | #define ROOMBA_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME))\r | |
514 | #define ROOMBA_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
515 | #define ROOMBA_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
516 | #define ROOMBA_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
517 | #define ROOMBA_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
518 | \r | |
519 | #define RCMM32_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
520 | #define RCMM32_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
521 | #define RCMM32_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
522 | #define RCMM32_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
523 | #define RCMM32_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
524 | #define RCMM32_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
525 | #define RCMM32_BIT_00_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
526 | #define RCMM32_BIT_00_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
527 | #define RCMM32_BIT_01_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
528 | #define RCMM32_BIT_01_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
529 | #define RCMM32_BIT_10_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
530 | #define RCMM32_BIT_10_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
531 | #define RCMM32_BIT_11_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
532 | #define RCMM32_BIT_11_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
533 | \r | |
003c1008 | 534 | #define PENTAX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
535 | #define PENTAX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
536 | #define PENTAX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
537 | #define PENTAX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
538 | #define PENTAX_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5))\r | |
539 | #define PENTAX_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
540 | #define PENTAX_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
541 | #define PENTAX_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
542 | #define PENTAX_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
543 | #define PENTAX_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME))\r | |
544 | #define PENTAX_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
545 | #define PENTAX_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
546 | #define PENTAX_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
547 | #define PENTAX_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
548 | \r | |
43c535be | 549 | #define ACP24_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r |
550 | #define ACP24_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
551 | #define ACP24_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
552 | #define ACP24_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
553 | #define ACP24_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_PULSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
554 | #define ACP24_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_PULSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
555 | #define ACP24_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
556 | #define ACP24_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
557 | #define ACP24_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
558 | #define ACP24_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
559 | \r | |
0834784c | 560 | #define RADIO1_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
561 | #define RADIO1_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
562 | #define RADIO1_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
563 | #define RADIO1_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
564 | #define RADIO1_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME + 0.5))\r | |
565 | #define RADIO1_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
566 | #define RADIO1_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
567 | #define RADIO1_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
568 | #define RADIO1_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
569 | #define RADIO1_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME))\r | |
570 | #define RADIO1_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
571 | #define RADIO1_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
572 | #define RADIO1_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
573 | #define RADIO1_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
574 | \r | |
575 | #define AUTO_FRAME_REPETITION_LEN (uint_fast16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint_fast16_t!\r | |
4225a882 | 576 | \r |
48664931 | 577 | #ifdef ANALYZE\r |
08f2dd9d | 578 | # define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r |
579 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r | |
580 | # define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r | |
775fabfa | 581 | # define ANALYZE_ONLY_NORMAL_PRINTF(...) { if (! silent && !verbose) { printf (__VA_ARGS__); } }\r |
08f2dd9d | 582 | # define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r |
7644ac04 | 583 | static int silent;\r |
584 | static int time_counter;\r | |
585 | static int verbose;\r | |
645fbc69 | 586 | \r |
587 | /******************************* not every PIC compiler knows variadic macros :-(\r | |
4225a882 | 588 | #else\r |
08f2dd9d | 589 | # define ANALYZE_PUTCHAR(a)\r |
590 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r | |
4b9953bf | 591 | # define ANALYZE_PRINTF(...)\r |
592 | # define ANALYZE_ONLY_NORMAL_PRINTF(...)\r | |
4a7dc859 | 593 | # endif\r |
08f2dd9d | 594 | # define ANALYZE_NEWLINE()\r |
645fbc69 | 595 | *********************************/\r |
4225a882 | 596 | #endif\r |
597 | \r | |
7644ac04 | 598 | #if IRMP_USE_CALLBACK == 1\r |
0834784c | 599 | static void (*irmp_callback_ptr) (uint_fast8_t);\r |
7644ac04 | 600 | #endif // IRMP_USE_CALLBACK == 1\r |
601 | \r | |
40ca4604 | 602 | #define PARITY_CHECK_OK 1\r |
603 | #define PARITY_CHECK_FAILED 0\r | |
604 | \r | |
1f54e86c | 605 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
606 | * Protocol names\r | |
607 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
608 | */\r | |
775fabfa | 609 | #if defined(UNIX_OR_WINDOWS) || IRMP_PROTOCOL_NAMES == 1\r |
622f5f59 | 610 | static const char proto_unknown[] PROGMEM = "UNKNOWN";\r |
611 | static const char proto_sircs[] PROGMEM = "SIRCS";\r | |
612 | static const char proto_nec[] PROGMEM = "NEC";\r | |
613 | static const char proto_samsung[] PROGMEM = "SAMSUNG";\r | |
614 | static const char proto_matsushita[] PROGMEM = "MATSUSH";\r | |
615 | static const char proto_kaseikyo[] PROGMEM = "KASEIKYO";\r | |
616 | static const char proto_recs80[] PROGMEM = "RECS80";\r | |
617 | static const char proto_rc5[] PROGMEM = "RC5";\r | |
618 | static const char proto_denon[] PROGMEM = "DENON";\r | |
619 | static const char proto_rc6[] PROGMEM = "RC6";\r | |
620 | static const char proto_samsung32[] PROGMEM = "SAMSG32";\r | |
621 | static const char proto_apple[] PROGMEM = "APPLE";\r | |
622 | static const char proto_recs80ext[] PROGMEM = "RECS80EX";\r | |
623 | static const char proto_nubert[] PROGMEM = "NUBERT";\r | |
624 | static const char proto_bang_olufsen[] PROGMEM = "BANG OLU";\r | |
625 | static const char proto_grundig[] PROGMEM = "GRUNDIG";\r | |
626 | static const char proto_nokia[] PROGMEM = "NOKIA";\r | |
627 | static const char proto_siemens[] PROGMEM = "SIEMENS";\r | |
628 | static const char proto_fdc[] PROGMEM = "FDC";\r | |
629 | static const char proto_rccar[] PROGMEM = "RCCAR";\r | |
630 | static const char proto_jvc[] PROGMEM = "JVC";\r | |
631 | static const char proto_rc6a[] PROGMEM = "RC6A";\r | |
632 | static const char proto_nikon[] PROGMEM = "NIKON";\r | |
633 | static const char proto_ruwido[] PROGMEM = "RUWIDO";\r | |
634 | static const char proto_ir60[] PROGMEM = "IR60";\r | |
635 | static const char proto_kathrein[] PROGMEM = "KATHREIN";\r | |
636 | static const char proto_netbox[] PROGMEM = "NETBOX";\r | |
637 | static const char proto_nec16[] PROGMEM = "NEC16";\r | |
638 | static const char proto_nec42[] PROGMEM = "NEC42";\r | |
639 | static const char proto_lego[] PROGMEM = "LEGO";\r | |
640 | static const char proto_thomson[] PROGMEM = "THOMSON";\r | |
641 | static const char proto_bose[] PROGMEM = "BOSE";\r | |
642 | static const char proto_a1tvbox[] PROGMEM = "A1TVBOX";\r | |
643 | static const char proto_ortek[] PROGMEM = "ORTEK";\r | |
644 | static const char proto_telefunken[] PROGMEM = "TELEFUNKEN";\r | |
645 | static const char proto_roomba[] PROGMEM = "ROOMBA";\r | |
646 | static const char proto_rcmm32[] PROGMEM = "RCMM32";\r | |
647 | static const char proto_rcmm24[] PROGMEM = "RCMM24";\r | |
648 | static const char proto_rcmm12[] PROGMEM = "RCMM12";\r | |
649 | static const char proto_speaker[] PROGMEM = "SPEAKER";\r | |
650 | static const char proto_lgair[] PROGMEM = "LGAIR";\r | |
651 | static const char proto_samsung48[] PROGMEM = "SAMSG48";\r | |
003c1008 | 652 | static const char proto_merlin[] PROGMEM = "MERLIN";\r |
653 | static const char proto_pentax[] PROGMEM = "PENTAX";\r | |
0715cf5e | 654 | static const char proto_fan[] PROGMEM = "FAN";\r |
c2b70f0b | 655 | static const char proto_s100[] PROGMEM = "S100";\r |
43c535be | 656 | static const char proto_acp24[] PROGMEM = "ACP24";\r |
3d2da98a | 657 | static const char proto_technics[] PROGMEM = "TECHNICS";\r |
95b27043 | 658 | static const char proto_panasonic[] PROGMEM = "PANASONIC";\r |
7365350c | 659 | static const char proto_mitsu_heavy[] PROGMEM = "MITSU_HEAVY";\r |
4bcf310e | 660 | static const char proto_vincent[] PROGMEM = "VINCENT";\r |
30d1689d | 661 | static const char proto_samsungah[] PROGMEM = "SAMSUNGAH";\r |
8aaafe9d | 662 | \r |
622f5f59 | 663 | static const char proto_radio1[] PROGMEM = "RADIO1";\r |
664 | \r | |
665 | const char * const\r | |
666 | irmp_protocol_names[IRMP_N_PROTOCOLS + 1] PROGMEM =\r | |
1f54e86c | 667 | {\r |
622f5f59 | 668 | proto_unknown,\r |
669 | proto_sircs,\r | |
670 | proto_nec,\r | |
671 | proto_samsung,\r | |
672 | proto_matsushita,\r | |
673 | proto_kaseikyo,\r | |
674 | proto_recs80,\r | |
675 | proto_rc5,\r | |
676 | proto_denon,\r | |
677 | proto_rc6,\r | |
678 | proto_samsung32,\r | |
679 | proto_apple,\r | |
680 | proto_recs80ext,\r | |
681 | proto_nubert,\r | |
682 | proto_bang_olufsen,\r | |
683 | proto_grundig,\r | |
684 | proto_nokia,\r | |
685 | proto_siemens,\r | |
686 | proto_fdc,\r | |
687 | proto_rccar,\r | |
688 | proto_jvc,\r | |
689 | proto_rc6a,\r | |
690 | proto_nikon,\r | |
691 | proto_ruwido,\r | |
692 | proto_ir60,\r | |
693 | proto_kathrein,\r | |
694 | proto_netbox,\r | |
695 | proto_nec16,\r | |
696 | proto_nec42,\r | |
697 | proto_lego,\r | |
698 | proto_thomson,\r | |
699 | proto_bose,\r | |
700 | proto_a1tvbox,\r | |
701 | proto_ortek,\r | |
702 | proto_telefunken,\r | |
703 | proto_roomba,\r | |
704 | proto_rcmm32,\r | |
705 | proto_rcmm24,\r | |
706 | proto_rcmm12,\r | |
707 | proto_speaker,\r | |
708 | proto_lgair,\r | |
709 | proto_samsung48,\r | |
003c1008 | 710 | proto_merlin,\r |
711 | proto_pentax,\r | |
0715cf5e | 712 | proto_fan,\r |
c2b70f0b | 713 | proto_s100,\r |
43c535be | 714 | proto_acp24,\r |
3d2da98a | 715 | proto_technics,\r |
95b27043 | 716 | proto_panasonic,\r |
7365350c | 717 | proto_mitsu_heavy,\r |
4bcf310e | 718 | proto_vincent,\r |
30d1689d | 719 | proto_samsungah,\r |
622f5f59 | 720 | proto_radio1\r |
1f54e86c | 721 | };\r |
40ca4604 | 722 | \r |
1f54e86c | 723 | #endif\r |
724 | \r | |
725 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
726 | * Logging\r | |
727 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
728 | */\r | |
9045767c | 729 | #if IRMP_LOGGING == 1 // logging via UART\r |
6c3c57e6 | 730 | \r |
6f153888 | 731 | #if defined(ARM_STM32F4XX)\r |
9045767c | 732 | # define STM32_GPIO_CLOCK RCC_AHB1Periph_GPIOA // UART2 on PA2\r |
6f153888 | 733 | # define STM32_UART_CLOCK RCC_APB1Periph_USART2\r |
734 | # define STM32_GPIO_PORT GPIOA\r | |
735 | # define STM32_GPIO_PIN GPIO_Pin_2\r | |
736 | # define STM32_GPIO_SOURCE GPIO_PinSource2\r | |
737 | # define STM32_UART_AF GPIO_AF_USART2\r | |
738 | # define STM32_UART_COM USART2\r | |
9045767c | 739 | # define STM32_UART_BAUD 115200 // 115200 Baud\r |
6f153888 | 740 | # include "stm32f4xx_usart.h"\r |
9045767c | 741 | #elif defined(ARM_STM32F10X)\r |
742 | # define STM32_UART_COM USART3 // UART3 on PB10\r | |
df24bb50 | 743 | #elif defined(ARDUINO) // Arduino Serial implementation\r |
95b27043 | 744 | # if defined(USB_SERIAL)\r |
745 | # include "usb_serial.h"\r | |
746 | # else\r | |
747 | # error USB_SERIAL not defined in ARDUINO Environment\r | |
748 | # endif\r | |
6f153888 | 749 | #else\r |
9045767c | 750 | # if IRMP_EXT_LOGGING == 1 // use external logging\r |
6f153888 | 751 | # include "irmpextlog.h"\r |
9045767c | 752 | # else // normal UART log (IRMP_EXT_LOGGING == 0)\r |
6f153888 | 753 | # define BAUD 9600L\r |
754 | # ifndef UNIX_OR_WINDOWS\r | |
755 | # include <util/setbaud.h>\r | |
756 | # endif\r | |
879b06c2 | 757 | \r |
758 | #ifdef UBRR0H\r | |
759 | \r | |
760 | #define UART0_UBRRH UBRR0H\r | |
761 | #define UART0_UBRRL UBRR0L\r | |
762 | #define UART0_UCSRA UCSR0A\r | |
763 | #define UART0_UCSRB UCSR0B\r | |
764 | #define UART0_UCSRC UCSR0C\r | |
765 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r | |
766 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r | |
767 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r | |
768 | #ifdef URSEL0\r | |
769 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r | |
770 | #else\r | |
771 | #define UART0_URSEL_BIT_VALUE (0)\r | |
772 | #endif\r | |
773 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r | |
e92413eb | 774 | #define UART0_UDR UDR0\r |
c7a47e89 | 775 | #define UART0_U2X U2X0\r |
0834784c | 776 | \r |
879b06c2 | 777 | #else\r |
4225a882 | 778 | \r |
879b06c2 | 779 | #define UART0_UBRRH UBRRH\r |
780 | #define UART0_UBRRL UBRRL\r | |
781 | #define UART0_UCSRA UCSRA\r | |
782 | #define UART0_UCSRB UCSRB\r | |
783 | #define UART0_UCSRC UCSRC\r | |
784 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)\r | |
785 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r | |
786 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r | |
787 | #ifdef URSEL\r | |
788 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)\r | |
789 | #else\r | |
790 | #define UART0_URSEL_BIT_VALUE (0)\r | |
791 | #endif\r | |
792 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)\r | |
e92413eb | 793 | #define UART0_UDR UDR\r |
c7a47e89 | 794 | #define UART0_U2X U2X\r |
4225a882 | 795 | \r |
6c3c57e6 | 796 | #endif //UBRR0H\r |
797 | #endif //IRMP_EXT_LOGGING\r | |
6f153888 | 798 | #endif //ARM_STM32F4XX\r |
4225a882 | 799 | \r |
4225a882 | 800 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
801 | * Initialize UART\r | |
802 | * @details Initializes UART\r | |
803 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
804 | */\r | |
805 | void\r | |
806 | irmp_uart_init (void)\r | |
807 | {\r | |
775fabfa | 808 | #ifndef UNIX_OR_WINDOWS\r |
6f153888 | 809 | #if defined(ARM_STM32F4XX)\r |
810 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
811 | USART_InitTypeDef USART_InitStructure;\r | |
812 | \r | |
813 | // Clock enable vom TX Pin\r | |
814 | RCC_AHB1PeriphClockCmd(STM32_GPIO_CLOCK, ENABLE);\r | |
815 | \r | |
816 | // Clock enable der UART\r | |
817 | RCC_APB1PeriphClockCmd(STM32_UART_CLOCK, ENABLE);\r | |
818 | \r | |
819 | // UART Alternative-Funktion mit dem IO-Pin verbinden\r | |
820 | GPIO_PinAFConfig(STM32_GPIO_PORT,STM32_GPIO_SOURCE,STM32_UART_AF);\r | |
821 | \r | |
822 | // UART als Alternative-Funktion mit PushPull\r | |
823 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r | |
824 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;\r | |
825 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
826 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;\r | |
827 | \r | |
828 | // TX-Pin\r | |
829 | GPIO_InitStructure.GPIO_Pin = STM32_GPIO_PIN;\r | |
830 | GPIO_Init(STM32_GPIO_PORT, &GPIO_InitStructure);\r | |
831 | \r | |
832 | // Oversampling\r | |
833 | USART_OverSampling8Cmd(STM32_UART_COM, ENABLE);\r | |
834 | \r | |
ea29682a | 835 | // init baud rate, 8 data bits, 1 stop bit, no parity, no RTS+CTS\r |
6f153888 | 836 | USART_InitStructure.USART_BaudRate = STM32_UART_BAUD;\r |
837 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r | |
838 | USART_InitStructure.USART_StopBits = USART_StopBits_1;\r | |
839 | USART_InitStructure.USART_Parity = USART_Parity_No;\r | |
840 | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r | |
841 | USART_InitStructure.USART_Mode = USART_Mode_Tx;\r | |
842 | USART_Init(STM32_UART_COM, &USART_InitStructure);\r | |
843 | \r | |
844 | // UART enable\r | |
845 | USART_Cmd(STM32_UART_COM, ENABLE);\r | |
846 | \r | |
9045767c | 847 | #elif defined(ARM_STM32F10X)\r |
848 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
849 | USART_InitTypeDef USART_InitStructure;\r | |
850 | \r | |
851 | // Clock enable vom TX Pin\r | |
852 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); // UART3 an PB10\r | |
853 | \r | |
854 | // Clock enable der UART\r | |
855 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);\r | |
856 | \r | |
857 | // UART als Alternative-Funktion mit PushPull\r | |
858 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r | |
859 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r | |
860 | \r | |
861 | // TX-Pin\r | |
862 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;\r | |
863 | GPIO_Init(GPIOB, &GPIO_InitStructure);\r | |
864 | \r | |
865 | // Oversampling\r | |
866 | USART_OverSampling8Cmd(STM32_UART_COM, ENABLE);\r | |
867 | \r | |
ea29682a | 868 | // init baud rate, 8 data bits, 1 stop bit, no parity, no RTS+CTS\r |
9045767c | 869 | USART_InitStructure.USART_BaudRate = 115200;\r |
870 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r | |
871 | USART_InitStructure.USART_StopBits = USART_StopBits_1;\r | |
872 | USART_InitStructure.USART_Parity = USART_Parity_No;\r | |
873 | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r | |
874 | USART_InitStructure.USART_Mode = USART_Mode_Tx;\r | |
875 | USART_Init(STM32_UART_COM, &USART_InitStructure);\r | |
876 | \r | |
877 | // UART enable\r | |
327b855b | 878 | USART_Cmd(STM32_UART_COM, ENABLE);\r |
30d1689d | 879 | \r |
95b27043 | 880 | #elif defined(ARDUINO)\r |
881 | // we use the Arduino Serial Imlementation\r | |
882 | // you have to call Serial.begin(SER_BAUD); in Arduino setup() function\r | |
883 | \r | |
458a6d64 | 884 | #elif defined (__AVR_XMEGA__)\r |
885 | \r | |
95b27043 | 886 | PMIC.CTRL |= PMIC_HILVLEN_bm;\r |
887 | \r | |
888 | USARTC1.BAUDCTRLB = 0;\r | |
889 | USARTC1.BAUDCTRLA = F_CPU / 153600 - 1;\r | |
ea29682a | 890 | USARTC1.CTRLA = USART_RXCINTLVL_HI_gc; // high INT level (receive)\r |
891 | USARTC1.CTRLB = USART_TXEN_bm | USART_RXEN_bm; // activated RX and TX\r | |
892 | USARTC1.CTRLC = USART_CHSIZE_8BIT_gc; // 8 Bit\r | |
893 | PORTC.DIR |= (1<<7); // TXD is output\r | |
95b27043 | 894 | PORTC.DIR &= ~(1<<6);\r |
458a6d64 | 895 | \r |
327b855b | 896 | #else\r |
9045767c | 897 | \r |
6c3c57e6 | 898 | #if (IRMP_EXT_LOGGING == 0) // use UART\r |
879b06c2 | 899 | UART0_UBRRH = UBRRH_VALUE; // set baud rate\r |
900 | UART0_UBRRL = UBRRL_VALUE;\r | |
901 | \r | |
902 | #if USE_2X\r | |
c7a47e89 | 903 | UART0_UCSRA |= (1<<UART0_U2X);\r |
879b06c2 | 904 | #else\r |
c7a47e89 | 905 | UART0_UCSRA &= ~(1<<UART0_U2X);\r |
879b06c2 | 906 | #endif\r |
907 | \r | |
908 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r | |
909 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r | |
6c3c57e6 | 910 | #else // other log method\r |
0834784c | 911 | initextlog();\r |
6c3c57e6 | 912 | #endif //IRMP_EXT_LOGGING\r |
6f153888 | 913 | #endif //ARM_STM32F4XX\r |
775fabfa | 914 | #endif // UNIX_OR_WINDOWS\r |
4225a882 | 915 | }\r |
916 | \r | |
917 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
918 | * Send character\r | |
919 | * @details Sends character\r | |
920 | * @param ch character to be transmitted\r | |
921 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
922 | */\r | |
923 | void\r | |
924 | irmp_uart_putc (unsigned char ch)\r | |
925 | {\r | |
775fabfa | 926 | #ifndef UNIX_OR_WINDOWS\r |
9045767c | 927 | #if defined(ARM_STM32F4XX) || defined(ARM_STM32F10X)\r |
6f153888 | 928 | // warten bis altes Byte gesendet wurde\r |
929 | while (USART_GetFlagStatus(STM32_UART_COM, USART_FLAG_TXE) == RESET)\r | |
930 | {\r | |
df24bb50 | 931 | ;\r |
6f153888 | 932 | }\r |
933 | \r | |
934 | USART_SendData(STM32_UART_COM, ch);\r | |
935 | \r | |
936 | if (ch == '\n')\r | |
937 | {\r | |
df24bb50 | 938 | while (USART_GetFlagStatus(STM32_UART_COM, USART_FLAG_TXE) == RESET);\r |
939 | USART_SendData(STM32_UART_COM, '\r');\r | |
6f153888 | 940 | }\r |
941 | \r | |
95b27043 | 942 | #elif defined(ARDUINO)\r |
943 | // we use the Arduino Serial Imlementation\r | |
944 | usb_serial_putchar(ch);\r | |
945 | \r | |
6f153888 | 946 | #else\r |
6c3c57e6 | 947 | #if (IRMP_EXT_LOGGING == 0)\r |
30d1689d | 948 | \r |
949 | # if defined (__AVR_XMEGA__)\r | |
950 | while (!(USARTC1.STATUS & USART_DREIF_bm))\r | |
951 | {\r | |
952 | ;\r | |
953 | }\r | |
954 | \r | |
955 | USARTC1.DATA = ch;\r | |
956 | \r | |
957 | # else // AVR_MEGA\r | |
879b06c2 | 958 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r |
4225a882 | 959 | {\r |
df24bb50 | 960 | ;\r |
4225a882 | 961 | }\r |
962 | \r | |
879b06c2 | 963 | UART0_UDR = ch;\r |
30d1689d | 964 | \r |
965 | # endif // __AVR_XMEGA__\r | |
966 | \r | |
6c3c57e6 | 967 | #else\r |
6f153888 | 968 | \r |
969 | sendextlog(ch); // use external log\r | |
970 | \r | |
30d1689d | 971 | #endif // IRMP_EXT_LOGGING\r |
972 | #endif // ARM_STM32F4XX\r | |
775fabfa | 973 | #else\r |
974 | fputc (ch, stderr);\r | |
975 | #endif // UNIX_OR_WINDOWS\r | |
4225a882 | 976 | }\r |
977 | \r | |
978 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
979 | * Log IR signal\r | |
980 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
981 | */\r | |
d155e9ab | 982 | \r |
983 | #define STARTCYCLES 2 // min count of zeros before start of logging\r | |
984 | #define ENDBITS 1000 // number of sequenced highbits to detect end\r | |
985 | #define DATALEN 700 // log buffer size\r | |
4225a882 | 986 | \r |
775fabfa | 987 | static void\r |
0834784c | 988 | irmp_log (uint_fast8_t val)\r |
775fabfa | 989 | {\r |
0834784c | 990 | static uint8_t buf[DATALEN]; // logging buffer\r |
991 | static uint_fast16_t buf_idx; // index\r | |
992 | static uint_fast8_t startcycles; // current number of start-zeros\r | |
993 | static uint_fast16_t cnt; // counts sequenced highbits - to detect end\r | |
994 | static uint_fast8_t last_val = 1;\r | |
775fabfa | 995 | \r |
996 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r | |
997 | {\r | |
df24bb50 | 998 | startcycles++;\r |
775fabfa | 999 | }\r |
1000 | else\r | |
1001 | {\r | |
df24bb50 | 1002 | startcycles = 0;\r |
1003 | \r | |
1004 | if (! val || buf_idx != 0) // start or continue logging on "0", "1" cannot init logging\r | |
1005 | {\r | |
1006 | if (last_val == val)\r | |
1007 | {\r | |
1008 | cnt++;\r | |
1009 | \r | |
1010 | if (val && cnt > ENDBITS) // if high received then look at log-stop condition\r | |
1011 | { // if stop condition is true, output on uart\r | |
1012 | uint_fast8_t i8;\r | |
1013 | uint_fast16_t i;\r | |
1014 | uint_fast16_t j;\r | |
1015 | uint_fast8_t v = '1';\r | |
1016 | uint_fast16_t d;\r | |
1017 | \r | |
1018 | for (i8 = 0; i8 < STARTCYCLES; i8++)\r | |
1019 | {\r | |
1020 | irmp_uart_putc ('0'); // the ignored starting zeros\r | |
1021 | }\r | |
1022 | \r | |
1023 | for (i = 0; i < buf_idx; i++)\r | |
1024 | {\r | |
1025 | d = buf[i];\r | |
1026 | \r | |
1027 | if (d == 0xff)\r | |
1028 | {\r | |
1029 | i++;\r | |
1030 | d = buf[i];\r | |
1031 | i++;\r | |
1032 | d |= ((uint_fast16_t) buf[i] << 8);\r | |
1033 | }\r | |
1034 | \r | |
1035 | for (j = 0; j < d; j++)\r | |
1036 | {\r | |
1037 | irmp_uart_putc (v);\r | |
1038 | }\r | |
1039 | \r | |
1040 | v = (v == '1') ? '0' : '1';\r | |
1041 | }\r | |
1042 | \r | |
1043 | for (i8 = 0; i8 < 20; i8++)\r | |
1044 | {\r | |
1045 | irmp_uart_putc ('1');\r | |
1046 | }\r | |
1047 | \r | |
1048 | irmp_uart_putc ('\n');\r | |
1049 | buf_idx = 0;\r | |
1050 | last_val = 1;\r | |
1051 | cnt = 0;\r | |
1052 | }\r | |
1053 | }\r | |
1054 | else if (buf_idx < DATALEN - 3)\r | |
1055 | {\r | |
1056 | if (cnt >= 0xff)\r | |
1057 | {\r | |
1058 | buf[buf_idx++] = 0xff;\r | |
1059 | buf[buf_idx++] = (cnt & 0xff);\r | |
1060 | buf[buf_idx] = (cnt >> 8);\r | |
1061 | }\r | |
1062 | else\r | |
1063 | {\r | |
1064 | buf[buf_idx] = cnt;\r | |
1065 | }\r | |
1066 | \r | |
1067 | buf_idx++;\r | |
1068 | cnt = 1;\r | |
1069 | last_val = val;\r | |
1070 | }\r | |
1071 | }\r | |
775fabfa | 1072 | }\r |
1073 | }\r | |
1074 | \r | |
4225a882 | 1075 | #else\r |
d155e9ab | 1076 | #define irmp_log(val)\r |
6c3c57e6 | 1077 | #endif //IRMP_LOGGING\r |
4225a882 | 1078 | \r |
1079 | typedef struct\r | |
1080 | {\r | |
0834784c | 1081 | uint_fast8_t protocol; // ir protocol\r |
1082 | uint_fast8_t pulse_1_len_min; // minimum length of pulse with bit value 1\r | |
1083 | uint_fast8_t pulse_1_len_max; // maximum length of pulse with bit value 1\r | |
1084 | uint_fast8_t pause_1_len_min; // minimum length of pause with bit value 1\r | |
1085 | uint_fast8_t pause_1_len_max; // maximum length of pause with bit value 1\r | |
1086 | uint_fast8_t pulse_0_len_min; // minimum length of pulse with bit value 0\r | |
1087 | uint_fast8_t pulse_0_len_max; // maximum length of pulse with bit value 0\r | |
1088 | uint_fast8_t pause_0_len_min; // minimum length of pause with bit value 0\r | |
1089 | uint_fast8_t pause_0_len_max; // maximum length of pause with bit value 0\r | |
1090 | uint_fast8_t address_offset; // address offset\r | |
1091 | uint_fast8_t address_end; // end of address\r | |
1092 | uint_fast8_t command_offset; // command offset\r | |
1093 | uint_fast8_t command_end; // end of command\r | |
1094 | uint_fast8_t complete_len; // complete length of frame\r | |
1095 | uint_fast8_t stop_bit; // flag: frame has stop bit\r | |
1096 | uint_fast8_t lsb_first; // flag: LSB first\r | |
1097 | uint_fast8_t flags; // some flags\r | |
4225a882 | 1098 | } IRMP_PARAMETER;\r |
1099 | \r | |
1100 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
1101 | \r | |
63b94f48 | 1102 | static const PROGMEM IRMP_PARAMETER sircs_param =\r |
4225a882 | 1103 | {\r |
d155e9ab | 1104 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol\r |
1105 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1106 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1107 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1108 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1109 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1110 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1111 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1112 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1113 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset\r | |
1114 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address\r | |
1115 | SIRCS_COMMAND_OFFSET, // command_offset: command offset\r | |
1116 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command\r | |
1117 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1118 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1119 | SIRCS_LSB, // lsb_first: flag: LSB first\r |
1120 | SIRCS_FLAGS // flags: some flags\r | |
4225a882 | 1121 | };\r |
1122 | \r | |
1123 | #endif\r | |
1124 | \r | |
1125 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1126 | \r | |
63b94f48 | 1127 | static const PROGMEM IRMP_PARAMETER nec_param =\r |
4225a882 | 1128 | {\r |
d155e9ab | 1129 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
1130 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1131 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1132 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1133 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1134 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1135 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1136 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1137 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1138 | NEC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1139 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address\r | |
1140 | NEC_COMMAND_OFFSET, // command_offset: command offset\r | |
1141 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command\r | |
1142 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1143 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1144 | NEC_LSB, // lsb_first: flag: LSB first\r |
1145 | NEC_FLAGS // flags: some flags\r | |
4225a882 | 1146 | };\r |
1147 | \r | |
63b94f48 | 1148 | static const PROGMEM IRMP_PARAMETER nec_rep_param =\r |
46dd89b7 | 1149 | {\r |
d155e9ab | 1150 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
1151 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1152 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1153 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1154 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1155 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1156 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1157 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1158 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1159 | 0, // address_offset: address offset\r | |
1160 | 0, // address_end: end of address\r | |
1161 | 0, // command_offset: command offset\r | |
1162 | 0, // command_end: end of command\r | |
1163 | 0, // complete_len: complete length of frame\r | |
1164 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1165 | NEC_LSB, // lsb_first: flag: LSB first\r |
1166 | NEC_FLAGS // flags: some flags\r | |
46dd89b7 | 1167 | };\r |
1168 | \r | |
4225a882 | 1169 | #endif\r |
1170 | \r | |
35213800 | 1171 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
fc80d688 | 1172 | \r |
63b94f48 | 1173 | static const PROGMEM IRMP_PARAMETER nec42_param =\r |
fc80d688 | 1174 | {\r |
35213800 | 1175 | IRMP_NEC42_PROTOCOL, // protocol: ir protocol\r |
fc80d688 | 1176 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
1177 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1178 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1179 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1180 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1181 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1182 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1183 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
35213800 | 1184 | NEC42_ADDRESS_OFFSET, // address_offset: address offset\r |
7644ac04 | 1185 | NEC42_ADDRESS_OFFSET + NEC42_ADDRESS_LEN, // address_end: end of address\r |
35213800 | 1186 | NEC42_COMMAND_OFFSET, // command_offset: command offset\r |
7644ac04 | 1187 | NEC42_COMMAND_OFFSET + NEC42_COMMAND_LEN, // command_end: end of command\r |
35213800 | 1188 | NEC42_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r |
1189 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1190 | NEC_LSB, // lsb_first: flag: LSB first\r | |
1191 | NEC_FLAGS // flags: some flags\r | |
fc80d688 | 1192 | };\r |
1193 | \r | |
1194 | #endif\r | |
1195 | \r | |
69da6090 | 1196 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
1197 | \r | |
1198 | static const PROGMEM IRMP_PARAMETER lgair_param =\r | |
1199 | {\r | |
1200 | IRMP_LGAIR_PROTOCOL, // protocol: ir protocol\r | |
1201 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1202 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1203 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1204 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1205 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1206 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1207 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1208 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1209 | LGAIR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1210 | LGAIR_ADDRESS_OFFSET + LGAIR_ADDRESS_LEN, // address_end: end of address\r | |
1211 | LGAIR_COMMAND_OFFSET, // command_offset: command offset\r | |
1212 | LGAIR_COMMAND_OFFSET + LGAIR_COMMAND_LEN, // command_end: end of command\r | |
1213 | LGAIR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1214 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1215 | NEC_LSB, // lsb_first: flag: LSB first\r | |
1216 | NEC_FLAGS // flags: some flags\r | |
1217 | };\r | |
1218 | \r | |
1219 | #endif\r | |
1220 | \r | |
4225a882 | 1221 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
1222 | \r | |
63b94f48 | 1223 | static const PROGMEM IRMP_PARAMETER samsung_param =\r |
4225a882 | 1224 | {\r |
d155e9ab | 1225 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol\r |
1226 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1227 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1228 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1229 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1230 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1231 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1232 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1233 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1234 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset\r | |
1235 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address\r | |
1236 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset\r | |
1237 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command\r | |
1238 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1239 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1240 | SAMSUNG_LSB, // lsb_first: flag: LSB first\r |
1241 | SAMSUNG_FLAGS // flags: some flags\r | |
4225a882 | 1242 | };\r |
1243 | \r | |
1244 | #endif\r | |
1245 | \r | |
30d1689d | 1246 | #if IRMP_SUPPORT_SAMSUNGAH_PROTOCOL == 1\r |
1247 | \r | |
1248 | static const PROGMEM IRMP_PARAMETER samsungah_param =\r | |
1249 | {\r | |
1250 | IRMP_SAMSUNGAH_PROTOCOL, // protocol: ir protocol\r | |
1251 | SAMSUNGAH_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1252 | SAMSUNGAH_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1253 | SAMSUNGAH_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1254 | SAMSUNGAH_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1255 | SAMSUNGAH_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1256 | SAMSUNGAH_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1257 | SAMSUNGAH_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1258 | SAMSUNGAH_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1259 | SAMSUNGAH_ADDRESS_OFFSET, // address_offset: address offset\r | |
1260 | SAMSUNGAH_ADDRESS_OFFSET + SAMSUNGAH_ADDRESS_LEN, // address_end: end of address\r | |
1261 | SAMSUNGAH_COMMAND_OFFSET, // command_offset: command offset\r | |
1262 | SAMSUNGAH_COMMAND_OFFSET + SAMSUNGAH_COMMAND_LEN, // command_end: end of command\r | |
1263 | SAMSUNGAH_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1264 | SAMSUNGAH_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1265 | SAMSUNGAH_LSB, // lsb_first: flag: LSB first\r | |
1266 | SAMSUNGAH_FLAGS // flags: some flags\r | |
1267 | };\r | |
1268 | \r | |
1269 | #endif\r | |
1270 | \r | |
b85cb27d | 1271 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
1272 | \r | |
1273 | static const PROGMEM IRMP_PARAMETER telefunken_param =\r | |
1274 | {\r | |
1275 | IRMP_TELEFUNKEN_PROTOCOL, // protocol: ir protocol\r | |
1276 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1277 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1278 | TELEFUNKEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1279 | TELEFUNKEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1280 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1281 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1282 | TELEFUNKEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1283 | TELEFUNKEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1284 | TELEFUNKEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1285 | TELEFUNKEN_ADDRESS_OFFSET + TELEFUNKEN_ADDRESS_LEN, // address_end: end of address\r | |
1286 | TELEFUNKEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1287 | TELEFUNKEN_COMMAND_OFFSET + TELEFUNKEN_COMMAND_LEN, // command_end: end of command\r | |
1288 | TELEFUNKEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1289 | TELEFUNKEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1290 | TELEFUNKEN_LSB, // lsb_first: flag: LSB first\r | |
1291 | TELEFUNKEN_FLAGS // flags: some flags\r | |
1292 | };\r | |
1293 | \r | |
1294 | #endif\r | |
1295 | \r | |
4225a882 | 1296 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
1297 | \r | |
63b94f48 | 1298 | static const PROGMEM IRMP_PARAMETER matsushita_param =\r |
4225a882 | 1299 | {\r |
d155e9ab | 1300 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol\r |
1301 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1302 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1303 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1304 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1305 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1306 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1307 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1308 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1309 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1310 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address\r | |
1311 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset\r | |
1312 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command\r | |
1313 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1314 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1315 | MATSUSHITA_LSB, // lsb_first: flag: LSB first\r |
1316 | MATSUSHITA_FLAGS // flags: some flags\r | |
4225a882 | 1317 | };\r |
1318 | \r | |
1319 | #endif\r | |
1320 | \r | |
1321 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1322 | \r | |
63b94f48 | 1323 | static const PROGMEM IRMP_PARAMETER kaseikyo_param =\r |
4225a882 | 1324 | {\r |
d155e9ab | 1325 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol\r |
1326 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1327 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1328 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1329 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1330 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1331 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1332 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1333 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1334 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1335 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address\r | |
1336 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset\r | |
1337 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command\r | |
1338 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1339 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1340 | KASEIKYO_LSB, // lsb_first: flag: LSB first\r |
1341 | KASEIKYO_FLAGS // flags: some flags\r | |
4225a882 | 1342 | };\r |
1343 | \r | |
1344 | #endif\r | |
1345 | \r | |
95b27043 | 1346 | #if IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
1347 | \r | |
1348 | static const PROGMEM IRMP_PARAMETER panasonic_param =\r | |
1349 | {\r | |
1350 | IRMP_PANASONIC_PROTOCOL, // protocol: ir protocol\r | |
1351 | PANASONIC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1352 | PANASONIC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1353 | PANASONIC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1354 | PANASONIC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1355 | PANASONIC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1356 | PANASONIC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1357 | PANASONIC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1358 | PANASONIC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1359 | PANASONIC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1360 | PANASONIC_ADDRESS_OFFSET + PANASONIC_ADDRESS_LEN, // address_end: end of address\r | |
1361 | PANASONIC_COMMAND_OFFSET, // command_offset: command offset\r | |
1362 | PANASONIC_COMMAND_OFFSET + PANASONIC_COMMAND_LEN, // command_end: end of command\r | |
1363 | PANASONIC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1364 | PANASONIC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1365 | PANASONIC_LSB, // lsb_first: flag: LSB first\r | |
1366 | PANASONIC_FLAGS // flags: some flags\r | |
1367 | };\r | |
1368 | \r | |
1369 | #endif\r | |
1370 | \r | |
7365350c | 1371 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
1372 | \r | |
1373 | static const PROGMEM IRMP_PARAMETER mitsu_heavy_param =\r | |
1374 | {\r | |
1375 | IRMP_MITSU_HEAVY_PROTOCOL, // protocol: ir protocol\r | |
1376 | MITSU_HEAVY_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1377 | MITSU_HEAVY_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1378 | MITSU_HEAVY_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1379 | MITSU_HEAVY_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1380 | MITSU_HEAVY_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1381 | MITSU_HEAVY_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1382 | MITSU_HEAVY_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1383 | MITSU_HEAVY_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1384 | MITSU_HEAVY_ADDRESS_OFFSET, // address_offset: address offset\r | |
1385 | MITSU_HEAVY_ADDRESS_OFFSET + MITSU_HEAVY_ADDRESS_LEN, // address_end: end of address\r | |
1386 | MITSU_HEAVY_COMMAND_OFFSET, // command_offset: command offset\r | |
1387 | MITSU_HEAVY_COMMAND_OFFSET + MITSU_HEAVY_COMMAND_LEN, // command_end: end of command\r | |
1388 | MITSU_HEAVY_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1389 | MITSU_HEAVY_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1390 | MITSU_HEAVY_LSB, // lsb_first: flag: LSB first\r | |
1391 | MITSU_HEAVY_FLAGS // flags: some flags\r | |
1392 | };\r | |
1393 | \r | |
1394 | #endif\r | |
1395 | \r | |
4bcf310e | 1396 | #if IRMP_SUPPORT_VINCENT_PROTOCOL == 1\r |
1397 | \r | |
1398 | static const PROGMEM IRMP_PARAMETER vincent_param =\r | |
1399 | {\r | |
1400 | IRMP_VINCENT_PROTOCOL, // protocol: ir protocol\r | |
1401 | VINCENT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1402 | VINCENT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1403 | VINCENT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1404 | VINCENT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1405 | VINCENT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1406 | VINCENT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1407 | VINCENT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1408 | VINCENT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1409 | VINCENT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1410 | VINCENT_ADDRESS_OFFSET + VINCENT_ADDRESS_LEN, // address_end: end of address\r | |
1411 | VINCENT_COMMAND_OFFSET, // command_offset: command offset\r | |
1412 | VINCENT_COMMAND_OFFSET + VINCENT_COMMAND_LEN, // command_end: end of command\r | |
1413 | VINCENT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1414 | VINCENT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1415 | VINCENT_LSB, // lsb_first: flag: LSB first\r | |
1416 | VINCENT_FLAGS // flags: some flags\r | |
1417 | };\r | |
1418 | \r | |
1419 | #endif\r | |
1420 | \r | |
4225a882 | 1421 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
1422 | \r | |
63b94f48 | 1423 | static const PROGMEM IRMP_PARAMETER recs80_param =\r |
4225a882 | 1424 | {\r |
d155e9ab | 1425 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol\r |
1426 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1427 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1428 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1429 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1430 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1431 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1432 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1433 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1434 | RECS80_ADDRESS_OFFSET, // address_offset: address offset\r | |
1435 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address\r | |
1436 | RECS80_COMMAND_OFFSET, // command_offset: command offset\r | |
1437 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command\r | |
1438 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1439 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1440 | RECS80_LSB, // lsb_first: flag: LSB first\r |
1441 | RECS80_FLAGS // flags: some flags\r | |
4225a882 | 1442 | };\r |
1443 | \r | |
1444 | #endif\r | |
1445 | \r | |
1446 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1447 | \r | |
63b94f48 | 1448 | static const PROGMEM IRMP_PARAMETER rc5_param =\r |
4225a882 | 1449 | {\r |
d155e9ab | 1450 | IRMP_RC5_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1451 | RC5_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1452 | RC5_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1453 | RC5_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1454 | RC5_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1455 | 0, // pulse_0_len_min: here: not used\r |
1456 | 0, // pulse_0_len_max: here: not used\r | |
1457 | 0, // pause_0_len_min: here: not used\r | |
1458 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1459 | RC5_ADDRESS_OFFSET, // address_offset: address offset\r |
1460 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address\r | |
1461 | RC5_COMMAND_OFFSET, // command_offset: command offset\r | |
1462 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command\r | |
1463 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1464 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1465 | RC5_LSB, // lsb_first: flag: LSB first\r |
1466 | RC5_FLAGS // flags: some flags\r | |
4225a882 | 1467 | };\r |
1468 | \r | |
1469 | #endif\r | |
1470 | \r | |
c2b70f0b | 1471 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
1472 | \r | |
1473 | static const PROGMEM IRMP_PARAMETER s100_param =\r | |
1474 | {\r | |
1475 | IRMP_S100_PROTOCOL, // protocol: ir protocol\r | |
1476 | S100_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1477 | S100_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1478 | S100_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1479 | S100_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1480 | 0, // pulse_0_len_min: here: not used\r | |
1481 | 0, // pulse_0_len_max: here: not used\r | |
1482 | 0, // pause_0_len_min: here: not used\r | |
1483 | 0, // pause_0_len_max: here: not used\r | |
1484 | S100_ADDRESS_OFFSET, // address_offset: address offset\r | |
1485 | S100_ADDRESS_OFFSET + S100_ADDRESS_LEN, // address_end: end of address\r | |
1486 | S100_COMMAND_OFFSET, // command_offset: command offset\r | |
1487 | S100_COMMAND_OFFSET + S100_COMMAND_LEN, // command_end: end of command\r | |
1488 | S100_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1489 | S100_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1490 | S100_LSB, // lsb_first: flag: LSB first\r | |
1491 | S100_FLAGS // flags: some flags\r | |
1492 | };\r | |
1493 | \r | |
1494 | #endif\r | |
1495 | \r | |
4225a882 | 1496 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
1497 | \r | |
63b94f48 | 1498 | static const PROGMEM IRMP_PARAMETER denon_param =\r |
4225a882 | 1499 | {\r |
d155e9ab | 1500 | IRMP_DENON_PROTOCOL, // protocol: ir protocol\r |
1501 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1502 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1503 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1504 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1505 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1506 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1507 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1508 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1509 | DENON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1510 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address\r | |
1511 | DENON_COMMAND_OFFSET, // command_offset: command offset\r | |
1512 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command\r | |
1513 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1514 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1515 | DENON_LSB, // lsb_first: flag: LSB first\r |
1516 | DENON_FLAGS // flags: some flags\r | |
4225a882 | 1517 | };\r |
1518 | \r | |
1519 | #endif\r | |
1520 | \r | |
1521 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
1522 | \r | |
63b94f48 | 1523 | static const PROGMEM IRMP_PARAMETER rc6_param =\r |
4225a882 | 1524 | {\r |
d155e9ab | 1525 | IRMP_RC6_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1526 | \r |
1527 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1528 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1529 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1530 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1531 | 0, // pulse_0_len_min: here: not used\r |
1532 | 0, // pulse_0_len_max: here: not used\r | |
1533 | 0, // pause_0_len_min: here: not used\r | |
1534 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1535 | RC6_ADDRESS_OFFSET, // address_offset: address offset\r |
1536 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address\r | |
1537 | RC6_COMMAND_OFFSET, // command_offset: command offset\r | |
1538 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command\r | |
1539 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame\r | |
1540 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1541 | RC6_LSB, // lsb_first: flag: LSB first\r |
1542 | RC6_FLAGS // flags: some flags\r | |
4225a882 | 1543 | };\r |
1544 | \r | |
1545 | #endif\r | |
1546 | \r | |
1547 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1548 | \r | |
63b94f48 | 1549 | static const PROGMEM IRMP_PARAMETER recs80ext_param =\r |
4225a882 | 1550 | {\r |
d155e9ab | 1551 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol\r |
1552 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1553 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1554 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1555 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1556 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1557 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1558 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1559 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1560 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1561 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address\r | |
1562 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset\r | |
1563 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command\r | |
1564 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1565 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1566 | RECS80EXT_LSB, // lsb_first: flag: LSB first\r |
1567 | RECS80EXT_FLAGS // flags: some flags\r | |
4225a882 | 1568 | };\r |
1569 | \r | |
1570 | #endif\r | |
1571 | \r | |
504d9df9 | 1572 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
4225a882 | 1573 | \r |
63b94f48 | 1574 | static const PROGMEM IRMP_PARAMETER nubert_param =\r |
4225a882 | 1575 | {\r |
d155e9ab | 1576 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol\r |
1577 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1578 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1579 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1580 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1581 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1582 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1583 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1584 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1585 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1586 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address\r | |
1587 | NUBERT_COMMAND_OFFSET, // command_offset: command offset\r | |
1588 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command\r | |
1589 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1590 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1591 | NUBERT_LSB, // lsb_first: flag: LSB first\r |
1592 | NUBERT_FLAGS // flags: some flags\r | |
4225a882 | 1593 | };\r |
1594 | \r | |
1595 | #endif\r | |
1596 | \r | |
0715cf5e | 1597 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
1598 | \r | |
1599 | static const PROGMEM IRMP_PARAMETER fan_param =\r | |
1600 | {\r | |
1601 | IRMP_FAN_PROTOCOL, // protocol: ir protocol\r | |
1602 | FAN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1603 | FAN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1604 | FAN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1605 | FAN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1606 | FAN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1607 | FAN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1608 | FAN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1609 | FAN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1610 | FAN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1611 | FAN_ADDRESS_OFFSET + FAN_ADDRESS_LEN, // address_end: end of address\r | |
1612 | FAN_COMMAND_OFFSET, // command_offset: command offset\r | |
1613 | FAN_COMMAND_OFFSET + FAN_COMMAND_LEN, // command_end: end of command\r | |
1614 | FAN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1615 | FAN_STOP_BIT, // stop_bit: flag: frame has NO stop bit\r | |
1616 | FAN_LSB, // lsb_first: flag: LSB first\r | |
1617 | FAN_FLAGS // flags: some flags\r | |
1618 | };\r | |
1619 | \r | |
1620 | #endif\r | |
1621 | \r | |
0a2f634b | 1622 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
1623 | \r | |
1624 | static const PROGMEM IRMP_PARAMETER speaker_param =\r | |
1625 | {\r | |
1626 | IRMP_SPEAKER_PROTOCOL, // protocol: ir protocol\r | |
1627 | SPEAKER_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1628 | SPEAKER_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1629 | SPEAKER_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1630 | SPEAKER_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1631 | SPEAKER_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1632 | SPEAKER_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1633 | SPEAKER_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1634 | SPEAKER_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1635 | SPEAKER_ADDRESS_OFFSET, // address_offset: address offset\r | |
1636 | SPEAKER_ADDRESS_OFFSET + SPEAKER_ADDRESS_LEN, // address_end: end of address\r | |
1637 | SPEAKER_COMMAND_OFFSET, // command_offset: command offset\r | |
1638 | SPEAKER_COMMAND_OFFSET + SPEAKER_COMMAND_LEN, // command_end: end of command\r | |
1639 | SPEAKER_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1640 | SPEAKER_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1641 | SPEAKER_LSB, // lsb_first: flag: LSB first\r | |
1642 | SPEAKER_FLAGS // flags: some flags\r | |
1643 | };\r | |
1644 | \r | |
1645 | #endif\r | |
1646 | \r | |
504d9df9 | 1647 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
1648 | \r | |
63b94f48 | 1649 | static const PROGMEM IRMP_PARAMETER bang_olufsen_param =\r |
504d9df9 | 1650 | {\r |
d155e9ab | 1651 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol\r |
1652 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1653 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1654 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1655 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1656 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1657 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1658 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1659 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1660 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1661 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address\r | |
1662 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1663 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command\r | |
1664 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1665 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1666 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first\r |
1667 | BANG_OLUFSEN_FLAGS // flags: some flags\r | |
504d9df9 | 1668 | };\r |
1669 | \r | |
1670 | #endif\r | |
1671 | \r | |
89e8cafb | 1672 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
1673 | \r | |
0834784c | 1674 | static uint_fast8_t first_bit;\r |
592411d1 | 1675 | \r |
63b94f48 | 1676 | static const PROGMEM IRMP_PARAMETER grundig_param =\r |
592411d1 | 1677 | {\r |
d155e9ab | 1678 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1679 | \r |
89e8cafb | 1680 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1681 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1682 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1683 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1684 | 0, // pulse_0_len_min: here: not used\r |
1685 | 0, // pulse_0_len_max: here: not used\r | |
1686 | 0, // pause_0_len_min: here: not used\r | |
1687 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1688 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset\r |
1689 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address\r | |
1690 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset\r | |
1691 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!)\r | |
1692 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG!\r | |
89e8cafb | 1693 | GRUNDIG_NOKIA_IR60_STOP_BIT, // stop_bit: flag: frame has stop bit\r |
1694 | GRUNDIG_NOKIA_IR60_LSB, // lsb_first: flag: LSB first\r | |
1695 | GRUNDIG_NOKIA_IR60_FLAGS // flags: some flags\r | |
592411d1 | 1696 | };\r |
1697 | \r | |
1698 | #endif\r | |
1699 | \r | |
12948cf3 | 1700 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
a7054daf | 1701 | \r |
63b94f48 | 1702 | static const PROGMEM IRMP_PARAMETER ruwido_param =\r |
a7054daf | 1703 | {\r |
12948cf3 | 1704 | IRMP_RUWIDO_PROTOCOL, // protocol: ir protocol\r |
1705 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1706 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1707 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1708 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1709 | 0, // pulse_0_len_min: here: not used\r |
1710 | 0, // pulse_0_len_max: here: not used\r | |
1711 | 0, // pause_0_len_min: here: not used\r | |
1712 | 0, // pause_0_len_max: here: not used\r | |
12948cf3 | 1713 | RUWIDO_ADDRESS_OFFSET, // address_offset: address offset\r |
1714 | RUWIDO_ADDRESS_OFFSET + RUWIDO_ADDRESS_LEN, // address_end: end of address\r | |
1715 | RUWIDO_COMMAND_OFFSET, // command_offset: command offset\r | |
1716 | RUWIDO_COMMAND_OFFSET + RUWIDO_COMMAND_LEN, // command_end: end of command\r | |
1717 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: SIEMENS instead of RUWIDO!\r | |
1718 | SIEMENS_OR_RUWIDO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1719 | SIEMENS_OR_RUWIDO_LSB, // lsb_first: flag: LSB first\r | |
1720 | SIEMENS_OR_RUWIDO_FLAGS // flags: some flags\r | |
a7054daf | 1721 | };\r |
1722 | \r | |
1723 | #endif\r | |
1724 | \r | |
48664931 | 1725 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
b5ea7869 | 1726 | \r |
63b94f48 | 1727 | static const PROGMEM IRMP_PARAMETER fdc_param =\r |
b5ea7869 | 1728 | {\r |
48664931 | 1729 | IRMP_FDC_PROTOCOL, // protocol: ir protocol\r |
1730 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1731 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1732 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1733 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1734 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1735 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1736 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1737 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1738 | FDC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1739 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r | |
1740 | FDC_COMMAND_OFFSET, // command_offset: command offset\r | |
1741 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r | |
1742 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1743 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1744 | FDC_LSB, // lsb_first: flag: LSB first\r | |
1745 | FDC_FLAGS // flags: some flags\r | |
b5ea7869 | 1746 | };\r |
1747 | \r | |
1748 | #endif\r | |
1749 | \r | |
9e16d699 | 1750 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
1751 | \r | |
63b94f48 | 1752 | static const PROGMEM IRMP_PARAMETER rccar_param =\r |
9e16d699 | 1753 | {\r |
1754 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol\r | |
1755 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1756 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1757 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1758 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1759 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1760 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1761 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1762 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1763 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1764 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address\r | |
1765 | RCCAR_COMMAND_OFFSET, // command_offset: command offset\r | |
1766 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command\r | |
1767 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1768 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1769 | RCCAR_LSB, // lsb_first: flag: LSB first\r | |
1770 | RCCAR_FLAGS // flags: some flags\r | |
1771 | };\r | |
1772 | \r | |
1773 | #endif\r | |
1774 | \r | |
9405f84a | 1775 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
1776 | \r | |
63b94f48 | 1777 | static const PROGMEM IRMP_PARAMETER nikon_param =\r |
9405f84a | 1778 | {\r |
1779 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol\r | |
1780 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1781 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1782 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1783 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1784 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1785 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1786 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1787 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1788 | NIKON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1789 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address\r | |
1790 | NIKON_COMMAND_OFFSET, // command_offset: command offset\r | |
1791 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command\r | |
1792 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1793 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1794 | NIKON_LSB, // lsb_first: flag: LSB first\r | |
1795 | NIKON_FLAGS // flags: some flags\r | |
1796 | };\r | |
1797 | \r | |
1798 | #endif\r | |
1799 | \r | |
111d6191 | 1800 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
1801 | \r | |
63b94f48 | 1802 | static const PROGMEM IRMP_PARAMETER kathrein_param =\r |
111d6191 | 1803 | {\r |
1804 | IRMP_KATHREIN_PROTOCOL, // protocol: ir protocol\r | |
1805 | KATHREIN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1806 | KATHREIN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1807 | KATHREIN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1808 | KATHREIN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1809 | KATHREIN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1810 | KATHREIN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1811 | KATHREIN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1812 | KATHREIN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1813 | KATHREIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1814 | KATHREIN_ADDRESS_OFFSET + KATHREIN_ADDRESS_LEN, // address_end: end of address\r | |
1815 | KATHREIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1816 | KATHREIN_COMMAND_OFFSET + KATHREIN_COMMAND_LEN, // command_end: end of command\r | |
1817 | KATHREIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1818 | KATHREIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1819 | KATHREIN_LSB, // lsb_first: flag: LSB first\r | |
1820 | KATHREIN_FLAGS // flags: some flags\r | |
1821 | };\r | |
1822 | \r | |
1823 | #endif\r | |
1824 | \r | |
deba2a0a | 1825 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
1826 | \r | |
63b94f48 | 1827 | static const PROGMEM IRMP_PARAMETER netbox_param =\r |
deba2a0a | 1828 | {\r |
1829 | IRMP_NETBOX_PROTOCOL, // protocol: ir protocol\r | |
a42d1ee6 | 1830 | NETBOX_PULSE_LEN, // pulse_1_len_min: minimum length of pulse with bit value 1, here: exact value\r |
1831 | NETBOX_PULSE_REST_LEN, // pulse_1_len_max: maximum length of pulse with bit value 1, here: rest value\r | |
1832 | NETBOX_PAUSE_LEN, // pause_1_len_min: minimum length of pause with bit value 1, here: exact value\r | |
1833 | NETBOX_PAUSE_REST_LEN, // pause_1_len_max: maximum length of pause with bit value 1, here: rest value\r | |
1834 | NETBOX_PULSE_LEN, // pulse_0_len_min: minimum length of pulse with bit value 0, here: exact value\r | |
1835 | NETBOX_PULSE_REST_LEN, // pulse_0_len_max: maximum length of pulse with bit value 0, here: rest value\r | |
1836 | NETBOX_PAUSE_LEN, // pause_0_len_min: minimum length of pause with bit value 0, here: exact value\r | |
1837 | NETBOX_PAUSE_REST_LEN, // pause_0_len_max: maximum length of pause with bit value 0, here: rest value\r | |
deba2a0a | 1838 | NETBOX_ADDRESS_OFFSET, // address_offset: address offset\r |
1839 | NETBOX_ADDRESS_OFFSET + NETBOX_ADDRESS_LEN, // address_end: end of address\r | |
1840 | NETBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1841 | NETBOX_COMMAND_OFFSET + NETBOX_COMMAND_LEN, // command_end: end of command\r | |
1842 | NETBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1843 | NETBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1844 | NETBOX_LSB, // lsb_first: flag: LSB first\r | |
1845 | NETBOX_FLAGS // flags: some flags\r | |
1846 | };\r | |
1847 | \r | |
1848 | #endif\r | |
1849 | \r | |
f50e01e7 | 1850 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
1851 | \r | |
63b94f48 | 1852 | static const PROGMEM IRMP_PARAMETER lego_param =\r |
f50e01e7 | 1853 | {\r |
1854 | IRMP_LEGO_PROTOCOL, // protocol: ir protocol\r | |
1855 | LEGO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1856 | LEGO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1857 | LEGO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1858 | LEGO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1859 | LEGO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1860 | LEGO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1861 | LEGO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1862 | LEGO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1863 | LEGO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1864 | LEGO_ADDRESS_OFFSET + LEGO_ADDRESS_LEN, // address_end: end of address\r | |
1865 | LEGO_COMMAND_OFFSET, // command_offset: command offset\r | |
1866 | LEGO_COMMAND_OFFSET + LEGO_COMMAND_LEN, // command_end: end of command\r | |
1867 | LEGO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1868 | LEGO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1869 | LEGO_LSB, // lsb_first: flag: LSB first\r | |
1870 | LEGO_FLAGS // flags: some flags\r | |
1871 | };\r | |
1872 | \r | |
1873 | #endif\r | |
1874 | \r | |
beda975f | 1875 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
1876 | \r | |
63b94f48 | 1877 | static const PROGMEM IRMP_PARAMETER thomson_param =\r |
beda975f | 1878 | {\r |
1879 | IRMP_THOMSON_PROTOCOL, // protocol: ir protocol\r | |
1880 | THOMSON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1881 | THOMSON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1882 | THOMSON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1883 | THOMSON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1884 | THOMSON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1885 | THOMSON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1886 | THOMSON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1887 | THOMSON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1888 | THOMSON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1889 | THOMSON_ADDRESS_OFFSET + THOMSON_ADDRESS_LEN, // address_end: end of address\r | |
1890 | THOMSON_COMMAND_OFFSET, // command_offset: command offset\r | |
1891 | THOMSON_COMMAND_OFFSET + THOMSON_COMMAND_LEN, // command_end: end of command\r | |
1892 | THOMSON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1893 | THOMSON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1894 | THOMSON_LSB, // lsb_first: flag: LSB first\r | |
1895 | THOMSON_FLAGS // flags: some flags\r | |
1896 | };\r | |
1897 | \r | |
1898 | #endif\r | |
1899 | \r | |
3a7e26e1 | 1900 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
1901 | \r | |
1902 | static const PROGMEM IRMP_PARAMETER bose_param =\r | |
1903 | {\r | |
1904 | IRMP_BOSE_PROTOCOL, // protocol: ir protocol\r | |
1905 | BOSE_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1906 | BOSE_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1907 | BOSE_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1908 | BOSE_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1909 | BOSE_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1910 | BOSE_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1911 | BOSE_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1912 | BOSE_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1913 | BOSE_ADDRESS_OFFSET, // address_offset: address offset\r | |
1914 | BOSE_ADDRESS_OFFSET + BOSE_ADDRESS_LEN, // address_end: end of address\r | |
1915 | BOSE_COMMAND_OFFSET, // command_offset: command offset\r | |
1916 | BOSE_COMMAND_OFFSET + BOSE_COMMAND_LEN, // command_end: end of command\r | |
1917 | BOSE_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1918 | BOSE_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1919 | BOSE_LSB, // lsb_first: flag: LSB first\r | |
1920 | BOSE_FLAGS // flags: some flags\r | |
1921 | };\r | |
1922 | \r | |
1923 | #endif\r | |
1924 | \r | |
2fb27bfe | 1925 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
1926 | \r | |
1927 | static const PROGMEM IRMP_PARAMETER a1tvbox_param =\r | |
1928 | {\r | |
1929 | IRMP_A1TVBOX_PROTOCOL, // protocol: ir protocol\r | |
1930 | \r | |
1931 | A1TVBOX_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1932 | A1TVBOX_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1933 | A1TVBOX_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1934 | A1TVBOX_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1935 | 0, // pulse_0_len_min: here: not used\r | |
1936 | 0, // pulse_0_len_max: here: not used\r | |
1937 | 0, // pause_0_len_min: here: not used\r | |
1938 | 0, // pause_0_len_max: here: not used\r | |
1939 | A1TVBOX_ADDRESS_OFFSET, // address_offset: address offset\r | |
1940 | A1TVBOX_ADDRESS_OFFSET + A1TVBOX_ADDRESS_LEN, // address_end: end of address\r | |
1941 | A1TVBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1942 | A1TVBOX_COMMAND_OFFSET + A1TVBOX_COMMAND_LEN, // command_end: end of command\r | |
1943 | A1TVBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1944 | A1TVBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1945 | A1TVBOX_LSB, // lsb_first: flag: LSB first\r | |
1946 | A1TVBOX_FLAGS // flags: some flags\r | |
1947 | };\r | |
1948 | \r | |
1949 | #endif\r | |
1950 | \r | |
0715cf5e | 1951 | #if IRMP_SUPPORT_MERLIN_PROTOCOL == 1\r |
1952 | \r | |
1953 | static const PROGMEM IRMP_PARAMETER merlin_param =\r | |
1954 | {\r | |
1955 | IRMP_MERLIN_PROTOCOL, // protocol: ir protocol\r | |
1956 | \r | |
1957 | MERLIN_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1958 | MERLIN_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1959 | MERLIN_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1960 | MERLIN_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1961 | 0, // pulse_0_len_min: here: not used\r | |
1962 | 0, // pulse_0_len_max: here: not used\r | |
1963 | 0, // pause_0_len_min: here: not used\r | |
1964 | 0, // pause_0_len_max: here: not used\r | |
1965 | MERLIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1966 | MERLIN_ADDRESS_OFFSET + MERLIN_ADDRESS_LEN, // address_end: end of address\r | |
1967 | MERLIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1968 | MERLIN_COMMAND_OFFSET + MERLIN_COMMAND_LEN, // command_end: end of command\r | |
1969 | MERLIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1970 | MERLIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1971 | MERLIN_LSB, // lsb_first: flag: LSB first\r | |
1972 | MERLIN_FLAGS // flags: some flags\r | |
1973 | };\r | |
1974 | \r | |
1975 | #endif\r | |
1976 | \r | |
b85cb27d | 1977 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1978 | \r | |
1979 | static const PROGMEM IRMP_PARAMETER ortek_param =\r | |
1980 | {\r | |
1981 | IRMP_ORTEK_PROTOCOL, // protocol: ir protocol\r | |
1982 | \r | |
1983 | ORTEK_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1984 | ORTEK_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1985 | ORTEK_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1986 | ORTEK_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1987 | 0, // pulse_0_len_min: here: not used\r | |
1988 | 0, // pulse_0_len_max: here: not used\r | |
1989 | 0, // pause_0_len_min: here: not used\r | |
1990 | 0, // pause_0_len_max: here: not used\r | |
1991 | ORTEK_ADDRESS_OFFSET, // address_offset: address offset\r | |
1992 | ORTEK_ADDRESS_OFFSET + ORTEK_ADDRESS_LEN, // address_end: end of address\r | |
1993 | ORTEK_COMMAND_OFFSET, // command_offset: command offset\r | |
1994 | ORTEK_COMMAND_OFFSET + ORTEK_COMMAND_LEN, // command_end: end of command\r | |
1995 | ORTEK_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1996 | ORTEK_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1997 | ORTEK_LSB, // lsb_first: flag: LSB first\r | |
1998 | ORTEK_FLAGS // flags: some flags\r | |
1999 | };\r | |
2000 | \r | |
2001 | #endif\r | |
2002 | \r | |
40ca4604 | 2003 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
2004 | \r | |
2005 | static const PROGMEM IRMP_PARAMETER roomba_param =\r | |
2006 | {\r | |
2007 | IRMP_ROOMBA_PROTOCOL, // protocol: ir protocol\r | |
2008 | ROOMBA_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
2009 | ROOMBA_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2010 | ROOMBA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2011 | ROOMBA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2012 | ROOMBA_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2013 | ROOMBA_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2014 | ROOMBA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2015 | ROOMBA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2016 | ROOMBA_ADDRESS_OFFSET, // address_offset: address offset\r | |
2017 | ROOMBA_ADDRESS_OFFSET + ROOMBA_ADDRESS_LEN, // address_end: end of address\r | |
2018 | ROOMBA_COMMAND_OFFSET, // command_offset: command offset\r | |
2019 | ROOMBA_COMMAND_OFFSET + ROOMBA_COMMAND_LEN, // command_end: end of command\r | |
2020 | ROOMBA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2021 | ROOMBA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2022 | ROOMBA_LSB, // lsb_first: flag: LSB first\r | |
2023 | ROOMBA_FLAGS // flags: some flags\r | |
2024 | };\r | |
2025 | \r | |
2026 | #endif\r | |
2027 | \r | |
cb93f9e9 | 2028 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
2029 | \r | |
2030 | static const PROGMEM IRMP_PARAMETER rcmm_param =\r | |
2031 | {\r | |
faf6479d | 2032 | IRMP_RCMM32_PROTOCOL, // protocol: ir protocol\r |
0834784c | 2033 | \r |
faf6479d | 2034 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
2035 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
cb93f9e9 | 2036 | 0, // pause_1_len_min: here: minimum length of short pause\r |
2037 | 0, // pause_1_len_max: here: maximum length of short pause\r | |
faf6479d | 2038 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_0_len_min: here: not used\r |
2039 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_0_len_max: here: not used\r | |
cb93f9e9 | 2040 | 0, // pause_0_len_min: here: not used\r |
2041 | 0, // pause_0_len_max: here: not used\r | |
faf6479d | 2042 | RCMM32_ADDRESS_OFFSET, // address_offset: address offset\r |
2043 | RCMM32_ADDRESS_OFFSET + RCMM32_ADDRESS_LEN, // address_end: end of address\r | |
2044 | RCMM32_COMMAND_OFFSET, // command_offset: command offset\r | |
2045 | RCMM32_COMMAND_OFFSET + RCMM32_COMMAND_LEN, // command_end: end of command\r | |
2046 | RCMM32_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2047 | RCMM32_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2048 | RCMM32_LSB, // lsb_first: flag: LSB first\r | |
2049 | RCMM32_FLAGS // flags: some flags\r | |
2050 | };\r | |
2051 | \r | |
2052 | #endif\r | |
2053 | \r | |
003c1008 | 2054 | #if IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
2055 | \r | |
2056 | static const PROGMEM IRMP_PARAMETER pentax_param =\r | |
2057 | {\r | |
2058 | IRMP_PENTAX_PROTOCOL, // protocol: ir protocol\r | |
2059 | PENTAX_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
2060 | PENTAX_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2061 | PENTAX_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2062 | PENTAX_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2063 | PENTAX_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2064 | PENTAX_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2065 | PENTAX_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2066 | PENTAX_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2067 | PENTAX_ADDRESS_OFFSET, // address_offset: address offset\r | |
2068 | PENTAX_ADDRESS_OFFSET + PENTAX_ADDRESS_LEN, // address_end: end of address\r | |
2069 | PENTAX_COMMAND_OFFSET, // command_offset: command offset\r | |
2070 | PENTAX_COMMAND_OFFSET + PENTAX_COMMAND_LEN, // command_end: end of command\r | |
2071 | PENTAX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2072 | PENTAX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2073 | PENTAX_LSB, // lsb_first: flag: LSB first\r | |
2074 | PENTAX_FLAGS // flags: some flags\r | |
2075 | };\r | |
2076 | \r | |
2077 | #endif\r | |
2078 | \r | |
43c535be | 2079 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
2080 | \r | |
2081 | static const PROGMEM IRMP_PARAMETER acp24_param =\r | |
2082 | {\r | |
2083 | IRMP_ACP24_PROTOCOL, // protocol: ir protocol\r | |
2084 | ACP24_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
2085 | ACP24_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2086 | ACP24_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2087 | ACP24_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2088 | ACP24_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2089 | ACP24_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2090 | ACP24_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2091 | ACP24_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2092 | ACP24_ADDRESS_OFFSET, // address_offset: address offset\r | |
2093 | ACP24_ADDRESS_OFFSET + ACP24_ADDRESS_LEN, // address_end: end of address\r | |
2094 | ACP24_COMMAND_OFFSET, // command_offset: command offset\r | |
2095 | ACP24_COMMAND_OFFSET + ACP24_COMMAND_LEN, // command_end: end of command\r | |
2096 | ACP24_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2097 | ACP24_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2098 | ACP24_LSB, // lsb_first: flag: LSB first\r | |
2099 | ACP24_FLAGS // flags: some flags\r | |
2100 | };\r | |
2101 | \r | |
2102 | #endif\r | |
2103 | \r | |
faf6479d | 2104 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r |
2105 | \r | |
2106 | static const PROGMEM IRMP_PARAMETER radio1_param =\r | |
2107 | {\r | |
2108 | IRMP_RADIO1_PROTOCOL, // protocol: ir protocol\r | |
0834784c | 2109 | \r |
faf6479d | 2110 | RADIO1_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
2111 | RADIO1_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2112 | RADIO1_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2113 | RADIO1_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2114 | RADIO1_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2115 | RADIO1_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2116 | RADIO1_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2117 | RADIO1_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2118 | RADIO1_ADDRESS_OFFSET, // address_offset: address offset\r | |
2119 | RADIO1_ADDRESS_OFFSET + RADIO1_ADDRESS_LEN, // address_end: end of address\r | |
2120 | RADIO1_COMMAND_OFFSET, // command_offset: command offset\r | |
2121 | RADIO1_COMMAND_OFFSET + RADIO1_COMMAND_LEN, // command_end: end of command\r | |
2122 | RADIO1_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2123 | RADIO1_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2124 | RADIO1_LSB, // lsb_first: flag: LSB first\r | |
2125 | RADIO1_FLAGS // flags: some flags\r | |
cb93f9e9 | 2126 | };\r |
2127 | \r | |
2128 | #endif\r | |
2129 | \r | |
c2b70f0b | 2130 | static uint_fast8_t irmp_bit; // current bit position\r |
2131 | static IRMP_PARAMETER irmp_param;\r | |
4225a882 | 2132 | \r |
6f750020 | 2133 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
c2b70f0b | 2134 | static IRMP_PARAMETER irmp_param2;\r |
6f750020 | 2135 | #endif\r |
2136 | \r | |
ea29682a | 2137 | static volatile uint_fast8_t irmp_ir_detected = FALSE;\r |
2138 | static volatile uint_fast8_t irmp_protocol;\r | |
2139 | static volatile uint_fast16_t irmp_address;\r | |
2140 | static volatile uint_fast16_t irmp_command;\r | |
2141 | static volatile uint_fast16_t irmp_id; // only used for SAMSUNG protocol\r | |
2142 | static volatile uint_fast8_t irmp_flags;\r | |
2143 | // static volatile uint_fast8_t irmp_busy_flag;\r | |
2144 | \r | |
2145 | #if defined(__MBED__)\r | |
2146 | // DigitalIn inputPin(IRMP_PIN, PullUp); // this requires mbed.h and source to be compiled as cpp\r | |
2147 | gpio_t gpioIRin; // use low level c function instead\r | |
2148 | #endif\r | |
2149 | \r | |
4225a882 | 2150 | \r |
48664931 | 2151 | #ifdef ANALYZE\r |
ea29682a | 2152 | #define input(x) (x)\r |
2153 | static uint_fast8_t IRMP_PIN;\r | |
2154 | static uint_fast8_t radio;\r | |
4225a882 | 2155 | #endif\r |
2156 | \r | |
2157 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2158 | * Initialize IRMP decoder\r | |
2159 | * @details Configures IRMP input pin\r | |
2160 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2161 | */\r | |
48664931 | 2162 | #ifndef ANALYZE\r |
4225a882 | 2163 | void\r |
2164 | irmp_init (void)\r | |
2165 | {\r | |
08f2dd9d | 2166 | #if defined(PIC_CCS) || defined(PIC_C18) // PIC: do nothing\r |
2167 | #elif defined (ARM_STM32) // STM32\r | |
95b27043 | 2168 | GPIO_InitTypeDef GPIO_InitStructure;\r |
2169 | \r | |
2170 | /* GPIOx clock enable */\r | |
2171 | # if defined (ARM_STM32L1XX)\r | |
2172 | RCC_AHBPeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2173 | # elif defined (ARM_STM32F10X)\r | |
2174 | RCC_APB2PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2175 | # elif defined (ARM_STM32F4XX)\r | |
2176 | RCC_AHB1PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2177 | # endif\r | |
2178 | \r | |
2179 | /* GPIO Configuration */\r | |
2180 | GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r | |
2181 | # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r | |
2182 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r | |
2183 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
2184 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
2185 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r | |
2186 | # elif defined (ARM_STM32F10X)\r | |
2187 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
2188 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r | |
2189 | # endif\r | |
2190 | GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r | |
2191 | \r | |
afd1e690 | 2192 | #elif defined(STELLARIS_ARM_CORTEX_M4)\r |
95b27043 | 2193 | // Enable the GPIO port\r |
2194 | ROM_SysCtlPeripheralEnable(IRMP_PORT_PERIPH);\r | |
2195 | \r | |
2196 | // Set as an input\r | |
2197 | ROM_GPIODirModeSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_DIR_MODE_IN);\r | |
2198 | ROM_GPIOPadConfigSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);\r | |
2199 | \r | |
aa276d72 | 2200 | #elif defined(__SDCC_stm8) // STM8\r |
aa276d72 | 2201 | IRMP_GPIO_STRUCT->DDR &= ~(1<<IRMP_BIT); // pin is input\r |
95b27043 | 2202 | IRMP_GPIO_STRUCT->CR1 |= (1<<IRMP_BIT); // activate pullup\r |
2203 | \r | |
df24bb50 | 2204 | #elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r |
95b27043 | 2205 | pinMode(IRMP_PIN, INPUT);\r |
2206 | \r | |
ea29682a | 2207 | #elif defined(__xtensa__) // ESP8266\r |
30d1689d | 2208 | pinMode(IRMP_BIT_NUMBER, INPUT);\r |
ea29682a | 2209 | // select pin function\r |
2210 | # if (IRMP_BIT_NUMBER == 12)\r | |
2211 | PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, FUNC_GPIO12);\r | |
2212 | // doesn't work for me:\r | |
2213 | // # elif (IRMP_BIT_NUMBER == 13)\r | |
2214 | // PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U , FUNC_GPIO13);\r | |
2215 | # else\r | |
2216 | # warning Please add PIN_FUNC_SELECT when necessary.\r | |
2217 | # endif\r | |
2218 | GPIO_DIS_OUTPUT(IRMP_BIT_NUMBER);\r | |
2219 | \r | |
2220 | #elif defined(__MBED__)\r | |
2221 | gpio_init_in_ex(&gpioIRin, IRMP_PIN, IRMP_PINMODE); // initialize input for IR diode\r | |
2222 | \r | |
08f2dd9d | 2223 | #else // AVR\r |
d155e9ab | 2224 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup\r |
2225 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input\r | |
93ba2e01 | 2226 | #endif\r |
4225a882 | 2227 | \r |
2228 | #if IRMP_LOGGING == 1\r | |
2229 | irmp_uart_init ();\r | |
2230 | #endif\r | |
2231 | }\r | |
2232 | #endif\r | |
2233 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2234 | * Get IRMP data\r | |
2235 | * @details gets decoded IRMP data\r | |
2236 | * @param pointer in order to store IRMP data\r | |
2237 | * @return TRUE: successful, FALSE: failed\r | |
2238 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2239 | */\r | |
716f8772 | 2240 | uint_fast8_t\r |
4225a882 | 2241 | irmp_get_data (IRMP_DATA * irmp_data_p)\r |
2242 | {\r | |
0834784c | 2243 | uint_fast8_t rtc = FALSE;\r |
4225a882 | 2244 | \r |
2245 | if (irmp_ir_detected)\r | |
2246 | {\r | |
df24bb50 | 2247 | switch (irmp_protocol)\r |
2248 | {\r | |
4225a882 | 2249 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 2250 | case IRMP_SAMSUNG_PROTOCOL:\r |
2251 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2252 | {\r | |
2253 | irmp_command &= 0xff;\r | |
2254 | irmp_command |= irmp_id << 8;\r | |
2255 | rtc = TRUE;\r | |
2256 | }\r | |
2257 | break;\r | |
956ea3ea | 2258 | \r |
2259 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r | |
df24bb50 | 2260 | case IRMP_SAMSUNG48_PROTOCOL:\r |
2261 | irmp_command = (irmp_command & 0x00FF) | ((irmp_id & 0x00FF) << 8);\r | |
2262 | rtc = TRUE;\r | |
2263 | break;\r | |
956ea3ea | 2264 | #endif\r |
4225a882 | 2265 | #endif\r |
956ea3ea | 2266 | \r |
4225a882 | 2267 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 2268 | case IRMP_NEC_PROTOCOL:\r |
2269 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2270 | {\r | |
2271 | irmp_command &= 0xff;\r | |
2272 | rtc = TRUE;\r | |
2273 | }\r | |
2274 | else if (irmp_address == 0x87EE)\r | |
2275 | {\r | |
2276 | #ifdef ANALYZE\r | |
2277 | ANALYZE_PRINTF ("Switching to APPLE protocol\n");\r | |
2278 | #endif // ANALYZE\r | |
2279 | irmp_protocol = IRMP_APPLE_PROTOCOL;\r | |
2280 | irmp_address = (irmp_command & 0xFF00) >> 8;\r | |
2281 | irmp_command &= 0x00FF;\r | |
2282 | rtc = TRUE;\r | |
2283 | }\r | |
2284 | break;\r | |
48664931 | 2285 | #endif\r |
4bcf310e | 2286 | \r |
2287 | \r | |
2288 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
2289 | case IRMP_VINCENT_PROTOCOL:\r | |
2290 | if ((irmp_command >> 8) == (irmp_command & 0x00FF))\r | |
2291 | {\r | |
2292 | irmp_command &= 0xff;\r | |
2293 | rtc = TRUE;\r | |
2294 | }\r | |
2295 | break;\r | |
2296 | #endif\r | |
2297 | \r | |
3a7e26e1 | 2298 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
df24bb50 | 2299 | case IRMP_BOSE_PROTOCOL:\r |
2300 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2301 | {\r | |
2302 | irmp_command &= 0xff;\r | |
2303 | rtc = TRUE;\r | |
2304 | }\r | |
2305 | break;\r | |
3a7e26e1 | 2306 | #endif\r |
12948cf3 | 2307 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 2308 | case IRMP_SIEMENS_PROTOCOL:\r |
2309 | case IRMP_RUWIDO_PROTOCOL:\r | |
2310 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001))\r | |
2311 | {\r | |
2312 | irmp_command >>= 1;\r | |
2313 | rtc = TRUE;\r | |
2314 | }\r | |
2315 | break;\r | |
9405f84a | 2316 | #endif\r |
111d6191 | 2317 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
df24bb50 | 2318 | case IRMP_KATHREIN_PROTOCOL:\r |
2319 | if (irmp_command != 0x0000)\r | |
2320 | {\r | |
2321 | rtc = TRUE;\r | |
2322 | }\r | |
2323 | break;\r | |
111d6191 | 2324 | #endif\r |
03780b34 | 2325 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
df24bb50 | 2326 | case IRMP_RC5_PROTOCOL:\r |
2327 | irmp_address &= ~0x20; // clear toggle bit\r | |
2328 | rtc = TRUE;\r | |
2329 | break;\r | |
03780b34 | 2330 | #endif\r |
c2b70f0b | 2331 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 2332 | case IRMP_S100_PROTOCOL:\r |
2333 | irmp_address &= ~0x20; // clear toggle bit\r | |
2334 | rtc = TRUE;\r | |
2335 | break;\r | |
c2b70f0b | 2336 | #endif\r |
89e8cafb | 2337 | #if IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
df24bb50 | 2338 | case IRMP_IR60_PROTOCOL:\r |
2339 | if (irmp_command != 0x007d) // 0x007d (== 62<<1 + 1) is start instruction frame\r | |
2340 | {\r | |
2341 | rtc = TRUE;\r | |
2342 | }\r | |
2343 | else\r | |
2344 | {\r | |
2345 | #ifdef ANALYZE\r | |
2346 | ANALYZE_PRINTF("Info IR60: got start instruction frame\n");\r | |
2347 | #endif // ANALYZE\r | |
2348 | }\r | |
2349 | break;\r | |
89e8cafb | 2350 | #endif\r |
48664931 | 2351 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 2352 | case IRMP_RCCAR_PROTOCOL:\r |
2353 | // frame in irmp_data:\r | |
2354 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0\r | |
2355 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0\r | |
2356 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0\r | |
2357 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0\r | |
2358 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0\r | |
2359 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0\r | |
2360 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0\r | |
2361 | break;\r | |
4225a882 | 2362 | #endif\r |
beda975f | 2363 | \r |
2364 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1 // squeeze code to 8 bit, upper bit indicates release-key\r | |
df24bb50 | 2365 | case IRMP_NETBOX_PROTOCOL:\r |
2366 | if (irmp_command & 0x1000) // last bit set?\r | |
2367 | {\r | |
2368 | if ((irmp_command & 0x1f) == 0x15) // key pressed: 101 01 (LSB)\r | |
2369 | {\r | |
2370 | irmp_command >>= 5;\r | |
2371 | irmp_command &= 0x7F;\r | |
2372 | rtc = TRUE;\r | |
2373 | }\r | |
2374 | else if ((irmp_command & 0x1f) == 0x10) // key released: 000 01 (LSB)\r | |
2375 | {\r | |
2376 | irmp_command >>= 5;\r | |
2377 | irmp_command |= 0x80;\r | |
2378 | rtc = TRUE;\r | |
2379 | }\r | |
2380 | else\r | |
2381 | {\r | |
2382 | #ifdef ANALYZE\r | |
2383 | ANALYZE_PRINTF("error NETBOX: bit6/7 must be 0/1\n");\r | |
2384 | #endif // ANALYZE\r | |
2385 | }\r | |
2386 | }\r | |
2387 | else\r | |
2388 | {\r | |
2389 | #ifdef ANALYZE\r | |
2390 | ANALYZE_PRINTF("error NETBOX: last bit not set\n");\r | |
2391 | #endif // ANALYZE\r | |
2392 | }\r | |
2393 | break;\r | |
deba2a0a | 2394 | #endif\r |
f50e01e7 | 2395 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
df24bb50 | 2396 | case IRMP_LEGO_PROTOCOL:\r |
2397 | {\r | |
2398 | uint_fast8_t crc = 0x0F ^ ((irmp_command & 0xF000) >> 12) ^ ((irmp_command & 0x0F00) >> 8) ^ ((irmp_command & 0x00F0) >> 4);\r | |
2399 | \r | |
2400 | if ((irmp_command & 0x000F) == crc)\r | |
2401 | {\r | |
2402 | irmp_command >>= 4;\r | |
2403 | rtc = TRUE;\r | |
2404 | }\r | |
2405 | else\r | |
2406 | {\r | |
2407 | #ifdef ANALYZE\r | |
2408 | ANALYZE_PRINTF ("CRC error in LEGO protocol\n");\r | |
2409 | #endif // ANALYZE\r | |
2410 | // rtc = TRUE; // don't accept codes with CRC errors\r | |
2411 | }\r | |
2412 | break;\r | |
2413 | }\r | |
f50e01e7 | 2414 | #endif\r |
cb93f9e9 | 2415 | \r |
df24bb50 | 2416 | default:\r |
2417 | {\r | |
2418 | rtc = TRUE;\r | |
2419 | break;\r | |
2420 | }\r | |
2421 | }\r | |
2422 | \r | |
2423 | if (rtc)\r | |
2424 | {\r | |
2425 | irmp_data_p->protocol = irmp_protocol;\r | |
2426 | irmp_data_p->address = irmp_address;\r | |
2427 | irmp_data_p->command = irmp_command;\r | |
2428 | irmp_data_p->flags = irmp_flags;\r | |
2429 | irmp_command = 0;\r | |
2430 | irmp_address = 0;\r | |
2431 | irmp_flags = 0;\r | |
2432 | }\r | |
2433 | \r | |
2434 | irmp_ir_detected = FALSE;\r | |
4225a882 | 2435 | }\r |
2436 | \r | |
2437 | return rtc;\r | |
2438 | }\r | |
2439 | \r | |
7644ac04 | 2440 | #if IRMP_USE_CALLBACK == 1\r |
2441 | void\r | |
0834784c | 2442 | irmp_set_callback_ptr (void (*cb)(uint_fast8_t))\r |
7644ac04 | 2443 | {\r |
2444 | irmp_callback_ptr = cb;\r | |
2445 | }\r | |
2446 | #endif // IRMP_USE_CALLBACK == 1\r | |
2447 | \r | |
4225a882 | 2448 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()\r |
0834784c | 2449 | static uint_fast16_t irmp_tmp_address; // ir address\r |
2450 | static uint_fast16_t irmp_tmp_command; // ir command\r | |
6f750020 | 2451 | \r |
956ea3ea | 2452 | #if (IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
0834784c | 2453 | static uint_fast16_t irmp_tmp_address2; // ir address\r |
2454 | static uint_fast16_t irmp_tmp_command2; // ir command\r | |
6f750020 | 2455 | #endif\r |
2456 | \r | |
69da6090 | 2457 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
0834784c | 2458 | static uint_fast16_t irmp_lgair_address; // ir address\r |
2459 | static uint_fast16_t irmp_lgair_command; // ir command\r | |
69da6090 | 2460 | #endif\r |
2461 | \r | |
4225a882 | 2462 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
0834784c | 2463 | static uint_fast16_t irmp_tmp_id; // ir id (only SAMSUNG)\r |
770a1a9d | 2464 | #endif\r |
2465 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
0834784c | 2466 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits\r |
2467 | static uint_fast8_t genre2; // save genre2 bits here, later copied to MSB in flags\r | |
4225a882 | 2468 | #endif\r |
2469 | \r | |
40ca4604 | 2470 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
0834784c | 2471 | static uint_fast8_t parity; // number of '1' of the first 14 bits, check if even.\r |
40ca4604 | 2472 | #endif\r |
2473 | \r | |
7365350c | 2474 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
2475 | static uint_fast8_t check; // number of '1' of the first 14 bits, check if even.\r | |
2476 | static uint_fast8_t mitsu_parity; // number of '1' of the first 14 bits, check if even.\r | |
2477 | #endif\r | |
2478 | \r | |
4225a882 | 2479 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2480 | * store bit\r | |
2481 | * @details store bit in temp address or temp command\r | |
2482 | * @param value to store: 0 or 1\r | |
2483 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2484 | */\r | |
d823e852 | 2485 | // verhindert, dass irmp_store_bit() inline compiliert wird:\r |
0834784c | 2486 | // static void irmp_store_bit (uint_fast8_t) __attribute__ ((noinline));\r |
d823e852 | 2487 | \r |
4225a882 | 2488 | static void\r |
0834784c | 2489 | irmp_store_bit (uint_fast8_t value)\r |
4225a882 | 2490 | {\r |
43c535be | 2491 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
2492 | if (irmp_param.protocol == IRMP_ACP24_PROTOCOL) // squeeze 64 bits into 16 bits:\r | |
2493 | {\r | |
df24bb50 | 2494 | if (value)\r |
2495 | {\r | |
2496 | // ACP24-Frame:\r | |
2497 | // 1 2 3 4 5 6\r | |
2498 | // 0123456789012345678901234567890123456789012345678901234567890123456789\r | |
2499 | // N VVMMM ? ??? t vmA x y TTTT\r | |
2500 | //\r | |
2501 | // irmp_data_p->command:\r | |
2502 | //\r | |
2503 | // 5432109876543210\r | |
2504 | // NAVVvMMMmtxyTTTT\r | |
2505 | \r | |
2506 | switch (irmp_bit)\r | |
2507 | {\r | |
2508 | case 0: irmp_tmp_command |= (1<<15); break; // N\r | |
2509 | case 2: irmp_tmp_command |= (1<<13); break; // V\r | |
2510 | case 3: irmp_tmp_command |= (1<<12); break; // V\r | |
2511 | case 4: irmp_tmp_command |= (1<<10); break; // M\r | |
2512 | case 5: irmp_tmp_command |= (1<< 9); break; // M\r | |
2513 | case 6: irmp_tmp_command |= (1<< 8); break; // M\r | |
2514 | case 20: irmp_tmp_command |= (1<< 6); break; // t\r | |
2515 | case 22: irmp_tmp_command |= (1<<11); break; // v\r | |
2516 | case 23: irmp_tmp_command |= (1<< 7); break; // m\r | |
2517 | case 24: irmp_tmp_command |= (1<<14); break; // A\r | |
2518 | case 26: irmp_tmp_command |= (1<< 5); break; // x\r | |
2519 | case 44: irmp_tmp_command |= (1<< 4); break; // y\r | |
2520 | case 66: irmp_tmp_command |= (1<< 3); break; // T\r | |
2521 | case 67: irmp_tmp_command |= (1<< 2); break; // T\r | |
2522 | case 68: irmp_tmp_command |= (1<< 1); break; // T\r | |
2523 | case 69: irmp_tmp_command |= (1<< 0); break; // T\r | |
2524 | }\r | |
2525 | }\r | |
43c535be | 2526 | }\r |
2527 | else\r | |
2528 | #endif // IRMP_SUPPORT_ACP24_PROTOCOL\r | |
2529 | \r | |
40ca4604 | 2530 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
2531 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r | |
2532 | {\r | |
df24bb50 | 2533 | if (irmp_bit < 14)\r |
2534 | {\r | |
2535 | if (value)\r | |
2536 | {\r | |
2537 | parity++;\r | |
2538 | }\r | |
2539 | }\r | |
2540 | else if (irmp_bit == 14)\r | |
2541 | {\r | |
2542 | if (value) // value == 1: even parity\r | |
2543 | {\r | |
2544 | if (parity & 0x01)\r | |
2545 | {\r | |
2546 | parity = PARITY_CHECK_FAILED;\r | |
2547 | }\r | |
2548 | else\r | |
2549 | {\r | |
2550 | parity = PARITY_CHECK_OK;\r | |
2551 | }\r | |
2552 | }\r | |
2553 | else\r | |
2554 | {\r | |
2555 | if (parity & 0x01) // value == 0: odd parity\r | |
2556 | {\r | |
2557 | parity = PARITY_CHECK_OK;\r | |
2558 | }\r | |
2559 | else\r | |
2560 | {\r | |
2561 | parity = PARITY_CHECK_FAILED;\r | |
2562 | }\r | |
2563 | }\r | |
2564 | }\r | |
40ca4604 | 2565 | }\r |
43c535be | 2566 | else\r |
40ca4604 | 2567 | #endif\r |
43c535be | 2568 | {\r |
df24bb50 | 2569 | ;\r |
43c535be | 2570 | }\r |
40ca4604 | 2571 | \r |
89e8cafb | 2572 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
2573 | if (irmp_bit == 0 && irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL)\r | |
2574 | {\r | |
df24bb50 | 2575 | first_bit = value;\r |
89e8cafb | 2576 | }\r |
2577 | else\r | |
2578 | #endif\r | |
770a1a9d | 2579 | \r |
4225a882 | 2580 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end)\r |
2581 | {\r | |
df24bb50 | 2582 | if (irmp_param.lsb_first)\r |
2583 | {\r | |
2584 | irmp_tmp_address |= (((uint_fast16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast\r | |
2585 | }\r | |
2586 | else\r | |
2587 | {\r | |
2588 | irmp_tmp_address <<= 1;\r | |
2589 | irmp_tmp_address |= value;\r | |
2590 | }\r | |
4225a882 | 2591 | }\r |
2592 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end)\r | |
2593 | {\r | |
df24bb50 | 2594 | if (irmp_param.lsb_first)\r |
2595 | {\r | |
956ea3ea | 2596 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r |
df24bb50 | 2597 | if (irmp_param.protocol == IRMP_SAMSUNG48_PROTOCOL && irmp_bit >= 32)\r |
2598 | {\r | |
2599 | irmp_tmp_id |= (((uint_fast16_t) (value)) << (irmp_bit - 32)); // CV wants cast\r | |
2600 | }\r | |
2601 | else\r | |
956ea3ea | 2602 | #endif\r |
df24bb50 | 2603 | {\r |
2604 | irmp_tmp_command |= (((uint_fast16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast\r | |
2605 | }\r | |
2606 | }\r | |
2607 | else\r | |
2608 | {\r | |
2609 | irmp_tmp_command <<= 1;\r | |
2610 | irmp_tmp_command |= value;\r | |
2611 | }\r | |
4225a882 | 2612 | }\r |
770a1a9d | 2613 | \r |
69da6090 | 2614 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
2615 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL || irmp_param.protocol == IRMP_NEC42_PROTOCOL)\r | |
2616 | {\r | |
df24bb50 | 2617 | if (irmp_bit < 8)\r |
2618 | {\r | |
2619 | irmp_lgair_address <<= 1; // LGAIR uses MSB\r | |
2620 | irmp_lgair_address |= value;\r | |
2621 | }\r | |
2622 | else if (irmp_bit < 24)\r | |
2623 | {\r | |
2624 | irmp_lgair_command <<= 1; // LGAIR uses MSB\r | |
2625 | irmp_lgair_command |= value;\r | |
2626 | }\r | |
69da6090 | 2627 | }\r |
2628 | // NO else!\r | |
2629 | #endif\r | |
2630 | \r | |
35213800 | 2631 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
f60c4644 | 2632 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit >= 13 && irmp_bit < 26)\r |
35213800 | 2633 | {\r |
df24bb50 | 2634 | irmp_tmp_address2 |= (((uint_fast16_t) (value)) << (irmp_bit - 13)); // CV wants cast\r |
35213800 | 2635 | }\r |
f60c4644 | 2636 | else\r |
35213800 | 2637 | #endif\r |
2638 | \r | |
4225a882 | 2639 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
f60c4644 | 2640 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN)\r |
4225a882 | 2641 | {\r |
df24bb50 | 2642 | irmp_tmp_id |= (((uint_fast16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first\r |
4225a882 | 2643 | }\r |
f60c4644 | 2644 | else\r |
4225a882 | 2645 | #endif\r |
770a1a9d | 2646 | \r |
2647 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
f60c4644 | 2648 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r |
770a1a9d | 2649 | {\r |
df24bb50 | 2650 | if (irmp_bit >= 20 && irmp_bit < 24)\r |
2651 | {\r | |
7365350c | 2652 | irmp_tmp_command |= (((uint_fast16_t) (value)) << (irmp_bit - 8)); // store 4 system bits (genre 1) in upper nibble with LSB first\r |
df24bb50 | 2653 | }\r |
2654 | else if (irmp_bit >= 24 && irmp_bit < 28)\r | |
2655 | {\r | |
7365350c | 2656 | genre2 |= (((uint_fast8_t) (value)) << (irmp_bit - 20)); // store 4 system bits (genre 2) in upper nibble with LSB first\r |
df24bb50 | 2657 | }\r |
2658 | \r | |
2659 | if (irmp_bit < KASEIKYO_COMPLETE_DATA_LEN)\r | |
2660 | {\r | |
2661 | if (value)\r | |
2662 | {\r | |
2663 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8);\r | |
2664 | }\r | |
2665 | else\r | |
2666 | {\r | |
2667 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8));\r | |
2668 | }\r | |
2669 | }\r | |
0f700c8e | 2670 | }\r |
26b6c304 | 2671 | else\r |
770a1a9d | 2672 | #endif\r |
7365350c | 2673 | \r |
2674 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r | |
2675 | if (irmp_param.protocol == IRMP_MITSU_HEAVY_PROTOCOL) // squeeze 64 bits into 16 bits:\r | |
2676 | {\r | |
2677 | if (irmp_bit == 72 )\r | |
2678 | { // irmp_tmp_address, irmp_tmp_command received: check parity & compress\r | |
2679 | mitsu_parity = PARITY_CHECK_OK;\r | |
2680 | \r | |
2681 | check = irmp_tmp_address >> 8; // inverted upper byte == lower byte?\r | |
2682 | check = ~ check;\r | |
2683 | \r | |
2684 | if (check == (irmp_tmp_address & 0xFF))\r | |
2685 | { // ok:\r | |
2686 | irmp_tmp_address <<= 8; // throw away upper byte\r | |
2687 | }\r | |
2688 | else\r | |
2689 | {\r | |
2690 | mitsu_parity = PARITY_CHECK_FAILED;\r | |
2691 | }\r | |
2692 | \r | |
2693 | check = irmp_tmp_command >> 8; // inverted upper byte == lower byte?\r | |
2694 | check = ~ check;\r | |
2695 | if (check == (irmp_tmp_command & 0xFF))\r | |
2696 | { // ok: pack together\r | |
2697 | irmp_tmp_address |= irmp_tmp_command & 0xFF; // byte 1, byte2 in irmp_tmp_address, irmp_tmp_command can be used for byte 3\r | |
2698 | }\r | |
2699 | else\r | |
2700 | {\r | |
2701 | mitsu_parity = PARITY_CHECK_FAILED;\r | |
2702 | }\r | |
2703 | irmp_tmp_command = 0;\r | |
2704 | }\r | |
2705 | \r | |
2706 | if (irmp_bit >= 72 )\r | |
2707 | { // receive 3. word in irmp_tmp_command\r | |
2708 | irmp_tmp_command <<= 1;\r | |
2709 | irmp_tmp_command |= value;\r | |
2710 | }\r | |
2711 | }\r | |
2712 | else\r | |
2713 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL\r | |
26b6c304 | 2714 | {\r |
df24bb50 | 2715 | ;\r |
26b6c304 | 2716 | }\r |
770a1a9d | 2717 | \r |
4225a882 | 2718 | irmp_bit++;\r |
2719 | }\r | |
2720 | \r | |
6f750020 | 2721 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2722 | * store bit\r | |
2723 | * @details store bit in temp address or temp command\r | |
2724 | * @param value to store: 0 or 1\r | |
2725 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2726 | */\r | |
2727 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2728 | static void\r | |
0834784c | 2729 | irmp_store_bit2 (uint_fast8_t value)\r |
6f750020 | 2730 | {\r |
0834784c | 2731 | uint_fast8_t irmp_bit2;\r |
6f750020 | 2732 | \r |
2733 | if (irmp_param.protocol)\r | |
2734 | {\r | |
df24bb50 | 2735 | irmp_bit2 = irmp_bit - 2;\r |
6f750020 | 2736 | }\r |
2737 | else\r | |
2738 | {\r | |
df24bb50 | 2739 | irmp_bit2 = irmp_bit - 1;\r |
6f750020 | 2740 | }\r |
2741 | \r | |
2742 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end)\r | |
2743 | {\r | |
df24bb50 | 2744 | irmp_tmp_address2 |= (((uint_fast16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast\r |
6f750020 | 2745 | }\r |
2746 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end)\r | |
2747 | {\r | |
df24bb50 | 2748 | irmp_tmp_command2 |= (((uint_fast16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast\r |
6f750020 | 2749 | }\r |
2750 | }\r | |
2751 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2752 | \r | |
4225a882 | 2753 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2754 | * ISR routine\r | |
2755 | * @details ISR routine, called 10000 times per second\r | |
2756 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2757 | */\r | |
716f8772 | 2758 | uint_fast8_t\r |
4225a882 | 2759 | irmp_ISR (void)\r |
2760 | {\r | |
0834784c | 2761 | static uint_fast8_t irmp_start_bit_detected; // flag: start bit detected\r |
2762 | static uint_fast8_t wait_for_space; // flag: wait for data bit space\r | |
2763 | static uint_fast8_t wait_for_start_space; // flag: wait for start bit space\r | |
2764 | static uint_fast8_t irmp_pulse_time; // count bit time for pulse\r | |
2765 | static PAUSE_LEN irmp_pause_time; // count bit time for pause\r | |
2766 | static uint_fast16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition\r | |
2767 | static uint_fast16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition\r | |
2768 | static uint_fast16_t key_repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause\r | |
2769 | static uint_fast8_t repetition_frame_number;\r | |
4225a882 | 2770 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
0834784c | 2771 | static uint_fast16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition\r |
2772 | static uint_fast16_t denon_repetition_len = 0xFFFF; // denon repetition len of 2nd auto generated frame\r | |
4225a882 | 2773 | #endif\r |
c2b70f0b | 2774 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_S100_PROTOCOL == 1\r |
0834784c | 2775 | static uint_fast8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r |
4225a882 | 2776 | #endif\r |
77f488bb | 2777 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
0834784c | 2778 | static PAUSE_LEN last_pause; // last pause value\r |
504d9df9 | 2779 | #endif\r |
77f488bb | 2780 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
0834784c | 2781 | static uint_fast8_t last_value; // last bit value\r |
4225a882 | 2782 | #endif\r |
0834784c | 2783 | uint_fast8_t irmp_input; // input value\r |
4225a882 | 2784 | \r |
48664931 | 2785 | #ifdef ANALYZE\r |
592411d1 | 2786 | time_counter++;\r |
1082ecf2 | 2787 | #endif // ANALYZE\r |
592411d1 | 2788 | \r |
aa276d72 | 2789 | #if defined(__SDCC_stm8)\r |
2790 | irmp_input = input(IRMP_GPIO_STRUCT->IDR)\r | |
ea29682a | 2791 | #elif defined(__MBED__)\r |
2792 | //irmp_input = inputPin;\r | |
2793 | irmp_input = gpio_read (&gpioIRin);\r | |
aa276d72 | 2794 | #else\r |
4225a882 | 2795 | irmp_input = input(IRMP_PIN);\r |
aa276d72 | 2796 | #endif\r |
4225a882 | 2797 | \r |
7644ac04 | 2798 | #if IRMP_USE_CALLBACK == 1\r |
2799 | if (irmp_callback_ptr)\r | |
2800 | {\r | |
df24bb50 | 2801 | static uint_fast8_t last_inverted_input;\r |
7644ac04 | 2802 | \r |
df24bb50 | 2803 | if (last_inverted_input != !irmp_input)\r |
2804 | {\r | |
2805 | (*irmp_callback_ptr) (! irmp_input);\r | |
2806 | last_inverted_input = !irmp_input;\r | |
2807 | }\r | |
7644ac04 | 2808 | }\r |
2809 | #endif // IRMP_USE_CALLBACK == 1\r | |
2810 | \r | |
d155e9ab | 2811 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined\r |
4225a882 | 2812 | \r |
2813 | if (! irmp_ir_detected) // ir code already detected?\r | |
2814 | { // no...\r | |
df24bb50 | 2815 | if (! irmp_start_bit_detected) // start bit detected?\r |
2816 | { // no...\r | |
2817 | if (! irmp_input) // receiving burst?\r | |
2818 | { // yes...\r | |
1f54e86c | 2819 | // irmp_busy_flag = TRUE;\r |
48664931 | 2820 | #ifdef ANALYZE\r |
df24bb50 | 2821 | if (! irmp_pulse_time)\r |
2822 | {\r | |
2823 | ANALYZE_PRINTF("%8.3fms [starting pulse]\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
2824 | }\r | |
2825 | #endif // ANALYZE\r | |
2826 | irmp_pulse_time++; // increment counter\r | |
2827 | }\r | |
2828 | else\r | |
2829 | { // no...\r | |
2830 | if (irmp_pulse_time) // it's dark....\r | |
2831 | { // set flags for counting the time of darkness...\r | |
2832 | irmp_start_bit_detected = 1;\r | |
2833 | wait_for_start_space = 1;\r | |
2834 | wait_for_space = 0;\r | |
2835 | irmp_tmp_command = 0;\r | |
2836 | irmp_tmp_address = 0;\r | |
0f700c8e | 2837 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
df24bb50 | 2838 | genre2 = 0;\r |
0f700c8e | 2839 | #endif\r |
80b3a55d | 2840 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 2841 | irmp_tmp_id = 0;\r |
80b3a55d | 2842 | #endif\r |
6f750020 | 2843 | \r |
35213800 | 2844 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
df24bb50 | 2845 | irmp_tmp_command2 = 0;\r |
2846 | irmp_tmp_address2 = 0;\r | |
6f750020 | 2847 | #endif\r |
69da6090 | 2848 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
df24bb50 | 2849 | irmp_lgair_command = 0;\r |
2850 | irmp_lgair_address = 0;\r | |
69da6090 | 2851 | #endif\r |
df24bb50 | 2852 | irmp_bit = 0xff;\r |
2853 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0!\r | |
c2b70f0b | 2854 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 2855 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame!\r |
4225a882 | 2856 | #endif\r |
df24bb50 | 2857 | }\r |
2858 | else\r | |
2859 | {\r | |
2860 | if (key_repetition_len < 0xFFFF) // avoid overflow of counter\r | |
2861 | {\r | |
2862 | key_repetition_len++;\r | |
08f2dd9d | 2863 | \r |
2864 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 2865 | if (denon_repetition_len < 0xFFFF) // avoid overflow of counter\r |
2866 | {\r | |
2867 | denon_repetition_len++;\r | |
775fabfa | 2868 | \r |
df24bb50 | 2869 | if (denon_repetition_len >= DENON_AUTO_REPETITION_PAUSE_LEN && last_irmp_denon_command != 0)\r |
2870 | {\r | |
645fbc69 | 2871 | #ifdef ANALYZE\r |
df24bb50 | 2872 | ANALYZE_PRINTF ("%8.3fms warning: did not receive inverted command repetition\n",\r |
2873 | (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
66f8fd93 | 2874 | #endif // ANALYZE\r |
df24bb50 | 2875 | last_irmp_denon_command = 0;\r |
2876 | denon_repetition_len = 0xFFFF;\r | |
2877 | }\r | |
2878 | }\r | |
08f2dd9d | 2879 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
df24bb50 | 2880 | }\r |
2881 | }\r | |
2882 | }\r | |
2883 | }\r | |
2884 | else\r | |
2885 | {\r | |
2886 | if (wait_for_start_space) // we have received start bit...\r | |
2887 | { // ...and are counting the time of darkness\r | |
2888 | if (irmp_input) // still dark?\r | |
2889 | { // yes\r | |
2890 | irmp_pause_time++; // increment counter\r | |
4225a882 | 2891 | \r |
9405f84a | 2892 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
df24bb50 | 2893 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) ||\r |
2894 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN)\r | |
9405f84a | 2895 | #else\r |
df24bb50 | 2896 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
9405f84a | 2897 | #endif\r |
df24bb50 | 2898 | { // yes...\r |
c7a47e89 | 2899 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2900 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below!\r |
2901 | {\r | |
2902 | ;\r | |
2903 | }\r | |
2904 | else\r | |
c7a47e89 | 2905 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2906 | {\r |
645fbc69 | 2907 | #ifdef ANALYZE\r |
df24bb50 | 2908 | ANALYZE_PRINTF ("%8.3fms error 1: pause after start bit pulse %d too long: %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
2909 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1082ecf2 | 2910 | #endif // ANALYZE\r |
df24bb50 | 2911 | }\r |
1082ecf2 | 2912 | \r |
df24bb50 | 2913 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit\r |
2914 | irmp_pulse_time = 0;\r | |
2915 | irmp_pause_time = 0;\r | |
2916 | }\r | |
2917 | }\r | |
2918 | else\r | |
2919 | { // receiving first data pulse!\r | |
2920 | IRMP_PARAMETER * irmp_param_p;\r | |
2921 | irmp_param_p = (IRMP_PARAMETER *) 0;\r | |
46dd89b7 | 2922 | \r |
6f750020 | 2923 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 2924 | irmp_param2.protocol = 0;\r |
6f750020 | 2925 | #endif\r |
2926 | \r | |
645fbc69 | 2927 | #ifdef ANALYZE\r |
df24bb50 | 2928 | ANALYZE_PRINTF ("%8.3fms [start-bit: pulse = %2d, pause = %2d]\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 2929 | #endif // ANALYZE\r |
4225a882 | 2930 | \r |
2931 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 2932 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX &&\r |
2933 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX)\r | |
2934 | { // it's SIRCS\r | |
645fbc69 | 2935 | #ifdef ANALYZE\r |
df24bb50 | 2936 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2937 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX,\r | |
2938 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2939 | #endif // ANALYZE\r |
df24bb50 | 2940 | irmp_param_p = (IRMP_PARAMETER *) &sircs_param;\r |
2941 | }\r | |
2942 | else\r | |
4225a882 | 2943 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r |
2944 | \r | |
770a1a9d | 2945 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2946 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r |
2947 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX &&\r | |
2948 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2949 | {\r | |
2950 | #ifdef ANALYZE\r | |
2951 | ANALYZE_PRINTF ("protocol = NEC or JVC (type 1) repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2952 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX,\r | |
2953 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
2954 | #endif // ANALYZE\r | |
2955 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
2956 | }\r | |
2957 | else\r | |
770a1a9d | 2958 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2959 | \r | |
4225a882 | 2960 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 2961 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r |
2962 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r | |
2963 | {\r | |
35213800 | 2964 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
645fbc69 | 2965 | #ifdef ANALYZE\r |
df24bb50 | 2966 | ANALYZE_PRINTF ("protocol = NEC42, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2967 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2968 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2969 | #endif // ANALYZE\r |
df24bb50 | 2970 | irmp_param_p = (IRMP_PARAMETER *) &nec42_param;\r |
35213800 | 2971 | #else\r |
645fbc69 | 2972 | #ifdef ANALYZE\r |
df24bb50 | 2973 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2974 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2975 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2976 | #endif // ANALYZE\r |
df24bb50 | 2977 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
35213800 | 2978 | #endif\r |
df24bb50 | 2979 | }\r |
2980 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2981 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2982 | { // it's NEC\r | |
93ba2e01 | 2983 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2984 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // last protocol was JVC, awaiting repeat frame\r |
2985 | { // some jvc remote controls use nec repetition frame for jvc repetition frame\r | |
645fbc69 | 2986 | #ifdef ANALYZE\r |
df24bb50 | 2987 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 2, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2988 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2989 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2990 | #endif // ANALYZE\r |
df24bb50 | 2991 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
2992 | }\r | |
2993 | else\r | |
93ba2e01 | 2994 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2995 | {\r |
645fbc69 | 2996 | #ifdef ANALYZE\r |
df24bb50 | 2997 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2998 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2999 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3000 | #endif // ANALYZE\r |
46dd89b7 | 3001 | \r |
df24bb50 | 3002 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param;\r |
3003 | }\r | |
3004 | }\r | |
3005 | else\r | |
93ba2e01 | 3006 | \r |
3007 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
df24bb50 | 3008 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r |
3009 | irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
3010 | irmp_pause_time >= NEC_0_PAUSE_LEN_MIN && irmp_pause_time <= NEC_0_PAUSE_LEN_MAX)\r | |
3011 | { // it's JVC repetition type 3\r | |
3012 | #ifdef ANALYZE\r | |
3013 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 3, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3014 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
3015 | NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX);\r | |
3016 | #endif // ANALYZE\r | |
3017 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
3018 | }\r | |
3019 | else\r | |
93ba2e01 | 3020 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
3021 | \r | |
4225a882 | 3022 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
3023 | \r | |
b85cb27d | 3024 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
df24bb50 | 3025 | if (irmp_pulse_time >= TELEFUNKEN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= TELEFUNKEN_START_BIT_PULSE_LEN_MAX &&\r |
3026 | irmp_pause_time >= TELEFUNKEN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= TELEFUNKEN_START_BIT_PAUSE_LEN_MAX)\r | |
3027 | {\r | |
645fbc69 | 3028 | #ifdef ANALYZE\r |
df24bb50 | 3029 | ANALYZE_PRINTF ("protocol = TELEFUNKEN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3030 | TELEFUNKEN_START_BIT_PULSE_LEN_MIN, TELEFUNKEN_START_BIT_PULSE_LEN_MAX,\r | |
3031 | TELEFUNKEN_START_BIT_PAUSE_LEN_MIN, TELEFUNKEN_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3032 | #endif // ANALYZE\r |
df24bb50 | 3033 | irmp_param_p = (IRMP_PARAMETER *) &telefunken_param;\r |
3034 | }\r | |
3035 | else\r | |
b85cb27d | 3036 | #endif // IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
3037 | \r | |
40ca4604 | 3038 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
df24bb50 | 3039 | if (irmp_pulse_time >= ROOMBA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_START_BIT_PULSE_LEN_MAX &&\r |
3040 | irmp_pause_time >= ROOMBA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ROOMBA_START_BIT_PAUSE_LEN_MAX)\r | |
3041 | {\r | |
645fbc69 | 3042 | #ifdef ANALYZE\r |
df24bb50 | 3043 | ANALYZE_PRINTF ("protocol = ROOMBA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3044 | ROOMBA_START_BIT_PULSE_LEN_MIN, ROOMBA_START_BIT_PULSE_LEN_MAX,\r | |
3045 | ROOMBA_START_BIT_PAUSE_LEN_MIN, ROOMBA_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3046 | #endif // ANALYZE\r |
df24bb50 | 3047 | irmp_param_p = (IRMP_PARAMETER *) &roomba_param;\r |
3048 | }\r | |
3049 | else\r | |
40ca4604 | 3050 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
3051 | \r | |
43c535be | 3052 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
df24bb50 | 3053 | if (irmp_pulse_time >= ACP24_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ACP24_START_BIT_PULSE_LEN_MAX &&\r |
3054 | irmp_pause_time >= ACP24_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ACP24_START_BIT_PAUSE_LEN_MAX)\r | |
3055 | {\r | |
43c535be | 3056 | #ifdef ANALYZE\r |
df24bb50 | 3057 | ANALYZE_PRINTF ("protocol = ACP24, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3058 | ACP24_START_BIT_PULSE_LEN_MIN, ACP24_START_BIT_PULSE_LEN_MAX,\r | |
3059 | ACP24_START_BIT_PAUSE_LEN_MIN, ACP24_START_BIT_PAUSE_LEN_MAX);\r | |
43c535be | 3060 | #endif // ANALYZE\r |
df24bb50 | 3061 | irmp_param_p = (IRMP_PARAMETER *) &acp24_param;\r |
3062 | }\r | |
3063 | else\r | |
43c535be | 3064 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
3065 | \r | |
003c1008 | 3066 | #if IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
df24bb50 | 3067 | if (irmp_pulse_time >= PENTAX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= PENTAX_START_BIT_PULSE_LEN_MAX &&\r |
3068 | irmp_pause_time >= PENTAX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= PENTAX_START_BIT_PAUSE_LEN_MAX)\r | |
3069 | {\r | |
003c1008 | 3070 | #ifdef ANALYZE\r |
df24bb50 | 3071 | ANALYZE_PRINTF ("protocol = PENTAX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3072 | PENTAX_START_BIT_PULSE_LEN_MIN, PENTAX_START_BIT_PULSE_LEN_MAX,\r | |
3073 | PENTAX_START_BIT_PAUSE_LEN_MIN, PENTAX_START_BIT_PAUSE_LEN_MAX);\r | |
003c1008 | 3074 | #endif // ANALYZE\r |
df24bb50 | 3075 | irmp_param_p = (IRMP_PARAMETER *) &pentax_param;\r |
3076 | }\r | |
3077 | else\r | |
003c1008 | 3078 | #endif // IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
3079 | \r | |
9405f84a | 3080 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
df24bb50 | 3081 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX &&\r |
3082 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX)\r | |
3083 | {\r | |
645fbc69 | 3084 | #ifdef ANALYZE\r |
df24bb50 | 3085 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3086 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX,\r | |
3087 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3088 | #endif // ANALYZE\r |
df24bb50 | 3089 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param;\r |
3090 | }\r | |
3091 | else\r | |
9405f84a | 3092 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
3093 | \r | |
4225a882 | 3094 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 3095 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX &&\r |
3096 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
3097 | { // it's SAMSUNG\r | |
645fbc69 | 3098 | #ifdef ANALYZE\r |
df24bb50 | 3099 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3100 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX,\r | |
3101 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3102 | #endif // ANALYZE\r |
df24bb50 | 3103 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param;\r |
3104 | }\r | |
3105 | else\r | |
4225a882 | 3106 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3107 | \r | |
30d1689d | 3108 | #if IRMP_SUPPORT_SAMSUNGAH_PROTOCOL == 1\r |
3109 | if (irmp_pulse_time >= SAMSUNGAH_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNGAH_START_BIT_PULSE_LEN_MAX &&\r | |
3110 | irmp_pause_time >= SAMSUNGAH_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNGAH_START_BIT_PAUSE_LEN_MAX)\r | |
3111 | { // it's SAMSUNGAH\r | |
3112 | #ifdef ANALYZE\r | |
3113 | ANALYZE_PRINTF ("protocol = SAMSUNGAH, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3114 | SAMSUNGAH_START_BIT_PULSE_LEN_MIN, SAMSUNGAH_START_BIT_PULSE_LEN_MAX,\r | |
3115 | SAMSUNGAH_START_BIT_PAUSE_LEN_MIN, SAMSUNGAH_START_BIT_PAUSE_LEN_MAX);\r | |
3116 | #endif // ANALYZE\r | |
3117 | irmp_param_p = (IRMP_PARAMETER *) &samsungah_param;\r | |
3118 | }\r | |
3119 | else\r | |
3120 | #endif // IRMP_SUPPORT_SAMSUNGAH_PROTOCOL == 1\r | |
3121 | \r | |
4225a882 | 3122 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
df24bb50 | 3123 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX &&\r |
3124 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX)\r | |
3125 | { // it's MATSUSHITA\r | |
645fbc69 | 3126 | #ifdef ANALYZE\r |
df24bb50 | 3127 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3128 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX,\r | |
3129 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3130 | #endif // ANALYZE\r |
df24bb50 | 3131 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param;\r |
3132 | }\r | |
3133 | else\r | |
4225a882 | 3134 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
3135 | \r | |
3136 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
df24bb50 | 3137 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX &&\r |
3138 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX)\r | |
3139 | { // it's KASEIKYO\r | |
645fbc69 | 3140 | #ifdef ANALYZE\r |
df24bb50 | 3141 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3142 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX,\r | |
3143 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3144 | #endif // ANALYZE\r |
df24bb50 | 3145 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param;\r |
3146 | }\r | |
3147 | else\r | |
4225a882 | 3148 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
3149 | \r | |
95b27043 | 3150 | #if IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
df24bb50 | 3151 | if (irmp_pulse_time >= PANASONIC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= PANASONIC_START_BIT_PULSE_LEN_MAX &&\r |
3152 | irmp_pause_time >= PANASONIC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= PANASONIC_START_BIT_PAUSE_LEN_MAX)\r | |
3153 | { // it's PANASONIC\r | |
95b27043 | 3154 | #ifdef ANALYZE\r |
df24bb50 | 3155 | ANALYZE_PRINTF ("protocol = PANASONIC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3156 | PANASONIC_START_BIT_PULSE_LEN_MIN, PANASONIC_START_BIT_PULSE_LEN_MAX,\r | |
3157 | PANASONIC_START_BIT_PAUSE_LEN_MIN, PANASONIC_START_BIT_PAUSE_LEN_MAX);\r | |
95b27043 | 3158 | #endif // ANALYZE\r |
df24bb50 | 3159 | irmp_param_p = (IRMP_PARAMETER *) &panasonic_param;\r |
3160 | }\r | |
3161 | else\r | |
95b27043 | 3162 | #endif // IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
3163 | \r | |
7365350c | 3164 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
3165 | if (irmp_pulse_time >= MITSU_HEAVY_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MITSU_HEAVY_START_BIT_PULSE_LEN_MAX &&\r | |
3166 | irmp_pause_time >= MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX)\r | |
3167 | { // it's MITSU_HEAVY\r | |
3168 | #ifdef ANALYZE\r | |
3169 | ANALYZE_PRINTF ("protocol = MITSU_HEAVY, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3170 | MITSU_HEAVY_START_BIT_PULSE_LEN_MIN, MITSU_HEAVY_START_BIT_PULSE_LEN_MAX,\r | |
3171 | MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN, MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX);\r | |
3172 | #endif // ANALYZE\r | |
3173 | irmp_param_p = (IRMP_PARAMETER *) &mitsu_heavy_param;\r | |
3174 | }\r | |
3175 | else\r | |
3176 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r | |
3177 | \r | |
4bcf310e | 3178 | #if IRMP_SUPPORT_VINCENT_PROTOCOL == 1\r |
3179 | if (irmp_pulse_time >= VINCENT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= VINCENT_START_BIT_PULSE_LEN_MAX &&\r | |
3180 | irmp_pause_time >= VINCENT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= VINCENT_START_BIT_PAUSE_LEN_MAX)\r | |
3181 | { // it's VINCENT\r | |
3182 | #ifdef ANALYZE\r | |
3183 | ANALYZE_PRINTF ("protocol = VINCENT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3184 | VINCENT_START_BIT_PULSE_LEN_MIN, VINCENT_START_BIT_PULSE_LEN_MAX,\r | |
3185 | VINCENT_START_BIT_PAUSE_LEN_MIN, VINCENT_START_BIT_PAUSE_LEN_MAX);\r | |
3186 | #endif // ANALYZE\r | |
3187 | irmp_param_p = (IRMP_PARAMETER *) &vincent_param;\r | |
3188 | }\r | |
3189 | else\r | |
3190 | #endif // IRMP_SUPPORT_VINCENT_PROTOCOL == 1\r | |
3191 | \r | |
faf6479d | 3192 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r |
df24bb50 | 3193 | if (irmp_pulse_time >= RADIO1_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RADIO1_START_BIT_PULSE_LEN_MAX &&\r |
3194 | irmp_pause_time >= RADIO1_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RADIO1_START_BIT_PAUSE_LEN_MAX)\r | |
3195 | {\r | |
645fbc69 | 3196 | #ifdef ANALYZE\r |
df24bb50 | 3197 | ANALYZE_PRINTF ("protocol = RADIO1, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3198 | RADIO1_START_BIT_PULSE_LEN_MIN, RADIO1_START_BIT_PULSE_LEN_MAX,\r | |
3199 | RADIO1_START_BIT_PAUSE_LEN_MIN, RADIO1_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3200 | #endif // ANALYZE\r |
df24bb50 | 3201 | irmp_param_p = (IRMP_PARAMETER *) &radio1_param;\r |
3202 | }\r | |
3203 | else\r | |
faf6479d | 3204 | #endif // IRMP_SUPPORT_RRADIO1_PROTOCOL == 1\r |
3205 | \r | |
4225a882 | 3206 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
df24bb50 | 3207 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX &&\r |
3208 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX)\r | |
3209 | { // it's RECS80\r | |
645fbc69 | 3210 | #ifdef ANALYZE\r |
df24bb50 | 3211 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3212 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX,\r | |
3213 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3214 | #endif // ANALYZE\r |
df24bb50 | 3215 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param;\r |
3216 | }\r | |
3217 | else\r | |
4225a882 | 3218 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
3219 | \r | |
c2b70f0b | 3220 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 3221 | if (((irmp_pulse_time >= S100_START_BIT_LEN_MIN && irmp_pulse_time <= S100_START_BIT_LEN_MAX) ||\r |
3222 | (irmp_pulse_time >= 2 * S100_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * S100_START_BIT_LEN_MAX)) &&\r | |
3223 | ((irmp_pause_time >= S100_START_BIT_LEN_MIN && irmp_pause_time <= S100_START_BIT_LEN_MAX) ||\r | |
3224 | (irmp_pause_time >= 2 * S100_START_BIT_LEN_MIN && irmp_pause_time <= 2 * S100_START_BIT_LEN_MAX)))\r | |
3225 | { // it's S100\r | |
3226 | #ifdef ANALYZE\r | |
3227 | ANALYZE_PRINTF ("protocol = S100, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3228 | S100_START_BIT_LEN_MIN, S100_START_BIT_LEN_MAX,\r | |
3229 | 2 * S100_START_BIT_LEN_MIN, 2 * S100_START_BIT_LEN_MAX,\r | |
3230 | S100_START_BIT_LEN_MIN, S100_START_BIT_LEN_MAX,\r | |
3231 | 2 * S100_START_BIT_LEN_MIN, 2 * S100_START_BIT_LEN_MAX);\r | |
3232 | #endif // ANALYZE\r | |
3233 | \r | |
3234 | irmp_param_p = (IRMP_PARAMETER *) &s100_param;\r | |
3235 | last_pause = irmp_pause_time;\r | |
3236 | \r | |
3237 | if ((irmp_pulse_time > S100_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * S100_START_BIT_LEN_MAX) ||\r | |
3238 | (irmp_pause_time > S100_START_BIT_LEN_MAX && irmp_pause_time <= 2 * S100_START_BIT_LEN_MAX))\r | |
3239 | {\r | |
3240 | last_value = 0;\r | |
3241 | rc5_cmd_bit6 = 1<<6;\r | |
3242 | }\r | |
3243 | else\r | |
3244 | {\r | |
3245 | last_value = 1;\r | |
3246 | }\r | |
3247 | }\r | |
3248 | else\r | |
c2b70f0b | 3249 | #endif // IRMP_SUPPORT_S100_PROTOCOL == 1\r |
3250 | \r | |
4225a882 | 3251 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
df24bb50 | 3252 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) ||\r |
3253 | (irmp_pulse_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX)) &&\r | |
3254 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) ||\r | |
3255 | (irmp_pause_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX)))\r | |
3256 | { // it's RC5\r | |
6f750020 | 3257 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 3258 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r |
3259 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
3260 | {\r | |
3261 | #ifdef ANALYZE\r | |
3262 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n");\r | |
3263 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3264 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
3265 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
3266 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3267 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3268 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
3269 | #endif // ANALYZE\r | |
3270 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER));\r | |
3271 | }\r | |
3272 | else\r | |
6f750020 | 3273 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 3274 | \r |
6f750020 | 3275 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3276 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r |
3277 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
3278 | {\r | |
3279 | #ifdef ANALYZE\r | |
3280 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n");\r | |
3281 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3282 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
3283 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
3284 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3285 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3286 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
3287 | #endif // ANALYZE\r | |
3288 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER));\r | |
3289 | }\r | |
3290 | else\r | |
6f750020 | 3291 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3292 | {\r |
3293 | #ifdef ANALYZE\r | |
3294 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3295 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3296 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX,\r | |
3297 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3298 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX);\r | |
3299 | #endif // ANALYZE\r | |
3300 | }\r | |
3301 | \r | |
3302 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param;\r | |
3303 | last_pause = irmp_pause_time;\r | |
3304 | \r | |
3305 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX) ||\r | |
3306 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX))\r | |
3307 | {\r | |
3308 | last_value = 0;\r | |
3309 | rc5_cmd_bit6 = 1<<6;\r | |
3310 | }\r | |
3311 | else\r | |
3312 | {\r | |
3313 | last_value = 1;\r | |
3314 | }\r | |
3315 | }\r | |
3316 | else\r | |
4225a882 | 3317 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
3318 | \r | |
3319 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 3320 | if ( (irmp_pulse_time >= DENON_PULSE_LEN_MIN && irmp_pulse_time <= DENON_PULSE_LEN_MAX) &&\r |
3321 | ((irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX) ||\r | |
3322 | (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)))\r | |
3323 | { // it's DENON\r | |
3324 | #ifdef ANALYZE\r | |
3325 | ANALYZE_PRINTF ("protocol = DENON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3326 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r | |
3327 | DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX,\r | |
3328 | DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX);\r | |
3329 | #endif // ANALYZE\r | |
3330 | irmp_param_p = (IRMP_PARAMETER *) &denon_param;\r | |
3331 | }\r | |
3332 | else\r | |
4225a882 | 3333 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
3334 | \r | |
beda975f | 3335 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3336 | if ( (irmp_pulse_time >= THOMSON_PULSE_LEN_MIN && irmp_pulse_time <= THOMSON_PULSE_LEN_MAX) &&\r |
3337 | ((irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX) ||\r | |
3338 | (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)))\r | |
3339 | { // it's THOMSON\r | |
3340 | #ifdef ANALYZE\r | |
3341 | ANALYZE_PRINTF ("protocol = THOMSON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3342 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX,\r | |
3343 | THOMSON_1_PAUSE_LEN_MIN, THOMSON_1_PAUSE_LEN_MAX,\r | |
3344 | THOMSON_0_PAUSE_LEN_MIN, THOMSON_0_PAUSE_LEN_MAX);\r | |
3345 | #endif // ANALYZE\r | |
3346 | irmp_param_p = (IRMP_PARAMETER *) &thomson_param;\r | |
3347 | }\r | |
3348 | else\r | |
beda975f | 3349 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
3350 | \r | |
3a7e26e1 | 3351 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
df24bb50 | 3352 | if (irmp_pulse_time >= BOSE_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= BOSE_START_BIT_PULSE_LEN_MAX &&\r |
3353 | irmp_pause_time >= BOSE_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BOSE_START_BIT_PAUSE_LEN_MAX)\r | |
3354 | {\r | |
645fbc69 | 3355 | #ifdef ANALYZE\r |
df24bb50 | 3356 | ANALYZE_PRINTF ("protocol = BOSE, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3357 | BOSE_START_BIT_PULSE_LEN_MIN, BOSE_START_BIT_PULSE_LEN_MAX,\r | |
3358 | BOSE_START_BIT_PAUSE_LEN_MIN, BOSE_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3359 | #endif // ANALYZE\r |
df24bb50 | 3360 | irmp_param_p = (IRMP_PARAMETER *) &bose_param;\r |
3361 | }\r | |
3362 | else\r | |
3a7e26e1 | 3363 | #endif // IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
3364 | \r | |
4225a882 | 3365 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 3366 | if (irmp_pulse_time >= RC6_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RC6_START_BIT_PULSE_LEN_MAX &&\r |
3367 | irmp_pause_time >= RC6_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RC6_START_BIT_PAUSE_LEN_MAX)\r | |
3368 | { // it's RC6\r | |
3369 | #ifdef ANALYZE\r | |
3370 | ANALYZE_PRINTF ("protocol = RC6, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3371 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX,\r | |
3372 | RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX);\r | |
3373 | #endif // ANALYZE\r | |
3374 | irmp_param_p = (IRMP_PARAMETER *) &rc6_param;\r | |
3375 | last_pause = 0;\r | |
3376 | last_value = 1;\r | |
3377 | }\r | |
3378 | else\r | |
4225a882 | 3379 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
3380 | \r | |
3381 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
df24bb50 | 3382 | if (irmp_pulse_time >= RECS80EXT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80EXT_START_BIT_PULSE_LEN_MAX &&\r |
3383 | irmp_pause_time >= RECS80EXT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80EXT_START_BIT_PAUSE_LEN_MAX)\r | |
3384 | { // it's RECS80EXT\r | |
645fbc69 | 3385 | #ifdef ANALYZE\r |
df24bb50 | 3386 | ANALYZE_PRINTF ("protocol = RECS80EXT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3387 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX,\r | |
3388 | RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3389 | #endif // ANALYZE\r |
df24bb50 | 3390 | irmp_param_p = (IRMP_PARAMETER *) &recs80ext_param;\r |
3391 | }\r | |
3392 | else\r | |
4225a882 | 3393 | #endif // IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r |
3394 | \r | |
3395 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
df24bb50 | 3396 | if (irmp_pulse_time >= NUBERT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NUBERT_START_BIT_PULSE_LEN_MAX &&\r |
3397 | irmp_pause_time >= NUBERT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NUBERT_START_BIT_PAUSE_LEN_MAX)\r | |
3398 | { // it's NUBERT\r | |
645fbc69 | 3399 | #ifdef ANALYZE\r |
df24bb50 | 3400 | ANALYZE_PRINTF ("protocol = NUBERT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3401 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX,\r | |
3402 | NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3403 | #endif // ANALYZE\r |
df24bb50 | 3404 | irmp_param_p = (IRMP_PARAMETER *) &nubert_param;\r |
3405 | }\r | |
3406 | else\r | |
4225a882 | 3407 | #endif // IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
3408 | \r | |
0715cf5e | 3409 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
df24bb50 | 3410 | if (irmp_pulse_time >= FAN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FAN_START_BIT_PULSE_LEN_MAX &&\r |
3411 | irmp_pause_time >= FAN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FAN_START_BIT_PAUSE_LEN_MAX)\r | |
3412 | { // it's FAN\r | |
0715cf5e | 3413 | #ifdef ANALYZE\r |
df24bb50 | 3414 | ANALYZE_PRINTF ("protocol = FAN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3415 | FAN_START_BIT_PULSE_LEN_MIN, FAN_START_BIT_PULSE_LEN_MAX,\r | |
3416 | FAN_START_BIT_PAUSE_LEN_MIN, FAN_START_BIT_PAUSE_LEN_MAX);\r | |
0715cf5e | 3417 | #endif // ANALYZE\r |
df24bb50 | 3418 | irmp_param_p = (IRMP_PARAMETER *) &fan_param;\r |
3419 | }\r | |
3420 | else\r | |
0715cf5e | 3421 | #endif // IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
3422 | \r | |
0a2f634b | 3423 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
df24bb50 | 3424 | if (irmp_pulse_time >= SPEAKER_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SPEAKER_START_BIT_PULSE_LEN_MAX &&\r |
3425 | irmp_pause_time >= SPEAKER_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SPEAKER_START_BIT_PAUSE_LEN_MAX)\r | |
3426 | { // it's SPEAKER\r | |
645fbc69 | 3427 | #ifdef ANALYZE\r |
df24bb50 | 3428 | ANALYZE_PRINTF ("protocol = SPEAKER, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3429 | SPEAKER_START_BIT_PULSE_LEN_MIN, SPEAKER_START_BIT_PULSE_LEN_MAX,\r | |
3430 | SPEAKER_START_BIT_PAUSE_LEN_MIN, SPEAKER_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3431 | #endif // ANALYZE\r |
df24bb50 | 3432 | irmp_param_p = (IRMP_PARAMETER *) &speaker_param;\r |
3433 | }\r | |
3434 | else\r | |
0a2f634b | 3435 | #endif // IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
3436 | \r | |
504d9df9 | 3437 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 3438 | if (irmp_pulse_time >= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX &&\r |
3439 | irmp_pause_time >= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX)\r | |
3440 | { // it's BANG_OLUFSEN\r | |
3441 | #ifdef ANALYZE\r | |
3442 | ANALYZE_PRINTF ("protocol = BANG_OLUFSEN\n");\r | |
3443 | ANALYZE_PRINTF ("start bit 1 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3444 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r | |
3445 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
3446 | ANALYZE_PRINTF ("start bit 2 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3447 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r | |
3448 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
3449 | ANALYZE_PRINTF ("start bit 3 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3450 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r | |
3451 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
3452 | ANALYZE_PRINTF ("start bit 4 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3453 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r | |
3454 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
3455 | #endif // ANALYZE\r | |
3456 | irmp_param_p = (IRMP_PARAMETER *) &bang_olufsen_param;\r | |
3457 | last_value = 0;\r | |
3458 | }\r | |
3459 | else\r | |
504d9df9 | 3460 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
3461 | \r | |
89e8cafb | 3462 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
df24bb50 | 3463 | if (irmp_pulse_time >= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN && irmp_pulse_time <= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX &&\r |
3464 | irmp_pause_time >= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN && irmp_pause_time <= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX)\r | |
3465 | { // it's GRUNDIG\r | |
3466 | #ifdef ANALYZE\r | |
3467 | ANALYZE_PRINTF ("protocol = GRUNDIG, pre bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3468 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r | |
3469 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX);\r | |
3470 | #endif // ANALYZE\r | |
3471 | irmp_param_p = (IRMP_PARAMETER *) &grundig_param;\r | |
3472 | last_pause = irmp_pause_time;\r | |
3473 | last_value = 1;\r | |
3474 | }\r | |
3475 | else\r | |
89e8cafb | 3476 | #endif // IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
592411d1 | 3477 | \r |
0715cf5e | 3478 | #if IRMP_SUPPORT_MERLIN_PROTOCOL == 1 // check MERLIN before RUWIDO!\r |
df24bb50 | 3479 | if (irmp_pulse_time >= MERLIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MERLIN_START_BIT_PULSE_LEN_MAX &&\r |
3480 | irmp_pause_time >= MERLIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MERLIN_START_BIT_PAUSE_LEN_MAX)\r | |
3481 | { // it's MERLIN\r | |
3482 | #ifdef ANALYZE\r | |
3483 | ANALYZE_PRINTF ("protocol = MERLIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3484 | MERLIN_START_BIT_PULSE_LEN_MIN, MERLIN_START_BIT_PULSE_LEN_MAX,\r | |
3485 | MERLIN_START_BIT_PAUSE_LEN_MIN, MERLIN_START_BIT_PAUSE_LEN_MAX);\r | |
3486 | #endif // ANALYZE\r | |
3487 | irmp_param_p = (IRMP_PARAMETER *) &merlin_param;\r | |
3488 | last_pause = 0;\r | |
3489 | last_value = 1;\r | |
3490 | }\r | |
3491 | else\r | |
0715cf5e | 3492 | #endif // IRMP_SUPPORT_MERLIN_PROTOCOL == 1\r |
3493 | \r | |
12948cf3 | 3494 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 3495 | if (((irmp_pulse_time >= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX) ||\r |
3496 | (irmp_pulse_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX)) &&\r | |
3497 | ((irmp_pause_time >= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX) ||\r | |
3498 | (irmp_pause_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX)))\r | |
3499 | { // it's RUWIDO or SIEMENS\r | |
3500 | #ifdef ANALYZE\r | |
3501 | ANALYZE_PRINTF ("protocol = RUWIDO, start bit timings: pulse: %3d - %3d or %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3502 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3503 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3504 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r | |
3505 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX);\r | |
3506 | #endif // ANALYZE\r | |
3507 | irmp_param_p = (IRMP_PARAMETER *) &ruwido_param;\r | |
3508 | last_pause = irmp_pause_time;\r | |
3509 | last_value = 1;\r | |
3510 | }\r | |
3511 | else\r | |
12948cf3 | 3512 | #endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
3513 | \r | |
48664931 | 3514 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 3515 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r |
3516 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
3517 | {\r | |
645fbc69 | 3518 | #ifdef ANALYZE\r |
df24bb50 | 3519 | ANALYZE_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3520 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
3521 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3522 | #endif // ANALYZE\r |
df24bb50 | 3523 | irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r |
3524 | }\r | |
3525 | else\r | |
48664931 | 3526 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 3527 | \r |
9e16d699 | 3528 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3529 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r |
3530 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
3531 | {\r | |
645fbc69 | 3532 | #ifdef ANALYZE\r |
df24bb50 | 3533 | ANALYZE_PRINTF ("protocol = RCCAR, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3534 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
3535 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3536 | #endif // ANALYZE\r |
df24bb50 | 3537 | irmp_param_p = (IRMP_PARAMETER *) &rccar_param;\r |
3538 | }\r | |
3539 | else\r | |
9e16d699 | 3540 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
89e8cafb | 3541 | \r |
111d6191 | 3542 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
df24bb50 | 3543 | if (irmp_pulse_time >= KATHREIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_START_BIT_PULSE_LEN_MAX &&\r |
3544 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)\r | |
3545 | { // it's KATHREIN\r | |
645fbc69 | 3546 | #ifdef ANALYZE\r |
df24bb50 | 3547 | ANALYZE_PRINTF ("protocol = KATHREIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3548 | KATHREIN_START_BIT_PULSE_LEN_MIN, KATHREIN_START_BIT_PULSE_LEN_MAX,\r | |
3549 | KATHREIN_START_BIT_PAUSE_LEN_MIN, KATHREIN_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3550 | #endif // ANALYZE\r |
df24bb50 | 3551 | irmp_param_p = (IRMP_PARAMETER *) &kathrein_param;\r |
3552 | }\r | |
3553 | else\r | |
111d6191 | 3554 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
3555 | \r | |
deba2a0a | 3556 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
df24bb50 | 3557 | if (irmp_pulse_time >= NETBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NETBOX_START_BIT_PULSE_LEN_MAX &&\r |
3558 | irmp_pause_time >= NETBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NETBOX_START_BIT_PAUSE_LEN_MAX)\r | |
3559 | { // it's NETBOX\r | |
645fbc69 | 3560 | #ifdef ANALYZE\r |
df24bb50 | 3561 | ANALYZE_PRINTF ("protocol = NETBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3562 | NETBOX_START_BIT_PULSE_LEN_MIN, NETBOX_START_BIT_PULSE_LEN_MAX,\r | |
3563 | NETBOX_START_BIT_PAUSE_LEN_MIN, NETBOX_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3564 | #endif // ANALYZE\r |
df24bb50 | 3565 | irmp_param_p = (IRMP_PARAMETER *) &netbox_param;\r |
3566 | }\r | |
3567 | else\r | |
deba2a0a | 3568 | #endif // IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
3569 | \r | |
f50e01e7 | 3570 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
df24bb50 | 3571 | if (irmp_pulse_time >= LEGO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= LEGO_START_BIT_PULSE_LEN_MAX &&\r |
3572 | irmp_pause_time >= LEGO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= LEGO_START_BIT_PAUSE_LEN_MAX)\r | |
3573 | {\r | |
645fbc69 | 3574 | #ifdef ANALYZE\r |
df24bb50 | 3575 | ANALYZE_PRINTF ("protocol = LEGO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3576 | LEGO_START_BIT_PULSE_LEN_MIN, LEGO_START_BIT_PULSE_LEN_MAX,\r | |
3577 | LEGO_START_BIT_PAUSE_LEN_MIN, LEGO_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3578 | #endif // ANALYZE\r |
df24bb50 | 3579 | irmp_param_p = (IRMP_PARAMETER *) &lego_param;\r |
3580 | }\r | |
3581 | else\r | |
93ba2e01 | 3582 | #endif // IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
f50e01e7 | 3583 | \r |
2fb27bfe | 3584 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
df24bb50 | 3585 | if (irmp_pulse_time >= A1TVBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= A1TVBOX_START_BIT_PULSE_LEN_MAX &&\r |
3586 | irmp_pause_time >= A1TVBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= A1TVBOX_START_BIT_PAUSE_LEN_MAX)\r | |
3587 | { // it's A1TVBOX\r | |
3588 | #ifdef ANALYZE\r | |
3589 | ANALYZE_PRINTF ("protocol = A1TVBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3590 | A1TVBOX_START_BIT_PULSE_LEN_MIN, A1TVBOX_START_BIT_PULSE_LEN_MAX,\r | |
3591 | A1TVBOX_START_BIT_PAUSE_LEN_MIN, A1TVBOX_START_BIT_PAUSE_LEN_MAX);\r | |
3592 | #endif // ANALYZE\r | |
3593 | irmp_param_p = (IRMP_PARAMETER *) &a1tvbox_param;\r | |
3594 | last_pause = 0;\r | |
3595 | last_value = 1;\r | |
3596 | }\r | |
3597 | else\r | |
b85cb27d | 3598 | #endif // IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
3599 | \r | |
3600 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
df24bb50 | 3601 | if (irmp_pulse_time >= ORTEK_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ORTEK_START_BIT_PULSE_LEN_MAX &&\r |
3602 | irmp_pause_time >= ORTEK_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ORTEK_START_BIT_PAUSE_LEN_MAX)\r | |
3603 | { // it's ORTEK (Hama)\r | |
3604 | #ifdef ANALYZE\r | |
3605 | ANALYZE_PRINTF ("protocol = ORTEK, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3606 | ORTEK_START_BIT_PULSE_LEN_MIN, ORTEK_START_BIT_PULSE_LEN_MAX,\r | |
3607 | ORTEK_START_BIT_PAUSE_LEN_MIN, ORTEK_START_BIT_PAUSE_LEN_MAX);\r | |
3608 | #endif // ANALYZE\r | |
3609 | irmp_param_p = (IRMP_PARAMETER *) &ortek_param;\r | |
3610 | last_pause = 0;\r | |
3611 | last_value = 1;\r | |
3612 | parity = 0;\r | |
3613 | }\r | |
3614 | else\r | |
cb93f9e9 | 3615 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
2fb27bfe | 3616 | \r |
cb93f9e9 | 3617 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 3618 | if (irmp_pulse_time >= RCMM32_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCMM32_START_BIT_PULSE_LEN_MAX &&\r |
3619 | irmp_pause_time >= RCMM32_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_START_BIT_PAUSE_LEN_MAX)\r | |
3620 | { // it's RCMM\r | |
645fbc69 | 3621 | #ifdef ANALYZE\r |
df24bb50 | 3622 | ANALYZE_PRINTF ("protocol = RCMM, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3623 | RCMM32_START_BIT_PULSE_LEN_MIN, RCMM32_START_BIT_PULSE_LEN_MAX,\r | |
3624 | RCMM32_START_BIT_PAUSE_LEN_MIN, RCMM32_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3625 | #endif // ANALYZE\r |
df24bb50 | 3626 | irmp_param_p = (IRMP_PARAMETER *) &rcmm_param;\r |
3627 | }\r | |
3628 | else\r | |
cb93f9e9 | 3629 | #endif // IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 3630 | {\r |
645fbc69 | 3631 | #ifdef ANALYZE\r |
df24bb50 | 3632 | ANALYZE_PRINTF ("protocol = UNKNOWN\n");\r |
1082ecf2 | 3633 | #endif // ANALYZE\r |
df24bb50 | 3634 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
3635 | }\r | |
4225a882 | 3636 | \r |
df24bb50 | 3637 | if (irmp_start_bit_detected)\r |
3638 | {\r | |
3639 | memcpy_P (&irmp_param, irmp_param_p, sizeof (IRMP_PARAMETER));\r | |
46dd89b7 | 3640 | \r |
df24bb50 | 3641 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
3642 | {\r | |
645fbc69 | 3643 | #ifdef ANALYZE\r |
df24bb50 | 3644 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max);\r |
3645 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max);\r | |
1082ecf2 | 3646 | #endif // ANALYZE\r |
df24bb50 | 3647 | }\r |
3648 | else\r | |
3649 | {\r | |
645fbc69 | 3650 | #ifdef ANALYZE\r |
df24bb50 | 3651 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max,\r |
3652 | 2 * irmp_param.pulse_1_len_min, 2 * irmp_param.pulse_1_len_max);\r | |
3653 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max,\r | |
3654 | 2 * irmp_param.pause_1_len_min, 2 * irmp_param.pause_1_len_max);\r | |
1082ecf2 | 3655 | #endif // ANALYZE\r |
df24bb50 | 3656 | }\r |
46dd89b7 | 3657 | \r |
6f750020 | 3658 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 3659 | if (irmp_param2.protocol)\r |
3660 | {\r | |
645fbc69 | 3661 | #ifdef ANALYZE\r |
df24bb50 | 3662 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param2.pulse_0_len_min, irmp_param2.pulse_0_len_max);\r |
3663 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param2.pause_0_len_min, irmp_param2.pause_0_len_max);\r | |
3664 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param2.pulse_1_len_min, irmp_param2.pulse_1_len_max);\r | |
3665 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param2.pause_1_len_min, irmp_param2.pause_1_len_max);\r | |
1082ecf2 | 3666 | #endif // ANALYZE\r |
df24bb50 | 3667 | }\r |
6f750020 | 3668 | #endif\r |
3669 | \r | |
d823e852 | 3670 | \r |
504d9df9 | 3671 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 3672 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL)\r |
3673 | {\r | |
645fbc69 | 3674 | #ifdef ANALYZE\r |
df24bb50 | 3675 | ANALYZE_PRINTF ("pulse_toggle: %3d - %3d\n", RC6_TOGGLE_BIT_LEN_MIN, RC6_TOGGLE_BIT_LEN_MAX);\r |
1082ecf2 | 3676 | #endif // ANALYZE\r |
df24bb50 | 3677 | }\r |
504d9df9 | 3678 | #endif\r |
77f488bb | 3679 | \r |
df24bb50 | 3680 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
3681 | {\r | |
645fbc69 | 3682 | #ifdef ANALYZE\r |
df24bb50 | 3683 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r |
3684 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max);\r | |
1082ecf2 | 3685 | #endif // ANALYZE\r |
df24bb50 | 3686 | }\r |
3687 | else\r | |
3688 | {\r | |
645fbc69 | 3689 | #ifdef ANALYZE\r |
df24bb50 | 3690 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max,\r |
3691 | 2 * irmp_param.pulse_0_len_min, 2 * irmp_param.pulse_0_len_max);\r | |
3692 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max,\r | |
3693 | 2 * irmp_param.pause_0_len_min, 2 * irmp_param.pause_0_len_max);\r | |
1082ecf2 | 3694 | #endif // ANALYZE\r |
df24bb50 | 3695 | }\r |
46dd89b7 | 3696 | \r |
1082ecf2 | 3697 | #ifdef ANALYZE\r |
504d9df9 | 3698 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 3699 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r |
3700 | {\r | |
3701 | ANALYZE_PRINTF ("pulse_r: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
3702 | ANALYZE_PRINTF ("pause_r: %3d - %3d\n", BANG_OLUFSEN_R_PAUSE_LEN_MIN, BANG_OLUFSEN_R_PAUSE_LEN_MAX);\r | |
3703 | }\r | |
504d9df9 | 3704 | #endif\r |
3705 | \r | |
df24bb50 | 3706 | ANALYZE_PRINTF ("command_offset: %2d\n", irmp_param.command_offset);\r |
3707 | ANALYZE_PRINTF ("command_len: %3d\n", irmp_param.command_end - irmp_param.command_offset);\r | |
3708 | ANALYZE_PRINTF ("complete_len: %3d\n", irmp_param.complete_len);\r | |
3709 | ANALYZE_PRINTF ("stop_bit: %3d\n", irmp_param.stop_bit);\r | |
48664931 | 3710 | #endif // ANALYZE\r |
df24bb50 | 3711 | }\r |
4225a882 | 3712 | \r |
df24bb50 | 3713 | irmp_bit = 0;\r |
4225a882 | 3714 | \r |
77f488bb | 3715 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3716 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
3717 | irmp_param.protocol != IRMP_RUWIDO_PROTOCOL && // Manchester, but not RUWIDO\r | |
3718 | irmp_param.protocol != IRMP_RC6_PROTOCOL) // Manchester, but not RC6\r | |
3719 | {\r | |
3720 | if (irmp_pause_time > irmp_param.pulse_1_len_max && irmp_pause_time <= 2 * irmp_param.pulse_1_len_max)\r | |
3721 | {\r | |
3722 | #ifdef ANALYZE\r | |
3723 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
3724 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r | |
3725 | ANALYZE_NEWLINE ();\r | |
3726 | #endif // ANALYZE\r | |
3727 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1);\r | |
3728 | }\r | |
3729 | else if (! last_value) // && irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
3730 | {\r | |
3731 | #ifdef ANALYZE\r | |
3732 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
3733 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r | |
3734 | ANALYZE_NEWLINE ();\r | |
3735 | #endif // ANALYZE\r | |
3736 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0);\r | |
3737 | }\r | |
3738 | }\r | |
3739 | else\r | |
77f488bb | 3740 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
a7054daf | 3741 | \r |
deba2a0a | 3742 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 3743 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r |
3744 | {\r | |
3745 | ; // do nothing\r | |
3746 | }\r | |
3747 | else\r | |
deba2a0a | 3748 | #endif // IRMP_SUPPORT_SERIAL == 1\r |
3749 | \r | |
3750 | \r | |
4225a882 | 3751 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
df24bb50 | 3752 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r |
3753 | {\r | |
645fbc69 | 3754 | #ifdef ANALYZE\r |
df24bb50 | 3755 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 3756 | #endif // ANALYZE\r |
4225a882 | 3757 | \r |
df24bb50 | 3758 | if (irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX)\r |
3759 | { // pause timings correct for "1"?\r | |
645fbc69 | 3760 | #ifdef ANALYZE\r |
df24bb50 | 3761 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
3762 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3763 | #endif // ANALYZE\r |
df24bb50 | 3764 | irmp_store_bit (1);\r |
3765 | }\r | |
3766 | else // if (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)\r | |
3767 | { // pause timings correct for "0"?\r | |
645fbc69 | 3768 | #ifdef ANALYZE\r |
df24bb50 | 3769 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
3770 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3771 | #endif // ANALYZE\r |
df24bb50 | 3772 | irmp_store_bit (0);\r |
3773 | }\r | |
3774 | }\r | |
3775 | else\r | |
4225a882 | 3776 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
beda975f | 3777 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3778 | if (irmp_param.protocol == IRMP_THOMSON_PROTOCOL)\r |
3779 | {\r | |
645fbc69 | 3780 | #ifdef ANALYZE\r |
df24bb50 | 3781 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 3782 | #endif // ANALYZE\r |
beda975f | 3783 | \r |
df24bb50 | 3784 | if (irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX)\r |
3785 | { // pause timings correct for "1"?\r | |
645fbc69 | 3786 | #ifdef ANALYZE\r |
df24bb50 | 3787 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
3788 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3789 | #endif // ANALYZE\r |
df24bb50 | 3790 | irmp_store_bit (1);\r |
3791 | }\r | |
3792 | else // if (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)\r | |
3793 | { // pause timings correct for "0"?\r | |
645fbc69 | 3794 | #ifdef ANALYZE\r |
df24bb50 | 3795 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
3796 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3797 | #endif // ANALYZE\r |
df24bb50 | 3798 | irmp_store_bit (0);\r |
3799 | }\r | |
3800 | }\r | |
3801 | else\r | |
beda975f | 3802 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3803 | {\r |
3804 | ; // else do nothing\r | |
3805 | }\r | |
3806 | \r | |
3807 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
3808 | irmp_pause_time = 0;\r | |
3809 | wait_for_start_space = 0;\r | |
3810 | }\r | |
3811 | }\r | |
3812 | else if (wait_for_space) // the data section....\r | |
3813 | { // counting the time of darkness....\r | |
3814 | uint_fast8_t got_light = FALSE;\r | |
3815 | \r | |
3816 | if (irmp_input) // still dark?\r | |
3817 | { // yes...\r | |
3818 | if (irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 1)\r | |
3819 | {\r | |
3820 | if (\r | |
a42d1ee6 | 3821 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3822 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) ||\r |
a42d1ee6 | 3823 | #endif\r |
3824 | #if IRMP_SUPPORT_SERIAL == 1\r | |
df24bb50 | 3825 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) ||\r |
a42d1ee6 | 3826 | #endif\r |
df24bb50 | 3827 | (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max))\r |
3828 | {\r | |
3829 | #ifdef ANALYZE\r | |
3830 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
3831 | {\r | |
3832 | ANALYZE_PRINTF ("stop bit detected\n");\r | |
3833 | }\r | |
3834 | #endif // ANALYZE\r | |
3835 | irmp_param.stop_bit = 0;\r | |
3836 | }\r | |
3837 | else\r | |
3838 | {\r | |
3839 | #ifdef ANALYZE\r | |
3840 | ANALYZE_PRINTF ("error: stop bit timing wrong, irmp_bit = %d, irmp_pulse_time = %d, pulse_0_len_min = %d, pulse_0_len_max = %d\n",\r | |
3841 | irmp_bit, irmp_pulse_time, irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
3842 | #endif // ANALYZE\r | |
3843 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
3844 | irmp_pulse_time = 0;\r | |
3845 | irmp_pause_time = 0;\r | |
3846 | }\r | |
3847 | }\r | |
3848 | else\r | |
3849 | {\r | |
3850 | irmp_pause_time++; // increment counter\r | |
4225a882 | 3851 | \r |
3852 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 3853 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && // Sony has a variable number of bits:\r |
3854 | irmp_pause_time > SIRCS_PAUSE_LEN_MAX && // minimum is 12\r | |
3855 | irmp_bit >= 12 - 1) // pause too long?\r | |
3856 | { // yes, break and close this frame\r | |
3857 | irmp_param.complete_len = irmp_bit + 1; // set new complete length\r | |
3858 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3859 | irmp_tmp_address |= (irmp_bit - SIRCS_MINIMUM_DATA_LEN + 1) << 8; // new: store number of additional bits in upper byte of address!\r | |
3860 | irmp_param.command_end = irmp_param.command_offset + irmp_bit + 1; // correct command length\r | |
3861 | irmp_pause_time = SIRCS_PAUSE_LEN_MAX - 1; // correct pause length\r | |
3862 | }\r | |
3863 | else\r | |
4225a882 | 3864 | #endif\r |
0715cf5e | 3865 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
df24bb50 | 3866 | if (irmp_param.protocol == IRMP_FAN_PROTOCOL && // FAN has no stop bit.\r |
3867 | irmp_bit >= FAN_COMPLETE_DATA_LEN - 1) // last bit in frame\r | |
3868 | { // yes, break and close this frame\r | |
3869 | if (irmp_pulse_time <= FAN_0_PULSE_LEN_MAX && irmp_pause_time >= FAN_0_PAUSE_LEN_MIN)\r | |
3870 | {\r | |
458a6d64 | 3871 | #ifdef ANALYZE\r |
df24bb50 | 3872 | ANALYZE_PRINTF ("Generating virtual stop bit\n");\r |
458a6d64 | 3873 | #endif // ANALYZE\r |
df24bb50 | 3874 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r |
3875 | }\r | |
3876 | else if (irmp_pulse_time >= FAN_1_PULSE_LEN_MIN && irmp_pause_time >= FAN_1_PAUSE_LEN_MIN)\r | |
3877 | {\r | |
458a6d64 | 3878 | #ifdef ANALYZE\r |
df24bb50 | 3879 | ANALYZE_PRINTF ("Generating virtual stop bit\n");\r |
458a6d64 | 3880 | #endif // ANALYZE\r |
df24bb50 | 3881 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r |
3882 | }\r | |
3883 | }\r | |
3884 | else\r | |
0715cf5e | 3885 | #endif\r |
deba2a0a | 3886 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 3887 | // NETBOX generates no stop bit, here is the timeout condition:\r |
3888 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) && irmp_param.protocol == IRMP_NETBOX_PROTOCOL &&\r | |
3889 | irmp_pause_time >= NETBOX_PULSE_LEN * (NETBOX_COMPLETE_DATA_LEN - irmp_bit))\r | |
3890 | {\r | |
3891 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3892 | }\r | |
3893 | else\r | |
deba2a0a | 3894 | #endif\r |
89e8cafb | 3895 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
df24bb50 | 3896 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && !irmp_param.stop_bit)\r |
3897 | {\r | |
3898 | if (irmp_pause_time > IR60_TIMEOUT_LEN && (irmp_bit == 5 || irmp_bit == 6))\r | |
3899 | {\r | |
3900 | #ifdef ANALYZE\r | |
3901 | ANALYZE_PRINTF ("Switching to IR60 protocol\n");\r | |
3902 | #endif // ANALYZE\r | |
3903 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3904 | irmp_param.stop_bit = TRUE; // set flag\r | |
3905 | \r | |
3906 | irmp_param.protocol = IRMP_IR60_PROTOCOL; // change protocol\r | |
3907 | irmp_param.complete_len = IR60_COMPLETE_DATA_LEN; // correct complete len\r | |
3908 | irmp_param.address_offset = IR60_ADDRESS_OFFSET;\r | |
3909 | irmp_param.address_end = IR60_ADDRESS_OFFSET + IR60_ADDRESS_LEN;\r | |
3910 | irmp_param.command_offset = IR60_COMMAND_OFFSET;\r | |
3911 | irmp_param.command_end = IR60_COMMAND_OFFSET + IR60_COMMAND_LEN;\r | |
3912 | \r | |
3913 | irmp_tmp_command <<= 1;\r | |
3914 | irmp_tmp_command |= first_bit;\r | |
3915 | }\r | |
3916 | else if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN - 2)\r | |
3917 | { // special manchester decoder\r | |
3918 | irmp_param.complete_len = GRUNDIG_COMPLETE_DATA_LEN; // correct complete len\r | |
3919 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3920 | irmp_param.stop_bit = TRUE; // set flag\r | |
3921 | }\r | |
3922 | else if (irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN)\r | |
3923 | {\r | |
3924 | #ifdef ANALYZE\r | |
3925 | ANALYZE_PRINTF ("Switching to NOKIA protocol, irmp_bit = %d\n", irmp_bit);\r | |
3926 | #endif // ANALYZE\r | |
3927 | irmp_param.protocol = IRMP_NOKIA_PROTOCOL; // change protocol\r | |
3928 | irmp_param.address_offset = NOKIA_ADDRESS_OFFSET;\r | |
3929 | irmp_param.address_end = NOKIA_ADDRESS_OFFSET + NOKIA_ADDRESS_LEN;\r | |
3930 | irmp_param.command_offset = NOKIA_COMMAND_OFFSET;\r | |
3931 | irmp_param.command_end = NOKIA_COMMAND_OFFSET + NOKIA_COMMAND_LEN;\r | |
3932 | \r | |
3933 | if (irmp_tmp_command & 0x300)\r | |
3934 | {\r | |
3935 | irmp_tmp_address = (irmp_tmp_command >> 8);\r | |
3936 | irmp_tmp_command &= 0xFF;\r | |
3937 | }\r | |
3938 | }\r | |
3939 | }\r | |
3940 | else\r | |
d155e9ab | 3941 | #endif\r |
12948cf3 | 3942 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 3943 | if (irmp_param.protocol == IRMP_RUWIDO_PROTOCOL && !irmp_param.stop_bit)\r |
3944 | {\r | |
3945 | if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= RUWIDO_COMPLETE_DATA_LEN - 2)\r | |
3946 | { // special manchester decoder\r | |
3947 | irmp_param.complete_len = RUWIDO_COMPLETE_DATA_LEN; // correct complete len\r | |
3948 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3949 | irmp_param.stop_bit = TRUE; // set flag\r | |
3950 | }\r | |
3951 | else if (irmp_bit >= RUWIDO_COMPLETE_DATA_LEN)\r | |
3952 | {\r | |
3953 | #ifdef ANALYZE\r | |
3954 | ANALYZE_PRINTF ("Switching to SIEMENS protocol\n");\r | |
3955 | #endif // ANALYZE\r | |
3956 | irmp_param.protocol = IRMP_SIEMENS_PROTOCOL; // change protocol\r | |
3957 | irmp_param.address_offset = SIEMENS_ADDRESS_OFFSET;\r | |
3958 | irmp_param.address_end = SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN;\r | |
3959 | irmp_param.command_offset = SIEMENS_COMMAND_OFFSET;\r | |
3960 | irmp_param.command_end = SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN;\r | |
3961 | \r | |
3962 | // 76543210\r | |
3963 | // RUWIDO: AAAAAAAAACCCCCCCp\r | |
3964 | // SIEMENS: AAAAAAAAAAACCCCCCCCCCp\r | |
3965 | irmp_tmp_address <<= 2;\r | |
3966 | irmp_tmp_address |= (irmp_tmp_command >> 6);\r | |
3967 | irmp_tmp_command &= 0x003F;\r | |
cb93f9e9 | 3968 | // irmp_tmp_command <<= 4;\r |
df24bb50 | 3969 | irmp_tmp_command |= last_value;\r |
3970 | }\r | |
3971 | }\r | |
3972 | else\r | |
12948cf3 | 3973 | #endif\r |
40ca4604 | 3974 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
df24bb50 | 3975 | if (irmp_param.protocol == IRMP_ROOMBA_PROTOCOL && // Roomba has no stop bit\r |
3976 | irmp_bit >= ROOMBA_COMPLETE_DATA_LEN - 1) // it's the last data bit...\r | |
3977 | { // break and close this frame\r | |
3978 | if (irmp_pulse_time >= ROOMBA_1_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_1_PULSE_LEN_MAX)\r | |
3979 | {\r | |
3980 | irmp_pause_time = ROOMBA_1_PAUSE_LEN_EXACT;\r | |
3981 | }\r | |
3982 | else if (irmp_pulse_time >= ROOMBA_0_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_0_PULSE_LEN_MAX)\r | |
3983 | {\r | |
3984 | irmp_pause_time = ROOMBA_0_PAUSE_LEN;\r | |
3985 | }\r | |
3986 | \r | |
3987 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3988 | }\r | |
3989 | else\r | |
40ca4604 | 3990 | #endif\r |
77f488bb | 3991 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3992 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
3993 | irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= irmp_param.complete_len - 2 && !irmp_param.stop_bit)\r | |
3994 | { // special manchester decoder\r | |
3995 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3996 | irmp_param.stop_bit = TRUE; // set flag\r | |
3997 | }\r | |
3998 | else\r | |
77f488bb | 3999 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 4000 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
4001 | { // yes...\r | |
4002 | if (irmp_bit == irmp_param.complete_len - 1 && irmp_param.stop_bit == 0)\r | |
4003 | {\r | |
4004 | irmp_bit++;\r | |
4005 | }\r | |
a777fd4e | 4006 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
4007 | else if ((irmp_param.protocol == IRMP_NEC_PROTOCOL || irmp_param.protocol == IRMP_NEC42_PROTOCOL) && irmp_bit == 0)\r | |
4008 | { // it was a non-standard repetition frame\r | |
4009 | Content-type: text/html ]>