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Version 2.3.10: added ROOMBA protocol in IRSND
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.69 2013/04/09 14:19:11 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
47 # if IRSND_OCx == IRSND_OC0A // OC0A
48 # define IRSND_PORT_LETTER B
49 # define IRSND_BIT_NUMBER 0
50 # elif IRSND_OCx == IRSND_OC0B // OC0B
51 # define IRSND_PORT_LETTER B
52 # define IRSND_BIT_NUMBER 1
53 # else
54 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
55 # endif // IRSND_OCx
56 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
57 # if IRSND_OCx == IRSND_OC0A // OC0A
58 # define IRSND_PORT_LETTER A
59 # define IRSND_BIT_NUMBER 2
60 # else
61 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
62 # endif // IRSND_OCx
63 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
64 # if IRSND_OCx == IRSND_OC2 // OC0A
65 # define IRSND_PORT_LETTER B
66 # define IRSND_BIT_NUMBER 3
67 # else
68 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
69 # endif // IRSND_OCx
70 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
71 # if IRSND_OCx == IRSND_OC2 // OC2
72 # define IRSND_PORT_LETTER D
73 # define IRSND_BIT_NUMBER 7
74 # else
75 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
76 # endif // IRSND_OCx
77 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
78 # if IRSND_OCx == IRSND_OC2 // OC2
79 # define IRSND_PORT_LETTER B
80 # define IRSND_BIT_NUMBER 1
81 # elif IRSND_OCx == IRSND_OC0 // OC0
82 # define IRSND_PORT_LETTER B
83 # define IRSND_BIT_NUMBER 0
84 # else
85 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
86 # endif // IRSND_OCx
87 #elif defined (__AVR_ATmega164__) \
88 || defined (__AVR_ATmega324__) \
89 || defined (__AVR_ATmega644__) \
90 || defined (__AVR_ATmega644P__) \
91 || defined (__AVR_ATmega1284__) \
92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
93 # if IRSND_OCx == IRSND_OC2A // OC2A
94 # define IRSND_PORT_LETTER D
95 # define IRSND_BIT_NUMBER 7
96 # elif IRSND_OCx == IRSND_OC2B // OC2B
97 # define IRSND_PORT_LETTER D
98 # define IRSND_BIT_NUMBER 6
99 # elif IRSND_OCx == IRSND_OC0A // OC0A
100 # define IRSND_PORT_LETTER B
101 # define IRSND_BIT_NUMBER 3
102 # elif IRSND_OCx == IRSND_OC0B // OC0B
103 # define IRSND_PORT_LETTER B
104 # define IRSND_BIT_NUMBER 4
105 # else
106 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
107 # endif // IRSND_OCx
108 #elif defined (__AVR_ATmega48__) \
109 || defined (__AVR_ATmega88__) \
110 || defined (__AVR_ATmega88P__) \
111 || defined (__AVR_ATmega168__) \
112 || defined (__AVR_ATmega168P__) \
113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
114 # if IRSND_OCx == IRSND_OC2A // OC2A
115 # define IRSND_PORT_LETTER B
116 # define IRSND_BIT_NUMBER 3
117 # elif IRSND_OCx == IRSND_OC2B // OC2B
118 # define IRSND_PORT_LETTER D
119 # define IRSND_BIT_NUMBER 3
120 # elif IRSND_OCx == IRSND_OC0A // OC0A
121 # define IRSND_PORT_LETTER D
122 # define IRSND_BIT_NUMBER 6
123 # elif IRSND_OCx == IRSND_OC0B // OC0B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 5
126 # else
127 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
128 # endif // IRSND_OCx
129 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
130 # if IRSND_OCx == IRSND_OC0
131 # define IRSND_PORT_LETTER B
132 # define IRSND_BIT_NUMBER 0
133 # elif IRSND_OCx == IRSND_OC1A
134 # define IRSND_PORT_LETTER D
135 # define IRSND_BIT_NUMBER 5
136 # elif IRSND_OCx == IRSND_OC1B
137 # define IRSND_PORT_LETTER E
138 # define IRSND_BIT_NUMBER 2
139 # else
140 # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
141 # endif // IRSND_OCx
142 #elif defined (PIC_C18) //Microchip C18 compiler
143 //Nothing here to do here -> See irsndconfig.h
144 #elif defined (ARM_STM32) //STM32
145 //Nothing here to do here -> See irsndconfig.h
146 #else
147 # if !defined (unix) && !defined (WIN32)
148 # error mikrocontroller not defined, please fill in definitions here.
149 # endif // unix, WIN32
150 #endif // __AVR...
151
152 #if defined(ATMEL_AVR)
153 # define _CONCAT(a,b) a##b
154 # define CONCAT(a,b) _CONCAT(a,b)
155 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
156 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
157 # define IRSND_BIT IRSND_BIT_NUMBER
158 #endif
159
160 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
161 typedef uint16_t IRSND_PAUSE_LEN;
162 #else
163 typedef uint8_t IRSND_PAUSE_LEN;
164 #endif
165
166 /*---------------------------------------------------------------------------------------------------------------------------------------------------
167 * IR timings
168 *---------------------------------------------------------------------------------------------------------------------------------------------------
169 */
170 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
171 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
172 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
173 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
174 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
175 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
176 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
177
178 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
179 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
180 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
181 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
182 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
183 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
184 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
185
186 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
187 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
188 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
189 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
190 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
191 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
192
193 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
194 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
195
196 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
197 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
198 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
199 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
200 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
201 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
202
203 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
204 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
205 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
206 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
207 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
208 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
209 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
210
211 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
212 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
213 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
214 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
215 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
216 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
217
218 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
219 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
220 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
221
222 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
223 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
224 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
225 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
226 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
227
228 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
229 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
230 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
231 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
232 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
233
234 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
235 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
236 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
237 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
238 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
239
240 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
241 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
242 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
243 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
244 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
245 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
246
247 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
248 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
249 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
250 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
251 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
252 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
253 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
254 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
255
256 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
257 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
258 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
259 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
260 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
261 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
262 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
263 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
264 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
265 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
266 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
267 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
268
269 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
270 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
271 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
272 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
273 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
274
275 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
276
277 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
278 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
279 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
280
281 #ifdef PIC_C18 // PIC C18
282 # define IRSND_FREQ_TYPE uint8_t
283 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
284 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
285 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
286 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
287 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
288 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
289 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
290 #elif defined (ARM_STM32) // STM32
291 # define IRSND_FREQ_TYPE uint32_t
292 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
293 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
294 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
295 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
296 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
297 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
298 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
299 #else // AVR
300 # if F_CPU >= 16000000L
301 # define AVR_PRESCALER 8
302 # else
303 # define AVR_PRESCALER 1
304 # endif
305 # define IRSND_FREQ_TYPE uint8_t
306 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
307 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
308 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
309 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
310 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
311 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
312 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
313 #endif
314
315 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
316 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
317 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
318 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
319 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
320 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
321
322 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
323 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
324 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
325 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
326 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
327 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
328
329 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
330 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
331 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
332 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
333 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
334 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
335 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
336
337 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
338 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
339 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
340 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
341 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
342 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
343 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
344
345 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
346 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
347 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
348 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
349 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
350 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
351 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
352
353 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
354 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
355 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
356 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
357 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
358 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
359
360 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
361 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
362 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
363 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
364 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
365 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
366 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
367
368 static volatile uint8_t irsnd_busy = 0;
369 static volatile uint8_t irsnd_protocol = 0;
370 static volatile uint8_t irsnd_buffer[6] = {0};
371 static volatile uint8_t irsnd_repeat = 0;
372 static volatile uint8_t irsnd_is_on = FALSE;
373
374 #if IRSND_USE_CALLBACK == 1
375 static void (*irsnd_callback_ptr) (uint8_t);
376 #endif // IRSND_USE_CALLBACK == 1
377
378 /*---------------------------------------------------------------------------------------------------------------------------------------------------
379 * Switch PWM on
380 *---------------------------------------------------------------------------------------------------------------------------------------------------
381 */
382 static void
383 irsnd_on (void)
384 {
385 if (! irsnd_is_on)
386 {
387 #ifndef DEBUG
388 # if defined(PIC_C18) // PIC C18
389 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
390 # elif defined (ARM_STM32) // STM32
391 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
392 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
393 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
394 # else // AVR
395 # if IRSND_OCx == IRSND_OC2 // use OC2
396 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
397 # elif IRSND_OCx == IRSND_OC2A // use OC2A
398 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
399 # elif IRSND_OCx == IRSND_OC2B // use OC2B
400 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
401 # elif IRSND_OCx == IRSND_OC0 // use OC0
402 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
403 # elif IRSND_OCx == IRSND_OC0A // use OC0A
404 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
405 # elif IRSND_OCx == IRSND_OC0B // use OC0B
406 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
407 # else
408 # error wrong value of IRSND_OCx
409 # endif // IRSND_OCx
410 # endif // C18
411 #endif // DEBUG
412
413 #if IRSND_USE_CALLBACK == 1
414 if (irsnd_callback_ptr)
415 {
416 (*irsnd_callback_ptr) (TRUE);
417 }
418 #endif // IRSND_USE_CALLBACK == 1
419
420 irsnd_is_on = TRUE;
421 }
422 }
423
424 /*---------------------------------------------------------------------------------------------------------------------------------------------------
425 * Switch PWM off
426 * @details Switches PWM off
427 *---------------------------------------------------------------------------------------------------------------------------------------------------
428 */
429 static void
430 irsnd_off (void)
431 {
432 if (irsnd_is_on)
433 {
434 #ifndef DEBUG
435
436 # if defined(PIC_C18) // PIC C18
437 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
438 # elif defined (ARM_STM32) // STM32
439 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
440 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
441 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
442 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
443 # else //AVR
444
445 # if IRSND_OCx == IRSND_OC2 // use OC2
446 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
447 # elif IRSND_OCx == IRSND_OC2A // use OC2A
448 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
449 # elif IRSND_OCx == IRSND_OC2B // use OC2B
450 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
451 # elif IRSND_OCx == IRSND_OC0 // use OC0
452 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
453 # elif IRSND_OCx == IRSND_OC0A // use OC0A
454 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
455 # elif IRSND_OCx == IRSND_OC0B // use OC0B
456 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
457 # else
458 # error wrong value of IRSND_OCx
459 # endif // IRSND_OCx
460 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
461 # endif //C18
462 #endif // DEBUG
463
464 #if IRSND_USE_CALLBACK == 1
465 if (irsnd_callback_ptr)
466 {
467 (*irsnd_callback_ptr) (FALSE);
468 }
469 #endif // IRSND_USE_CALLBACK == 1
470
471 irsnd_is_on = FALSE;
472 }
473 }
474
475 /*---------------------------------------------------------------------------------------------------------------------------------------------------
476 * Set PWM frequency
477 * @details sets pwm frequency
478 *---------------------------------------------------------------------------------------------------------------------------------------------------
479 */
480 static void
481 irsnd_set_freq (IRSND_FREQ_TYPE freq)
482 {
483 #ifndef DEBUG
484 # if defined(PIC_C18) // PIC C18
485 OpenPWM(freq);
486 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%
487 # elif defined (ARM_STM32) // STM32
488 static uint32_t TimeBaseFreq = 0;
489
490 if (TimeBaseFreq == 0)
491 {
492 RCC_ClocksTypeDef RCC_ClocksStructure;
493 /* Get system clocks and store timer clock in variable */
494 RCC_GetClocksFreq(&RCC_ClocksStructure);
495 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
496 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
497 {
498 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
499 }
500 else
501 {
502 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
503 }
504 # else
505 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
506 {
507 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
508 }
509 else
510 {
511 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
512 }
513 # endif
514 }
515
516 freq = TimeBaseFreq/freq;
517
518 /* Set frequency */
519 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
520 /* Set duty cycle */
521 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
522 # else // AVR
523
524 # if IRSND_OCx == IRSND_OC2
525 OCR2 = freq; // use register OCR2 for OC2
526 # elif IRSND_OCx == IRSND_OC2A // use OC2A
527 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
528 # elif IRSND_OCx == IRSND_OC2B // use OC2B
529 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
530 # elif IRSND_OCx == IRSND_OC0 // use OC0
531 OCR0 = freq; // use register OCR2 for OC2
532 # elif IRSND_OCx == IRSND_OC0A // use OC0A
533 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
534 # elif IRSND_OCx == IRSND_OC0B // use OC0B
535 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
536 # else
537 # error wrong value of IRSND_OCx
538 # endif
539 # endif //PIC_C18
540 #endif // DEBUG
541 }
542
543 /*---------------------------------------------------------------------------------------------------------------------------------------------------
544 * Initialize the PWM
545 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
546 *---------------------------------------------------------------------------------------------------------------------------------------------------
547 */
548 void
549 irsnd_init (void)
550 {
551 #ifndef DEBUG
552 # if defined(PIC_C18) // PIC C18
553 OpenTimer;
554 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency
555 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)
556 # elif defined (ARM_STM32) // STM32
557 GPIO_InitTypeDef GPIO_InitStructure;
558 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
559 TIM_OCInitTypeDef TIM_OCInitStructure;
560
561 /* GPIOx clock enable */
562 # if defined (ARM_STM32L1XX)
563 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
564 # elif defined (ARM_STM32F10X)
565 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
566 # elif defined (ARM_STM32F4XX)
567 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
568 # endif
569
570 /* GPIO Configuration */
571 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
572 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
573 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
574 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
575 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
576 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
577 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
578 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
579 # elif defined (ARM_STM32F10X)
580 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
581 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
582 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
583 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required
584 # endif
585
586 /* TIMx clock enable */
587 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
588 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
589 # else
590 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
591 # endif
592
593 /* Time base configuration */
594 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
595 TIM_TimeBaseStructure.TIM_Prescaler = 0;
596 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
597 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
598 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
599
600 /* PWM1 Mode configuration */
601 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
602 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
603 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
604 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
605 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
606
607 /* Preload configuration */
608 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
609 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
610
611 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
612 # else // AVR
613 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
614 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
615
616 # if IRSND_OCx == IRSND_OC2 // use OC2
617 TCCR2 = (1<<WGM21); // CTC mode
618 # if AVR_PRESCALER == 8
619 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
620 # else
621 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
622 # endif
623 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
624 TCCR2A = (1<<WGM21); // CTC mode
625 # if AVR_PRESCALER == 8
626 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
627 # else
628 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
629 # endif
630 # elif IRSND_OCx == IRSND_OC0 // use OC0
631 TCCR0 = (1<<WGM01); // CTC mode
632 # if AVR_PRESCALER == 8
633 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
634 # else
635 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
636 # endif
637 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
638 TCCR0A = (1<<WGM01); // CTC mode
639 # if AVR_PRESCALER == 8
640 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
641 # else
642 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
643 # endif
644 # else
645 # error wrong value of IRSND_OCx
646 # endif
647 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
648 # endif //PIC_C18
649 #endif // DEBUG
650 }
651
652 #if IRSND_USE_CALLBACK == 1
653 void
654 irsnd_set_callback_ptr (void (*cb)(uint8_t))
655 {
656 irsnd_callback_ptr = cb;
657 }
658 #endif // IRSND_USE_CALLBACK == 1
659
660 uint8_t
661 irsnd_is_busy (void)
662 {
663 return irsnd_busy;
664 }
665
666 static uint16_t
667 bitsrevervse (uint16_t x, uint8_t len)
668 {
669 uint16_t xx = 0;
670
671 while(len)
672 {
673 xx <<= 1;
674 if (x & 1)
675 {
676 xx |= 1;
677 }
678 x >>= 1;
679 len--;
680 }
681 return xx;
682 }
683
684
685 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
686 static uint8_t sircs_additional_bitlen;
687 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
688
689 uint8_t
690 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
691 {
692 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
693 static uint8_t toggle_bit_recs80;
694 #endif
695 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
696 static uint8_t toggle_bit_recs80ext;
697 #endif
698 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
699 static uint8_t toggle_bit_rc5;
700 #endif
701 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
702 static uint8_t toggle_bit_rc6;
703 #endif
704 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
705 static uint8_t toggle_bit_thomson;
706 #endif
707 uint16_t address;
708 uint16_t command;
709
710 if (do_wait)
711 {
712 while (irsnd_busy)
713 {
714 // do nothing;
715 }
716 }
717 else if (irsnd_busy)
718 {
719 return (FALSE);
720 }
721
722 irsnd_protocol = irmp_data_p->protocol;
723 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
724
725 switch (irsnd_protocol)
726 {
727 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
728 case IRMP_SIRCS_PROTOCOL:
729 {
730 // uint8_t sircs_additional_command_len;
731 uint8_t sircs_additional_address_len;
732
733 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
734
735 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
736 {
737 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
738 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
739 }
740 else
741 {
742 // sircs_additional_command_len = sircs_additional_bitlen;
743 sircs_additional_address_len = 0;
744 }
745
746 command = bitsrevervse (irmp_data_p->command, 15);
747
748 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
749 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
750
751 if (sircs_additional_address_len > 0)
752 {
753 address = bitsrevervse (irmp_data_p->address, 5);
754 irsnd_buffer[1] |= (address & 0x0010) >> 4;
755 irsnd_buffer[2] = (address & 0x000F) << 4;
756 }
757 irsnd_busy = TRUE;
758 break;
759 }
760 #endif
761 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
762 case IRMP_APPLE_PROTOCOL:
763 {
764 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
765 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
766
767 address = bitsrevervse (address, NEC_ADDRESS_LEN);
768 command = bitsrevervse (command, NEC_COMMAND_LEN);
769
770 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
771
772 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
773 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
774 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
775 irsnd_buffer[3] = 0x8B; // 10001011 (id)
776 irsnd_busy = TRUE;
777 break;
778 }
779 case IRMP_NEC_PROTOCOL:
780 {
781 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
782 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
783
784 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
785 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
786 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
787 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
788 irsnd_busy = TRUE;
789 break;
790 }
791 #endif
792 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
793 case IRMP_NEC16_PROTOCOL:
794 {
795 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
796 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
797
798 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
799 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
800 irsnd_busy = TRUE;
801 break;
802 }
803 #endif
804 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
805 case IRMP_NEC42_PROTOCOL:
806 {
807 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
808 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
809
810 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
811 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
812 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
813 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
814 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
815 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
816 irsnd_busy = TRUE;
817 break;
818 }
819 #endif
820 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
821 case IRMP_SAMSUNG_PROTOCOL:
822 {
823 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
824 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
825
826 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
827 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
828 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
829 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
830 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
831 irsnd_busy = TRUE;
832 break;
833 }
834 case IRMP_SAMSUNG32_PROTOCOL:
835 {
836 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
837 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
838
839 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
840 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
841 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
842 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
843 irsnd_busy = TRUE;
844 break;
845 }
846 #endif
847 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
848 case IRMP_MATSUSHITA_PROTOCOL:
849 {
850 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
851 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
852
853 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
854 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
855 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
856 irsnd_busy = TRUE;
857 break;
858 }
859 #endif
860 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
861 case IRMP_KASEIKYO_PROTOCOL:
862 {
863 uint8_t xor_value;
864 uint16_t genre2;
865
866 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
867 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
868 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
869
870 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
871
872 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
873 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
874 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
875 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
876 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
877
878 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
879
880 irsnd_buffer[5] = xor_value;
881 irsnd_busy = TRUE;
882 break;
883 }
884 #endif
885 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
886 case IRMP_RECS80_PROTOCOL:
887 {
888 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
889
890 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
891 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
892 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
893 irsnd_busy = TRUE;
894 break;
895 }
896 #endif
897 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
898 case IRMP_RECS80EXT_PROTOCOL:
899 {
900 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
901
902 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
903 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
904 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
905 irsnd_busy = TRUE;
906 break;
907 }
908 #endif
909 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
910 case IRMP_RC5_PROTOCOL:
911 {
912 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
913
914 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
915 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
916 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
917 irsnd_busy = TRUE;
918 break;
919 }
920 #endif
921 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
922 case IRMP_RC6_PROTOCOL:
923 {
924 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
925
926 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
927 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
928 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
929 irsnd_busy = TRUE;
930 break;
931 }
932 #endif
933 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
934 case IRMP_RC6A_PROTOCOL:
935 {
936 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
937
938 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
939 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
940 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
941 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
942 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
943 irsnd_busy = TRUE;
944 break;
945 }
946 #endif
947 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
948 case IRMP_DENON_PROTOCOL:
949 {
950 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
951 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
952 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
953 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
954 irsnd_busy = TRUE;
955 break;
956 }
957 #endif
958 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
959 case IRMP_THOMSON_PROTOCOL:
960 {
961 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
962
963 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
964 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
965 irsnd_busy = TRUE;
966 break;
967 }
968 #endif
969 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
970 case IRMP_NUBERT_PROTOCOL:
971 {
972 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
973 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
974 irsnd_busy = TRUE;
975 break;
976 }
977 #endif
978 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
979 case IRMP_BANG_OLUFSEN_PROTOCOL:
980 {
981 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
982 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
983 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
984 irsnd_busy = TRUE;
985 break;
986 }
987 #endif
988 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
989 case IRMP_GRUNDIG_PROTOCOL:
990 {
991 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);
992
993 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
994 irsnd_buffer[1] = 0xC0; // 11
995 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
996 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
997
998 irsnd_busy = TRUE;
999 break;
1000 }
1001 #endif
1002 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1003 case IRMP_IR60_PROTOCOL:
1004 {
1005 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1006 #if 0
1007 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1008 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1009 #else
1010 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1011 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1012 #endif
1013
1014 irsnd_busy = TRUE;
1015 break;
1016 }
1017 #endif
1018 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1019 case IRMP_NOKIA_PROTOCOL:
1020 {
1021 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1022 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1023
1024 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1025 irsnd_buffer[1] = 0xFF; // 11111111
1026 irsnd_buffer[2] = 0x80; // 1
1027 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1028 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1029 irsnd_buffer[5] = (address << 7); // A
1030
1031 irsnd_busy = TRUE;
1032 break;
1033 }
1034 #endif
1035 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1036 case IRMP_SIEMENS_PROTOCOL:
1037 {
1038 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA
1039 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC
1040 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1041
1042 irsnd_busy = TRUE;
1043 break;
1044 }
1045 #endif
1046 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1047 case IRMP_FDC_PROTOCOL:
1048 {
1049 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1050 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1051
1052 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1053 irsnd_buffer[1] = 0; // 00000000
1054 irsnd_buffer[2] = 0; // 0000RRRR
1055 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1056 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1057 irsnd_busy = TRUE;
1058 break;
1059 }
1060 #endif
1061 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1062 case IRMP_RCCAR_PROTOCOL:
1063 {
1064 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1065 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1066
1067 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1068 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1069
1070 irsnd_busy = TRUE;
1071 break;
1072 }
1073 #endif
1074 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1075 case IRMP_JVC_PROTOCOL:
1076 {
1077 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1078 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1079
1080 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1081 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1082
1083 irsnd_busy = TRUE;
1084 break;
1085 }
1086 #endif
1087 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1088 case IRMP_NIKON_PROTOCOL:
1089 {
1090 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1091 irsnd_busy = TRUE;
1092 break;
1093 }
1094 #endif
1095 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1096 case IRMP_LEGO_PROTOCOL:
1097 {
1098 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1099
1100 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1101 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1102 irsnd_busy = TRUE;
1103 break;
1104 }
1105 #endif
1106 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1107 case IRMP_A1TVBOX_PROTOCOL:
1108 {
1109 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1110 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1111 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1112
1113 irsnd_busy = TRUE;
1114 break;
1115 }
1116 #endif
1117 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1118 case IRMP_ROOMBA_PROTOCOL:
1119 {
1120
1121 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1122 irsnd_busy = TRUE;
1123 break;
1124 }
1125 #endif
1126 default:
1127 {
1128 break;
1129 }
1130 }
1131
1132 return irsnd_busy;
1133 }
1134
1135 void
1136 irsnd_stop (void)
1137 {
1138 irsnd_repeat = 0;
1139 }
1140
1141 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1142 * ISR routine
1143 * @details ISR routine, called 10000 times per second
1144 *---------------------------------------------------------------------------------------------------------------------------------------------------
1145 */
1146 uint8_t
1147 irsnd_ISR (void)
1148 {
1149 static uint8_t send_trailer = FALSE;
1150 static uint8_t current_bit = 0xFF;
1151 static uint8_t pulse_counter = 0;
1152 static IRSND_PAUSE_LEN pause_counter = 0;
1153 static uint8_t startbit_pulse_len = 0;
1154 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1155 static uint8_t pulse_1_len = 0;
1156 static uint8_t pause_1_len = 0;
1157 static uint8_t pulse_0_len = 0;
1158 static uint8_t pause_0_len = 0;
1159 static uint8_t has_stop_bit = 0;
1160 static uint8_t new_frame = TRUE;
1161 static uint8_t complete_data_len = 0;
1162 static uint8_t n_repeat_frames = 0; // number of repetition frames
1163 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1164 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1165 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1166 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1167 static uint8_t repeat_counter = 0; // repeat counter
1168 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1169 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1170 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1171 static uint8_t last_bit_value;
1172 #endif
1173 static uint8_t pulse_len = 0xFF;
1174 static IRSND_PAUSE_LEN pause_len = 0xFF;
1175
1176 if (irsnd_busy)
1177 {
1178 if (current_bit == 0xFF && new_frame) // start of transmission...
1179 {
1180 if (auto_repetition_counter > 0)
1181 {
1182 auto_repetition_pause_counter++;
1183
1184 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1185 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1186 {
1187 repeat_frame_pause_len--;
1188 }
1189 #endif
1190
1191 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1192 {
1193 auto_repetition_pause_counter = 0;
1194
1195 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1196 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1197 {
1198 current_bit = 16;
1199 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1200 }
1201 else
1202 #endif
1203 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1204 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1205 {
1206 current_bit = 15;
1207 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1208 }
1209 else
1210 #endif
1211 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1212 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1213 {
1214 current_bit = 7;
1215 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1216 }
1217 else
1218 #endif
1219 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1220 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1221 {
1222 if (auto_repetition_counter + 1 < n_auto_repetitions)
1223 {
1224 current_bit = 23;
1225 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1226 }
1227 else // nokia stop frame
1228 {
1229 current_bit = 0xFF;
1230 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1231 }
1232 }
1233 else
1234 #endif
1235 {
1236 ;
1237 }
1238 }
1239 else
1240 {
1241 #ifdef DEBUG
1242 if (irsnd_is_on)
1243 {
1244 putchar ('0');
1245 }
1246 else
1247 {
1248 putchar ('1');
1249 }
1250 #endif
1251 return irsnd_busy;
1252 }
1253 }
1254 #if 0
1255 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)
1256 #else
1257 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1258 #endif
1259 {
1260 packet_repeat_pause_counter++;
1261
1262 #ifdef DEBUG
1263 if (irsnd_is_on)
1264 {
1265 putchar ('0');
1266 }
1267 else
1268 {
1269 putchar ('1');
1270 }
1271 #endif
1272 return irsnd_busy;
1273 }
1274 else
1275 {
1276 if (send_trailer)
1277 {
1278 irsnd_busy = FALSE;
1279 send_trailer = FALSE;
1280 return irsnd_busy;
1281 }
1282
1283 n_repeat_frames = irsnd_repeat;
1284
1285 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1286 {
1287 n_repeat_frames = 255;
1288 }
1289
1290 packet_repeat_pause_counter = 0;
1291 pulse_counter = 0;
1292 pause_counter = 0;
1293
1294 switch (irsnd_protocol)
1295 {
1296 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1297 case IRMP_SIRCS_PROTOCOL:
1298 {
1299 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1300 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1301 pulse_1_len = SIRCS_1_PULSE_LEN;
1302 pause_1_len = SIRCS_PAUSE_LEN - 1;
1303 pulse_0_len = SIRCS_0_PULSE_LEN;
1304 pause_0_len = SIRCS_PAUSE_LEN - 1;
1305 has_stop_bit = SIRCS_STOP_BIT;
1306 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1307 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1308 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1309 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1310 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1311 break;
1312 }
1313 #endif
1314 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1315 case IRMP_NEC_PROTOCOL:
1316 {
1317 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1318
1319 if (repeat_counter > 0)
1320 {
1321 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1322 complete_data_len = 0;
1323 }
1324 else
1325 {
1326 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1327 complete_data_len = NEC_COMPLETE_DATA_LEN;
1328 }
1329
1330 pulse_1_len = NEC_PULSE_LEN;
1331 pause_1_len = NEC_1_PAUSE_LEN - 1;
1332 pulse_0_len = NEC_PULSE_LEN;
1333 pause_0_len = NEC_0_PAUSE_LEN - 1;
1334 has_stop_bit = NEC_STOP_BIT;
1335 n_auto_repetitions = 1; // 1 frame
1336 auto_repetition_pause_len = 0;
1337 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1338 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1339 break;
1340 }
1341 #endif
1342 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1343 case IRMP_NEC16_PROTOCOL:
1344 {
1345 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1346 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1347 pulse_1_len = NEC_PULSE_LEN;
1348 pause_1_len = NEC_1_PAUSE_LEN - 1;
1349 pulse_0_len = NEC_PULSE_LEN;
1350 pause_0_len = NEC_0_PAUSE_LEN - 1;
1351 has_stop_bit = NEC_STOP_BIT;
1352 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1353 n_auto_repetitions = 1; // 1 frame
1354 auto_repetition_pause_len = 0;
1355 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1356 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1357 break;
1358 }
1359 #endif
1360 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1361 case IRMP_NEC42_PROTOCOL:
1362 {
1363 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1364 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1365 pulse_1_len = NEC_PULSE_LEN;
1366 pause_1_len = NEC_1_PAUSE_LEN - 1;
1367 pulse_0_len = NEC_PULSE_LEN;
1368 pause_0_len = NEC_0_PAUSE_LEN - 1;
1369 has_stop_bit = NEC_STOP_BIT;
1370 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1371 n_auto_repetitions = 1; // 1 frame
1372 auto_repetition_pause_len = 0;
1373 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1374 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1375 break;
1376 }
1377 #endif
1378 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1379 case IRMP_SAMSUNG_PROTOCOL:
1380 {
1381 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1382 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1383 pulse_1_len = SAMSUNG_PULSE_LEN;
1384 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1385 pulse_0_len = SAMSUNG_PULSE_LEN;
1386 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1387 has_stop_bit = SAMSUNG_STOP_BIT;
1388 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1389 n_auto_repetitions = 1; // 1 frame
1390 auto_repetition_pause_len = 0;
1391 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1392 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1393 break;
1394 }
1395
1396 case IRMP_SAMSUNG32_PROTOCOL:
1397 {
1398 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1399 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1400 pulse_1_len = SAMSUNG_PULSE_LEN;
1401 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1402 pulse_0_len = SAMSUNG_PULSE_LEN;
1403 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1404 has_stop_bit = SAMSUNG_STOP_BIT;
1405 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1406 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames
1407 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1408 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1409 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1410 break;
1411 }
1412 #endif
1413 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1414 case IRMP_MATSUSHITA_PROTOCOL:
1415 {
1416 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1417 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1418 pulse_1_len = MATSUSHITA_PULSE_LEN;
1419 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1420 pulse_0_len = MATSUSHITA_PULSE_LEN;
1421 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1422 has_stop_bit = MATSUSHITA_STOP_BIT;
1423 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1424 n_auto_repetitions = 1; // 1 frame
1425 auto_repetition_pause_len = 0;
1426 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1427 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1428 break;
1429 }
1430 #endif
1431 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1432 case IRMP_KASEIKYO_PROTOCOL:
1433 {
1434 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1435 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1436 pulse_1_len = KASEIKYO_PULSE_LEN;
1437 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1438 pulse_0_len = KASEIKYO_PULSE_LEN;
1439 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1440 has_stop_bit = KASEIKYO_STOP_BIT;
1441 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1442 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1443 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1444 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1445 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1446 break;
1447 }
1448 #endif
1449 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1450 case IRMP_RECS80_PROTOCOL:
1451 {
1452 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1453 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1454 pulse_1_len = RECS80_PULSE_LEN;
1455 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1456 pulse_0_len = RECS80_PULSE_LEN;
1457 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1458 has_stop_bit = RECS80_STOP_BIT;
1459 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1460 n_auto_repetitions = 1; // 1 frame
1461 auto_repetition_pause_len = 0;
1462 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1463 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1464 break;
1465 }
1466 #endif
1467 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1468 case IRMP_RECS80EXT_PROTOCOL:
1469 {
1470 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1471 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1472 pulse_1_len = RECS80EXT_PULSE_LEN;
1473 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1474 pulse_0_len = RECS80EXT_PULSE_LEN;
1475 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1476 has_stop_bit = RECS80EXT_STOP_BIT;
1477 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1478 n_auto_repetitions = 1; // 1 frame
1479 auto_repetition_pause_len = 0;
1480 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1481 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1482 break;
1483 }
1484 #endif
1485 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1486 case IRMP_RC5_PROTOCOL:
1487 {
1488 startbit_pulse_len = RC5_BIT_LEN;
1489 startbit_pause_len = RC5_BIT_LEN;
1490 pulse_len = RC5_BIT_LEN;
1491 pause_len = RC5_BIT_LEN;
1492 has_stop_bit = RC5_STOP_BIT;
1493 complete_data_len = RC5_COMPLETE_DATA_LEN;
1494 n_auto_repetitions = 1; // 1 frame
1495 auto_repetition_pause_len = 0;
1496 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1497 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1498 break;
1499 }
1500 #endif
1501 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1502 case IRMP_RC6_PROTOCOL:
1503 {
1504 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1505 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1506 pulse_len = RC6_BIT_LEN;
1507 pause_len = RC6_BIT_LEN;
1508 has_stop_bit = RC6_STOP_BIT;
1509 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1510 n_auto_repetitions = 1; // 1 frame
1511 auto_repetition_pause_len = 0;
1512 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1513 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1514 break;
1515 }
1516 #endif
1517 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1518 case IRMP_RC6A_PROTOCOL:
1519 {
1520 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1521 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1522 pulse_len = RC6_BIT_LEN;
1523 pause_len = RC6_BIT_LEN;
1524 has_stop_bit = RC6_STOP_BIT;
1525 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1526 n_auto_repetitions = 1; // 1 frame
1527 auto_repetition_pause_len = 0;
1528 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1529 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1530 break;
1531 }
1532 #endif
1533 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1534 case IRMP_DENON_PROTOCOL:
1535 {
1536 startbit_pulse_len = 0x00;
1537 startbit_pause_len = 0x00;
1538 pulse_1_len = DENON_PULSE_LEN;
1539 pause_1_len = DENON_1_PAUSE_LEN - 1;
1540 pulse_0_len = DENON_PULSE_LEN;
1541 pause_0_len = DENON_0_PAUSE_LEN - 1;
1542 has_stop_bit = DENON_STOP_BIT;
1543 complete_data_len = DENON_COMPLETE_DATA_LEN;
1544 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1545 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1546 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1547 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1548 break;
1549 }
1550 #endif
1551 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1552 case IRMP_THOMSON_PROTOCOL:
1553 {
1554 startbit_pulse_len = 0x00;
1555 startbit_pause_len = 0x00;
1556 pulse_1_len = THOMSON_PULSE_LEN;
1557 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1558 pulse_0_len = THOMSON_PULSE_LEN;
1559 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1560 has_stop_bit = THOMSON_STOP_BIT;
1561 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1562 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1563 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1564 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1565 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1566 break;
1567 }
1568 #endif
1569 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1570 case IRMP_NUBERT_PROTOCOL:
1571 {
1572 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1573 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1574 pulse_1_len = NUBERT_1_PULSE_LEN;
1575 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1576 pulse_0_len = NUBERT_0_PULSE_LEN;
1577 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1578 has_stop_bit = NUBERT_STOP_BIT;
1579 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1580 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1581 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1582 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1583 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1584 break;
1585 }
1586 #endif
1587 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1588 case IRMP_BANG_OLUFSEN_PROTOCOL:
1589 {
1590 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1591 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1592 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1593 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1594 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1595 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1596 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1597 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1598 n_auto_repetitions = 1; // 1 frame
1599 auto_repetition_pause_len = 0;
1600 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1601 last_bit_value = 0;
1602 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1603 break;
1604 }
1605 #endif
1606 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1607 case IRMP_GRUNDIG_PROTOCOL:
1608 {
1609 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1610 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1611 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1612 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1613 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1614 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1615 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1616 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1617 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1618 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1619 break;
1620 }
1621 #endif
1622 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1623 case IRMP_IR60_PROTOCOL:
1624 {
1625 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1626 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1627 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1628 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1629 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1630 complete_data_len = IR60_COMPLETE_DATA_LEN;
1631 n_auto_repetitions = IR60_FRAMES; // 2 frames
1632 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1633 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1634 irsnd_set_freq (IRSND_FREQ_30_KHZ);
1635 break;
1636 }
1637 #endif
1638 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1639 case IRMP_NOKIA_PROTOCOL:
1640 {
1641 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1642 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1643 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1644 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1645 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1646 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1647 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
1648 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
1649 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1650 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1651 break;
1652 }
1653 #endif
1654 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1655 case IRMP_SIEMENS_PROTOCOL:
1656 {
1657 startbit_pulse_len = SIEMENS_BIT_LEN;
1658 startbit_pause_len = SIEMENS_BIT_LEN;
1659 pulse_len = SIEMENS_BIT_LEN;
1660 pause_len = SIEMENS_BIT_LEN;
1661 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
1662 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;
1663 n_auto_repetitions = 1; // 1 frame
1664 auto_repetition_pause_len = 0;
1665 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
1666 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1667 break;
1668 }
1669 #endif
1670 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1671 case IRMP_FDC_PROTOCOL:
1672 {
1673 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
1674 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
1675 complete_data_len = FDC_COMPLETE_DATA_LEN;
1676 pulse_1_len = FDC_PULSE_LEN;
1677 pause_1_len = FDC_1_PAUSE_LEN - 1;
1678 pulse_0_len = FDC_PULSE_LEN;
1679 pause_0_len = FDC_0_PAUSE_LEN - 1;
1680 has_stop_bit = FDC_STOP_BIT;
1681 n_auto_repetitions = 1; // 1 frame
1682 auto_repetition_pause_len = 0;
1683 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
1684 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1685 break;
1686 }
1687 #endif
1688 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1689 case IRMP_RCCAR_PROTOCOL:
1690 {
1691 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
1692 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
1693 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
1694 pulse_1_len = RCCAR_PULSE_LEN;
1695 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
1696 pulse_0_len = RCCAR_PULSE_LEN;
1697 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
1698 has_stop_bit = RCCAR_STOP_BIT;
1699 n_auto_repetitions = 1; // 1 frame
1700 auto_repetition_pause_len = 0;
1701 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
1702 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1703 break;
1704 }
1705 #endif
1706 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1707 case IRMP_JVC_PROTOCOL:
1708 {
1709 if (repeat_counter != 0) // skip start bit if repetition frame
1710 {
1711 current_bit = 0;
1712 }
1713
1714 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
1715 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
1716 complete_data_len = JVC_COMPLETE_DATA_LEN;
1717 pulse_1_len = JVC_PULSE_LEN;
1718 pause_1_len = JVC_1_PAUSE_LEN - 1;
1719 pulse_0_len = JVC_PULSE_LEN;
1720 pause_0_len = JVC_0_PAUSE_LEN - 1;
1721 has_stop_bit = JVC_STOP_BIT;
1722 n_auto_repetitions = 1; // 1 frame
1723 auto_repetition_pause_len = 0;
1724 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
1725 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1726 break;
1727 }
1728 #endif
1729 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1730 case IRMP_NIKON_PROTOCOL:
1731 {
1732 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
1733 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
1734 complete_data_len = NIKON_COMPLETE_DATA_LEN;
1735 pulse_1_len = NIKON_PULSE_LEN;
1736 pause_1_len = NIKON_1_PAUSE_LEN - 1;
1737 pulse_0_len = NIKON_PULSE_LEN;
1738 pause_0_len = NIKON_0_PAUSE_LEN - 1;
1739 has_stop_bit = NIKON_STOP_BIT;
1740 n_auto_repetitions = 1; // 1 frame
1741 auto_repetition_pause_len = 0;
1742 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
1743 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1744 break;
1745 }
1746 #endif
1747 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1748 case IRMP_LEGO_PROTOCOL:
1749 {
1750 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
1751 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
1752 complete_data_len = LEGO_COMPLETE_DATA_LEN;
1753 pulse_1_len = LEGO_PULSE_LEN;
1754 pause_1_len = LEGO_1_PAUSE_LEN - 1;
1755 pulse_0_len = LEGO_PULSE_LEN;
1756 pause_0_len = LEGO_0_PAUSE_LEN - 1;
1757 has_stop_bit = LEGO_STOP_BIT;
1758 n_auto_repetitions = 1; // 1 frame
1759 auto_repetition_pause_len = 0;
1760 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
1761 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1762 break;
1763 }
1764 #endif
1765 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1766 case IRMP_A1TVBOX_PROTOCOL:
1767 {
1768 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
1769 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
1770 pulse_len = A1TVBOX_BIT_PULSE_LEN;
1771 pause_len = A1TVBOX_BIT_PAUSE_LEN;
1772 has_stop_bit = A1TVBOX_STOP_BIT;
1773 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
1774 n_auto_repetitions = 1; // 1 frame
1775 auto_repetition_pause_len = 0;
1776 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
1777 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1778 break;
1779 }
1780 #endif
1781 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1782 case IRMP_ROOMBA_PROTOCOL:
1783 {
1784 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
1785 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
1786 pulse_1_len = ROOMBA_1_PULSE_LEN;
1787 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
1788 pulse_0_len = ROOMBA_0_PULSE_LEN;
1789 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
1790 has_stop_bit = ROOMBA_STOP_BIT;
1791 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
1792 n_auto_repetitions = 1; // 1 frame
1793 auto_repetition_pause_len = 0;
1794 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
1795 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1796 break;
1797 }
1798 #endif
1799 default:
1800 {
1801 irsnd_busy = FALSE;
1802 break;
1803 }
1804 }
1805 }
1806 }
1807
1808 if (irsnd_busy)
1809 {
1810 new_frame = FALSE;
1811
1812 switch (irsnd_protocol)
1813 {
1814 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1815 case IRMP_SIRCS_PROTOCOL:
1816 #endif
1817 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1818 case IRMP_NEC_PROTOCOL:
1819 #endif
1820 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1821 case IRMP_NEC16_PROTOCOL:
1822 #endif
1823 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1824 case IRMP_NEC42_PROTOCOL:
1825 #endif
1826 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1827 case IRMP_SAMSUNG_PROTOCOL:
1828 case IRMP_SAMSUNG32_PROTOCOL:
1829 #endif
1830 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1831 case IRMP_MATSUSHITA_PROTOCOL:
1832 #endif
1833 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1834 case IRMP_KASEIKYO_PROTOCOL:
1835 #endif
1836 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1837 case IRMP_RECS80_PROTOCOL:
1838 #endif
1839 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1840 case IRMP_RECS80EXT_PROTOCOL:
1841 #endif
1842 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1843 case IRMP_DENON_PROTOCOL:
1844 #endif
1845 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1846 case IRMP_THOMSON_PROTOCOL:
1847 #endif
1848 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1849 case IRMP_NUBERT_PROTOCOL:
1850 #endif
1851 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1852 case IRMP_BANG_OLUFSEN_PROTOCOL:
1853 #endif
1854 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1855 case IRMP_FDC_PROTOCOL:
1856 #endif
1857 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1858 case IRMP_RCCAR_PROTOCOL:
1859 #endif
1860 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1861 case IRMP_JVC_PROTOCOL:
1862 #endif
1863 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1864 case IRMP_NIKON_PROTOCOL:
1865 #endif
1866 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1867 case IRMP_LEGO_PROTOCOL:
1868 #endif
1869 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1870 case IRMP_ROOMBA_PROTOCOL:
1871 #endif
1872
1873 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
1874 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
1875 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
1876 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \
1877 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1878 {
1879 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1880 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
1881 {
1882 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
1883 {
1884 auto_repetition_pause_len--;
1885 }
1886
1887 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1888 {
1889 repeat_frame_pause_len--;
1890 }
1891 }
1892 #endif
1893
1894 if (pulse_counter == 0)
1895 {
1896 if (current_bit == 0xFF) // send start bit
1897 {
1898 pulse_len = startbit_pulse_len;
1899 pause_len = startbit_pause_len;
1900 }
1901 else if (current_bit < complete_data_len) // send n'th bit
1902 {
1903 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1904 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
1905 {
1906 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
1907 {
1908 pulse_len = SAMSUNG_PULSE_LEN;
1909 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1910 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1911 }
1912 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
1913 {
1914 pulse_len = SAMSUNG_PULSE_LEN;
1915 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1916 }
1917 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
1918 {
1919 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1920
1921 pulse_len = SAMSUNG_PULSE_LEN;
1922 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1923 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
1924 }
1925 }
1926 else
1927 #endif
1928
1929 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1930 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
1931 {
1932 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
1933 {
1934 pulse_len = NEC_PULSE_LEN;
1935 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?
1936 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1937 }
1938 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
1939 {
1940 pulse_len = NEC_PULSE_LEN;
1941 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1942 }
1943 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
1944 {
1945 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
1946
1947 pulse_len = NEC_PULSE_LEN;
1948 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?
1949 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
1950 }
1951 }
1952 else
1953 #endif
1954
1955 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1956 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
1957 {
1958 if (current_bit == 0) // send 2nd start bit
1959 {
1960 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1961 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1962 }
1963 else if (current_bit == 1) // send 3rd start bit
1964 {
1965 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
1966 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
1967 }
1968 else if (current_bit == 2) // send 4th start bit
1969 {
1970 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
1971 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
1972 }
1973 else if (current_bit == 19) // send trailer bit
1974 {
1975 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1976 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
1977 }
1978 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
1979 {
1980 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;
1981 pulse_len = BANG_OLUFSEN_PULSE_LEN;
1982
1983 if (cur_bit_value == last_bit_value)
1984 {
1985 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
1986 }
1987 else
1988 {
1989 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
1990 last_bit_value = cur_bit_value;
1991 }
1992 }
1993 }
1994 else
1995 #endif
1996 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))
1997 {
1998 pulse_len = pulse_1_len;
1999 pause_len = pause_1_len;
2000 }
2001 else
2002 {
2003 pulse_len = pulse_0_len;
2004 pause_len = pause_0_len;
2005 }
2006 }
2007 else if (has_stop_bit) // send stop bit
2008 {
2009 pulse_len = pulse_0_len;
2010
2011 if (auto_repetition_counter < n_auto_repetitions)
2012 {
2013 pause_len = pause_0_len;
2014 }
2015 else
2016 {
2017 pause_len = 255; // last frame: pause of 255
2018 }
2019 }
2020 }
2021
2022 if (pulse_counter < pulse_len)
2023 {
2024 if (pulse_counter == 0)
2025 {
2026 irsnd_on ();
2027 }
2028 pulse_counter++;
2029 }
2030 else if (pause_counter < pause_len)
2031 {
2032 if (pause_counter == 0)
2033 {
2034 irsnd_off ();
2035 }
2036 pause_counter++;
2037 }
2038 else
2039 {
2040 current_bit++;
2041
2042 if (current_bit >= complete_data_len + has_stop_bit)
2043 {
2044 current_bit = 0xFF;
2045 auto_repetition_counter++;
2046
2047 if (auto_repetition_counter == n_auto_repetitions)
2048 {
2049 irsnd_busy = FALSE;
2050 auto_repetition_counter = 0;
2051 }
2052 new_frame = TRUE;
2053 }
2054
2055 pulse_counter = 0;
2056 pause_counter = 0;
2057 }
2058 break;
2059 }
2060 #endif
2061
2062 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2063 case IRMP_RC5_PROTOCOL:
2064 #endif
2065 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2066 case IRMP_RC6_PROTOCOL:
2067 #endif
2068 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2069 case IRMP_RC6A_PROTOCOL:
2070 #endif
2071 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2072 case IRMP_SIEMENS_PROTOCOL:
2073 #endif
2074 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2075 case IRMP_GRUNDIG_PROTOCOL:
2076 #endif
2077 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2078 case IRMP_IR60_PROTOCOL:
2079 #endif
2080 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2081 case IRMP_NOKIA_PROTOCOL:
2082 #endif
2083 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2084 case IRMP_A1TVBOX_PROTOCOL:
2085 #endif
2086
2087 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2088 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2089 {
2090 if (pulse_counter == pulse_len && pause_counter == pause_len)
2091 {
2092 current_bit++;
2093
2094 if (current_bit >= complete_data_len)
2095 {
2096 current_bit = 0xFF;
2097
2098 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2099 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2100 {
2101 auto_repetition_counter++;
2102
2103 if (repeat_counter > 0)
2104 { // set 117 msec pause time
2105 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2106 }
2107
2108 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2109 {
2110 n_auto_repetitions++; // increment number of auto repetitions
2111 repeat_counter++;
2112 }
2113 else if (auto_repetition_counter == n_auto_repetitions)
2114 {
2115 irsnd_busy = FALSE;
2116 auto_repetition_counter = 0;
2117 }
2118 }
2119 else
2120 #endif
2121 {
2122 irsnd_busy = FALSE;
2123 }
2124
2125 new_frame = TRUE;
2126 irsnd_off ();
2127 }
2128
2129 pulse_counter = 0;
2130 pause_counter = 0;
2131 }
2132
2133 if (! new_frame)
2134 {
2135 uint8_t first_pulse;
2136
2137 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2138 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2139 {
2140 if (current_bit == 0xFF || // start bit of start-frame
2141 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2142 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2143 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2144 {
2145 pulse_len = startbit_pulse_len;
2146 pause_len = startbit_pause_len;
2147 first_pulse = TRUE;
2148 }
2149 else // send n'th bit
2150 {
2151 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2152 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2153 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2154 }
2155 }
2156 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2157 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)
2158 #endif
2159 {
2160 if (current_bit == 0xFF) // 1 start bit
2161 {
2162 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2163 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2164 {
2165 pulse_len = startbit_pulse_len;
2166 pause_len = startbit_pause_len;
2167 }
2168 else
2169 #endif
2170 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2171 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2172 {
2173 current_bit = 0;
2174 }
2175 else
2176 #endif
2177 {
2178 ;
2179 }
2180
2181 first_pulse = TRUE;
2182 }
2183 else // send n'th bit
2184 {
2185 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2186 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2187 {
2188 pulse_len = RC6_BIT_LEN;
2189 pause_len = RC6_BIT_LEN;
2190
2191 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2192 {
2193 if (current_bit == 4) // toggle bit (double len)
2194 {
2195 pulse_len = 2 * RC6_BIT_LEN;
2196 pause_len = 2 * RC6_BIT_LEN;
2197 }
2198 }
2199 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2200 {
2201 if (current_bit == 4) // toggle bit (double len)
2202 {
2203 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2204 pause_len = 2 * RC6_BIT_LEN;
2205 }
2206 else if (current_bit == 5) // toggle bit (double len)
2207 {
2208 pause_len = 2 * RC6_BIT_LEN;
2209 }
2210 }
2211 }
2212 #endif
2213 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;
2214 }
2215
2216 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2217 {
2218 first_pulse = first_pulse ? FALSE : TRUE;
2219 }
2220 }
2221
2222 if (first_pulse)
2223 {
2224 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2225
2226 if (pulse_counter < pulse_len)
2227 {
2228 if (pulse_counter == 0)
2229 {
2230 irsnd_on ();
2231 }
2232 pulse_counter++;
2233 }
2234 else // if (pause_counter < pause_len)
2235 {
2236 if (pause_counter == 0)
2237 {
2238 irsnd_off ();
2239 }
2240 pause_counter++;
2241 }
2242 }
2243 else
2244 {
2245 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2246
2247 if (pause_counter < pause_len)
2248 {
2249 if (pause_counter == 0)
2250 {
2251 irsnd_off ();
2252 }
2253 pause_counter++;
2254 }
2255 else // if (pulse_counter < pulse_len)
2256 {
2257 if (pulse_counter == 0)
2258 {
2259 irsnd_on ();
2260 }
2261 pulse_counter++;
2262 }
2263 }
2264 }
2265 break;
2266 }
2267 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2268 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2269
2270 default:
2271 {
2272 irsnd_busy = FALSE;
2273 break;
2274 }
2275 }
2276 }
2277
2278 if (! irsnd_busy)
2279 {
2280 if (repeat_counter < n_repeat_frames)
2281 {
2282 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2283 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2284 {
2285 irsnd_buffer[2] |= 0x0F;
2286 }
2287 #endif
2288 repeat_counter++;
2289 irsnd_busy = TRUE;
2290 }
2291 else
2292 {
2293 irsnd_busy = TRUE; //Rainer
2294 send_trailer = TRUE;
2295 n_repeat_frames = 0;
2296 repeat_counter = 0;
2297 }
2298 }
2299 }
2300
2301 #ifdef DEBUG
2302 if (irsnd_is_on)
2303 {
2304 putchar ('0');
2305 }
2306 else
2307 {
2308 putchar ('1');
2309 }
2310 #endif
2311
2312 return irsnd_busy;
2313 }
2314
2315 #ifdef DEBUG
2316
2317 // main function - for unix/linux + windows only!
2318 // AVR: see main.c!
2319 // Compile it under linux with:
2320 // cc irsnd.c -o irsnd
2321 //
2322 // usage: ./irsnd protocol hex-address hex-command >filename
2323
2324 int
2325 main (int argc, char ** argv)
2326 {
2327 int protocol;
2328 int address;
2329 int command;
2330 IRMP_DATA irmp_data;
2331
2332 if (argc != 4 && argc != 5)
2333 {
2334 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2335 return 1;
2336 }
2337
2338 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2339 sscanf (argv[2], "%x", &address) == 1 &&
2340 sscanf (argv[3], "%x", &command) == 1)
2341 {
2342 irmp_data.protocol = protocol;
2343 irmp_data.address = address;
2344 irmp_data.command = command;
2345
2346 if (argc == 5)
2347 {
2348 irmp_data.flags = atoi (argv[4]);
2349 }
2350 else
2351 {
2352 irmp_data.flags = 0;
2353 }
2354
2355 irsnd_init ();
2356
2357 (void) irsnd_send_data (&irmp_data, TRUE);
2358
2359 while (irsnd_busy)
2360 {
2361 irsnd_ISR ();
2362 }
2363
2364 putchar ('\n');
2365
2366 #if 1 // enable here to send twice
2367 (void) irsnd_send_data (&irmp_data, TRUE);
2368
2369 while (irsnd_busy)
2370 {
2371 irsnd_ISR ();
2372 }
2373
2374 putchar ('\n');
2375 #endif
2376 }
2377 else
2378 {
2379 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2380 return 1;
2381 }
2382 return 0;
2383 }
2384
2385 #endif // DEBUG
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)