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Version 2.3.10: added ROOMBA protocol in IRSND
[irmp.git] / irsnd.c
CommitLineData
4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
2ac088b2 4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
7644ac04 6 * Supported mikrocontrollers:\r
7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
2ac088b2 10 * ATtiny44 ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
e664a9f3 13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
7644ac04 14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
c9b6916a 16 * $Id: irsnd.c,v 1.69 2013/04/09 14:19:11 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
2ac088b2 36#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
08f2dd9d 37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
46#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
47# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 48# define IRSND_PORT_LETTER B\r
49# define IRSND_BIT_NUMBER 0\r
08f2dd9d 50# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 51# define IRSND_PORT_LETTER B\r
52# define IRSND_BIT_NUMBER 1\r
08f2dd9d 53# else\r
54# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
55# endif // IRSND_OCx\r
21a4e0ee 56#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 57# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 58# define IRSND_PORT_LETTER A\r
59# define IRSND_BIT_NUMBER 2\r
90387f65 60# else\r
61# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
62# endif // IRSND_OCx\r
08f2dd9d 63#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
64# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 65# define IRSND_PORT_LETTER B\r
66# define IRSND_BIT_NUMBER 3\r
08f2dd9d 67# else\r
68# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
69# endif // IRSND_OCx\r
70#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
71# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 72# define IRSND_PORT_LETTER D\r
73# define IRSND_BIT_NUMBER 7\r
08f2dd9d 74# else\r
75# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
76# endif // IRSND_OCx\r
77#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
78# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 79# define IRSND_PORT_LETTER B\r
80# define IRSND_BIT_NUMBER 1\r
08f2dd9d 81# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 82# define IRSND_PORT_LETTER B\r
83# define IRSND_BIT_NUMBER 0\r
08f2dd9d 84# else\r
85# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
86# endif // IRSND_OCx\r
f50e01e7 87#elif defined (__AVR_ATmega164__) \\r
88 || defined (__AVR_ATmega324__) \\r
89 || defined (__AVR_ATmega644__) \\r
90 || defined (__AVR_ATmega644P__) \\r
0f700c8e 91 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
93# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 94# define IRSND_PORT_LETTER D\r
95# define IRSND_BIT_NUMBER 7\r
08f2dd9d 96# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 97# define IRSND_PORT_LETTER D\r
98# define IRSND_BIT_NUMBER 6\r
08f2dd9d 99# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 100# define IRSND_PORT_LETTER B\r
101# define IRSND_BIT_NUMBER 3\r
08f2dd9d 102# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 103# define IRSND_PORT_LETTER B\r
104# define IRSND_BIT_NUMBER 4\r
08f2dd9d 105# else\r
106# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
107# endif // IRSND_OCx\r
f50e01e7 108#elif defined (__AVR_ATmega48__) \\r
109 || defined (__AVR_ATmega88__) \\r
7644ac04 110 || defined (__AVR_ATmega88P__) \\r
f50e01e7 111 || defined (__AVR_ATmega168__) \\r
1f54e86c 112 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
114# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 115# define IRSND_PORT_LETTER B\r
116# define IRSND_BIT_NUMBER 3\r
08f2dd9d 117# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 118# define IRSND_PORT_LETTER D\r
119# define IRSND_BIT_NUMBER 3\r
08f2dd9d 120# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 121# define IRSND_PORT_LETTER D\r
122# define IRSND_BIT_NUMBER 6\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 5\r
08f2dd9d 126# else\r
127# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
128# endif // IRSND_OCx\r
f874da09 129#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 130# if IRSND_OCx == IRSND_OC0 \r
f874da09 131# define IRSND_PORT_LETTER B\r
132# define IRSND_BIT_NUMBER 0\r
08f2dd9d 133# elif IRSND_OCx == IRSND_OC1A \r
f874da09 134# define IRSND_PORT_LETTER D\r
135# define IRSND_BIT_NUMBER 5\r
08f2dd9d 136# elif IRSND_OCx == IRSND_OC1B \r
f874da09 137# define IRSND_PORT_LETTER E\r
138# define IRSND_BIT_NUMBER 2\r
08f2dd9d 139# else\r
140# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
141# endif // IRSND_OCx\r
9c86ff1a 142#elif defined (PIC_C18) //Microchip C18 compiler\r
143 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 144#elif defined (ARM_STM32) //STM32\r
145 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 146#else\r
08f2dd9d 147# if !defined (unix) && !defined (WIN32)\r
148# error mikrocontroller not defined, please fill in definitions here.\r
149# endif // unix, WIN32\r
f50e01e7 150#endif // __AVR...\r
151\r
f874da09 152#if defined(ATMEL_AVR)\r
153# define _CONCAT(a,b) a##b\r
154# define CONCAT(a,b) _CONCAT(a,b)\r
155# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
156# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
157# define IRSND_BIT IRSND_BIT_NUMBER\r
158#endif\r
159\r
9405f84a 160#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 161 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 162#else\r
9c86ff1a 163 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 164#endif\r
165\r
f50e01e7 166/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
167 * IR timings\r
168 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
169 */\r
4225a882 170#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
171#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
172#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
173#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
174#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
a7054daf 175#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
176#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 177\r
178#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
179#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 180#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 181#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
182#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
183#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
a7054daf 184#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 185\r
186#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
187#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
188#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
189#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
190#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
a7054daf 191#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 192\r
a7054daf 193#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
194#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 195\r
4225a882 196#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
197#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
198#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
199#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
200#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
a7054daf 201#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 202\r
770a1a9d 203#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
204#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
205#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
206#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
207#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
208#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
209#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
210\r
4225a882 211#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
212#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
213#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
214#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
215#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
a7054daf 216#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 217\r
218#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
219#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
a7054daf 220#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 221\r
222#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
223#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
224#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
225#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
a7054daf 226#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 227\r
228#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
229#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
230#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
a7054daf 231#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
232#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 233\r
beda975f 234#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
235#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
236#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
237#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
238#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
239\r
4225a882 240#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
241#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
242#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
243#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
244#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
a7054daf 245#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 246\r
247#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
248#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
249#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
250#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
251#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
252#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
a7054daf 253#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
254#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 255\r
5481e9cd 256#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
257#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
258#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
259#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
260#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
261#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
262#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
263#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
264#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
265#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
266#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
a7054daf 267#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 268\r
9c86ff1a 269#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
270#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
a7054daf 271#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
272#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 273#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 274\r
a48187fa 275#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
276\r
02ccdb69 277#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
278#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
279#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 280\r
08f2dd9d 281#ifdef PIC_C18 // PIC C18\r
282# define IRSND_FREQ_TYPE uint8_t\r
283# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
284# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
285# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
286# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
287# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
288# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
289# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
290#elif defined (ARM_STM32) // STM32\r
291# define IRSND_FREQ_TYPE uint32_t\r
292# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
293# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
294# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
295# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
296# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
297# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
298# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
299#else // AVR\r
a03ad359 300# if F_CPU >= 16000000L\r
301# define AVR_PRESCALER 8\r
302# else\r
303# define AVR_PRESCALER 1\r
304# endif\r
08f2dd9d 305# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 306# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
307# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
308# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
309# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
310# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
311# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
312# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 313#endif\r
4225a882 314\r
48664931 315#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
316#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
317#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
318#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
319#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
320#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 321\r
c7c9a4a1 322#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
323#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
324#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
325#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
326#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
327#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
328\r
c7a47e89 329#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
330#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
331#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
332#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
333#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
334#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
335#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
336\r
9405f84a 337#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
338#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
339#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
340#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
341#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
342#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 343#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
344\r
345#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
346#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
347#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
348#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
349#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
350#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
351#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 352\r
fa09ce10 353#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r
354#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r
355#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r
356#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r
357#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
358#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
359\r
c9b6916a 360#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r
361#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r
362#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r
363#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r
364#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r
365#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r
366#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
367\r
9c86ff1a 368static volatile uint8_t irsnd_busy = 0;\r
369static volatile uint8_t irsnd_protocol = 0;\r
370static volatile uint8_t irsnd_buffer[6] = {0};\r
371static volatile uint8_t irsnd_repeat = 0;\r
4225a882 372static volatile uint8_t irsnd_is_on = FALSE;\r
373\r
f50e01e7 374#if IRSND_USE_CALLBACK == 1\r
375static void (*irsnd_callback_ptr) (uint8_t);\r
376#endif // IRSND_USE_CALLBACK == 1\r
377\r
4225a882 378/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
379 * Switch PWM on\r
4225a882 380 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
381 */\r
382static void\r
383irsnd_on (void)\r
384{\r
385 if (! irsnd_is_on)\r
386 {\r
387#ifndef DEBUG\r
08f2dd9d 388# if defined(PIC_C18) // PIC C18\r
e664a9f3 389 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
08f2dd9d 390# elif defined (ARM_STM32) // STM32\r
e664a9f3 391 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
392 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
393 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
08f2dd9d 394# else // AVR\r
395# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 396 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 397# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 398 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 399# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 400 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 401# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 402 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 403# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 404 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 405# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 406 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 407# else\r
408# error wrong value of IRSND_OCx\r
409# endif // IRSND_OCx\r
410# endif // C18\r
4225a882 411#endif // DEBUG\r
f50e01e7 412\r
413#if IRSND_USE_CALLBACK == 1\r
e664a9f3 414 if (irsnd_callback_ptr)\r
415 {\r
416 (*irsnd_callback_ptr) (TRUE);\r
417 }\r
f50e01e7 418#endif // IRSND_USE_CALLBACK == 1\r
419\r
e664a9f3 420 irsnd_is_on = TRUE;\r
4225a882 421 }\r
422}\r
423\r
424/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
425 * Switch PWM off\r
426 * @details Switches PWM off\r
427 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
428 */\r
429static void\r
430irsnd_off (void)\r
431{\r
432 if (irsnd_is_on)\r
433 {\r
434#ifndef DEBUG\r
9c86ff1a 435 \r
08f2dd9d 436# if defined(PIC_C18) // PIC C18\r
e664a9f3 437 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
08f2dd9d 438# elif defined (ARM_STM32) // STM32\r
e664a9f3 439 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
440 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
441 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
442 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
08f2dd9d 443# else //AVR\r
9c86ff1a 444\r
08f2dd9d 445# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 446 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 447# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 448 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 449# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 450 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 451# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 452 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 453# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 454 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 455# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 456 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 457# else\r
458# error wrong value of IRSND_OCx\r
459# endif // IRSND_OCx\r
e664a9f3 460 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 461# endif //C18\r
4225a882 462#endif // DEBUG\r
f50e01e7 463\r
464#if IRSND_USE_CALLBACK == 1\r
e664a9f3 465 if (irsnd_callback_ptr)\r
466 {\r
467 (*irsnd_callback_ptr) (FALSE);\r
468 }\r
f50e01e7 469#endif // IRSND_USE_CALLBACK == 1\r
470\r
e664a9f3 471 irsnd_is_on = FALSE;\r
4225a882 472 }\r
473}\r
474\r
475/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
476 * Set PWM frequency\r
477 * @details sets pwm frequency\r
478 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
479 */\r
480static void\r
08f2dd9d 481irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 482{\r
483#ifndef DEBUG\r
08f2dd9d 484# if defined(PIC_C18) // PIC C18\r
e664a9f3 485 OpenPWM(freq); \r
486 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
08f2dd9d 487# elif defined (ARM_STM32) // STM32\r
e664a9f3 488 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 489\r
e664a9f3 490 if (TimeBaseFreq == 0)\r
491 {\r
492 RCC_ClocksTypeDef RCC_ClocksStructure;\r
493 /* Get system clocks and store timer clock in variable */\r
494 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
08f2dd9d 495# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 496 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
497 {\r
498 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
499 }\r
500 else\r
501 {\r
502 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
503 }\r
08f2dd9d 504# else\r
e664a9f3 505 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
506 {\r
507 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
508 }\r
509 else\r
510 {\r
511 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
512 }\r
08f2dd9d 513# endif\r
e664a9f3 514 }\r
08f2dd9d 515\r
e664a9f3 516 freq = TimeBaseFreq/freq;\r
08f2dd9d 517\r
e664a9f3 518 /* Set frequency */\r
519 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
520 /* Set duty cycle */\r
521 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
08f2dd9d 522# else // AVR\r
523\r
524# if IRSND_OCx == IRSND_OC2\r
e664a9f3 525 OCR2 = freq; // use register OCR2 for OC2\r
08f2dd9d 526# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 527 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 528# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 529 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 530# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 531 OCR0 = freq; // use register OCR2 for OC2\r
08f2dd9d 532# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 533 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 534# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 535 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 536# else\r
537# error wrong value of IRSND_OCx\r
538# endif\r
539# endif //PIC_C18\r
4225a882 540#endif // DEBUG\r
541}\r
542\r
543/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
544 * Initialize the PWM\r
545 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
546 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
547 */\r
548void\r
549irsnd_init (void)\r
550{\r
551#ifndef DEBUG\r
08f2dd9d 552# if defined(PIC_C18) // PIC C18\r
e664a9f3 553 OpenTimer;\r
554 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
555 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
08f2dd9d 556# elif defined (ARM_STM32) // STM32\r
e664a9f3 557 GPIO_InitTypeDef GPIO_InitStructure;\r
558 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
559 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 560\r
561 /* GPIOx clock enable */\r
562# if defined (ARM_STM32L1XX)\r
e664a9f3 563 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 564# elif defined (ARM_STM32F10X)\r
e664a9f3 565 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 566# elif defined (ARM_STM32F4XX)\r
e664a9f3 567 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 568# endif\r
569\r
e664a9f3 570 /* GPIO Configuration */\r
571 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
08f2dd9d 572# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
e664a9f3 573 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
574 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
575 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
576 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
577 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
578 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
08f2dd9d 579# elif defined (ARM_STM32F10X)\r
e664a9f3 580 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
581 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
582 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
583 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
08f2dd9d 584# endif\r
585\r
e664a9f3 586 /* TIMx clock enable */\r
08f2dd9d 587# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 588 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 589# else\r
e664a9f3 590 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 591# endif\r
08f2dd9d 592\r
e664a9f3 593 /* Time base configuration */\r
594 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
595 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
596 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
597 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
598 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
599\r
600 /* PWM1 Mode configuration */\r
601 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
602 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
603 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
604 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
605 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
606\r
607 /* Preload configuration */\r
608 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
609 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
610\r
611 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
08f2dd9d 612# else // AVR\r
e664a9f3 613 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
614 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
08f2dd9d 615\r
616# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 617 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 618# if AVR_PRESCALER == 8\r
e664a9f3 619 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 620# else\r
e664a9f3 621 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 622# endif\r
08f2dd9d 623# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
e664a9f3 624 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 625# if AVR_PRESCALER == 8\r
e664a9f3 626 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 627# else\r
e664a9f3 628 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 629# endif\r
08f2dd9d 630# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 631 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 632# if AVR_PRESCALER == 8\r
e664a9f3 633 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 634# else\r
e664a9f3 635 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 636# endif\r
08f2dd9d 637# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
e664a9f3 638 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 639# if AVR_PRESCALER == 8\r
e664a9f3 640 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 641# else\r
e664a9f3 642 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 643# endif\r
08f2dd9d 644# else\r
645# error wrong value of IRSND_OCx\r
646# endif\r
e664a9f3 647 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
08f2dd9d 648# endif //PIC_C18\r
4225a882 649#endif // DEBUG\r
650}\r
651\r
f50e01e7 652#if IRSND_USE_CALLBACK == 1\r
653void\r
654irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
655{\r
656 irsnd_callback_ptr = cb;\r
657}\r
658#endif // IRSND_USE_CALLBACK == 1\r
659\r
4225a882 660uint8_t\r
661irsnd_is_busy (void)\r
662{\r
663 return irsnd_busy;\r
664}\r
665\r
666static uint16_t\r
667bitsrevervse (uint16_t x, uint8_t len)\r
668{\r
669 uint16_t xx = 0;\r
670\r
671 while(len)\r
672 {\r
e664a9f3 673 xx <<= 1;\r
674 if (x & 1)\r
675 {\r
676 xx |= 1;\r
677 }\r
678 x >>= 1;\r
679 len--;\r
4225a882 680 }\r
681 return xx;\r
682}\r
683\r
684\r
9547ee89 685#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
686static uint8_t sircs_additional_bitlen;\r
687#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
688\r
4225a882 689uint8_t\r
879b06c2 690irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 691{\r
692#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
693 static uint8_t toggle_bit_recs80;\r
694#endif\r
695#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
696 static uint8_t toggle_bit_recs80ext;\r
697#endif\r
698#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
699 static uint8_t toggle_bit_rc5;\r
9547ee89 700#endif\r
779fbc81 701#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 702 static uint8_t toggle_bit_rc6;\r
beda975f 703#endif\r
704#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
705 static uint8_t toggle_bit_thomson;\r
4225a882 706#endif\r
707 uint16_t address;\r
708 uint16_t command;\r
709\r
879b06c2 710 if (do_wait)\r
4225a882 711 {\r
e664a9f3 712 while (irsnd_busy)\r
713 {\r
714 // do nothing;\r
715 }\r
879b06c2 716 }\r
717 else if (irsnd_busy)\r
718 {\r
e664a9f3 719 return (FALSE);\r
4225a882 720 }\r
721\r
722 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 723 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 724\r
725 switch (irsnd_protocol)\r
726 {\r
727#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 728 case IRMP_SIRCS_PROTOCOL:\r
729 {\r
730 // uint8_t sircs_additional_command_len;\r
731 uint8_t sircs_additional_address_len;\r
732\r
733 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
734\r
735 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
736 {\r
737 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
738 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
739 }\r
740 else\r
741 {\r
742 // sircs_additional_command_len = sircs_additional_bitlen;\r
743 sircs_additional_address_len = 0;\r
744 }\r
745\r
746 command = bitsrevervse (irmp_data_p->command, 15);\r
747\r
748 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
749 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
750\r
751 if (sircs_additional_address_len > 0)\r
752 {\r
753 address = bitsrevervse (irmp_data_p->address, 5);\r
754 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
755 irsnd_buffer[2] = (address & 0x000F) << 4;\r
756 }\r
757 irsnd_busy = TRUE;\r
758 break;\r
759 }\r
4225a882 760#endif\r
761#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 762 case IRMP_APPLE_PROTOCOL:\r
763 {\r
764 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
765 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
766\r
767 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
768 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
769\r
770 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
771\r
772 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
773 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
774 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
775 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
776 irsnd_busy = TRUE;\r
777 break;\r
778 }\r
779 case IRMP_NEC_PROTOCOL:\r
780 {\r
781 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
782 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
783\r
784 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
785 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
786 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
787 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
788 irsnd_busy = TRUE;\r
789 break;\r
790 }\r
7644ac04 791#endif\r
792#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 793 case IRMP_NEC16_PROTOCOL:\r
794 {\r
795 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
796 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 797\r
e664a9f3 798 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
799 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
800 irsnd_busy = TRUE;\r
801 break;\r
802 }\r
7644ac04 803#endif\r
804#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 805 case IRMP_NEC42_PROTOCOL:\r
806 {\r
807 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
808 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
809\r
810 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
811 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
812 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
813 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
814 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
815 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
816 irsnd_busy = TRUE;\r
817 break;\r
818 }\r
4225a882 819#endif\r
820#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 821 case IRMP_SAMSUNG_PROTOCOL:\r
822 {\r
823 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
824 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
825\r
826 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
827 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
828 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
829 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
830 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
831 irsnd_busy = TRUE;\r
832 break;\r
833 }\r
834 case IRMP_SAMSUNG32_PROTOCOL:\r
835 {\r
836 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
837 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
838\r
839 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
840 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
841 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
842 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
843 irsnd_busy = TRUE;\r
844 break;\r
845 }\r
4225a882 846#endif\r
847#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 848 case IRMP_MATSUSHITA_PROTOCOL:\r
849 {\r
850 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
851 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
852\r
853 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
854 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
855 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
856 irsnd_busy = TRUE;\r
857 break;\r
858 }\r
4225a882 859#endif\r
770a1a9d 860#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 861 case IRMP_KASEIKYO_PROTOCOL:\r
862 {\r
863 uint8_t xor_value;\r
864 uint16_t genre2;\r
770a1a9d 865\r
e664a9f3 866 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
867 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
868 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 869\r
e664a9f3 870 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 871\r
e664a9f3 872 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
873 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
874 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
875 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
876 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
770a1a9d 877\r
e664a9f3 878 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 879\r
e664a9f3 880 irsnd_buffer[5] = xor_value;\r
881 irsnd_busy = TRUE;\r
882 break;\r
883 }\r
770a1a9d 884#endif\r
4225a882 885#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 886 case IRMP_RECS80_PROTOCOL:\r
887 {\r
888 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
4225a882 889\r
e664a9f3 890 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
891 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
892 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
893 irsnd_busy = TRUE;\r
894 break;\r
895 }\r
4225a882 896#endif\r
897#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 898 case IRMP_RECS80EXT_PROTOCOL:\r
899 {\r
900 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
4225a882 901\r
e664a9f3 902 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
903 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
904 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
905 irsnd_busy = TRUE;\r
906 break;\r
907 }\r
4225a882 908#endif\r
909#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 910 case IRMP_RC5_PROTOCOL:\r
911 {\r
912 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
4225a882 913\r
e664a9f3 914 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
915 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
916 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
917 irsnd_busy = TRUE;\r
918 break;\r
919 }\r
4225a882 920#endif\r
9547ee89 921#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 922 case IRMP_RC6_PROTOCOL:\r
923 {\r
924 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
9547ee89 925\r
e664a9f3 926 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
927 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
928 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
929 irsnd_busy = TRUE;\r
930 break;\r
931 }\r
9547ee89 932#endif\r
933#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 934 case IRMP_RC6A_PROTOCOL:\r
935 {\r
936 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
937\r
938 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
939 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
940 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
941 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
942 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
943 irsnd_busy = TRUE;\r
944 break;\r
945 }\r
9547ee89 946#endif\r
4225a882 947#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 948 case IRMP_DENON_PROTOCOL:\r
949 {\r
950 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
951 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
952 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
953 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
954 irsnd_busy = TRUE;\r
955 break;\r
956 }\r
4225a882 957#endif\r
beda975f 958#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 959 case IRMP_THOMSON_PROTOCOL:\r
960 {\r
961 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
beda975f 962\r
e664a9f3 963 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
964 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
965 irsnd_busy = TRUE;\r
966 break;\r
967 }\r
beda975f 968#endif\r
4225a882 969#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 970 case IRMP_NUBERT_PROTOCOL:\r
971 {\r
972 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
973 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
974 irsnd_busy = TRUE;\r
975 break;\r
976 }\r
5481e9cd 977#endif\r
978#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 979 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
980 {\r
981 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
982 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
983 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
984 irsnd_busy = TRUE;\r
985 break;\r
986 }\r
4225a882 987#endif\r
5b437ff6 988#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 989 case IRMP_GRUNDIG_PROTOCOL:\r
990 {\r
991 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r
5b437ff6 992\r
e664a9f3 993 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
994 irsnd_buffer[1] = 0xC0; // 11\r
995 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
996 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
d155e9ab 997\r
e664a9f3 998 irsnd_busy = TRUE;\r
999 break;\r
1000 }\r
d155e9ab 1001#endif\r
a48187fa 1002#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1003 case IRMP_IR60_PROTOCOL:\r
1004 {\r
1005 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 1006#if 0\r
e664a9f3 1007 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
1008 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 1009#else\r
e664a9f3 1010 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
1011 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
08f2dd9d 1012#endif\r
a48187fa 1013\r
e664a9f3 1014 irsnd_busy = TRUE;\r
1015 break;\r
1016 }\r
a48187fa 1017#endif\r
d155e9ab 1018#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1019 case IRMP_NOKIA_PROTOCOL:\r
1020 {\r
1021 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1022 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1023\r
1024 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1025 irsnd_buffer[1] = 0xFF; // 11111111\r
1026 irsnd_buffer[2] = 0x80; // 1\r
1027 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1028 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1029 irsnd_buffer[5] = (address << 7); // A\r
1030\r
1031 irsnd_busy = TRUE;\r
1032 break;\r
1033 }\r
5b437ff6 1034#endif\r
a7054daf 1035#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1036 case IRMP_SIEMENS_PROTOCOL:\r
1037 {\r
1038 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r
1039 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r
1040 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
9405f84a 1041\r
e664a9f3 1042 irsnd_busy = TRUE;\r
1043 break;\r
1044 }\r
b5ea7869 1045#endif\r
48664931 1046#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1047 case IRMP_FDC_PROTOCOL:\r
1048 {\r
1049 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1050 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
1051\r
1052 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1053 irsnd_buffer[1] = 0; // 00000000\r
1054 irsnd_buffer[2] = 0; // 0000RRRR\r
1055 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1056 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1057 irsnd_busy = TRUE;\r
1058 break;\r
1059 }\r
c7c9a4a1 1060#endif\r
1061#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1062 case IRMP_RCCAR_PROTOCOL:\r
1063 {\r
1064 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1065 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1066\r
1067 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1068 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1069 \r
1070 irsnd_busy = TRUE;\r
1071 break;\r
1072 }\r
a7054daf 1073#endif\r
c7a47e89 1074#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1075 case IRMP_JVC_PROTOCOL:\r
1076 {\r
1077 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1078 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
c7a47e89 1079\r
e664a9f3 1080 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1081 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
c7a47e89 1082\r
e664a9f3 1083 irsnd_busy = TRUE;\r
1084 break;\r
1085 }\r
c7a47e89 1086#endif\r
9405f84a 1087#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1088 case IRMP_NIKON_PROTOCOL:\r
1089 {\r
1090 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1091 irsnd_busy = TRUE;\r
1092 break;\r
1093 }\r
f50e01e7 1094#endif\r
1095#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1096 case IRMP_LEGO_PROTOCOL:\r
1097 {\r
1098 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
fa09ce10 1099\r
e664a9f3 1100 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1101 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1102 irsnd_busy = TRUE;\r
1103 break;\r
1104 }\r
fa09ce10 1105#endif\r
1106#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1107 case IRMP_A1TVBOX_PROTOCOL:\r
1108 {\r
1109 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r
1110 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r
1111 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r
1112\r
1113 irsnd_busy = TRUE;\r
1114 break;\r
1115 }\r
1116#endif\r
c9b6916a 1117#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1118 case IRMP_ROOMBA_PROTOCOL:\r
1119 {\r
1120\r
1121 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r
1122 irsnd_busy = TRUE;\r
1123 break;\r
1124 }\r
1125#endif\r
e664a9f3 1126 default:\r
1127 {\r
1128 break;\r
1129 }\r
4225a882 1130 }\r
1131\r
1132 return irsnd_busy;\r
1133}\r
1134\r
beda975f 1135void\r
1136irsnd_stop (void)\r
1137{\r
acf7fb44 1138 irsnd_repeat = 0;\r
beda975f 1139}\r
1140\r
4225a882 1141/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1142 * ISR routine\r
1143 * @details ISR routine, called 10000 times per second\r
1144 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1145 */\r
1146uint8_t\r
1147irsnd_ISR (void)\r
1148{\r
a48187fa 1149 static uint8_t send_trailer = FALSE;\r
1150 static uint8_t current_bit = 0xFF;\r
1151 static uint8_t pulse_counter = 0;\r
1152 static IRSND_PAUSE_LEN pause_counter = 0;\r
1153 static uint8_t startbit_pulse_len = 0;\r
1154 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1155 static uint8_t pulse_1_len = 0;\r
1156 static uint8_t pause_1_len = 0;\r
1157 static uint8_t pulse_0_len = 0;\r
1158 static uint8_t pause_0_len = 0;\r
1159 static uint8_t has_stop_bit = 0;\r
1160 static uint8_t new_frame = TRUE;\r
1161 static uint8_t complete_data_len = 0;\r
1162 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1163 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1164 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1165 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1166 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1167 static uint8_t repeat_counter = 0; // repeat counter\r
1168 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1169 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1170#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1171 static uint8_t last_bit_value;\r
5481e9cd 1172#endif\r
a48187fa 1173 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1174 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1175\r
1176 if (irsnd_busy)\r
1177 {\r
e664a9f3 1178 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1179 {\r
1180 if (auto_repetition_counter > 0)\r
1181 {\r
1182 auto_repetition_pause_counter++;\r
4225a882 1183\r
08f2dd9d 1184#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1185 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1186 {\r
1187 repeat_frame_pause_len--;\r
1188 }\r
08f2dd9d 1189#endif\r
1190\r
e664a9f3 1191 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
1192 {\r
1193 auto_repetition_pause_counter = 0;\r
4225a882 1194\r
08f2dd9d 1195#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1196 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
1197 {\r
1198 current_bit = 16;\r
1199 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1200 }\r
1201 else\r
08f2dd9d 1202#endif\r
1203#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1204 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
1205 {\r
1206 current_bit = 15;\r
1207 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1208 }\r
1209 else\r
08f2dd9d 1210#endif\r
1211#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1212 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1213 {\r
1214 current_bit = 7;\r
1215 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1216 }\r
1217 else\r
08f2dd9d 1218#endif\r
1219#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1220 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
1221 {\r
1222 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
1223 {\r
1224 current_bit = 23;\r
1225 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1226 }\r
1227 else // nokia stop frame\r
1228 {\r
1229 current_bit = 0xFF;\r
1230 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1231 }\r
1232 }\r
1233 else\r
1234#endif\r
1235 {\r
1236 ;\r
1237 }\r
1238 }\r
1239 else\r
1240 {\r
4225a882 1241#ifdef DEBUG\r
e664a9f3 1242 if (irsnd_is_on)\r
1243 {\r
1244 putchar ('0');\r
1245 }\r
1246 else\r
1247 {\r
1248 putchar ('1');\r
1249 }\r
1250#endif\r
1251 return irsnd_busy;\r
1252 }\r
1253 }\r
beda975f 1254#if 0\r
e664a9f3 1255 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1256#else\r
e664a9f3 1257 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1258#endif\r
e664a9f3 1259 {\r
1260 packet_repeat_pause_counter++;\r
a7054daf 1261\r
1262#ifdef DEBUG\r
e664a9f3 1263 if (irsnd_is_on)\r
1264 {\r
1265 putchar ('0');\r
1266 }\r
1267 else\r
1268 {\r
1269 putchar ('1');\r
1270 }\r
1271#endif\r
1272 return irsnd_busy;\r
1273 }\r
1274 else\r
1275 {\r
1276 if (send_trailer)\r
1277 {\r
1278 irsnd_busy = FALSE;\r
1279 send_trailer = FALSE;\r
1280 return irsnd_busy;\r
1281 }\r
1282 \r
1283 n_repeat_frames = irsnd_repeat;\r
1284\r
1285 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1286 {\r
1287 n_repeat_frames = 255;\r
1288 }\r
1289\r
1290 packet_repeat_pause_counter = 0;\r
1291 pulse_counter = 0;\r
1292 pause_counter = 0;\r
1293\r
1294 switch (irsnd_protocol)\r
1295 {\r
4225a882 1296#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1297 case IRMP_SIRCS_PROTOCOL:\r
1298 {\r
1299 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
1300 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
1301 pulse_1_len = SIRCS_1_PULSE_LEN;\r
1302 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
1303 pulse_0_len = SIRCS_0_PULSE_LEN;\r
1304 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
1305 has_stop_bit = SIRCS_STOP_BIT;\r
1306 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
1307 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1308 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1309 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
1310 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1311 break;\r
1312 }\r
4225a882 1313#endif\r
1314#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1315 case IRMP_NEC_PROTOCOL:\r
1316 {\r
1317 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1318\r
1319 if (repeat_counter > 0)\r
1320 {\r
1321 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
1322 complete_data_len = 0;\r
1323 }\r
1324 else\r
1325 {\r
1326 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1327 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1328 }\r
1329\r
1330 pulse_1_len = NEC_PULSE_LEN;\r
1331 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1332 pulse_0_len = NEC_PULSE_LEN;\r
1333 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1334 has_stop_bit = NEC_STOP_BIT;\r
1335 n_auto_repetitions = 1; // 1 frame\r
1336 auto_repetition_pause_len = 0;\r
1337 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1338 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1339 break;\r
1340 }\r
4225a882 1341#endif\r
7644ac04 1342#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1343 case IRMP_NEC16_PROTOCOL:\r
1344 {\r
1345 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1346 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1347 pulse_1_len = NEC_PULSE_LEN;\r
1348 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1349 pulse_0_len = NEC_PULSE_LEN;\r
1350 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1351 has_stop_bit = NEC_STOP_BIT;\r
1352 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1353 n_auto_repetitions = 1; // 1 frame\r
1354 auto_repetition_pause_len = 0;\r
1355 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1356 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1357 break;\r
1358 }\r
7644ac04 1359#endif\r
1360#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1361 case IRMP_NEC42_PROTOCOL:\r
1362 {\r
1363 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1364 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1365 pulse_1_len = NEC_PULSE_LEN;\r
1366 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1367 pulse_0_len = NEC_PULSE_LEN;\r
1368 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1369 has_stop_bit = NEC_STOP_BIT;\r
1370 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1371 n_auto_repetitions = 1; // 1 frame\r
1372 auto_repetition_pause_len = 0;\r
1373 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1374 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1375 break;\r
1376 }\r
7644ac04 1377#endif\r
4225a882 1378#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1379 case IRMP_SAMSUNG_PROTOCOL:\r
1380 {\r
1381 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1382 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1383 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1384 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1385 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1386 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1387 has_stop_bit = SAMSUNG_STOP_BIT;\r
1388 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1389 n_auto_repetitions = 1; // 1 frame\r
1390 auto_repetition_pause_len = 0;\r
1391 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
1392 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1393 break;\r
1394 }\r
1395\r
1396 case IRMP_SAMSUNG32_PROTOCOL:\r
1397 {\r
1398 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1399 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1400 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1401 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1402 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1403 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1404 has_stop_bit = SAMSUNG_STOP_BIT;\r
1405 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
1406 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r
1407 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1408 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
1409 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1410 break;\r
1411 }\r
4225a882 1412#endif\r
1413#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1414 case IRMP_MATSUSHITA_PROTOCOL:\r
1415 {\r
1416 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1417 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1418 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1419 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1420 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1421 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1422 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1423 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1424 n_auto_repetitions = 1; // 1 frame\r
1425 auto_repetition_pause_len = 0;\r
1426 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1427 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1428 break;\r
1429 }\r
4225a882 1430#endif\r
770a1a9d 1431#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1432 case IRMP_KASEIKYO_PROTOCOL:\r
1433 {\r
1434 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
1435 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
1436 pulse_1_len = KASEIKYO_PULSE_LEN;\r
1437 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
1438 pulse_0_len = KASEIKYO_PULSE_LEN;\r
1439 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
1440 has_stop_bit = KASEIKYO_STOP_BIT;\r
1441 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1442 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1443 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1444 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1445 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1446 break;\r
1447 }\r
770a1a9d 1448#endif\r
4225a882 1449#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1450 case IRMP_RECS80_PROTOCOL:\r
1451 {\r
1452 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
1453 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
1454 pulse_1_len = RECS80_PULSE_LEN;\r
1455 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
1456 pulse_0_len = RECS80_PULSE_LEN;\r
1457 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
1458 has_stop_bit = RECS80_STOP_BIT;\r
1459 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1460 n_auto_repetitions = 1; // 1 frame\r
1461 auto_repetition_pause_len = 0;\r
1462 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
1463 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1464 break;\r
1465 }\r
4225a882 1466#endif\r
1467#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1468 case IRMP_RECS80EXT_PROTOCOL:\r
1469 {\r
1470 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
1471 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
1472 pulse_1_len = RECS80EXT_PULSE_LEN;\r
1473 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
1474 pulse_0_len = RECS80EXT_PULSE_LEN;\r
1475 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
1476 has_stop_bit = RECS80EXT_STOP_BIT;\r
1477 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1478 n_auto_repetitions = 1; // 1 frame\r
1479 auto_repetition_pause_len = 0;\r
1480 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
1481 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1482 break;\r
1483 }\r
4225a882 1484#endif\r
1485#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1486 case IRMP_RC5_PROTOCOL:\r
1487 {\r
1488 startbit_pulse_len = RC5_BIT_LEN;\r
1489 startbit_pause_len = RC5_BIT_LEN;\r
1490 pulse_len = RC5_BIT_LEN;\r
1491 pause_len = RC5_BIT_LEN;\r
1492 has_stop_bit = RC5_STOP_BIT;\r
1493 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1494 n_auto_repetitions = 1; // 1 frame\r
1495 auto_repetition_pause_len = 0;\r
1496 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
1497 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1498 break;\r
1499 }\r
4225a882 1500#endif\r
9547ee89 1501#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1502 case IRMP_RC6_PROTOCOL:\r
1503 {\r
1504 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1505 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1506 pulse_len = RC6_BIT_LEN;\r
1507 pause_len = RC6_BIT_LEN;\r
1508 has_stop_bit = RC6_STOP_BIT;\r
1509 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1510 n_auto_repetitions = 1; // 1 frame\r
1511 auto_repetition_pause_len = 0;\r
1512 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1513 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1514 break;\r
1515 }\r
9547ee89 1516#endif\r
1517#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1518 case IRMP_RC6A_PROTOCOL:\r
1519 {\r
1520 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1521 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1522 pulse_len = RC6_BIT_LEN;\r
1523 pause_len = RC6_BIT_LEN;\r
1524 has_stop_bit = RC6_STOP_BIT;\r
1525 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1526 n_auto_repetitions = 1; // 1 frame\r
1527 auto_repetition_pause_len = 0;\r
1528 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1529 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1530 break;\r
1531 }\r
9547ee89 1532#endif\r
4225a882 1533#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1534 case IRMP_DENON_PROTOCOL:\r
1535 {\r
1536 startbit_pulse_len = 0x00;\r
1537 startbit_pause_len = 0x00;\r
1538 pulse_1_len = DENON_PULSE_LEN;\r
1539 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
1540 pulse_0_len = DENON_PULSE_LEN;\r
1541 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
1542 has_stop_bit = DENON_STOP_BIT;\r
1543 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1544 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1545 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1546 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1547 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
1548 break;\r
1549 }\r
4225a882 1550#endif\r
beda975f 1551#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1552 case IRMP_THOMSON_PROTOCOL:\r
1553 {\r
1554 startbit_pulse_len = 0x00;\r
1555 startbit_pause_len = 0x00;\r
1556 pulse_1_len = THOMSON_PULSE_LEN;\r
1557 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1558 pulse_0_len = THOMSON_PULSE_LEN;\r
1559 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1560 has_stop_bit = THOMSON_STOP_BIT;\r
1561 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1562 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1563 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1564 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1565 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1566 break;\r
1567 }\r
beda975f 1568#endif\r
4225a882 1569#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1570 case IRMP_NUBERT_PROTOCOL:\r
1571 {\r
1572 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
1573 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
1574 pulse_1_len = NUBERT_1_PULSE_LEN;\r
1575 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
1576 pulse_0_len = NUBERT_0_PULSE_LEN;\r
1577 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
1578 has_stop_bit = NUBERT_STOP_BIT;\r
1579 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1580 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1581 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1582 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
1583 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1584 break;\r
1585 }\r
5481e9cd 1586#endif\r
1587#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1588 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1589 {\r
1590 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
1591 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
1592 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
1593 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
1594 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
1595 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
1596 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1597 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1598 n_auto_repetitions = 1; // 1 frame\r
1599 auto_repetition_pause_len = 0;\r
1600 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1601 last_bit_value = 0;\r
1602 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1603 break;\r
1604 }\r
5b437ff6 1605#endif\r
1606#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1607 case IRMP_GRUNDIG_PROTOCOL:\r
1608 {\r
1609 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1610 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1611 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1612 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1613 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1614 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1615 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1616 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1617 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1618 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1619 break;\r
1620 }\r
a48187fa 1621#endif\r
1622#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1623 case IRMP_IR60_PROTOCOL:\r
1624 {\r
1625 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1626 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1627 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1628 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1629 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1630 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1631 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1632 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1633 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1634 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
1635 break;\r
1636 }\r
d155e9ab 1637#endif\r
1638#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1639 case IRMP_NOKIA_PROTOCOL:\r
1640 {\r
1641 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1642 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1643 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1644 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1645 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1646 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1647 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1648 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1649 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1650 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1651 break;\r
1652 }\r
a7054daf 1653#endif\r
1654#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1655 case IRMP_SIEMENS_PROTOCOL:\r
1656 {\r
1657 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1658 startbit_pause_len = SIEMENS_BIT_LEN;\r
1659 pulse_len = SIEMENS_BIT_LEN;\r
1660 pause_len = SIEMENS_BIT_LEN;\r
1661 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
1662 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r
1663 n_auto_repetitions = 1; // 1 frame\r
1664 auto_repetition_pause_len = 0;\r
1665 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1666 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1667 break;\r
1668 }\r
b5ea7869 1669#endif\r
48664931 1670#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1671 case IRMP_FDC_PROTOCOL:\r
1672 {\r
1673 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
1674 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
1675 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
1676 pulse_1_len = FDC_PULSE_LEN;\r
1677 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
1678 pulse_0_len = FDC_PULSE_LEN;\r
1679 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
1680 has_stop_bit = FDC_STOP_BIT;\r
1681 n_auto_repetitions = 1; // 1 frame\r
1682 auto_repetition_pause_len = 0;\r
1683 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
1684 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1685 break;\r
1686 }\r
c7c9a4a1 1687#endif\r
1688#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1689 case IRMP_RCCAR_PROTOCOL:\r
1690 {\r
1691 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
1692 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
1693 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
1694 pulse_1_len = RCCAR_PULSE_LEN;\r
1695 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
1696 pulse_0_len = RCCAR_PULSE_LEN;\r
1697 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
1698 has_stop_bit = RCCAR_STOP_BIT;\r
1699 n_auto_repetitions = 1; // 1 frame\r
1700 auto_repetition_pause_len = 0;\r
1701 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
1702 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1703 break;\r
1704 }\r
4225a882 1705#endif\r
c7a47e89 1706#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1707 case IRMP_JVC_PROTOCOL:\r
1708 {\r
1709 if (repeat_counter != 0) // skip start bit if repetition frame\r
1710 {\r
1711 current_bit = 0;\r
1712 }\r
1713\r
1714 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
1715 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
1716 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
1717 pulse_1_len = JVC_PULSE_LEN;\r
1718 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
1719 pulse_0_len = JVC_PULSE_LEN;\r
1720 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
1721 has_stop_bit = JVC_STOP_BIT;\r
1722 n_auto_repetitions = 1; // 1 frame\r
1723 auto_repetition_pause_len = 0;\r
1724 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
1725 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1726 break;\r
1727 }\r
c7a47e89 1728#endif\r
9405f84a 1729#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1730 case IRMP_NIKON_PROTOCOL:\r
1731 {\r
1732 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
1733 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
1734 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
1735 pulse_1_len = NIKON_PULSE_LEN;\r
1736 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
1737 pulse_0_len = NIKON_PULSE_LEN;\r
1738 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
1739 has_stop_bit = NIKON_STOP_BIT;\r
1740 n_auto_repetitions = 1; // 1 frame\r
1741 auto_repetition_pause_len = 0;\r
1742 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
1743 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1744 break;\r
1745 }\r
9405f84a 1746#endif\r
f50e01e7 1747#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1748 case IRMP_LEGO_PROTOCOL:\r
1749 {\r
1750 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
1751 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
1752 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
1753 pulse_1_len = LEGO_PULSE_LEN;\r
1754 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
1755 pulse_0_len = LEGO_PULSE_LEN;\r
1756 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
1757 has_stop_bit = LEGO_STOP_BIT;\r
1758 n_auto_repetitions = 1; // 1 frame\r
1759 auto_repetition_pause_len = 0;\r
1760 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
1761 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1762 break;\r
1763 }\r
fa09ce10 1764#endif\r
1765#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1766 case IRMP_A1TVBOX_PROTOCOL:\r
1767 {\r
1768 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r
1769 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r
1770 pulse_len = A1TVBOX_BIT_PULSE_LEN;\r
1771 pause_len = A1TVBOX_BIT_PAUSE_LEN;\r
1772 has_stop_bit = A1TVBOX_STOP_BIT;\r
1773 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r
1774 n_auto_repetitions = 1; // 1 frame\r
1775 auto_repetition_pause_len = 0;\r
1776 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r
1777 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1778 break;\r
1779 }\r
c9b6916a 1780#endif\r
1781#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1782 case IRMP_ROOMBA_PROTOCOL:\r
1783 {\r
1784 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r
1785 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r
1786 pulse_1_len = ROOMBA_1_PULSE_LEN;\r
1787 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r
1788 pulse_0_len = ROOMBA_0_PULSE_LEN;\r
1789 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r
1790 has_stop_bit = ROOMBA_STOP_BIT;\r
1791 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r
1792 n_auto_repetitions = 1; // 1 frame\r
1793 auto_repetition_pause_len = 0;\r
1794 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
1795 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1796 break;\r
1797 }\r
e664a9f3 1798#endif\r
1799 default:\r
1800 {\r
1801 irsnd_busy = FALSE;\r
1802 break;\r
1803 }\r
1804 }\r
1805 }\r
1806 }\r
1807\r
1808 if (irsnd_busy)\r
1809 {\r
1810 new_frame = FALSE;\r
1811\r
1812 switch (irsnd_protocol)\r
1813 {\r
4225a882 1814#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1815 case IRMP_SIRCS_PROTOCOL:\r
4225a882 1816#endif\r
1817#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1818 case IRMP_NEC_PROTOCOL:\r
4225a882 1819#endif\r
7644ac04 1820#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1821 case IRMP_NEC16_PROTOCOL:\r
7644ac04 1822#endif\r
1823#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1824 case IRMP_NEC42_PROTOCOL:\r
7644ac04 1825#endif\r
4225a882 1826#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1827 case IRMP_SAMSUNG_PROTOCOL:\r
1828 case IRMP_SAMSUNG32_PROTOCOL:\r
4225a882 1829#endif\r
1830#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1831 case IRMP_MATSUSHITA_PROTOCOL:\r
4225a882 1832#endif\r
770a1a9d 1833#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1834 case IRMP_KASEIKYO_PROTOCOL:\r
770a1a9d 1835#endif\r
4225a882 1836#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1837 case IRMP_RECS80_PROTOCOL:\r
4225a882 1838#endif\r
1839#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1840 case IRMP_RECS80EXT_PROTOCOL:\r
4225a882 1841#endif\r
1842#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1843 case IRMP_DENON_PROTOCOL:\r
4225a882 1844#endif\r
beda975f 1845#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1846 case IRMP_THOMSON_PROTOCOL:\r
beda975f 1847#endif\r
4225a882 1848#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1849 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 1850#endif\r
1851#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1852 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 1853#endif\r
c7c9a4a1 1854#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1855 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1856#endif\r
c7c9a4a1 1857#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1858 case IRMP_RCCAR_PROTOCOL:\r
c7c9a4a1 1859#endif\r
c7a47e89 1860#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1861 case IRMP_JVC_PROTOCOL:\r
c7a47e89 1862#endif\r
9405f84a 1863#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1864 case IRMP_NIKON_PROTOCOL:\r
9405f84a 1865#endif\r
f50e01e7 1866#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1867 case IRMP_LEGO_PROTOCOL:\r
f50e01e7 1868#endif\r
c9b6916a 1869#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1870 case IRMP_ROOMBA_PROTOCOL:\r
1871#endif\r
a7054daf 1872\r
7644ac04 1873#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
1874 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 1875 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
c7a47e89 1876 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
beda975f 1877 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r
e664a9f3 1878 {\r
08f2dd9d 1879#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1880 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
1881 {\r
1882 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
1883 {\r
1884 auto_repetition_pause_len--;\r
1885 }\r
1886\r
1887 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1888 {\r
1889 repeat_frame_pause_len--;\r
1890 }\r
1891 }\r
1892#endif\r
1893\r
1894 if (pulse_counter == 0)\r
1895 {\r
1896 if (current_bit == 0xFF) // send start bit\r
1897 {\r
1898 pulse_len = startbit_pulse_len;\r
1899 pause_len = startbit_pause_len;\r
1900 }\r
1901 else if (current_bit < complete_data_len) // send n'th bit\r
1902 {\r
5481e9cd 1903#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1904 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
1905 {\r
1906 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
1907 {\r
1908 pulse_len = SAMSUNG_PULSE_LEN;\r
1909 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1910 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
1911 }\r
1912 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
1913 {\r
1914 pulse_len = SAMSUNG_PULSE_LEN;\r
1915 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1916 }\r
1917 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
1918 {\r
1919 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1920\r
1921 pulse_len = SAMSUNG_PULSE_LEN;\r
1922 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1923 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
1924 }\r
1925 }\r
1926 else\r
5481e9cd 1927#endif\r
1928\r
7644ac04 1929#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1930 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
1931 {\r
1932 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
1933 {\r
1934 pulse_len = NEC_PULSE_LEN;\r
1935 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1936 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1937 }\r
1938 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
1939 {\r
1940 pulse_len = NEC_PULSE_LEN;\r
1941 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1942 }\r
1943 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
1944 {\r
1945 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1946\r
1947 pulse_len = NEC_PULSE_LEN;\r
1948 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1949 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1950 }\r
1951 }\r
1952 else\r
7644ac04 1953#endif\r
1954\r
5481e9cd 1955#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1956 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
1957 {\r
1958 if (current_bit == 0) // send 2nd start bit\r
1959 {\r
1960 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
1961 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
1962 }\r
1963 else if (current_bit == 1) // send 3rd start bit\r
1964 {\r
1965 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
1966 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
1967 }\r
1968 else if (current_bit == 2) // send 4th start bit\r
1969 {\r
1970 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
1971 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
1972 }\r
1973 else if (current_bit == 19) // send trailer bit\r
1974 {\r
1975 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
1976 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
1977 }\r
1978 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
1979 {\r
1980 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r
1981 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
1982\r
1983 if (cur_bit_value == last_bit_value)\r
1984 {\r
1985 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
1986 }\r
1987 else\r
1988 {\r
1989 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
1990 last_bit_value = cur_bit_value;\r
1991 }\r
1992 }\r
1993 }\r
1994 else\r
1995#endif\r
1996 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r
1997 {\r
1998 pulse_len = pulse_1_len;\r
1999 pause_len = pause_1_len;\r
2000 }\r
2001 else\r
2002 {\r
2003 pulse_len = pulse_0_len;\r
2004 pause_len = pause_0_len;\r
2005 }\r
2006 }\r
2007 else if (has_stop_bit) // send stop bit\r
2008 {\r
2009 pulse_len = pulse_0_len;\r
2010\r
2011 if (auto_repetition_counter < n_auto_repetitions)\r
2012 {\r
2013 pause_len = pause_0_len;\r
2014 }\r
2015 else\r
2016 {\r
2017 pause_len = 255; // last frame: pause of 255\r
2018 }\r
2019 }\r
2020 }\r
2021\r
2022 if (pulse_counter < pulse_len)\r
2023 {\r
2024 if (pulse_counter == 0)\r
2025 {\r
2026 irsnd_on ();\r
2027 }\r
2028 pulse_counter++;\r
2029 }\r
2030 else if (pause_counter < pause_len)\r
2031 {\r
2032 if (pause_counter == 0)\r
2033 {\r
2034 irsnd_off ();\r
2035 }\r
2036 pause_counter++;\r
2037 }\r
2038 else\r
2039 {\r
2040 current_bit++;\r
2041\r
2042 if (current_bit >= complete_data_len + has_stop_bit)\r
2043 {\r
2044 current_bit = 0xFF;\r
2045 auto_repetition_counter++;\r
2046\r
2047 if (auto_repetition_counter == n_auto_repetitions)\r
2048 {\r
2049 irsnd_busy = FALSE;\r
2050 auto_repetition_counter = 0;\r
2051 }\r
2052 new_frame = TRUE;\r
2053 }\r
2054\r
2055 pulse_counter = 0;\r
2056 pause_counter = 0;\r
2057 }\r
2058 break;\r
2059 }\r
a7054daf 2060#endif\r
2061\r
4225a882 2062#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 2063 case IRMP_RC5_PROTOCOL:\r
a7054daf 2064#endif\r
9547ee89 2065#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 2066 case IRMP_RC6_PROTOCOL:\r
9547ee89 2067#endif\r
2068#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2069 case IRMP_RC6A_PROTOCOL:\r
9547ee89 2070#endif\r
a7054daf 2071#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2072 case IRMP_SIEMENS_PROTOCOL:\r
a7054daf 2073#endif\r
2074#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2075 case IRMP_GRUNDIG_PROTOCOL:\r
a7054daf 2076#endif\r
a48187fa 2077#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2078 case IRMP_IR60_PROTOCOL:\r
a48187fa 2079#endif\r
a7054daf 2080#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2081 case IRMP_NOKIA_PROTOCOL:\r
fa09ce10 2082#endif\r
2083#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2084 case IRMP_A1TVBOX_PROTOCOL:\r
a7054daf 2085#endif\r
4225a882 2086\r
9547ee89 2087#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
fa09ce10 2088 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2089 {\r
2090 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
2091 {\r
2092 current_bit++;\r
4225a882 2093\r
e664a9f3 2094 if (current_bit >= complete_data_len)\r
2095 {\r
2096 current_bit = 0xFF;\r
a7054daf 2097\r
a48187fa 2098#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2099 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2100 {\r
2101 auto_repetition_counter++;\r
2102\r
2103 if (repeat_counter > 0)\r
2104 { // set 117 msec pause time\r
2105 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
2106 }\r
2107\r
2108 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2109 {\r
2110 n_auto_repetitions++; // increment number of auto repetitions\r
2111 repeat_counter++;\r
2112 }\r
2113 else if (auto_repetition_counter == n_auto_repetitions)\r
2114 {\r
2115 irsnd_busy = FALSE;\r
2116 auto_repetition_counter = 0;\r
2117 }\r
2118 }\r
2119 else\r
2120#endif\r
2121 {\r
2122 irsnd_busy = FALSE;\r
2123 }\r
2124\r
2125 new_frame = TRUE;\r
2126 irsnd_off ();\r
2127 }\r
2128\r
2129 pulse_counter = 0;\r
2130 pause_counter = 0;\r
2131 }\r
2132\r
2133 if (! new_frame)\r
2134 {\r
2135 uint8_t first_pulse;\r
5b437ff6 2136\r
a48187fa 2137#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2138 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2139 {\r
2140 if (current_bit == 0xFF || // start bit of start-frame\r
2141 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
2142 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
2143 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
2144 {\r
2145 pulse_len = startbit_pulse_len;\r
2146 pause_len = startbit_pause_len;\r
2147 first_pulse = TRUE;\r
2148 }\r
2149 else // send n'th bit\r
2150 {\r
2151 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2152 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2153 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2154 }\r
2155 }\r
2156 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
2157 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r
2158#endif\r
2159 {\r
2160 if (current_bit == 0xFF) // 1 start bit\r
2161 {\r
9547ee89 2162#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2163 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2164 {\r
2165 pulse_len = startbit_pulse_len;\r
2166 pause_len = startbit_pause_len;\r
2167 }\r
2168 else\r
fa09ce10 2169#endif\r
2170#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2171 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r
2172 {\r
2173 current_bit = 0;\r
2174 }\r
2175 else\r
2176#endif\r
2177 {\r
2178 ;\r
2179 }\r
2180\r
2181 first_pulse = TRUE;\r
2182 }\r
2183 else // send n'th bit\r
2184 {\r
9547ee89 2185#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2186 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2187 {\r
2188 pulse_len = RC6_BIT_LEN;\r
2189 pause_len = RC6_BIT_LEN;\r
2190\r
2191 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2192 {\r
2193 if (current_bit == 4) // toggle bit (double len)\r
2194 {\r
2195 pulse_len = 2 * RC6_BIT_LEN;\r
2196 pause_len = 2 * RC6_BIT_LEN;\r
2197 }\r
2198 }\r
2199 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2200 {\r
2201 if (current_bit == 4) // toggle bit (double len)\r
2202 {\r
2203 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2204 pause_len = 2 * RC6_BIT_LEN;\r
2205 }\r
2206 else if (current_bit == 5) // toggle bit (double len)\r
2207 {\r
2208 pause_len = 2 * RC6_BIT_LEN;\r
2209 }\r
2210 }\r
2211 }\r
2212#endif\r
2213 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2214 }\r
2215\r
2216 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2217 {\r
2218 first_pulse = first_pulse ? FALSE : TRUE;\r
2219 }\r
2220 }\r
2221\r
2222 if (first_pulse)\r
2223 {\r
2224 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2225\r
2226 if (pulse_counter < pulse_len)\r
2227 {\r
2228 if (pulse_counter == 0)\r
2229 {\r
2230 irsnd_on ();\r
2231 }\r
2232 pulse_counter++;\r
2233 }\r
2234 else // if (pause_counter < pause_len)\r
2235 {\r
2236 if (pause_counter == 0)\r
2237 {\r
2238 irsnd_off ();\r
2239 }\r
2240 pause_counter++;\r
2241 }\r
2242 }\r
2243 else\r
2244 {\r
2245 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2246\r
2247 if (pause_counter < pause_len)\r
2248 {\r
2249 if (pause_counter == 0)\r
2250 {\r
2251 irsnd_off ();\r
2252 }\r
2253 pause_counter++;\r
2254 }\r
2255 else // if (pulse_counter < pulse_len)\r
2256 {\r
2257 if (pulse_counter == 0)\r
2258 {\r
2259 irsnd_on ();\r
2260 }\r
2261 pulse_counter++;\r
2262 }\r
2263 }\r
2264 }\r
2265 break;\r
2266 }\r
9547ee89 2267#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
a48187fa 2268 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2269\r
e664a9f3 2270 default:\r
2271 {\r
2272 irsnd_busy = FALSE;\r
2273 break;\r
2274 }\r
2275 }\r
2276 }\r
2277\r
2278 if (! irsnd_busy)\r
2279 {\r
2280 if (repeat_counter < n_repeat_frames)\r
2281 {\r
c7c9a4a1 2282#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2283 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2284 {\r
2285 irsnd_buffer[2] |= 0x0F;\r
2286 }\r
2287#endif\r
2288 repeat_counter++;\r
2289 irsnd_busy = TRUE;\r
2290 }\r
2291 else\r
2292 {\r
2293 irsnd_busy = TRUE; //Rainer\r
2294 send_trailer = TRUE;\r
2295 n_repeat_frames = 0;\r
2296 repeat_counter = 0;\r
2297 }\r
2298 }\r
4225a882 2299 }\r
2300\r
2301#ifdef DEBUG\r
2302 if (irsnd_is_on)\r
2303 {\r
e664a9f3 2304 putchar ('0');\r
4225a882 2305 }\r
2306 else\r
2307 {\r
e664a9f3 2308 putchar ('1');\r
4225a882 2309 }\r
2310#endif\r
2311\r
2312 return irsnd_busy;\r
2313}\r
2314\r
2315#ifdef DEBUG\r
2316\r
2317// main function - for unix/linux + windows only!\r
2318// AVR: see main.c!\r
2319// Compile it under linux with:\r
2320// cc irsnd.c -o irsnd\r
2321//\r
2322// usage: ./irsnd protocol hex-address hex-command >filename\r
2323\r
2324int\r
2325main (int argc, char ** argv)\r
2326{\r
4225a882 2327 int protocol;\r
2328 int address;\r
2329 int command;\r
4225a882 2330 IRMP_DATA irmp_data;\r
2331\r
a7054daf 2332 if (argc != 4 && argc != 5)\r
4225a882 2333 {\r
e664a9f3 2334 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
2335 return 1;\r
4225a882 2336 }\r
2337\r
2338 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
e664a9f3 2339 sscanf (argv[2], "%x", &address) == 1 &&\r
2340 sscanf (argv[3], "%x", &command) == 1)\r
4225a882 2341 {\r
e664a9f3 2342 irmp_data.protocol = protocol;\r
2343 irmp_data.address = address;\r
2344 irmp_data.command = command;\r
4225a882 2345\r
e664a9f3 2346 if (argc == 5)\r
2347 {\r
2348 irmp_data.flags = atoi (argv[4]);\r
2349 }\r
2350 else\r
2351 {\r
2352 irmp_data.flags = 0;\r
2353 }\r
a7054daf 2354\r
e664a9f3 2355 irsnd_init ();\r
4225a882 2356\r
e664a9f3 2357 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2358\r
e664a9f3 2359 while (irsnd_busy)\r
2360 {\r
2361 irsnd_ISR ();\r
2362 }\r
beda975f 2363\r
e664a9f3 2364 putchar ('\n');\r
a03ad359 2365\r
f874da09 2366#if 1 // enable here to send twice\r
e664a9f3 2367 (void) irsnd_send_data (&irmp_data, TRUE);\r
a03ad359 2368\r
e664a9f3 2369 while (irsnd_busy)\r
2370 {\r
2371 irsnd_ISR ();\r
2372 }\r
a03ad359 2373\r
e664a9f3 2374 putchar ('\n');\r
f874da09 2375#endif\r
4225a882 2376 }\r
2377 else\r
2378 {\r
e664a9f3 2379 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2380 return 1;\r
4225a882 2381 }\r
2382 return 0;\r
2383}\r
2384\r
2385#endif // DEBUG\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)