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Version 2.9.4: added ACP24 protocol
[irmp.git] / irsnd.c
1 /*---------------------------------------------------------------------------------------------------------------------------------------------------
2 * @file irsnd.c
3 *
4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de
5 *
6 * Supported AVR mikrocontrollers:
7 *
8 * ATtiny87, ATtiny167
9 * ATtiny45, ATtiny85
10 * ATtiny44 ATtiny84
11 * ATmega8, ATmega16, ATmega32
12 * ATmega162
13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P
14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
15 *
16 * $Id: irsnd.c,v 1.90 2015/06/15 10:30:11 fm Exp $
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *---------------------------------------------------------------------------------------------------------------------------------------------------
23 */
24
25 #include "irsnd.h"
26
27 #ifndef F_CPU
28 # error F_CPU unkown
29 #endif
30
31 /*---------------------------------------------------------------------------------------------------------------------------------------------------
32 * ATtiny pin definition of OC0A / OC0B
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
34 *---------------------------------------------------------------------------------------------------------------------------------------------------
35 */
36 #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7
37 # if IRSND_OCx == IRSND_OC0A // OC0A
38 # define IRSND_PORT_LETTER B
39 # define IRSND_BIT_NUMBER 2
40 # elif IRSND_OCx == IRSND_OC0B // OC0B
41 # define IRSND_PORT_LETTER A
42 # define IRSND_BIT_NUMBER 7
43 # else
44 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
45 # endif // IRSND_OCx
46
47 #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1
48 # if IRSND_OCx == IRSND_OC0A // OC0A
49 # define IRSND_PORT_LETTER B
50 # define IRSND_BIT_NUMBER 0
51 # elif IRSND_OCx == IRSND_OC0B // OC0B
52 # define IRSND_PORT_LETTER B
53 # define IRSND_BIT_NUMBER 1
54 # else
55 # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h
56 # endif // IRSND_OCx
57
58 #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2
59 # if IRSND_OCx == IRSND_OC0A // OC0A
60 # define IRSND_PORT_LETTER A
61 # define IRSND_BIT_NUMBER 2
62 # else
63 # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h
64 # endif // IRSND_OCx
65
66 #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3
67 # if IRSND_OCx == IRSND_OC2 // OC0A
68 # define IRSND_PORT_LETTER B
69 # define IRSND_BIT_NUMBER 3
70 # else
71 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
72 # endif // IRSND_OCx
73 #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7
74 # if IRSND_OCx == IRSND_OC2 // OC2
75 # define IRSND_PORT_LETTER D
76 # define IRSND_BIT_NUMBER 7
77 # else
78 # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h
79 # endif // IRSND_OCx
80
81 #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0
82 # if IRSND_OCx == IRSND_OC2 // OC2
83 # define IRSND_PORT_LETTER B
84 # define IRSND_BIT_NUMBER 1
85 # elif IRSND_OCx == IRSND_OC0 // OC0
86 # define IRSND_PORT_LETTER B
87 # define IRSND_BIT_NUMBER 0
88 # else
89 # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h
90 # endif // IRSND_OCx
91
92 #elif defined (__AVR_ATmega164__) \
93 || defined (__AVR_ATmega324__) \
94 || defined (__AVR_ATmega644__) \
95 || defined (__AVR_ATmega644P__) \
96 || defined (__AVR_ATmega1284__) \
97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4
98 # if IRSND_OCx == IRSND_OC2A // OC2A
99 # define IRSND_PORT_LETTER D
100 # define IRSND_BIT_NUMBER 7
101 # elif IRSND_OCx == IRSND_OC2B // OC2B
102 # define IRSND_PORT_LETTER D
103 # define IRSND_BIT_NUMBER 6
104 # elif IRSND_OCx == IRSND_OC0A // OC0A
105 # define IRSND_PORT_LETTER B
106 # define IRSND_BIT_NUMBER 3
107 # elif IRSND_OCx == IRSND_OC0B // OC0B
108 # define IRSND_PORT_LETTER B
109 # define IRSND_BIT_NUMBER 4
110 # else
111 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
112 # endif // IRSND_OCx
113
114 #elif defined (__AVR_ATmega48__) \
115 || defined (__AVR_ATmega88__) \
116 || defined (__AVR_ATmega88P__) \
117 || defined (__AVR_ATmega168__) \
118 || defined (__AVR_ATmega168P__) \
119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5
120 # if IRSND_OCx == IRSND_OC2A // OC2A
121 # define IRSND_PORT_LETTER B
122 # define IRSND_BIT_NUMBER 3
123 # elif IRSND_OCx == IRSND_OC2B // OC2B
124 # define IRSND_PORT_LETTER D
125 # define IRSND_BIT_NUMBER 3
126 # elif IRSND_OCx == IRSND_OC0A // OC0A
127 # define IRSND_PORT_LETTER D
128 # define IRSND_BIT_NUMBER 6
129 # elif IRSND_OCx == IRSND_OC0B // OC0B
130 # define IRSND_PORT_LETTER D
131 # define IRSND_BIT_NUMBER 5
132 # else
133 # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h
134 # endif // IRSND_OCx
135
136 #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2
137 # if IRSND_OCx == IRSND_OC0
138 # define IRSND_PORT_LETTER B
139 # define IRSND_BIT_NUMBER 0
140 # elif IRSND_OCx == IRSND_OC1A
141 # define IRSND_PORT_LETTER D
142 # define IRSND_BIT_NUMBER 5
143 # elif IRSND_OCx == IRSND_OC1B
144 # define IRSND_PORT_LETTER E
145 # define IRSND_BIT_NUMBER 2
146 # endif // IRSND_OCx
147
148 #elif defined (__AVR_XMEGA__) // ATxmega
149 # if IRSND_OCx == IRSND_XMEGA_OC0A
150 # define IRSND_BIT_NUMBER 0
151 # elif IRSND_OCx == IRSND_XMEGA_OC0B
152 # define IRSND_BIT_NUMBER 1
153 # elif IRSND_OCx == IRSND_XMEGA_OC0C
154 # define IRSND_BIT_NUMBER 2
155 # elif IRSND_OCx == IRSND_XMEGA_OC0D
156 # define IRSND_BIT_NUMBER 3
157 # elif IRSND_OCx == IRSND_XMEGA_OC1A
158 # define IRSND_BIT_NUMBER 4
159 # elif IRSND_OCx == IRSND_XMEGA_OC1B
160 # define IRSND_BIT_NUMBER 5
161 # else
162 # error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h
163 # endif // IRSND_OCx
164
165 #elif defined (PIC_C18) //Microchip C18 compiler
166 //Nothing here to do here -> See irsndconfig.h
167 #elif defined (ARM_STM32) //STM32
168 //Nothing here to do here -> See irsndconfig.h
169 #else
170 # if !defined (unix) && !defined (WIN32)
171 # error mikrocontroller not defined, please fill in definitions here.
172 # endif // unix, WIN32
173 #endif // __AVR...
174
175 #if defined(__AVR_XMEGA__)
176 # define _CONCAT(a,b) a##b
177 # define CONCAT(a,b) _CONCAT(a,b)
178 # define IRSND_PORT IRSND_PORT_PRE.OUT
179 # define IRSND_DDR IRSND_PORT_PRE.DIR
180 # define IRSND_PIN IRSND_PORT_PRE.IN
181 # define IRSND_BIT IRSND_BIT_NUMBER
182 #elif defined(ATMEL_AVR)
183 # define _CONCAT(a,b) a##b
184 # define CONCAT(a,b) _CONCAT(a,b)
185 # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)
186 # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)
187 # define IRSND_BIT IRSND_BIT_NUMBER
188 #endif
189
190 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
191 typedef uint16_t IRSND_PAUSE_LEN;
192 #else
193 typedef uint8_t IRSND_PAUSE_LEN;
194 #endif
195
196 /*---------------------------------------------------------------------------------------------------------------------------------------------------
197 * IR timings
198 *---------------------------------------------------------------------------------------------------------------------------------------------------
199 */
200 #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)
201 #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)
202 #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)
203 #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)
204 #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)
205 #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
206 #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
207
208 #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)
209 #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)
210 #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
211 #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)
212 #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)
213 #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)
214 #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
215
216 #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)
217 #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)
218 #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)
219 #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)
220 #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)
221 #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
222
223 #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
224 #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
225
226 #define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
227 #define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
228
229 #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)
230 #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)
231 #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)
232 #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)
233 #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)
234 #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
235
236 #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)
237 #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)
238 #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)
239 #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)
240 #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)
241 #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
242 #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
243
244 #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)
245 #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)
246 #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)
247 #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)
248 #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)
249 #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
250
251 #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
252 #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)
253 #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
254
255 #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)
256 #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)
257 #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)
258 #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)
259 #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
260
261 #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)
262 #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)
263 #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)
264 #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
265 #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
266
267 #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)
268 #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)
269 #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)
270 #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
271 #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
272
273 #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)
274 #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)
275 #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)
276 #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)
277 #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)
278 #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
279
280 #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)
281 #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)
282 #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)
283 #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)
284 #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)
285 #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
286 #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
287
288 #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)
289 #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)
290 #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)
291 #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)
292 #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)
293 #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)
294 #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
295 #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
296
297 #define FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5)
298 #define FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5)
299 #define FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5)
300 #define FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5)
301 #define FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5)
302 #define FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5)
303 #define FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
304 #define FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
305
306 #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)
307 #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)
308 #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)
309 #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)
310 #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)
311 #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)
312 #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
313 #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
314
315 #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)
316 #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)
317 #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)
318 #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)
319 #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)
320 #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)
321 #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)
322 #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)
323 #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)
324 #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)
325 #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
326 #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
327
328 #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
329 #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
330 #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
331 #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
332 #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
333
334 #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
335
336 #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
337 #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
338 #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
339
340 #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)
341 #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)
342 #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
343 #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)
344 #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
345
346 #ifdef PIC_C18 // PIC C18
347 # define IRSND_FREQ_TYPE uint8_t
348 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
349 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
350 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
351 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
352 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
353 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
354 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
355 #elif defined (ARM_STM32) // STM32
356 # define IRSND_FREQ_TYPE uint32_t
357 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)
358 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)
359 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)
360 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)
361 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)
362 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)
363 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)
364 #else // AVR
365 # if F_CPU >= 16000000L
366 # define AVR_PRESCALER 8
367 # else
368 # define AVR_PRESCALER 1
369 # endif
370 # define IRSND_FREQ_TYPE uint8_t
371 # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)
372 # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)
373 # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)
374 # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)
375 # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)
376 # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)
377 # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)
378 #endif
379
380 #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
381 #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
382 #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)
383 #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)
384 #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)
385 #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
386
387 #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)
388 #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)
389 #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)
390 #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)
391 #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)
392 #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
393
394 #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)
395 #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)
396 #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)
397 #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)
398 #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)
399 #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)
400 #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
401
402 #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)
403 #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)
404 #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)
405 #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)
406 #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)
407 #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)
408 #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
409
410 #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)
411 #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)
412 #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)
413 #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)
414 #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)
415 #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
416 #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
417
418 #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)
419 #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)
420 #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)
421 #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)
422 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
423 #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
424
425 #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)
426 #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)
427 #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)
428 #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)
429 #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)
430 #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)
431 #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
432
433 #define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)
434 #define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)
435 #define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)
436 #define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)
437 #define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)
438 #define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)
439 #define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
440
441 #define ACP24_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME + 0.5)
442 #define ACP24_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME + 0.5)
443 #define ACP24_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_REPEAT_START_BIT_PAUSE_TIME + 0.5)
444 #define ACP24_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_PULSE_TIME + 0.5)
445 #define ACP24_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME + 0.5)
446 #define ACP24_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME + 0.5)
447 #define ACP24_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ACP24_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
448
449 static volatile uint8_t irsnd_busy = 0;
450 static volatile uint8_t irsnd_protocol = 0;
451 static volatile uint8_t irsnd_buffer[9] = {0};
452 static volatile uint8_t irsnd_repeat = 0;
453 static volatile uint8_t irsnd_is_on = FALSE;
454
455 #if IRSND_USE_CALLBACK == 1
456 static void (*irsnd_callback_ptr) (uint8_t);
457 #endif // IRSND_USE_CALLBACK == 1
458
459 /*---------------------------------------------------------------------------------------------------------------------------------------------------
460 * Switch PWM on
461 *---------------------------------------------------------------------------------------------------------------------------------------------------
462 */
463 static void
464 irsnd_on (void)
465 {
466 if (! irsnd_is_on)
467 {
468 #ifndef ANALYZE
469 # if defined(PIC_C18) // PIC C18
470 PWMon();
471 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
472
473 # elif defined (ARM_STM32) // STM32
474 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
475 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
476 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
477
478 # elif defined (__AVR_XMEGA__)
479 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
480 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A
481 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
482 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B
483 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
484 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C
485 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
486 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D
487 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
488 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A
489 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
490 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B
491 # else
492 # error wrong value of IRSND_OCx
493 # endif // IRSND_OCx
494
495 # else // AVR
496 # if IRSND_OCx == IRSND_OC2 // use OC2
497 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
498 # elif IRSND_OCx == IRSND_OC2A // use OC2A
499 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A
500 # elif IRSND_OCx == IRSND_OC2B // use OC2B
501 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)
502 # elif IRSND_OCx == IRSND_OC0 // use OC0
503 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0
504 # elif IRSND_OCx == IRSND_OC0A // use OC0A
505 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A
506 # elif IRSND_OCx == IRSND_OC0B // use OC0B
507 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)
508 # else
509 # error wrong value of IRSND_OCx
510 # endif // IRSND_OCx
511 # endif // C18
512 #endif // ANALYZE
513
514 #if IRSND_USE_CALLBACK == 1
515 if (irsnd_callback_ptr)
516 {
517 (*irsnd_callback_ptr) (TRUE);
518 }
519 #endif // IRSND_USE_CALLBACK == 1
520
521 irsnd_is_on = TRUE;
522 }
523 }
524
525 /*---------------------------------------------------------------------------------------------------------------------------------------------------
526 * Switch PWM off
527 * @details Switches PWM off
528 *---------------------------------------------------------------------------------------------------------------------------------------------------
529 */
530 static void
531 irsnd_off (void)
532 {
533 if (irsnd_is_on)
534 {
535 #ifndef ANALYZE
536
537 # if defined(PIC_C18) // PIC C18
538 PWMoff();
539 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
540
541 # elif defined (ARM_STM32) // STM32
542 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
543 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
544 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
545 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
546
547 # elif defined (__AVR_XMEGA__)
548 # if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A
549 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected
550 # elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B
551 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected
552 # elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C
553 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected
554 # elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D
555 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected
556 # elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A
557 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected
558 # elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B
559 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected
560 # else
561 # error wrong value of IRSND_OCx
562 # endif // IRSND_OCx
563
564 # else //AVR
565
566 # if IRSND_OCx == IRSND_OC2 // use OC2
567 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
568 # elif IRSND_OCx == IRSND_OC2A // use OC2A
569 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.
570 # elif IRSND_OCx == IRSND_OC2B // use OC2B
571 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.
572 # elif IRSND_OCx == IRSND_OC0 // use OC0
573 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.
574 # elif IRSND_OCx == IRSND_OC0A // use OC0A
575 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.
576 # elif IRSND_OCx == IRSND_OC0B // use OC0B
577 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.
578 # else
579 # error wrong value of IRSND_OCx
580 # endif // IRSND_OCx
581 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
582 # endif //C18
583 #endif // ANALYZE
584
585 #if IRSND_USE_CALLBACK == 1
586 if (irsnd_callback_ptr)
587 {
588 (*irsnd_callback_ptr) (FALSE);
589 }
590 #endif // IRSND_USE_CALLBACK == 1
591
592 irsnd_is_on = FALSE;
593 }
594 }
595
596 /*---------------------------------------------------------------------------------------------------------------------------------------------------
597 * Set PWM frequency
598 * @details sets pwm frequency
599 *---------------------------------------------------------------------------------------------------------------------------------------------------
600 */
601 #if defined(__12F1840)
602 extern void pwm_init(uint16_t freq);
603 #include <stdio.h>
604 #endif
605
606 static void
607 irsnd_set_freq (IRSND_FREQ_TYPE freq)
608 {
609 #ifndef ANALYZE
610 # if defined(PIC_C18) // PIC C18 or XC8
611 # if defined(__12F1840) // XC8
612 TRISA2=0;
613 PR2=freq;
614 CCP1M0=1;
615 CCP1M1=1;
616 CCP1M2=1;
617 CCP1M3=1;
618 DC1B0=1;
619 DC1B1=0;
620 CCPR1L = 0b01101001;
621 TMR2IF = 0;
622 TMR2ON=1;
623 CCP1CON &=(~0b0011); // p 197 "active high"
624 # else // PIC C18
625 OpenPWM(freq);
626 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%
627 # endif
628 PWMoff();
629 # elif defined (ARM_STM32) // STM32
630 static uint32_t TimeBaseFreq = 0;
631
632 if (TimeBaseFreq == 0)
633 {
634 RCC_ClocksTypeDef RCC_ClocksStructure;
635 /* Get system clocks and store timer clock in variable */
636 RCC_GetClocksFreq(&RCC_ClocksStructure);
637 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
638 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)
639 {
640 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;
641 }
642 else
643 {
644 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;
645 }
646 # else
647 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)
648 {
649 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;
650 }
651 else
652 {
653 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;
654 }
655 # endif
656 }
657
658 freq = TimeBaseFreq/freq;
659
660 /* Set frequency */
661 TIM_SetAutoreload(IRSND_TIMER, freq - 1);
662 /* Set duty cycle */
663 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
664
665 # elif defined (__AVR_XMEGA__)
666 XMEGA_Timer.CCA = freq;
667
668 # else // AVR
669
670 # if IRSND_OCx == IRSND_OC2
671 OCR2 = freq; // use register OCR2 for OC2
672 # elif IRSND_OCx == IRSND_OC2A // use OC2A
673 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
674 # elif IRSND_OCx == IRSND_OC2B // use OC2B
675 OCR2A = freq; // use register OCR2A for OC2A and OC2B!
676 # elif IRSND_OCx == IRSND_OC0 // use OC0
677 OCR0 = freq; // use register OCR2 for OC2
678 # elif IRSND_OCx == IRSND_OC0A // use OC0A
679 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
680 # elif IRSND_OCx == IRSND_OC0B // use OC0B
681 OCR0A = freq; // use register OCR0A for OC0A and OC0B!
682 # else
683 # error wrong value of IRSND_OCx
684 # endif
685 # endif //PIC_C18
686 #endif // ANALYZE
687 }
688
689 /*---------------------------------------------------------------------------------------------------------------------------------------------------
690 * Initialize the PWM
691 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels
692 *---------------------------------------------------------------------------------------------------------------------------------------------------
693 */
694 void
695 irsnd_init (void)
696 {
697 #ifndef ANALYZE
698 # if defined(PIC_C18) // PIC C18 or XC8 compiler
699 # if ! defined(__12F1840) // only C18:
700 OpenTimer;
701 # endif
702 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
703 IRSND_PIN = 0; // set IO to outout
704 PWMoff();
705 # elif defined (ARM_STM32) // STM32
706 GPIO_InitTypeDef GPIO_InitStructure;
707 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
708 TIM_OCInitTypeDef TIM_OCInitStructure;
709
710 /* GPIOx clock enable */
711 # if defined (ARM_STM32L1XX)
712 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);
713 # elif defined (ARM_STM32F10X)
714 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
715 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping
716 # elif defined (ARM_STM32F4XX)
717 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);
718 # endif
719
720 /* GPIO Configuration */
721 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;
722 # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)
723 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
724 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
725 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
726 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
727 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
728 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);
729 # elif defined (ARM_STM32F10X)
730 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
731 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
732 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);
733 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping
734 # endif
735
736 /* TIMx clock enable */
737 # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
738 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
739 # else
740 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);
741 # endif
742
743 /* Time base configuration */
744 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
745 TIM_TimeBaseStructure.TIM_Prescaler = 0;
746 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
747 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
748 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);
749
750 /* PWM1 Mode configuration */
751 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
752 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
753 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
754 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
755 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
756
757 /* Preload configuration */
758 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
759 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
760
761 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
762
763 # elif defined (__AVR_XMEGA__)
764 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
765 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
766
767 XMEGA_Timer.PER = 0xFFFF; //Topwert
768 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC
769
770 # if AVR_PRESCALER == 8
771 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8
772 # else
773 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1
774 # endif
775
776 # else // AVR
777 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
778 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
779
780 # if IRSND_OCx == IRSND_OC2 // use OC2
781 TCCR2 = (1<<WGM21); // CTC mode
782 # if AVR_PRESCALER == 8
783 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8
784 # else
785 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1
786 # endif
787 # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B
788 TCCR2A = (1<<WGM21); // CTC mode
789 # if AVR_PRESCALER == 8
790 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8
791 # else
792 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1
793 # endif
794 # elif IRSND_OCx == IRSND_OC0 // use OC0
795 TCCR0 = (1<<WGM01); // CTC mode
796 # if AVR_PRESCALER == 8
797 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8
798 # else
799 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1
800 # endif
801 # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B
802 TCCR0A = (1<<WGM01); // CTC mode
803 # if AVR_PRESCALER == 8
804 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8
805 # else
806 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1
807 # endif
808 # else
809 # error wrong value of IRSND_OCx
810 # endif
811 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
812 # endif //PIC_C18
813 #endif // ANALYZE
814 }
815
816 #if IRSND_USE_CALLBACK == 1
817 void
818 irsnd_set_callback_ptr (void (*cb)(uint8_t))
819 {
820 irsnd_callback_ptr = cb;
821 }
822 #endif // IRSND_USE_CALLBACK == 1
823
824 uint8_t
825 irsnd_is_busy (void)
826 {
827 return irsnd_busy;
828 }
829
830 static uint16_t
831 bitsrevervse (uint16_t x, uint8_t len)
832 {
833 uint16_t xx = 0;
834
835 while(len)
836 {
837 xx <<= 1;
838 if (x & 1)
839 {
840 xx |= 1;
841 }
842 x >>= 1;
843 len--;
844 }
845 return xx;
846 }
847
848
849 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
850 static uint8_t sircs_additional_bitlen;
851 #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1
852
853 uint8_t
854 irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)
855 {
856 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
857 static uint8_t toggle_bit_recs80;
858 #endif
859 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
860 static uint8_t toggle_bit_recs80ext;
861 #endif
862 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
863 static uint8_t toggle_bit_rc5;
864 #endif
865 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
866 static uint8_t toggle_bit_rc6;
867 #endif
868 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
869 static uint8_t toggle_bit_thomson;
870 #endif
871 uint16_t address;
872 uint16_t command;
873
874 if (do_wait)
875 {
876 while (irsnd_busy)
877 {
878 // do nothing;
879 }
880 }
881 else if (irsnd_busy)
882 {
883 return (FALSE);
884 }
885
886 irsnd_protocol = irmp_data_p->protocol;
887 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;
888
889 switch (irsnd_protocol)
890 {
891 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
892 case IRMP_SIRCS_PROTOCOL:
893 {
894 // uint8_t sircs_additional_command_len;
895 uint8_t sircs_additional_address_len;
896
897 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen
898
899 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)
900 {
901 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;
902 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);
903 }
904 else
905 {
906 // sircs_additional_command_len = sircs_additional_bitlen;
907 sircs_additional_address_len = 0;
908 }
909
910 command = bitsrevervse (irmp_data_p->command, 15);
911
912 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC
913 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****
914
915 if (sircs_additional_address_len > 0)
916 {
917 address = bitsrevervse (irmp_data_p->address, 5);
918 irsnd_buffer[1] |= (address & 0x0010) >> 4;
919 irsnd_buffer[2] = (address & 0x000F) << 4;
920 }
921 irsnd_busy = TRUE;
922 break;
923 }
924 #endif
925 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
926 case IRMP_APPLE_PROTOCOL:
927 {
928 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command
929 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)
930
931 address = bitsrevervse (address, NEC_ADDRESS_LEN);
932 command = bitsrevervse (command, NEC_COMMAND_LEN);
933
934 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command
935
936 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
937 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
938 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
939 irsnd_buffer[3] = 0x8B; // 10001011 (id)
940 irsnd_busy = TRUE;
941 break;
942 }
943 case IRMP_NEC_PROTOCOL:
944 {
945 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);
946 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);
947
948 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
949 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
950 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
951 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
952 irsnd_busy = TRUE;
953 break;
954 }
955 #endif
956 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
957 case IRMP_NEC16_PROTOCOL:
958 {
959 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);
960 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);
961
962 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA
963 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
964 irsnd_busy = TRUE;
965 break;
966 }
967 #endif
968 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
969 case IRMP_NEC42_PROTOCOL:
970 {
971 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);
972 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);
973
974 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA
975 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa
976 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa
977 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC
978 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc
979 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc
980 irsnd_busy = TRUE;
981 break;
982 }
983 #endif
984 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
985 case IRMP_LGAIR_PROTOCOL:
986 {
987 address = irmp_data_p->address;
988 command = irmp_data_p->command;
989
990 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA
991 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC
992 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC
993 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum
994 ((command & 0x0F00) >> 8) +
995 ((command & 0x00F0) >>4 ) +
996 ((command & 0x000F))) & 0x000F) << 4;
997 irsnd_busy = TRUE;
998 break;
999 }
1000 #endif
1001 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1002 case IRMP_SAMSUNG_PROTOCOL:
1003 {
1004 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1005 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);
1006
1007 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1008 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1009 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC
1010 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc
1011 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000
1012 irsnd_busy = TRUE;
1013 break;
1014 }
1015 case IRMP_SAMSUNG32_PROTOCOL:
1016 {
1017 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1018 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);
1019
1020 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1021 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1022 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC
1023 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC
1024 irsnd_busy = TRUE;
1025 break;
1026 }
1027 #endif
1028 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1029 case IRMP_SAMSUNG48_PROTOCOL:
1030 {
1031 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);
1032 command = bitsrevervse (irmp_data_p->command, 16);
1033
1034 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1035 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1036 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC
1037 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc
1038 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC
1039 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc
1040 irsnd_busy = TRUE;
1041 break;
1042 }
1043 #endif
1044 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1045 case IRMP_MATSUSHITA_PROTOCOL:
1046 {
1047 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);
1048 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);
1049
1050 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC
1051 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA
1052 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA
1053 irsnd_busy = TRUE;
1054 break;
1055 }
1056 #endif
1057 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1058 case IRMP_KASEIKYO_PROTOCOL:
1059 {
1060 uint8_t xor_value;
1061 uint16_t genre2;
1062
1063 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);
1064 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);
1065 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);
1066
1067 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;
1068
1069 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA
1070 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA
1071 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC
1072 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC
1073 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC
1074
1075 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];
1076
1077 irsnd_buffer[5] = xor_value;
1078 irsnd_busy = TRUE;
1079 break;
1080 }
1081 #endif
1082 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1083 case IRMP_RECS80_PROTOCOL:
1084 {
1085 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;
1086
1087 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |
1088 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC
1089 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000
1090 irsnd_busy = TRUE;
1091 break;
1092 }
1093 #endif
1094 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1095 case IRMP_RECS80EXT_PROTOCOL:
1096 {
1097 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;
1098
1099 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |
1100 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC
1101 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000
1102 irsnd_busy = TRUE;
1103 break;
1104 }
1105 #endif
1106 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1107 case IRMP_RC5_PROTOCOL:
1108 {
1109 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;
1110
1111 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |
1112 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC
1113 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000
1114 irsnd_busy = TRUE;
1115 break;
1116 }
1117 #endif
1118 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1119 case IRMP_RC6_PROTOCOL:
1120 {
1121 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1122
1123 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000
1124 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC
1125 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC
1126 irsnd_busy = TRUE;
1127 break;
1128 }
1129 #endif
1130 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1131 case IRMP_RC6A_PROTOCOL:
1132 {
1133 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;
1134
1135 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110
1136 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA
1137 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC
1138 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1139 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC
1140 irsnd_busy = TRUE;
1141 break;
1142 }
1143 #endif
1144 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1145 case IRMP_DENON_PROTOCOL:
1146 {
1147 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)
1148 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC
1149 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)
1150 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc
1151 irsnd_busy = TRUE;
1152 break;
1153 }
1154 #endif
1155 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1156 case IRMP_THOMSON_PROTOCOL:
1157 {
1158 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;
1159
1160 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)
1161 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC
1162 irsnd_busy = TRUE;
1163 break;
1164 }
1165 #endif
1166 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1167 case IRMP_NUBERT_PROTOCOL:
1168 {
1169 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1170 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1171 irsnd_busy = TRUE;
1172 break;
1173 }
1174 #endif
1175 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
1176 case IRMP_FAN_PROTOCOL:
1177 {
1178 irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC
1179 irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1180 irsnd_busy = TRUE;
1181 break;
1182 }
1183 #endif
1184 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1185 case IRMP_SPEAKER_PROTOCOL:
1186 {
1187 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC
1188 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000
1189 irsnd_busy = TRUE;
1190 break;
1191 }
1192 #endif
1193 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1194 case IRMP_BANG_OLUFSEN_PROTOCOL:
1195 {
1196 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC
1197 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC
1198 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000
1199 irsnd_busy = TRUE;
1200 break;
1201 }
1202 #endif
1203 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1204 case IRMP_GRUNDIG_PROTOCOL:
1205 {
1206 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);
1207
1208 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)
1209 irsnd_buffer[1] = 0xC0; // 11
1210 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)
1211 irsnd_buffer[3] = (command << 6) & 0xC0; // CC
1212
1213 irsnd_busy = TRUE;
1214 break;
1215 }
1216 #endif
1217 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1218 case IRMP_TELEFUNKEN_PROTOCOL:
1219 {
1220 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC
1221 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC
1222
1223 irsnd_busy = TRUE;
1224 break;
1225 }
1226 #endif
1227 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1228 case IRMP_IR60_PROTOCOL:
1229 {
1230 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);
1231 #if 0
1232 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)
1233 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)
1234 #else
1235 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)
1236 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)
1237 #endif
1238
1239 irsnd_busy = TRUE;
1240 break;
1241 }
1242 #endif
1243 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1244 case IRMP_NOKIA_PROTOCOL:
1245 {
1246 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);
1247 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);
1248
1249 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)
1250 irsnd_buffer[1] = 0xFF; // 11111111
1251 irsnd_buffer[2] = 0x80; // 1
1252 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)
1253 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA
1254 irsnd_buffer[5] = (address << 7); // A
1255
1256 irsnd_busy = TRUE;
1257 break;
1258 }
1259 #endif
1260 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
1261 case IRMP_SIEMENS_PROTOCOL:
1262 {
1263 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA
1264 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC
1265 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc
1266
1267 irsnd_busy = TRUE;
1268 break;
1269 }
1270 #endif
1271 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
1272 case IRMP_RUWIDO_PROTOCOL:
1273 {
1274 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA
1275 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC
1276 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c
1277 irsnd_busy = TRUE;
1278 break;
1279 }
1280 #endif
1281 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
1282 case IRMP_FDC_PROTOCOL:
1283 {
1284 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);
1285 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);
1286
1287 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA
1288 irsnd_buffer[1] = 0; // 00000000
1289 irsnd_buffer[2] = 0; // 0000RRRR
1290 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC
1291 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc
1292 irsnd_busy = TRUE;
1293 break;
1294 }
1295 #endif
1296 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
1297 case IRMP_RCCAR_PROTOCOL:
1298 {
1299 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1
1300 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V
1301
1302 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3
1303 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0
1304
1305 irsnd_busy = TRUE;
1306 break;
1307 }
1308 #endif
1309 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
1310 case IRMP_JVC_PROTOCOL:
1311 {
1312 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);
1313 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);
1314
1315 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC
1316 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC
1317
1318 irsnd_busy = TRUE;
1319 break;
1320 }
1321 #endif
1322 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
1323 case IRMP_NIKON_PROTOCOL:
1324 {
1325 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC
1326 irsnd_busy = TRUE;
1327 break;
1328 }
1329 #endif
1330 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
1331 case IRMP_LEGO_PROTOCOL:
1332 {
1333 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);
1334
1335 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC
1336 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc
1337 irsnd_busy = TRUE;
1338 break;
1339 }
1340 #endif
1341 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
1342 case IRMP_A1TVBOX_PROTOCOL:
1343 {
1344 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA
1345 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC
1346 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC
1347
1348 irsnd_busy = TRUE;
1349 break;
1350 }
1351 #endif
1352 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
1353 case IRMP_ROOMBA_PROTOCOL:
1354 {
1355 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.
1356 irsnd_busy = TRUE;
1357 break;
1358 }
1359 #endif
1360 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
1361 case IRMP_PENTAX_PROTOCOL:
1362 {
1363 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..
1364 irsnd_busy = TRUE;
1365 break;
1366 }
1367 #endif
1368 #if IRSND_SUPPORT_ACP24_PROTOCOL == 1
1369 # define ACP_SET_BIT(acp24_bitno, c, irmp_bitno) \
1370 do \
1371 { \
1372 if ((c) & (1<<(irmp_bitno))) \
1373 { \
1374 irsnd_buffer[((acp24_bitno)>>3)] |= 1 << (((7 - (acp24_bitno)) & 0x07)); \
1375 } \
1376 } while (0)
1377
1378 case IRMP_ACP24_PROTOCOL:
1379 {
1380 uint16_t cmd = irmp_data_p->command;
1381 uint8_t i;
1382
1383 address = bitsrevervse (irmp_data_p->address, ACP24_ADDRESS_LEN);
1384
1385 for (i = 0; i < 8; i++)
1386 {
1387 irsnd_buffer[i] = 0x00; // CCCCCCCC
1388 }
1389
1390 // ACP24-Frame:
1391 // 1 2 3 4 5 6
1392 // 0123456789012345678901234567890123456789012345678901234567890123456789
1393 // N VVMMM ? ??? t vmA x y TTTT
1394 //
1395 // irmp_data_p->command:
1396 //
1397 // 5432109876543210
1398 // NAVVvMMMmtxyTTTT
1399
1400 ACP_SET_BIT( 0, cmd, 15);
1401 ACP_SET_BIT(24, cmd, 14);
1402 ACP_SET_BIT( 2, cmd, 13);
1403 ACP_SET_BIT( 3, cmd, 12);
1404 ACP_SET_BIT(22, cmd, 11);
1405 ACP_SET_BIT( 4, cmd, 10);
1406 ACP_SET_BIT( 5, cmd, 9);
1407 ACP_SET_BIT( 6, cmd, 8);
1408 ACP_SET_BIT(23, cmd, 7);
1409 ACP_SET_BIT(20, cmd, 6);
1410 ACP_SET_BIT(26, cmd, 5);
1411 ACP_SET_BIT(44, cmd, 4);
1412 ACP_SET_BIT(66, cmd, 3);
1413 ACP_SET_BIT(67, cmd, 2);
1414 ACP_SET_BIT(68, cmd, 1);
1415 ACP_SET_BIT(69, cmd, 0);
1416
1417 irsnd_busy = TRUE;
1418 break;
1419 }
1420 #endif
1421
1422 default:
1423 {
1424 break;
1425 }
1426 }
1427
1428 return irsnd_busy;
1429 }
1430
1431 void
1432 irsnd_stop (void)
1433 {
1434 irsnd_repeat = 0;
1435 }
1436
1437 /*---------------------------------------------------------------------------------------------------------------------------------------------------
1438 * ISR routine
1439 * @details ISR routine, called 10000 times per second
1440 *---------------------------------------------------------------------------------------------------------------------------------------------------
1441 */
1442 uint8_t
1443 irsnd_ISR (void)
1444 {
1445 static uint8_t send_trailer = FALSE;
1446 static uint8_t current_bit = 0xFF;
1447 static uint8_t pulse_counter = 0;
1448 static IRSND_PAUSE_LEN pause_counter = 0;
1449 static uint8_t startbit_pulse_len = 0;
1450 static IRSND_PAUSE_LEN startbit_pause_len = 0;
1451 static uint8_t pulse_1_len = 0;
1452 static uint8_t pause_1_len = 0;
1453 static uint8_t pulse_0_len = 0;
1454 static uint8_t pause_0_len = 0;
1455 static uint8_t has_stop_bit = 0;
1456 static uint8_t new_frame = TRUE;
1457 static uint8_t complete_data_len = 0;
1458 static uint8_t n_repeat_frames = 0; // number of repetition frames
1459 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
1460 static uint8_t auto_repetition_counter = 0; // auto_repetition counter
1461 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
1462 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
1463 static uint8_t repeat_counter = 0; // repeat counter
1464 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
1465 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
1466 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1467 static uint8_t last_bit_value;
1468 #endif
1469 static uint8_t pulse_len = 0xFF;
1470 static IRSND_PAUSE_LEN pause_len = 0xFF;
1471
1472 if (irsnd_busy)
1473 {
1474 if (current_bit == 0xFF && new_frame) // start of transmission...
1475 {
1476 if (auto_repetition_counter > 0)
1477 {
1478 auto_repetition_pause_counter++;
1479
1480 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1481 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
1482 {
1483 repeat_frame_pause_len--;
1484 }
1485 #endif
1486
1487 if (auto_repetition_pause_counter >= auto_repetition_pause_len)
1488 {
1489 auto_repetition_pause_counter = 0;
1490
1491 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1492 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame
1493 {
1494 current_bit = 16;
1495 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;
1496 }
1497 else
1498 #endif
1499 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1500 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame
1501 {
1502 current_bit = 15;
1503 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;
1504 }
1505 else
1506 #endif
1507 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
1508 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame
1509 {
1510 current_bit = 7;
1511 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;
1512 }
1513 else
1514 #endif
1515 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
1516 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame
1517 {
1518 if (auto_repetition_counter + 1 < n_auto_repetitions)
1519 {
1520 current_bit = 23;
1521 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;
1522 }
1523 else // nokia stop frame
1524 {
1525 current_bit = 0xFF;
1526 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
1527 }
1528 }
1529 else
1530 #endif
1531 {
1532 ;
1533 }
1534 }
1535 else
1536 {
1537 #ifdef ANALYZE
1538 if (irsnd_is_on)
1539 {
1540 putchar ('0');
1541 }
1542 else
1543 {
1544 putchar ('1');
1545 }
1546 #endif
1547 return irsnd_busy;
1548 }
1549 }
1550 else if (packet_repeat_pause_counter < repeat_frame_pause_len)
1551 {
1552 packet_repeat_pause_counter++;
1553 #ifdef ANALYZE
1554 if (irsnd_is_on)
1555 {
1556 putchar ('0');
1557 }
1558 else
1559 {
1560 putchar ('1');
1561 }
1562 #endif
1563 return irsnd_busy;
1564 }
1565 else
1566 {
1567 if (send_trailer)
1568 {
1569 irsnd_busy = FALSE;
1570 send_trailer = FALSE;
1571 return irsnd_busy;
1572 }
1573
1574 n_repeat_frames = irsnd_repeat;
1575
1576 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)
1577 {
1578 n_repeat_frames = 255;
1579 }
1580
1581 packet_repeat_pause_counter = 0;
1582 pulse_counter = 0;
1583 pause_counter = 0;
1584
1585 switch (irsnd_protocol)
1586 {
1587 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
1588 case IRMP_SIRCS_PROTOCOL:
1589 {
1590 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;
1591 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;
1592 pulse_1_len = SIRCS_1_PULSE_LEN;
1593 pause_1_len = SIRCS_PAUSE_LEN - 1;
1594 pulse_0_len = SIRCS_0_PULSE_LEN;
1595 pause_0_len = SIRCS_PAUSE_LEN - 1;
1596 has_stop_bit = SIRCS_STOP_BIT;
1597 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;
1598 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame
1599 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause
1600 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;
1601 irsnd_set_freq (IRSND_FREQ_40_KHZ);
1602 break;
1603 }
1604 #endif
1605 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
1606 case IRMP_NEC_PROTOCOL:
1607 {
1608 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1609
1610 if (repeat_counter > 0)
1611 {
1612 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;
1613 complete_data_len = 0;
1614 }
1615 else
1616 {
1617 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1618 complete_data_len = NEC_COMPLETE_DATA_LEN;
1619 }
1620
1621 pulse_1_len = NEC_PULSE_LEN;
1622 pause_1_len = NEC_1_PAUSE_LEN - 1;
1623 pulse_0_len = NEC_PULSE_LEN;
1624 pause_0_len = NEC_0_PAUSE_LEN - 1;
1625 has_stop_bit = NEC_STOP_BIT;
1626 n_auto_repetitions = 1; // 1 frame
1627 auto_repetition_pause_len = 0;
1628 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1629 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1630 break;
1631 }
1632 #endif
1633 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
1634 case IRMP_NEC16_PROTOCOL:
1635 {
1636 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1637 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1638 pulse_1_len = NEC_PULSE_LEN;
1639 pause_1_len = NEC_1_PAUSE_LEN - 1;
1640 pulse_0_len = NEC_PULSE_LEN;
1641 pause_0_len = NEC_0_PAUSE_LEN - 1;
1642 has_stop_bit = NEC_STOP_BIT;
1643 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit
1644 n_auto_repetitions = 1; // 1 frame
1645 auto_repetition_pause_len = 0;
1646 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1647 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1648 break;
1649 }
1650 #endif
1651 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
1652 case IRMP_NEC42_PROTOCOL:
1653 {
1654 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1655 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1656 pulse_1_len = NEC_PULSE_LEN;
1657 pause_1_len = NEC_1_PAUSE_LEN - 1;
1658 pulse_0_len = NEC_PULSE_LEN;
1659 pause_0_len = NEC_0_PAUSE_LEN - 1;
1660 has_stop_bit = NEC_STOP_BIT;
1661 complete_data_len = NEC42_COMPLETE_DATA_LEN;
1662 n_auto_repetitions = 1; // 1 frame
1663 auto_repetition_pause_len = 0;
1664 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1665 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1666 break;
1667 }
1668 #endif
1669 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
1670 case IRMP_LGAIR_PROTOCOL:
1671 {
1672 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;
1673 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;
1674 pulse_1_len = NEC_PULSE_LEN;
1675 pause_1_len = NEC_1_PAUSE_LEN - 1;
1676 pulse_0_len = NEC_PULSE_LEN;
1677 pause_0_len = NEC_0_PAUSE_LEN - 1;
1678 has_stop_bit = NEC_STOP_BIT;
1679 complete_data_len = LGAIR_COMPLETE_DATA_LEN;
1680 n_auto_repetitions = 1; // 1 frame
1681 auto_repetition_pause_len = 0;
1682 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;
1683 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1684 break;
1685 }
1686 #endif
1687 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
1688 case IRMP_SAMSUNG_PROTOCOL:
1689 {
1690 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1691 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1692 pulse_1_len = SAMSUNG_PULSE_LEN;
1693 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1694 pulse_0_len = SAMSUNG_PULSE_LEN;
1695 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1696 has_stop_bit = SAMSUNG_STOP_BIT;
1697 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;
1698 n_auto_repetitions = 1; // 1 frame
1699 auto_repetition_pause_len = 0;
1700 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;
1701 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1702 break;
1703 }
1704
1705 case IRMP_SAMSUNG32_PROTOCOL:
1706 {
1707 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1708 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1709 pulse_1_len = SAMSUNG_PULSE_LEN;
1710 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1711 pulse_0_len = SAMSUNG_PULSE_LEN;
1712 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1713 has_stop_bit = SAMSUNG_STOP_BIT;
1714 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;
1715 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame
1716 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1717 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;
1718 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1719 break;
1720 }
1721 #endif
1722 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
1723 case IRMP_SAMSUNG48_PROTOCOL:
1724 {
1725 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;
1726 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
1727 pulse_1_len = SAMSUNG_PULSE_LEN;
1728 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;
1729 pulse_0_len = SAMSUNG_PULSE_LEN;
1730 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;
1731 has_stop_bit = SAMSUNG_STOP_BIT;
1732 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;
1733 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame
1734 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause
1735 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;
1736 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1737 break;
1738 }
1739 #endif
1740 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
1741 case IRMP_MATSUSHITA_PROTOCOL:
1742 {
1743 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;
1744 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;
1745 pulse_1_len = MATSUSHITA_PULSE_LEN;
1746 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;
1747 pulse_0_len = MATSUSHITA_PULSE_LEN;
1748 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;
1749 has_stop_bit = MATSUSHITA_STOP_BIT;
1750 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;
1751 n_auto_repetitions = 1; // 1 frame
1752 auto_repetition_pause_len = 0;
1753 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;
1754 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1755 break;
1756 }
1757 #endif
1758 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
1759 case IRMP_KASEIKYO_PROTOCOL:
1760 {
1761 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;
1762 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;
1763 pulse_1_len = KASEIKYO_PULSE_LEN;
1764 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;
1765 pulse_0_len = KASEIKYO_PULSE_LEN;
1766 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;
1767 has_stop_bit = KASEIKYO_STOP_BIT;
1768 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;
1769 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame
1770 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause
1771 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;
1772 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1773 break;
1774 }
1775 #endif
1776 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
1777 case IRMP_RECS80_PROTOCOL:
1778 {
1779 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;
1780 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;
1781 pulse_1_len = RECS80_PULSE_LEN;
1782 pause_1_len = RECS80_1_PAUSE_LEN - 1;
1783 pulse_0_len = RECS80_PULSE_LEN;
1784 pause_0_len = RECS80_0_PAUSE_LEN - 1;
1785 has_stop_bit = RECS80_STOP_BIT;
1786 complete_data_len = RECS80_COMPLETE_DATA_LEN;
1787 n_auto_repetitions = 1; // 1 frame
1788 auto_repetition_pause_len = 0;
1789 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;
1790 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1791 break;
1792 }
1793 #endif
1794 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
1795 case IRMP_RECS80EXT_PROTOCOL:
1796 {
1797 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;
1798 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;
1799 pulse_1_len = RECS80EXT_PULSE_LEN;
1800 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;
1801 pulse_0_len = RECS80EXT_PULSE_LEN;
1802 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;
1803 has_stop_bit = RECS80EXT_STOP_BIT;
1804 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;
1805 n_auto_repetitions = 1; // 1 frame
1806 auto_repetition_pause_len = 0;
1807 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;
1808 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1809 break;
1810 }
1811 #endif
1812 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
1813 case IRMP_TELEFUNKEN_PROTOCOL:
1814 {
1815 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;
1816 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;
1817 pulse_1_len = TELEFUNKEN_PULSE_LEN;
1818 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;
1819 pulse_0_len = TELEFUNKEN_PULSE_LEN;
1820 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;
1821 has_stop_bit = TELEFUNKEN_STOP_BIT;
1822 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;
1823 n_auto_repetitions = 1; // 1 frames
1824 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause
1825 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1826 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1827 break;
1828 }
1829 #endif
1830 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
1831 case IRMP_RC5_PROTOCOL:
1832 {
1833 startbit_pulse_len = RC5_BIT_LEN;
1834 startbit_pause_len = RC5_BIT_LEN;
1835 pulse_len = RC5_BIT_LEN;
1836 pause_len = RC5_BIT_LEN;
1837 has_stop_bit = RC5_STOP_BIT;
1838 complete_data_len = RC5_COMPLETE_DATA_LEN;
1839 n_auto_repetitions = 1; // 1 frame
1840 auto_repetition_pause_len = 0;
1841 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;
1842 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1843 break;
1844 }
1845 #endif
1846 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
1847 case IRMP_RC6_PROTOCOL:
1848 {
1849 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1850 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1851 pulse_len = RC6_BIT_LEN;
1852 pause_len = RC6_BIT_LEN;
1853 has_stop_bit = RC6_STOP_BIT;
1854 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;
1855 n_auto_repetitions = 1; // 1 frame
1856 auto_repetition_pause_len = 0;
1857 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1858 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1859 break;
1860 }
1861 #endif
1862 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
1863 case IRMP_RC6A_PROTOCOL:
1864 {
1865 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;
1866 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;
1867 pulse_len = RC6_BIT_LEN;
1868 pause_len = RC6_BIT_LEN;
1869 has_stop_bit = RC6_STOP_BIT;
1870 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;
1871 n_auto_repetitions = 1; // 1 frame
1872 auto_repetition_pause_len = 0;
1873 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;
1874 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1875 break;
1876 }
1877 #endif
1878 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
1879 case IRMP_DENON_PROTOCOL:
1880 {
1881 startbit_pulse_len = 0x00;
1882 startbit_pause_len = 0x00;
1883 pulse_1_len = DENON_PULSE_LEN;
1884 pause_1_len = DENON_1_PAUSE_LEN - 1;
1885 pulse_0_len = DENON_PULSE_LEN;
1886 pause_0_len = DENON_0_PAUSE_LEN - 1;
1887 has_stop_bit = DENON_STOP_BIT;
1888 complete_data_len = DENON_COMPLETE_DATA_LEN;
1889 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command
1890 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame
1891 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1892 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better
1893 break;
1894 }
1895 #endif
1896 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
1897 case IRMP_THOMSON_PROTOCOL:
1898 {
1899 startbit_pulse_len = 0x00;
1900 startbit_pause_len = 0x00;
1901 pulse_1_len = THOMSON_PULSE_LEN;
1902 pause_1_len = THOMSON_1_PAUSE_LEN - 1;
1903 pulse_0_len = THOMSON_PULSE_LEN;
1904 pause_0_len = THOMSON_0_PAUSE_LEN - 1;
1905 has_stop_bit = THOMSON_STOP_BIT;
1906 complete_data_len = THOMSON_COMPLETE_DATA_LEN;
1907 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame
1908 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;
1909 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;
1910 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1911 break;
1912 }
1913 #endif
1914 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
1915 case IRMP_NUBERT_PROTOCOL:
1916 {
1917 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;
1918 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;
1919 pulse_1_len = NUBERT_1_PULSE_LEN;
1920 pause_1_len = NUBERT_1_PAUSE_LEN - 1;
1921 pulse_0_len = NUBERT_0_PULSE_LEN;
1922 pause_0_len = NUBERT_0_PAUSE_LEN - 1;
1923 has_stop_bit = NUBERT_STOP_BIT;
1924 complete_data_len = NUBERT_COMPLETE_DATA_LEN;
1925 n_auto_repetitions = NUBERT_FRAMES; // 2 frames
1926 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1927 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;
1928 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1929 break;
1930 }
1931 #endif
1932 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
1933 case IRMP_FAN_PROTOCOL:
1934 {
1935 startbit_pulse_len = FAN_START_BIT_PULSE_LEN;
1936 startbit_pause_len = FAN_START_BIT_PAUSE_LEN - 1;
1937 pulse_1_len = FAN_1_PULSE_LEN;
1938 pause_1_len = FAN_1_PAUSE_LEN - 1;
1939 pulse_0_len = FAN_0_PULSE_LEN;
1940 pause_0_len = FAN_0_PAUSE_LEN - 1;
1941 has_stop_bit = FAN_STOP_BIT;
1942 complete_data_len = FAN_COMPLETE_DATA_LEN;
1943 n_auto_repetitions = FAN_FRAMES; // only 1 frame
1944 auto_repetition_pause_len = FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1945 repeat_frame_pause_len = FAN_FRAME_REPEAT_PAUSE_LEN;
1946 irsnd_set_freq (IRSND_FREQ_36_KHZ);
1947 break;
1948 }
1949 #endif
1950 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
1951 case IRMP_SPEAKER_PROTOCOL:
1952 {
1953 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;
1954 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;
1955 pulse_1_len = SPEAKER_1_PULSE_LEN;
1956 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;
1957 pulse_0_len = SPEAKER_0_PULSE_LEN;
1958 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;
1959 has_stop_bit = SPEAKER_STOP_BIT;
1960 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;
1961 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames
1962 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause
1963 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;
1964 irsnd_set_freq (IRSND_FREQ_38_KHZ);
1965 break;
1966 }
1967 #endif
1968 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
1969 case IRMP_BANG_OLUFSEN_PROTOCOL:
1970 {
1971 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;
1972 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;
1973 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;
1974 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;
1975 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;
1976 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;
1977 has_stop_bit = BANG_OLUFSEN_STOP_BIT;
1978 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;
1979 n_auto_repetitions = 1; // 1 frame
1980 auto_repetition_pause_len = 0;
1981 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;
1982 last_bit_value = 0;
1983 irsnd_set_freq (IRSND_FREQ_455_KHZ);
1984 break;
1985 }
1986 #endif
1987 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
1988 case IRMP_GRUNDIG_PROTOCOL:
1989 {
1990 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1991 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
1992 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1993 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
1994 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
1995 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;
1996 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames
1997 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
1998 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
1999 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2000 break;
2001 }
2002 #endif
2003 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2004 case IRMP_IR60_PROTOCOL:
2005 {
2006 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2007 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
2008 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2009 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2010 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
2011 complete_data_len = IR60_COMPLETE_DATA_LEN;
2012 n_auto_repetitions = IR60_FRAMES; // 2 frames
2013 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause
2014 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
2015 irsnd_set_freq (IRSND_FREQ_30_KHZ);
2016 break;
2017 }
2018 #endif
2019 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2020 case IRMP_NOKIA_PROTOCOL:
2021 {
2022 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2023 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;
2024 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2025 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2026 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;
2027 complete_data_len = NOKIA_COMPLETE_DATA_LEN;
2028 n_auto_repetitions = NOKIA_FRAMES; // 2 frames
2029 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause
2030 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause
2031 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2032 break;
2033 }
2034 #endif
2035 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2036 case IRMP_SIEMENS_PROTOCOL:
2037 {
2038 startbit_pulse_len = SIEMENS_BIT_LEN;
2039 startbit_pause_len = SIEMENS_BIT_LEN;
2040 pulse_len = SIEMENS_BIT_LEN;
2041 pause_len = SIEMENS_BIT_LEN;
2042 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
2043 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;
2044 n_auto_repetitions = 1; // 1 frame
2045 auto_repetition_pause_len = 0;
2046 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;
2047 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2048 break;
2049 }
2050 #endif
2051 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2052 case IRMP_RUWIDO_PROTOCOL:
2053 {
2054 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;
2055 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;
2056 pulse_len = RUWIDO_BIT_PULSE_LEN;
2057 pause_len = RUWIDO_BIT_PAUSE_LEN;
2058 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;
2059 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;
2060 n_auto_repetitions = 1; // 1 frame
2061 auto_repetition_pause_len = 0;
2062 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;
2063 irsnd_set_freq (IRSND_FREQ_36_KHZ);
2064 break;
2065 }
2066 #endif
2067 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2068 case IRMP_FDC_PROTOCOL:
2069 {
2070 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;
2071 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;
2072 complete_data_len = FDC_COMPLETE_DATA_LEN;
2073 pulse_1_len = FDC_PULSE_LEN;
2074 pause_1_len = FDC_1_PAUSE_LEN - 1;
2075 pulse_0_len = FDC_PULSE_LEN;
2076 pause_0_len = FDC_0_PAUSE_LEN - 1;
2077 has_stop_bit = FDC_STOP_BIT;
2078 n_auto_repetitions = 1; // 1 frame
2079 auto_repetition_pause_len = 0;
2080 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;
2081 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2082 break;
2083 }
2084 #endif
2085 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2086 case IRMP_RCCAR_PROTOCOL:
2087 {
2088 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;
2089 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;
2090 complete_data_len = RCCAR_COMPLETE_DATA_LEN;
2091 pulse_1_len = RCCAR_PULSE_LEN;
2092 pause_1_len = RCCAR_1_PAUSE_LEN - 1;
2093 pulse_0_len = RCCAR_PULSE_LEN;
2094 pause_0_len = RCCAR_0_PAUSE_LEN - 1;
2095 has_stop_bit = RCCAR_STOP_BIT;
2096 n_auto_repetitions = 1; // 1 frame
2097 auto_repetition_pause_len = 0;
2098 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;
2099 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2100 break;
2101 }
2102 #endif
2103 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2104 case IRMP_JVC_PROTOCOL:
2105 {
2106 if (repeat_counter != 0) // skip start bit if repetition frame
2107 {
2108 current_bit = 0;
2109 }
2110
2111 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;
2112 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;
2113 complete_data_len = JVC_COMPLETE_DATA_LEN;
2114 pulse_1_len = JVC_PULSE_LEN;
2115 pause_1_len = JVC_1_PAUSE_LEN - 1;
2116 pulse_0_len = JVC_PULSE_LEN;
2117 pause_0_len = JVC_0_PAUSE_LEN - 1;
2118 has_stop_bit = JVC_STOP_BIT;
2119 n_auto_repetitions = 1; // 1 frame
2120 auto_repetition_pause_len = 0;
2121 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;
2122 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2123 break;
2124 }
2125 #endif
2126 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2127 case IRMP_NIKON_PROTOCOL:
2128 {
2129 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;
2130 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;
2131 complete_data_len = NIKON_COMPLETE_DATA_LEN;
2132 pulse_1_len = NIKON_PULSE_LEN;
2133 pause_1_len = NIKON_1_PAUSE_LEN - 1;
2134 pulse_0_len = NIKON_PULSE_LEN;
2135 pause_0_len = NIKON_0_PAUSE_LEN - 1;
2136 has_stop_bit = NIKON_STOP_BIT;
2137 n_auto_repetitions = 1; // 1 frame
2138 auto_repetition_pause_len = 0;
2139 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;
2140 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2141 break;
2142 }
2143 #endif
2144 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2145 case IRMP_LEGO_PROTOCOL:
2146 {
2147 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;
2148 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;
2149 complete_data_len = LEGO_COMPLETE_DATA_LEN;
2150 pulse_1_len = LEGO_PULSE_LEN;
2151 pause_1_len = LEGO_1_PAUSE_LEN - 1;
2152 pulse_0_len = LEGO_PULSE_LEN;
2153 pause_0_len = LEGO_0_PAUSE_LEN - 1;
2154 has_stop_bit = LEGO_STOP_BIT;
2155 n_auto_repetitions = 1; // 1 frame
2156 auto_repetition_pause_len = 0;
2157 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;
2158 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2159 break;
2160 }
2161 #endif
2162 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2163 case IRMP_A1TVBOX_PROTOCOL:
2164 {
2165 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN
2166 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN
2167 pulse_len = A1TVBOX_BIT_PULSE_LEN;
2168 pause_len = A1TVBOX_BIT_PAUSE_LEN;
2169 has_stop_bit = A1TVBOX_STOP_BIT;
2170 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data
2171 n_auto_repetitions = 1; // 1 frame
2172 auto_repetition_pause_len = 0;
2173 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;
2174 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2175 break;
2176 }
2177 #endif
2178 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2179 case IRMP_ROOMBA_PROTOCOL:
2180 {
2181 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;
2182 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;
2183 pulse_1_len = ROOMBA_1_PULSE_LEN;
2184 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;
2185 pulse_0_len = ROOMBA_0_PULSE_LEN;
2186 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;
2187 has_stop_bit = ROOMBA_STOP_BIT;
2188 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;
2189 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames
2190 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2191 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;
2192 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2193 break;
2194 }
2195 #endif
2196 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2197 case IRMP_PENTAX_PROTOCOL:
2198 {
2199 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;
2200 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;
2201 complete_data_len = PENTAX_COMPLETE_DATA_LEN;
2202 pulse_1_len = PENTAX_PULSE_LEN;
2203 pause_1_len = PENTAX_1_PAUSE_LEN - 1;
2204 pulse_0_len = PENTAX_PULSE_LEN;
2205 pause_0_len = PENTAX_0_PAUSE_LEN - 1;
2206 has_stop_bit = PENTAX_STOP_BIT;
2207 n_auto_repetitions = 1; // 1 frame
2208 auto_repetition_pause_len = 0;
2209 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;
2210 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2211 break;
2212 }
2213 #endif
2214 #if IRSND_SUPPORT_ACP24_PROTOCOL == 1
2215 case IRMP_ACP24_PROTOCOL:
2216 {
2217 startbit_pulse_len = ACP24_START_BIT_PULSE_LEN;
2218 startbit_pause_len = ACP24_START_BIT_PAUSE_LEN - 1;
2219 complete_data_len = ACP24_COMPLETE_DATA_LEN;
2220 pulse_1_len = ACP24_PULSE_LEN;
2221 pause_1_len = ACP24_1_PAUSE_LEN - 1;
2222 pulse_0_len = ACP24_PULSE_LEN;
2223 pause_0_len = ACP24_0_PAUSE_LEN - 1;
2224 has_stop_bit = ACP24_STOP_BIT;
2225 n_auto_repetitions = 1; // 1 frame
2226 auto_repetition_pause_len = 0;
2227 repeat_frame_pause_len = ACP24_FRAME_REPEAT_PAUSE_LEN;
2228 irsnd_set_freq (IRSND_FREQ_38_KHZ);
2229 break;
2230 }
2231 #endif
2232 default:
2233 {
2234 irsnd_busy = FALSE;
2235 break;
2236 }
2237 }
2238 }
2239 }
2240
2241 if (irsnd_busy)
2242 {
2243 new_frame = FALSE;
2244
2245 switch (irsnd_protocol)
2246 {
2247 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1
2248 case IRMP_SIRCS_PROTOCOL:
2249 #endif
2250 #if IRSND_SUPPORT_NEC_PROTOCOL == 1
2251 case IRMP_NEC_PROTOCOL:
2252 #endif
2253 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2254 case IRMP_NEC16_PROTOCOL:
2255 #endif
2256 #if IRSND_SUPPORT_NEC42_PROTOCOL == 1
2257 case IRMP_NEC42_PROTOCOL:
2258 #endif
2259 #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1
2260 case IRMP_LGAIR_PROTOCOL:
2261 #endif
2262 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2263 case IRMP_SAMSUNG_PROTOCOL:
2264 case IRMP_SAMSUNG32_PROTOCOL:
2265 #endif
2266 #if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1
2267 case IRMP_SAMSUNG48_PROTOCOL:
2268 #endif
2269 #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1
2270 case IRMP_MATSUSHITA_PROTOCOL:
2271 #endif
2272 #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1
2273 case IRMP_KASEIKYO_PROTOCOL:
2274 #endif
2275 #if IRSND_SUPPORT_RECS80_PROTOCOL == 1
2276 case IRMP_RECS80_PROTOCOL:
2277 #endif
2278 #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1
2279 case IRMP_RECS80EXT_PROTOCOL:
2280 #endif
2281 #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1
2282 case IRMP_TELEFUNKEN_PROTOCOL:
2283 #endif
2284 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2285 case IRMP_DENON_PROTOCOL:
2286 #endif
2287 #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1
2288 case IRMP_NUBERT_PROTOCOL:
2289 #endif
2290 #if IRSND_SUPPORT_FAN_PROTOCOL == 1
2291 case IRMP_FAN_PROTOCOL:
2292 #endif
2293 #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1
2294 case IRMP_SPEAKER_PROTOCOL:
2295 #endif
2296 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2297 case IRMP_BANG_OLUFSEN_PROTOCOL:
2298 #endif
2299 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2300 case IRMP_FDC_PROTOCOL:
2301 #endif
2302 #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1
2303 case IRMP_RCCAR_PROTOCOL:
2304 #endif
2305 #if IRSND_SUPPORT_JVC_PROTOCOL == 1
2306 case IRMP_JVC_PROTOCOL:
2307 #endif
2308 #if IRSND_SUPPORT_NIKON_PROTOCOL == 1
2309 case IRMP_NIKON_PROTOCOL:
2310 #endif
2311 #if IRSND_SUPPORT_LEGO_PROTOCOL == 1
2312 case IRMP_LEGO_PROTOCOL:
2313 #endif
2314 #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1
2315 case IRMP_THOMSON_PROTOCOL:
2316 #endif
2317 #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1
2318 case IRMP_ROOMBA_PROTOCOL:
2319 #endif
2320 #if IRSND_SUPPORT_PENTAX_PROTOCOL == 1
2321 case IRMP_PENTAX_PROTOCOL:
2322 #endif
2323 #if IRSND_SUPPORT_ACP24_PROTOCOL == 1
2324 case IRMP_ACP24_PROTOCOL:
2325 #endif
2326
2327 #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \
2328 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \
2329 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \
2330 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \
2331 IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \
2332 IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \
2333 IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1
2334 {
2335 #if IRSND_SUPPORT_DENON_PROTOCOL == 1
2336 if (irsnd_protocol == IRMP_DENON_PROTOCOL)
2337 {
2338 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!
2339 {
2340 auto_repetition_pause_len--;
2341 }
2342
2343 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!
2344 {
2345 repeat_frame_pause_len--;
2346 }
2347 }
2348 #endif
2349
2350 if (pulse_counter == 0)
2351 {
2352 if (current_bit == 0xFF) // send start bit
2353 {
2354 pulse_len = startbit_pulse_len;
2355 pause_len = startbit_pause_len;
2356 }
2357 else if (current_bit < complete_data_len) // send n'th bit
2358 {
2359 #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1
2360 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)
2361 {
2362 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits
2363 {
2364 pulse_len = SAMSUNG_PULSE_LEN;
2365 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2366 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2367 }
2368 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)
2369 {
2370 pulse_len = SAMSUNG_PULSE_LEN;
2371 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;
2372 }
2373 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit
2374 {
2375 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2376
2377 pulse_len = SAMSUNG_PULSE_LEN;
2378 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2379 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);
2380 }
2381 }
2382 else
2383 #endif
2384
2385 #if IRSND_SUPPORT_NEC16_PROTOCOL == 1
2386 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)
2387 {
2388 if (current_bit < NEC16_ADDRESS_LEN) // send address bits
2389 {
2390 pulse_len = NEC_PULSE_LEN;
2391 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?
2392 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2393 }
2394 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)
2395 {
2396 pulse_len = NEC_PULSE_LEN;
2397 pause_len = NEC_START_BIT_PAUSE_LEN - 1;
2398 }
2399 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit
2400 {
2401 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !
2402
2403 pulse_len = NEC_PULSE_LEN;
2404 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?
2405 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);
2406 }
2407 }
2408 else
2409 #endif
2410
2411 #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
2412 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)
2413 {
2414 if (current_bit == 0) // send 2nd start bit
2415 {
2416 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2417 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2418 }
2419 else if (current_bit == 1) // send 3rd start bit
2420 {
2421 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;
2422 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;
2423 }
2424 else if (current_bit == 2) // send 4th start bit
2425 {
2426 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;
2427 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;
2428 }
2429 else if (current_bit == 19) // send trailer bit
2430 {
2431 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2432 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;
2433 }
2434 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit
2435 {
2436 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;
2437 pulse_len = BANG_OLUFSEN_PULSE_LEN;
2438
2439 if (cur_bit_value == last_bit_value)
2440 {
2441 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;
2442 }
2443 else
2444 {
2445 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);
2446 last_bit_value = cur_bit_value;
2447 }
2448 }
2449 }
2450 else
2451 #endif
2452 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))
2453 {
2454 pulse_len = pulse_1_len;
2455 pause_len = pause_1_len;
2456 }
2457 else
2458 {
2459 pulse_len = pulse_0_len;
2460 pause_len = pause_0_len;
2461 }
2462 }
2463 else if (has_stop_bit) // send stop bit
2464 {
2465 pulse_len = pulse_0_len;
2466
2467 if (auto_repetition_counter < n_auto_repetitions)
2468 {
2469 pause_len = pause_0_len;
2470 }
2471 else
2472 {
2473 pause_len = 255; // last frame: pause of 255
2474 }
2475 }
2476 }
2477
2478 if (pulse_counter < pulse_len)
2479 {
2480 if (pulse_counter == 0)
2481 {
2482 irsnd_on ();
2483 }
2484 pulse_counter++;
2485 }
2486 else if (pause_counter < pause_len)
2487 {
2488 if (pause_counter == 0)
2489 {
2490 irsnd_off ();
2491 }
2492 pause_counter++;
2493 }
2494 else
2495 {
2496 current_bit++;
2497
2498 if (current_bit >= complete_data_len + has_stop_bit)
2499 {
2500 current_bit = 0xFF;
2501 auto_repetition_counter++;
2502
2503 if (auto_repetition_counter == n_auto_repetitions)
2504 {
2505 irsnd_busy = FALSE;
2506 auto_repetition_counter = 0;
2507 }
2508 new_frame = TRUE;
2509 }
2510
2511 pulse_counter = 0;
2512 pause_counter = 0;
2513 }
2514 break;
2515 }
2516 #endif
2517
2518 #if IRSND_SUPPORT_RC5_PROTOCOL == 1
2519 case IRMP_RC5_PROTOCOL:
2520 #endif
2521 #if IRSND_SUPPORT_RC6_PROTOCOL == 1
2522 case IRMP_RC6_PROTOCOL:
2523 #endif
2524 #if IRSND_SUPPORT_RC6A_PROTOCOL == 1
2525 case IRMP_RC6A_PROTOCOL:
2526 #endif
2527 #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1
2528 case IRMP_SIEMENS_PROTOCOL:
2529 #endif
2530 #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1
2531 case IRMP_RUWIDO_PROTOCOL:
2532 #endif
2533 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1
2534 case IRMP_GRUNDIG_PROTOCOL:
2535 #endif
2536 #if IRSND_SUPPORT_IR60_PROTOCOL == 1
2537 case IRMP_IR60_PROTOCOL:
2538 #endif
2539 #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2540 case IRMP_NOKIA_PROTOCOL:
2541 #endif
2542 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2543 case IRMP_A1TVBOX_PROTOCOL:
2544 #endif
2545
2546 #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \
2547 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \
2548 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \
2549 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \
2550 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \
2551 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \
2552 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \
2553 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \
2554 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2555 {
2556 if (pulse_counter == pulse_len && pause_counter == pause_len)
2557 {
2558 current_bit++;
2559
2560 if (current_bit >= complete_data_len)
2561 {
2562 current_bit = 0xFF;
2563
2564 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2565 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2566 {
2567 auto_repetition_counter++;
2568
2569 if (repeat_counter > 0)
2570 { // set 117 msec pause time
2571 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;
2572 }
2573
2574 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame
2575 {
2576 n_auto_repetitions++; // increment number of auto repetitions
2577 repeat_counter++;
2578 }
2579 else if (auto_repetition_counter == n_auto_repetitions)
2580 {
2581 irsnd_busy = FALSE;
2582 auto_repetition_counter = 0;
2583 }
2584 }
2585 else
2586 #endif
2587 {
2588 irsnd_busy = FALSE;
2589 }
2590
2591 new_frame = TRUE;
2592 irsnd_off ();
2593 }
2594
2595 pulse_counter = 0;
2596 pause_counter = 0;
2597 }
2598
2599 if (! new_frame)
2600 {
2601 uint8_t first_pulse;
2602
2603 #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2604 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)
2605 {
2606 if (current_bit == 0xFF || // start bit of start-frame
2607 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)
2608 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)
2609 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)
2610 {
2611 pulse_len = startbit_pulse_len;
2612 pause_len = startbit_pause_len;
2613 first_pulse = TRUE;
2614 }
2615 else // send n'th bit
2616 {
2617 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2618 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;
2619 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2620 }
2621 }
2622 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||
2623 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)
2624 #endif
2625 {
2626 if (current_bit == 0xFF) // 1 start bit
2627 {
2628 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2629 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2630 {
2631 pulse_len = startbit_pulse_len;
2632 pause_len = startbit_pause_len;
2633 }
2634 else
2635 #endif
2636 #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1
2637 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)
2638 {
2639 current_bit = 0;
2640 }
2641 else
2642 #endif
2643 {
2644 ;
2645 }
2646
2647 first_pulse = TRUE;
2648 }
2649 else // send n'th bit
2650 {
2651 #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1
2652 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)
2653 {
2654 pulse_len = RC6_BIT_LEN;
2655 pause_len = RC6_BIT_LEN;
2656
2657 if (irsnd_protocol == IRMP_RC6_PROTOCOL)
2658 {
2659 if (current_bit == 4) // toggle bit (double len)
2660 {
2661 pulse_len = 2 * RC6_BIT_LEN;
2662 pause_len = 2 * RC6_BIT_LEN;
2663 }
2664 }
2665 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)
2666 {
2667 if (current_bit == 4) // toggle bit (double len)
2668 {
2669 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!
2670 pause_len = 2 * RC6_BIT_LEN;
2671 }
2672 else if (current_bit == 5) // toggle bit (double len)
2673 {
2674 pause_len = 2 * RC6_BIT_LEN;
2675 }
2676 }
2677 }
2678 #endif
2679 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;
2680 }
2681
2682 if (irsnd_protocol == IRMP_RC5_PROTOCOL)
2683 {
2684 first_pulse = first_pulse ? FALSE : TRUE;
2685 }
2686 }
2687
2688 if (first_pulse)
2689 {
2690 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2691
2692 if (pulse_counter < pulse_len)
2693 {
2694 if (pulse_counter == 0)
2695 {
2696 irsnd_on ();
2697 }
2698 pulse_counter++;
2699 }
2700 else // if (pause_counter < pause_len)
2701 {
2702 if (pause_counter == 0)
2703 {
2704 irsnd_off ();
2705 }
2706 pause_counter++;
2707 }
2708 }
2709 else
2710 {
2711 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);
2712
2713 if (pause_counter < pause_len)
2714 {
2715 if (pause_counter == 0)
2716 {
2717 irsnd_off ();
2718 }
2719 pause_counter++;
2720 }
2721 else // if (pulse_counter < pulse_len)
2722 {
2723 if (pulse_counter == 0)
2724 {
2725 irsnd_on ();
2726 }
2727 pulse_counter++;
2728 }
2729 }
2730 }
2731 break;
2732 }
2733 #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||
2734 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1
2735
2736 default:
2737 {
2738 irsnd_busy = FALSE;
2739 break;
2740 }
2741 }
2742 }
2743
2744 if (! irsnd_busy)
2745 {
2746 if (repeat_counter < n_repeat_frames)
2747 {
2748 #if IRSND_SUPPORT_FDC_PROTOCOL == 1
2749 if (irsnd_protocol == IRMP_FDC_PROTOCOL)
2750 {
2751 irsnd_buffer[2] |= 0x0F;
2752 }
2753 #endif
2754 repeat_counter++;
2755 irsnd_busy = TRUE;
2756 }
2757 else
2758 {
2759 irsnd_busy = TRUE; //Rainer
2760 send_trailer = TRUE;
2761 n_repeat_frames = 0;
2762 repeat_counter = 0;
2763 }
2764 }
2765 }
2766
2767 #ifdef ANALYZE
2768 if (irsnd_is_on)
2769 {
2770 putchar ('0');
2771 }
2772 else
2773 {
2774 putchar ('1');
2775 }
2776 #endif
2777
2778 return irsnd_busy;
2779 }
2780
2781 #ifdef ANALYZE
2782
2783 // main function - for unix/linux + windows only!
2784 // AVR: see main.c!
2785 // Compile it under linux with:
2786 // cc irsnd.c -o irsnd
2787 //
2788 // usage: ./irsnd protocol hex-address hex-command >filename
2789
2790 int
2791 main (int argc, char ** argv)
2792 {
2793 int protocol;
2794 int address;
2795 int command;
2796 IRMP_DATA irmp_data;
2797
2798 if (argc != 4 && argc != 5)
2799 {
2800 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);
2801 return 1;
2802 }
2803
2804 if (sscanf (argv[1], "%d", &protocol) == 1 &&
2805 sscanf (argv[2], "%x", &address) == 1 &&
2806 sscanf (argv[3], "%x", &command) == 1)
2807 {
2808 irmp_data.protocol = protocol;
2809 irmp_data.address = address;
2810 irmp_data.command = command;
2811
2812 if (argc == 5)
2813 {
2814 irmp_data.flags = atoi (argv[4]);
2815 }
2816 else
2817 {
2818 irmp_data.flags = 0;
2819 }
2820
2821 irsnd_init ();
2822
2823 (void) irsnd_send_data (&irmp_data, TRUE);
2824
2825 while (irsnd_busy)
2826 {
2827 irsnd_ISR ();
2828 }
2829
2830 putchar ('\n');
2831
2832 #if 1 // enable here to send twice
2833 (void) irsnd_send_data (&irmp_data, TRUE);
2834
2835 while (irsnd_busy)
2836 {
2837 irsnd_ISR ();
2838 }
2839
2840 putchar ('\n');
2841 #endif
2842 }
2843 else
2844 {
2845 fprintf (stderr, "%s: wrong arguments\n", argv[0]);
2846 return 1;
2847 }
2848 return 0;
2849 }
2850
2851 #endif // ANALYZE
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)