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Version 2.9.4: added ACP24 protocol
[irmp.git] / irsnd.c
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4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
0834784c 4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
622f5f59 6 * Supported AVR mikrocontrollers:\r
7644ac04 7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
2ac088b2 10 * ATtiny44 ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
e664a9f3 13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
7644ac04 14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
43c535be 16 * $Id: irsnd.c,v 1.90 2015/06/15 10:30:11 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
2ac088b2 36#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
08f2dd9d 37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
ad4d3d41 46\r
08f2dd9d 47#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
48# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 49# define IRSND_PORT_LETTER B\r
50# define IRSND_BIT_NUMBER 0\r
08f2dd9d 51# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 52# define IRSND_PORT_LETTER B\r
53# define IRSND_BIT_NUMBER 1\r
08f2dd9d 54# else\r
55# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
56# endif // IRSND_OCx\r
ad4d3d41 57\r
21a4e0ee 58#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 59# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 60# define IRSND_PORT_LETTER A\r
61# define IRSND_BIT_NUMBER 2\r
90387f65 62# else\r
63# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
64# endif // IRSND_OCx\r
ad4d3d41 65\r
08f2dd9d 66#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
67# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 68# define IRSND_PORT_LETTER B\r
69# define IRSND_BIT_NUMBER 3\r
08f2dd9d 70# else\r
71# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
72# endif // IRSND_OCx\r
73#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
74# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 75# define IRSND_PORT_LETTER D\r
76# define IRSND_BIT_NUMBER 7\r
08f2dd9d 77# else\r
78# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
79# endif // IRSND_OCx\r
ad4d3d41 80\r
08f2dd9d 81#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
82# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 83# define IRSND_PORT_LETTER B\r
84# define IRSND_BIT_NUMBER 1\r
08f2dd9d 85# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 86# define IRSND_PORT_LETTER B\r
87# define IRSND_BIT_NUMBER 0\r
08f2dd9d 88# else\r
89# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
90# endif // IRSND_OCx\r
ad4d3d41 91\r
f50e01e7 92#elif defined (__AVR_ATmega164__) \\r
93 || defined (__AVR_ATmega324__) \\r
94 || defined (__AVR_ATmega644__) \\r
95 || defined (__AVR_ATmega644P__) \\r
0f700c8e 96 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
98# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 99# define IRSND_PORT_LETTER D\r
100# define IRSND_BIT_NUMBER 7\r
08f2dd9d 101# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 102# define IRSND_PORT_LETTER D\r
103# define IRSND_BIT_NUMBER 6\r
08f2dd9d 104# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 105# define IRSND_PORT_LETTER B\r
106# define IRSND_BIT_NUMBER 3\r
08f2dd9d 107# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 108# define IRSND_PORT_LETTER B\r
109# define IRSND_BIT_NUMBER 4\r
08f2dd9d 110# else\r
111# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
112# endif // IRSND_OCx\r
ad4d3d41 113\r
f50e01e7 114#elif defined (__AVR_ATmega48__) \\r
115 || defined (__AVR_ATmega88__) \\r
7644ac04 116 || defined (__AVR_ATmega88P__) \\r
f50e01e7 117 || defined (__AVR_ATmega168__) \\r
1f54e86c 118 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
120# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 121# define IRSND_PORT_LETTER B\r
122# define IRSND_BIT_NUMBER 3\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 3\r
08f2dd9d 126# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 127# define IRSND_PORT_LETTER D\r
128# define IRSND_BIT_NUMBER 6\r
08f2dd9d 129# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 130# define IRSND_PORT_LETTER D\r
131# define IRSND_BIT_NUMBER 5\r
08f2dd9d 132# else\r
133# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
134# endif // IRSND_OCx\r
ad4d3d41 135\r
f874da09 136#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 137# if IRSND_OCx == IRSND_OC0 \r
f874da09 138# define IRSND_PORT_LETTER B\r
139# define IRSND_BIT_NUMBER 0\r
08f2dd9d 140# elif IRSND_OCx == IRSND_OC1A \r
f874da09 141# define IRSND_PORT_LETTER D\r
142# define IRSND_BIT_NUMBER 5\r
08f2dd9d 143# elif IRSND_OCx == IRSND_OC1B \r
f874da09 144# define IRSND_PORT_LETTER E\r
145# define IRSND_BIT_NUMBER 2\r
ad4d3d41 146# endif // IRSND_OCx\r
147\r
c2b70f0b 148#elif defined (__AVR_XMEGA__) // ATxmega\r
ad4d3d41 149# if IRSND_OCx == IRSND_XMEGA_OC0A \r
150# define IRSND_BIT_NUMBER 0\r
151# elif IRSND_OCx == IRSND_XMEGA_OC0B\r
152# define IRSND_BIT_NUMBER 1\r
153# elif IRSND_OCx == IRSND_XMEGA_OC0C\r
154# define IRSND_BIT_NUMBER 2\r
155# elif IRSND_OCx == IRSND_XMEGA_OC0D\r
156# define IRSND_BIT_NUMBER 3\r
157# elif IRSND_OCx == IRSND_XMEGA_OC1A\r
158# define IRSND_BIT_NUMBER 4\r
159# elif IRSND_OCx == IRSND_XMEGA_OC1B\r
160# define IRSND_BIT_NUMBER 5\r
08f2dd9d 161# else\r
c2b70f0b 162# error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h\r
08f2dd9d 163# endif // IRSND_OCx\r
ad4d3d41 164\r
9c86ff1a 165#elif defined (PIC_C18) //Microchip C18 compiler\r
166 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 167#elif defined (ARM_STM32) //STM32\r
168 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 169#else\r
08f2dd9d 170# if !defined (unix) && !defined (WIN32)\r
171# error mikrocontroller not defined, please fill in definitions here.\r
172# endif // unix, WIN32\r
f50e01e7 173#endif // __AVR...\r
174\r
ad4d3d41 175#if defined(__AVR_XMEGA__)\r
176# define _CONCAT(a,b) a##b\r
177# define CONCAT(a,b) _CONCAT(a,b)\r
178# define IRSND_PORT IRSND_PORT_PRE.OUT\r
22a5040e 179# define IRSND_DDR IRSND_PORT_PRE.DIR\r
180# define IRSND_PIN IRSND_PORT_PRE.IN\r
ad4d3d41 181# define IRSND_BIT IRSND_BIT_NUMBER\r
ad4d3d41 182#elif defined(ATMEL_AVR)\r
f874da09 183# define _CONCAT(a,b) a##b\r
184# define CONCAT(a,b) _CONCAT(a,b)\r
185# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
186# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
187# define IRSND_BIT IRSND_BIT_NUMBER\r
188#endif\r
189\r
9405f84a 190#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 191 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 192#else\r
9c86ff1a 193 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 194#endif\r
195\r
f50e01e7 196/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
197 * IR timings\r
198 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
199 */\r
4225a882 200#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
201#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
202#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
203#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
204#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
9c07687e 205#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
206#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 207\r
208#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
209#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 210#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 211#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
212#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
213#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
9c07687e 214#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 215\r
216#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
217#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
218#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
219#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
220#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
9c07687e 221#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 222\r
9c07687e 223#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
224#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 225\r
ac8504f8 226#define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
227#define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
228\r
4225a882 229#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
230#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
231#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
232#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
233#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
9c07687e 234#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 235\r
770a1a9d 236#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
237#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
238#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
239#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
240#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
9c07687e 241#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
242#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
770a1a9d 243\r
4225a882 244#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
245#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
246#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
247#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
248#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
9c07687e 249#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 250\r
251#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
252#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
9c07687e 253#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 254\r
255#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
256#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
257#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
258#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
9c07687e 259#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 260\r
261#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
262#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
263#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
9c07687e 264#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
265#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 266\r
beda975f 267#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
268#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
269#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
9c07687e 270#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
271#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
beda975f 272\r
4225a882 273#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
274#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
275#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
276#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
277#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
9c07687e 278#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
279\r
280#define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)\r
281#define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)\r
282#define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)\r
283#define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)\r
284#define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)\r
285#define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
286#define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 287\r
288#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
289#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
290#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
291#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
292#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
293#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
9c07687e 294#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
295#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 296\r
0715cf5e 297#define FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5)\r
298#define FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5)\r
299#define FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5)\r
300#define FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5)\r
301#define FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5)\r
302#define FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5)\r
303#define FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
304#define FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
305\r
15dd9c32 306#define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)\r
307#define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)\r
308#define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)\r
309#define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)\r
310#define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)\r
311#define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)\r
9c07687e 312#define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
313#define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
15dd9c32 314\r
5481e9cd 315#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
316#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
317#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
318#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
319#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
320#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
321#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
322#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
323#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
324#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
325#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
9c07687e 326#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 327\r
9c86ff1a 328#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
329#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
9c07687e 330#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
331#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 332#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 333\r
9c07687e 334#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
a48187fa 335\r
02ccdb69 336#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
337#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
9c07687e 338#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 339\r
cb93f9e9 340#define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
341#define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)\r
342#define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
343#define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)\r
9c07687e 344#define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
cb93f9e9 345\r
08f2dd9d 346#ifdef PIC_C18 // PIC C18\r
347# define IRSND_FREQ_TYPE uint8_t\r
348# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
349# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
350# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
351# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
352# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
353# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
354# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
355#elif defined (ARM_STM32) // STM32\r
356# define IRSND_FREQ_TYPE uint32_t\r
357# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
358# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
359# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
360# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
361# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
362# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
363# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
364#else // AVR\r
a03ad359 365# if F_CPU >= 16000000L\r
366# define AVR_PRESCALER 8\r
367# else\r
368# define AVR_PRESCALER 1\r
369# endif\r
08f2dd9d 370# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 371# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
372# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
373# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
374# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
375# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
376# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
377# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 378#endif\r
4225a882 379\r
48664931 380#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
381#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
382#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
383#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
384#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
385#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 386\r
c7c9a4a1 387#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
388#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
389#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
390#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
391#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
392#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
393\r
c7a47e89 394#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
395#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
396#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
397#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
398#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
399#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
400#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
401\r
9405f84a 402#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
403#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
404#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
405#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
406#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
407#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 408#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
409\r
410#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
411#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
412#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
413#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
414#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
415#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
416#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 417\r
fa09ce10 418#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r
419#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r
420#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r
421#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r
422#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
423#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
424\r
c9b6916a 425#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r
426#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r
427#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r
428#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r
429#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r
430#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r
431#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
432\r
003c1008 433#define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)\r
434#define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)\r
435#define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
436#define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)\r
437#define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)\r
438#define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)\r
439#define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
440\r
43c535be 441#define ACP24_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME + 0.5)\r
442#define ACP24_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME + 0.5)\r
443#define ACP24_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
444#define ACP24_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_PULSE_TIME + 0.5)\r
445#define ACP24_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME + 0.5)\r
446#define ACP24_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME + 0.5)\r
447#define ACP24_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ACP24_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
448\r
9c86ff1a 449static volatile uint8_t irsnd_busy = 0;\r
450static volatile uint8_t irsnd_protocol = 0;\r
43c535be 451static volatile uint8_t irsnd_buffer[9] = {0};\r
9c86ff1a 452static volatile uint8_t irsnd_repeat = 0;\r
4225a882 453static volatile uint8_t irsnd_is_on = FALSE;\r
454\r
f50e01e7 455#if IRSND_USE_CALLBACK == 1\r
456static void (*irsnd_callback_ptr) (uint8_t);\r
457#endif // IRSND_USE_CALLBACK == 1\r
458\r
4225a882 459/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
460 * Switch PWM on\r
4225a882 461 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
462 */\r
463static void\r
464irsnd_on (void)\r
465{\r
466 if (! irsnd_is_on)\r
467 {\r
cb93f9e9 468#ifndef ANALYZE\r
08f2dd9d 469# if defined(PIC_C18) // PIC C18\r
cb93f9e9 470 PWMon();\r
471 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
ad4d3d41 472\r
08f2dd9d 473# elif defined (ARM_STM32) // STM32\r
e664a9f3 474 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
475 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
476 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
ad4d3d41 477\r
478# elif defined (__AVR_XMEGA__) \r
ea585783 479# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A\r
480 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A \r
481# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B\r
482 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B \r
483# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
484 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C\r
485# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
486 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D\r
487# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
488 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A\r
489# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
490 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B\r
ad4d3d41 491# else\r
492# error wrong value of IRSND_OCx\r
493# endif // IRSND_OCx\r
494\r
08f2dd9d 495# else // AVR\r
496# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 497 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 498# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 499 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 500# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 501 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 502# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 503 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 504# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 505 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 506# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 507 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 508# else\r
509# error wrong value of IRSND_OCx\r
510# endif // IRSND_OCx\r
511# endif // C18\r
cb93f9e9 512#endif // ANALYZE\r
f50e01e7 513\r
514#if IRSND_USE_CALLBACK == 1\r
e664a9f3 515 if (irsnd_callback_ptr)\r
516 {\r
517 (*irsnd_callback_ptr) (TRUE);\r
518 }\r
f50e01e7 519#endif // IRSND_USE_CALLBACK == 1\r
520\r
e664a9f3 521 irsnd_is_on = TRUE;\r
4225a882 522 }\r
523}\r
524\r
525/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
526 * Switch PWM off\r
527 * @details Switches PWM off\r
528 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
529 */\r
530static void\r
531irsnd_off (void)\r
532{\r
533 if (irsnd_is_on)\r
534 {\r
cb93f9e9 535#ifndef ANALYZE\r
9c86ff1a 536 \r
08f2dd9d 537# if defined(PIC_C18) // PIC C18\r
cb93f9e9 538 PWMoff();\r
539 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
ad4d3d41 540\r
08f2dd9d 541# elif defined (ARM_STM32) // STM32\r
e664a9f3 542 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
543 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
544 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
545 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
ad4d3d41 546\r
547# elif defined (__AVR_XMEGA__)\r
22a5040e 548# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A \r
ad4d3d41 549 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected\r
22a5040e 550# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B \r
ad4d3d41 551 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected\r
552# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
553 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected\r
554# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
555 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected\r
22a5040e 556# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
557 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected\r
558# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
559 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected\r
ad4d3d41 560# else\r
561# error wrong value of IRSND_OCx\r
562# endif // IRSND_OCx\r
563\r
08f2dd9d 564# else //AVR\r
9c86ff1a 565\r
08f2dd9d 566# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 567 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 568# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 569 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 570# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 571 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 572# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 573 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 574# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 575 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 576# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 577 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 578# else\r
579# error wrong value of IRSND_OCx\r
580# endif // IRSND_OCx\r
e664a9f3 581 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 582# endif //C18\r
cb93f9e9 583#endif // ANALYZE\r
f50e01e7 584\r
585#if IRSND_USE_CALLBACK == 1\r
e664a9f3 586 if (irsnd_callback_ptr)\r
587 {\r
588 (*irsnd_callback_ptr) (FALSE);\r
589 }\r
f50e01e7 590#endif // IRSND_USE_CALLBACK == 1\r
591\r
e664a9f3 592 irsnd_is_on = FALSE;\r
4225a882 593 }\r
594}\r
595\r
596/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
597 * Set PWM frequency\r
598 * @details sets pwm frequency\r
599 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
600 */\r
7fe8188d 601#if defined(__12F1840)\r
602extern void pwm_init(uint16_t freq);\r
603#include <stdio.h>\r
604#endif\r
605\r
4225a882 606static void\r
08f2dd9d 607irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 608{\r
cb93f9e9 609#ifndef ANALYZE\r
7fe8188d 610# if defined(PIC_C18) // PIC C18 or XC8\r
611# if defined(__12F1840) // XC8\r
612 TRISA2=0; \r
613 PR2=freq;\r
614 CCP1M0=1;\r
615 CCP1M1=1;\r
616 CCP1M2=1;\r
617 CCP1M3=1;\r
618 DC1B0=1;\r
619 DC1B1=0;\r
620 CCPR1L = 0b01101001;\r
621 TMR2IF = 0;\r
622 TMR2ON=1;\r
623 CCP1CON &=(~0b0011); // p 197 "active high"\r
624# else // PIC C18\r
625 OpenPWM(freq); \r
626 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
627# endif\r
628 PWMoff();\r
08f2dd9d 629# elif defined (ARM_STM32) // STM32\r
e664a9f3 630 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 631\r
e664a9f3 632 if (TimeBaseFreq == 0)\r
633 {\r
634 RCC_ClocksTypeDef RCC_ClocksStructure;\r
635 /* Get system clocks and store timer clock in variable */\r
636 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
08f2dd9d 637# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 638 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
639 {\r
640 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
641 }\r
642 else\r
643 {\r
644 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
645 }\r
08f2dd9d 646# else\r
e664a9f3 647 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
648 {\r
649 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
650 }\r
651 else\r
652 {\r
653 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
654 }\r
08f2dd9d 655# endif\r
e664a9f3 656 }\r
08f2dd9d 657\r
e664a9f3 658 freq = TimeBaseFreq/freq;\r
08f2dd9d 659\r
e664a9f3 660 /* Set frequency */\r
661 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
662 /* Set duty cycle */\r
663 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
ad4d3d41 664\r
665# elif defined (__AVR_XMEGA__)\r
666 XMEGA_Timer.CCA = freq;\r
667\r
08f2dd9d 668# else // AVR\r
669\r
670# if IRSND_OCx == IRSND_OC2\r
e664a9f3 671 OCR2 = freq; // use register OCR2 for OC2\r
08f2dd9d 672# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 673 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 674# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 675 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 676# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 677 OCR0 = freq; // use register OCR2 for OC2\r
08f2dd9d 678# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 679 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 680# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 681 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 682# else\r
683# error wrong value of IRSND_OCx\r
684# endif\r
685# endif //PIC_C18\r
cb93f9e9 686#endif // ANALYZE\r
4225a882 687}\r
688\r
689/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
690 * Initialize the PWM\r
691 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
692 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
693 */\r
694void\r
695irsnd_init (void)\r
696{\r
cb93f9e9 697#ifndef ANALYZE\r
7fe8188d 698# if defined(PIC_C18) // PIC C18 or XC8 compiler\r
699# if ! defined(__12F1840) // only C18:\r
e664a9f3 700 OpenTimer;\r
7fe8188d 701# endif\r
cb93f9e9 702 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
703 IRSND_PIN = 0; // set IO to outout\r
704 PWMoff();\r
08f2dd9d 705# elif defined (ARM_STM32) // STM32\r
e664a9f3 706 GPIO_InitTypeDef GPIO_InitStructure;\r
707 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
708 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 709\r
710 /* GPIOx clock enable */\r
711# if defined (ARM_STM32L1XX)\r
e664a9f3 712 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 713# elif defined (ARM_STM32F10X)\r
e664a9f3 714 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
c6a60200 715 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 716# elif defined (ARM_STM32F4XX)\r
e664a9f3 717 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 718# endif\r
719\r
e664a9f3 720 /* GPIO Configuration */\r
721 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
08f2dd9d 722# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
e664a9f3 723 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
724 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
725 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
726 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
727 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
728 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
08f2dd9d 729# elif defined (ARM_STM32F10X)\r
e664a9f3 730 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
731 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
732 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
c6a60200 733 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 734# endif\r
735\r
e664a9f3 736 /* TIMx clock enable */\r
08f2dd9d 737# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 738 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 739# else\r
e664a9f3 740 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 741# endif\r
08f2dd9d 742\r
e664a9f3 743 /* Time base configuration */\r
744 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
745 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
746 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
747 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
748 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
749\r
750 /* PWM1 Mode configuration */\r
751 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
752 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
753 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
754 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
755 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
756\r
757 /* Preload configuration */\r
758 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
759 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
760\r
761 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
22a5040e 762\r
763# elif defined (__AVR_XMEGA__)\r
764 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
765 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
766\r
767 XMEGA_Timer.PER = 0xFFFF; //Topwert\r
768 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC\r
769\r
770# if AVR_PRESCALER == 8\r
771 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8\r
772# else\r
773 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1\r
774# endif\r
775 \r
776# else // AVR\r
e664a9f3 777 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
778 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
08f2dd9d 779\r
780# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 781 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 782# if AVR_PRESCALER == 8\r
e664a9f3 783 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 784# else\r
e664a9f3 785 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 786# endif\r
08f2dd9d 787# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
e664a9f3 788 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 789# if AVR_PRESCALER == 8\r
e664a9f3 790 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 791# else\r
e664a9f3 792 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 793# endif\r
08f2dd9d 794# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 795 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 796# if AVR_PRESCALER == 8\r
e664a9f3 797 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 798# else\r
e664a9f3 799 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 800# endif\r
08f2dd9d 801# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
e664a9f3 802 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 803# if AVR_PRESCALER == 8\r
e664a9f3 804 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 805# else\r
e664a9f3 806 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 807# endif\r
08f2dd9d 808# else\r
809# error wrong value of IRSND_OCx\r
810# endif\r
e664a9f3 811 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
08f2dd9d 812# endif //PIC_C18\r
cb93f9e9 813#endif // ANALYZE\r
4225a882 814}\r
815\r
f50e01e7 816#if IRSND_USE_CALLBACK == 1\r
817void\r
818irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
819{\r
820 irsnd_callback_ptr = cb;\r
821}\r
822#endif // IRSND_USE_CALLBACK == 1\r
823\r
4225a882 824uint8_t\r
825irsnd_is_busy (void)\r
826{\r
827 return irsnd_busy;\r
828}\r
829\r
830static uint16_t\r
831bitsrevervse (uint16_t x, uint8_t len)\r
832{\r
833 uint16_t xx = 0;\r
834\r
835 while(len)\r
836 {\r
e664a9f3 837 xx <<= 1;\r
838 if (x & 1)\r
839 {\r
840 xx |= 1;\r
841 }\r
842 x >>= 1;\r
843 len--;\r
4225a882 844 }\r
845 return xx;\r
846}\r
847\r
848\r
9547ee89 849#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
850static uint8_t sircs_additional_bitlen;\r
851#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
852\r
4225a882 853uint8_t\r
879b06c2 854irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 855{\r
856#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
857 static uint8_t toggle_bit_recs80;\r
858#endif\r
859#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
860 static uint8_t toggle_bit_recs80ext;\r
861#endif\r
862#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
863 static uint8_t toggle_bit_rc5;\r
9547ee89 864#endif\r
779fbc81 865#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 866 static uint8_t toggle_bit_rc6;\r
beda975f 867#endif\r
868#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
869 static uint8_t toggle_bit_thomson;\r
4225a882 870#endif\r
871 uint16_t address;\r
872 uint16_t command;\r
873\r
879b06c2 874 if (do_wait)\r
4225a882 875 {\r
e664a9f3 876 while (irsnd_busy)\r
877 {\r
878 // do nothing;\r
879 }\r
879b06c2 880 }\r
881 else if (irsnd_busy)\r
882 {\r
e664a9f3 883 return (FALSE);\r
4225a882 884 }\r
885\r
886 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 887 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 888\r
889 switch (irsnd_protocol)\r
890 {\r
891#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 892 case IRMP_SIRCS_PROTOCOL:\r
893 {\r
894 // uint8_t sircs_additional_command_len;\r
895 uint8_t sircs_additional_address_len;\r
896\r
897 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
898\r
899 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
900 {\r
901 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
902 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
903 }\r
904 else\r
905 {\r
906 // sircs_additional_command_len = sircs_additional_bitlen;\r
907 sircs_additional_address_len = 0;\r
908 }\r
909\r
910 command = bitsrevervse (irmp_data_p->command, 15);\r
911\r
912 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
913 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
914\r
915 if (sircs_additional_address_len > 0)\r
916 {\r
917 address = bitsrevervse (irmp_data_p->address, 5);\r
918 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
919 irsnd_buffer[2] = (address & 0x000F) << 4;\r
920 }\r
921 irsnd_busy = TRUE;\r
922 break;\r
923 }\r
4225a882 924#endif\r
925#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 926 case IRMP_APPLE_PROTOCOL:\r
927 {\r
928 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
929 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
930\r
931 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
932 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
933\r
934 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
935\r
936 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
937 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
938 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
939 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
940 irsnd_busy = TRUE;\r
941 break;\r
942 }\r
943 case IRMP_NEC_PROTOCOL:\r
944 {\r
945 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
946 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
947\r
948 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
949 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
950 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
951 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
952 irsnd_busy = TRUE;\r
953 break;\r
954 }\r
7644ac04 955#endif\r
956#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 957 case IRMP_NEC16_PROTOCOL:\r
958 {\r
959 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
960 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 961\r
e664a9f3 962 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
963 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
964 irsnd_busy = TRUE;\r
965 break;\r
966 }\r
7644ac04 967#endif\r
968#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 969 case IRMP_NEC42_PROTOCOL:\r
970 {\r
971 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
972 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
973\r
974 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
975 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
976 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
977 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
978 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
979 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
980 irsnd_busy = TRUE;\r
981 break;\r
982 }\r
4225a882 983#endif\r
c1dfa01f 984#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
985 case IRMP_LGAIR_PROTOCOL:\r
986 {\r
987 address = irmp_data_p->address;\r
988 command = irmp_data_p->command;\r
989\r
990 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA\r
991 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC\r
992 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC\r
993 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum\r
994 ((command & 0x0F00) >> 8) +\r
995 ((command & 0x00F0) >>4 ) +\r
996 ((command & 0x000F))) & 0x000F) << 4;\r
997 irsnd_busy = TRUE;\r
998 break;\r
999 }\r
1000#endif\r
4225a882 1001#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1002 case IRMP_SAMSUNG_PROTOCOL:\r
1003 {\r
1004 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1005 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
1006\r
1007 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1008 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1009 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
1010 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
1011 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
1012 irsnd_busy = TRUE;\r
1013 break;\r
1014 }\r
1015 case IRMP_SAMSUNG32_PROTOCOL:\r
1016 {\r
1017 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1018 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
1019\r
1020 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1021 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1022 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
1023 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
1024 irsnd_busy = TRUE;\r
1025 break;\r
1026 }\r
4225a882 1027#endif\r
ac8504f8 1028#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1029 case IRMP_SAMSUNG48_PROTOCOL:\r
1030 {\r
1031 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1032 command = bitsrevervse (irmp_data_p->command, 16);\r
1033\r
1034 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1035 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1036 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC\r
1037 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
1038 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC\r
1039 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc\r
1040 irsnd_busy = TRUE;\r
1041 break;\r
1042 }\r
1043#endif\r
4225a882 1044#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1045 case IRMP_MATSUSHITA_PROTOCOL:\r
1046 {\r
1047 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
1048 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
1049\r
1050 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
1051 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
1052 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
1053 irsnd_busy = TRUE;\r
1054 break;\r
1055 }\r
4225a882 1056#endif\r
770a1a9d 1057#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1058 case IRMP_KASEIKYO_PROTOCOL:\r
1059 {\r
1060 uint8_t xor_value;\r
1061 uint16_t genre2;\r
770a1a9d 1062\r
e664a9f3 1063 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
1064 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
1065 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 1066\r
e664a9f3 1067 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 1068\r
e664a9f3 1069 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1070 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1071 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
1072 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
1073 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
770a1a9d 1074\r
e664a9f3 1075 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 1076\r
e664a9f3 1077 irsnd_buffer[5] = xor_value;\r
1078 irsnd_busy = TRUE;\r
1079 break;\r
1080 }\r
770a1a9d 1081#endif\r
4225a882 1082#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1083 case IRMP_RECS80_PROTOCOL:\r
1084 {\r
1085 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
4225a882 1086\r
e664a9f3 1087 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
1088 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
1089 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
1090 irsnd_busy = TRUE;\r
1091 break;\r
1092 }\r
4225a882 1093#endif\r
1094#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1095 case IRMP_RECS80EXT_PROTOCOL:\r
1096 {\r
1097 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
4225a882 1098\r
e664a9f3 1099 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
1100 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
1101 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
1102 irsnd_busy = TRUE;\r
1103 break;\r
1104 }\r
4225a882 1105#endif\r
1106#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1107 case IRMP_RC5_PROTOCOL:\r
1108 {\r
1109 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
4225a882 1110\r
e664a9f3 1111 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
1112 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
1113 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
1114 irsnd_busy = TRUE;\r
1115 break;\r
1116 }\r
4225a882 1117#endif\r
9547ee89 1118#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1119 case IRMP_RC6_PROTOCOL:\r
1120 {\r
1121 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
9547ee89 1122\r
e664a9f3 1123 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
1124 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
1125 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
1126 irsnd_busy = TRUE;\r
1127 break;\r
1128 }\r
9547ee89 1129#endif\r
1130#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1131 case IRMP_RC6A_PROTOCOL:\r
1132 {\r
1133 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
1134\r
1135 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
1136 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
1137 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
1138 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1139 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
1140 irsnd_busy = TRUE;\r
1141 break;\r
1142 }\r
9547ee89 1143#endif\r
4225a882 1144#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1145 case IRMP_DENON_PROTOCOL:\r
1146 {\r
1147 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
1148 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
1149 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
1150 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
1151 irsnd_busy = TRUE;\r
1152 break;\r
1153 }\r
4225a882 1154#endif\r
beda975f 1155#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1156 case IRMP_THOMSON_PROTOCOL:\r
1157 {\r
1158 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
beda975f 1159\r
e664a9f3 1160 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
1161 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
1162 irsnd_busy = TRUE;\r
1163 break;\r
1164 }\r
beda975f 1165#endif\r
4225a882 1166#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1167 case IRMP_NUBERT_PROTOCOL:\r
1168 {\r
1169 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1170 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1171 irsnd_busy = TRUE;\r
1172 break;\r
1173 }\r
5481e9cd 1174#endif\r
0715cf5e 1175#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
1176 case IRMP_FAN_PROTOCOL:\r
1177 {\r
1178 irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC\r
1179 irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
1180 irsnd_busy = TRUE;\r
1181 break;\r
1182 }\r
1183#endif\r
15dd9c32 1184#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1185 case IRMP_SPEAKER_PROTOCOL:\r
1186 {\r
1187 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1188 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1189 irsnd_busy = TRUE;\r
1190 break;\r
1191 }\r
1192#endif\r
5481e9cd 1193#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1194 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1195 {\r
1196 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
1197 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
1198 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
1199 irsnd_busy = TRUE;\r
1200 break;\r
1201 }\r
4225a882 1202#endif\r
5b437ff6 1203#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1204 case IRMP_GRUNDIG_PROTOCOL:\r
1205 {\r
9c07687e 1206 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);\r
5b437ff6 1207\r
e664a9f3 1208 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
1209 irsnd_buffer[1] = 0xC0; // 11\r
1210 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
1211 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
d155e9ab 1212\r
e664a9f3 1213 irsnd_busy = TRUE;\r
1214 break;\r
1215 }\r
d155e9ab 1216#endif\r
9c07687e 1217#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1218 case IRMP_TELEFUNKEN_PROTOCOL:\r
1219 {\r
1220 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC\r
1221 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC\r
1222\r
1223 irsnd_busy = TRUE;\r
1224 break;\r
1225 }\r
1226#endif\r
a48187fa 1227#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1228 case IRMP_IR60_PROTOCOL:\r
1229 {\r
1230 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 1231#if 0\r
e664a9f3 1232 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
1233 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 1234#else\r
e664a9f3 1235 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
1236 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
08f2dd9d 1237#endif\r
a48187fa 1238\r
e664a9f3 1239 irsnd_busy = TRUE;\r
1240 break;\r
1241 }\r
a48187fa 1242#endif\r
d155e9ab 1243#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1244 case IRMP_NOKIA_PROTOCOL:\r
1245 {\r
1246 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1247 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1248\r
1249 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1250 irsnd_buffer[1] = 0xFF; // 11111111\r
1251 irsnd_buffer[2] = 0x80; // 1\r
1252 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1253 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1254 irsnd_buffer[5] = (address << 7); // A\r
1255\r
1256 irsnd_busy = TRUE;\r
1257 break;\r
1258 }\r
5b437ff6 1259#endif\r
a7054daf 1260#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1261 case IRMP_SIEMENS_PROTOCOL:\r
1262 {\r
cb93f9e9 1263 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA\r
1264 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC\r
1265 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
9405f84a 1266\r
e664a9f3 1267 irsnd_busy = TRUE;\r
1268 break;\r
1269 }\r
b5ea7869 1270#endif\r
cb93f9e9 1271#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1272 case IRMP_RUWIDO_PROTOCOL:\r
1273 {\r
1274 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA\r
1275 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC\r
1276 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c\r
1277 irsnd_busy = TRUE;\r
1278 break;\r
1279 }\r
1280#endif\r
48664931 1281#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1282 case IRMP_FDC_PROTOCOL:\r
1283 {\r
1284 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1285 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
1286\r
1287 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1288 irsnd_buffer[1] = 0; // 00000000\r
1289 irsnd_buffer[2] = 0; // 0000RRRR\r
1290 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1291 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1292 irsnd_busy = TRUE;\r
1293 break;\r
1294 }\r
c7c9a4a1 1295#endif\r
1296#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1297 case IRMP_RCCAR_PROTOCOL:\r
1298 {\r
1299 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1300 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1301\r
1302 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1303 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1304 \r
1305 irsnd_busy = TRUE;\r
1306 break;\r
1307 }\r
a7054daf 1308#endif\r
c7a47e89 1309#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1310 case IRMP_JVC_PROTOCOL:\r
1311 {\r
1312 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1313 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
c7a47e89 1314\r
e664a9f3 1315 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1316 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
c7a47e89 1317\r
e664a9f3 1318 irsnd_busy = TRUE;\r
1319 break;\r
1320 }\r
c7a47e89 1321#endif\r
9405f84a 1322#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1323 case IRMP_NIKON_PROTOCOL:\r
1324 {\r
1325 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1326 irsnd_busy = TRUE;\r
1327 break;\r
1328 }\r
f50e01e7 1329#endif\r
1330#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1331 case IRMP_LEGO_PROTOCOL:\r
1332 {\r
1333 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
fa09ce10 1334\r
e664a9f3 1335 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1336 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1337 irsnd_busy = TRUE;\r
1338 break;\r
1339 }\r
fa09ce10 1340#endif\r
1341#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1342 case IRMP_A1TVBOX_PROTOCOL:\r
1343 {\r
1344 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r
1345 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r
1346 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r
1347\r
1348 irsnd_busy = TRUE;\r
1349 break;\r
1350 }\r
1351#endif\r
c9b6916a 1352#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1353 case IRMP_ROOMBA_PROTOCOL:\r
1354 {\r
c9b6916a 1355 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r
1356 irsnd_busy = TRUE;\r
1357 break;\r
1358 }\r
1359#endif\r
003c1008 1360#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
1361 case IRMP_PENTAX_PROTOCOL:\r
1362 {\r
1363 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..\r
1364 irsnd_busy = TRUE;\r
1365 break;\r
1366 }\r
1367#endif\r
43c535be 1368#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
1369# define ACP_SET_BIT(acp24_bitno, c, irmp_bitno) \\r
1370 do \\r
1371 { \\r
1372 if ((c) & (1<<(irmp_bitno))) \\r
1373 { \\r
1374 irsnd_buffer[((acp24_bitno)>>3)] |= 1 << (((7 - (acp24_bitno)) & 0x07)); \\r
1375 } \\r
1376 } while (0)\r
1377\r
1378 case IRMP_ACP24_PROTOCOL:\r
1379 {\r
1380 uint16_t cmd = irmp_data_p->command;\r
1381 uint8_t i;\r
1382\r
1383 address = bitsrevervse (irmp_data_p->address, ACP24_ADDRESS_LEN);\r
1384\r
1385 for (i = 0; i < 8; i++)\r
1386 {\r
1387 irsnd_buffer[i] = 0x00; // CCCCCCCC\r
1388 }\r
1389\r
1390 // ACP24-Frame:\r
1391 // 1 2 3 4 5 6\r
1392 // 0123456789012345678901234567890123456789012345678901234567890123456789\r
1393 // N VVMMM ? ??? t vmA x y TTTT\r
1394 // \r
1395 // irmp_data_p->command:\r
1396 // \r
1397 // 5432109876543210\r
1398 // NAVVvMMMmtxyTTTT\r
1399\r
1400 ACP_SET_BIT( 0, cmd, 15);\r
1401 ACP_SET_BIT(24, cmd, 14);\r
1402 ACP_SET_BIT( 2, cmd, 13);\r
1403 ACP_SET_BIT( 3, cmd, 12);\r
1404 ACP_SET_BIT(22, cmd, 11);\r
1405 ACP_SET_BIT( 4, cmd, 10);\r
1406 ACP_SET_BIT( 5, cmd, 9);\r
1407 ACP_SET_BIT( 6, cmd, 8);\r
1408 ACP_SET_BIT(23, cmd, 7);\r
1409 ACP_SET_BIT(20, cmd, 6);\r
1410 ACP_SET_BIT(26, cmd, 5);\r
1411 ACP_SET_BIT(44, cmd, 4);\r
1412 ACP_SET_BIT(66, cmd, 3);\r
1413 ACP_SET_BIT(67, cmd, 2);\r
1414 ACP_SET_BIT(68, cmd, 1);\r
1415 ACP_SET_BIT(69, cmd, 0);\r
1416\r
1417 irsnd_busy = TRUE;\r
1418 break;\r
1419 }\r
1420#endif\r
003c1008 1421\r
e664a9f3 1422 default:\r
1423 {\r
1424 break;\r
1425 }\r
4225a882 1426 }\r
1427\r
1428 return irsnd_busy;\r
1429}\r
1430\r
beda975f 1431void\r
1432irsnd_stop (void)\r
1433{\r
acf7fb44 1434 irsnd_repeat = 0;\r
beda975f 1435}\r
1436\r
4225a882 1437/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1438 * ISR routine\r
1439 * @details ISR routine, called 10000 times per second\r
1440 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1441 */\r
1442uint8_t\r
1443irsnd_ISR (void)\r
1444{\r
a48187fa 1445 static uint8_t send_trailer = FALSE;\r
1446 static uint8_t current_bit = 0xFF;\r
1447 static uint8_t pulse_counter = 0;\r
1448 static IRSND_PAUSE_LEN pause_counter = 0;\r
1449 static uint8_t startbit_pulse_len = 0;\r
1450 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1451 static uint8_t pulse_1_len = 0;\r
1452 static uint8_t pause_1_len = 0;\r
1453 static uint8_t pulse_0_len = 0;\r
1454 static uint8_t pause_0_len = 0;\r
1455 static uint8_t has_stop_bit = 0;\r
1456 static uint8_t new_frame = TRUE;\r
1457 static uint8_t complete_data_len = 0;\r
1458 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1459 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1460 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1461 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1462 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1463 static uint8_t repeat_counter = 0; // repeat counter\r
1464 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1465 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1466#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1467 static uint8_t last_bit_value;\r
5481e9cd 1468#endif\r
a48187fa 1469 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1470 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1471\r
1472 if (irsnd_busy)\r
1473 {\r
e664a9f3 1474 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1475 {\r
1476 if (auto_repetition_counter > 0)\r
1477 {\r
1478 auto_repetition_pause_counter++;\r
4225a882 1479\r
08f2dd9d 1480#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1481 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1482 {\r
1483 repeat_frame_pause_len--;\r
1484 }\r
08f2dd9d 1485#endif\r
1486\r
e664a9f3 1487 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
1488 {\r
1489 auto_repetition_pause_counter = 0;\r
4225a882 1490\r
08f2dd9d 1491#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1492 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
1493 {\r
1494 current_bit = 16;\r
1495 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1496 }\r
1497 else\r
08f2dd9d 1498#endif\r
1499#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1500 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
1501 {\r
1502 current_bit = 15;\r
1503 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1504 }\r
1505 else\r
08f2dd9d 1506#endif\r
1507#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1508 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1509 {\r
1510 current_bit = 7;\r
1511 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1512 }\r
1513 else\r
08f2dd9d 1514#endif\r
1515#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1516 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
1517 {\r
1518 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
1519 {\r
1520 current_bit = 23;\r
1521 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1522 }\r
1523 else // nokia stop frame\r
1524 {\r
1525 current_bit = 0xFF;\r
1526 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1527 }\r
1528 }\r
1529 else\r
1530#endif\r
1531 {\r
1532 ;\r
1533 }\r
1534 }\r
1535 else\r
1536 {\r
cb93f9e9 1537#ifdef ANALYZE\r
e664a9f3 1538 if (irsnd_is_on)\r
1539 {\r
1540 putchar ('0');\r
1541 }\r
1542 else\r
1543 {\r
1544 putchar ('1');\r
1545 }\r
1546#endif\r
1547 return irsnd_busy;\r
1548 }\r
1549 }\r
e664a9f3 1550 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
e664a9f3 1551 {\r
1552 packet_repeat_pause_counter++;\r
cb93f9e9 1553#ifdef ANALYZE\r
e664a9f3 1554 if (irsnd_is_on)\r
1555 {\r
1556 putchar ('0');\r
1557 }\r
1558 else\r
1559 {\r
1560 putchar ('1');\r
1561 }\r
1562#endif\r
1563 return irsnd_busy;\r
1564 }\r
1565 else\r
1566 {\r
1567 if (send_trailer)\r
1568 {\r
1569 irsnd_busy = FALSE;\r
1570 send_trailer = FALSE;\r
1571 return irsnd_busy;\r
1572 }\r
1573 \r
1574 n_repeat_frames = irsnd_repeat;\r
1575\r
1576 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1577 {\r
1578 n_repeat_frames = 255;\r
1579 }\r
1580\r
1581 packet_repeat_pause_counter = 0;\r
1582 pulse_counter = 0;\r
1583 pause_counter = 0;\r
1584\r
1585 switch (irsnd_protocol)\r
1586 {\r
4225a882 1587#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1588 case IRMP_SIRCS_PROTOCOL:\r
1589 {\r
1590 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
1591 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
1592 pulse_1_len = SIRCS_1_PULSE_LEN;\r
1593 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
1594 pulse_0_len = SIRCS_0_PULSE_LEN;\r
1595 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
1596 has_stop_bit = SIRCS_STOP_BIT;\r
1597 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
1598 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1599 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1600 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
1601 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1602 break;\r
1603 }\r
4225a882 1604#endif\r
1605#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1606 case IRMP_NEC_PROTOCOL:\r
1607 {\r
1608 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1609\r
1610 if (repeat_counter > 0)\r
1611 {\r
1612 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
1613 complete_data_len = 0;\r
1614 }\r
1615 else\r
1616 {\r
1617 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1618 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1619 }\r
1620\r
1621 pulse_1_len = NEC_PULSE_LEN;\r
1622 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1623 pulse_0_len = NEC_PULSE_LEN;\r
1624 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1625 has_stop_bit = NEC_STOP_BIT;\r
1626 n_auto_repetitions = 1; // 1 frame\r
1627 auto_repetition_pause_len = 0;\r
1628 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1629 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1630 break;\r
1631 }\r
4225a882 1632#endif\r
7644ac04 1633#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1634 case IRMP_NEC16_PROTOCOL:\r
1635 {\r
1636 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1637 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1638 pulse_1_len = NEC_PULSE_LEN;\r
1639 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1640 pulse_0_len = NEC_PULSE_LEN;\r
1641 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1642 has_stop_bit = NEC_STOP_BIT;\r
1643 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1644 n_auto_repetitions = 1; // 1 frame\r
1645 auto_repetition_pause_len = 0;\r
1646 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1647 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1648 break;\r
1649 }\r
7644ac04 1650#endif\r
1651#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1652 case IRMP_NEC42_PROTOCOL:\r
1653 {\r
1654 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1655 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1656 pulse_1_len = NEC_PULSE_LEN;\r
1657 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1658 pulse_0_len = NEC_PULSE_LEN;\r
1659 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1660 has_stop_bit = NEC_STOP_BIT;\r
1661 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1662 n_auto_repetitions = 1; // 1 frame\r
1663 auto_repetition_pause_len = 0;\r
1664 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1665 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1666 break;\r
1667 }\r
7644ac04 1668#endif\r
c1dfa01f 1669#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
1670 case IRMP_LGAIR_PROTOCOL:\r
1671 {\r
1672 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1673 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1674 pulse_1_len = NEC_PULSE_LEN;\r
1675 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1676 pulse_0_len = NEC_PULSE_LEN;\r
1677 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1678 has_stop_bit = NEC_STOP_BIT;\r
1679 complete_data_len = LGAIR_COMPLETE_DATA_LEN;\r
1680 n_auto_repetitions = 1; // 1 frame\r
1681 auto_repetition_pause_len = 0;\r
1682 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1683 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1684 break;\r
1685 }\r
1686#endif\r
4225a882 1687#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1688 case IRMP_SAMSUNG_PROTOCOL:\r
1689 {\r
1690 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1691 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1692 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1693 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1694 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1695 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1696 has_stop_bit = SAMSUNG_STOP_BIT;\r
1697 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1698 n_auto_repetitions = 1; // 1 frame\r
1699 auto_repetition_pause_len = 0;\r
1700 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
1701 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1702 break;\r
1703 }\r
1704\r
1705 case IRMP_SAMSUNG32_PROTOCOL:\r
1706 {\r
1707 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1708 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1709 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1710 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1711 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1712 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1713 has_stop_bit = SAMSUNG_STOP_BIT;\r
1714 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
956ea3ea 1715 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame\r
e664a9f3 1716 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1717 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
1718 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1719 break;\r
1720 }\r
4225a882 1721#endif\r
ac8504f8 1722#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1723 case IRMP_SAMSUNG48_PROTOCOL:\r
1724 {\r
1725 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1726 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1727 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1728 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1729 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1730 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1731 has_stop_bit = SAMSUNG_STOP_BIT;\r
1732 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;\r
1733 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame\r
1734 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1735 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;\r
1736 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1737 break;\r
1738 }\r
1739#endif\r
4225a882 1740#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1741 case IRMP_MATSUSHITA_PROTOCOL:\r
1742 {\r
1743 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1744 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1745 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1746 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1747 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1748 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1749 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1750 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1751 n_auto_repetitions = 1; // 1 frame\r
1752 auto_repetition_pause_len = 0;\r
1753 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1754 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1755 break;\r
1756 }\r
4225a882 1757#endif\r
770a1a9d 1758#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1759 case IRMP_KASEIKYO_PROTOCOL:\r
1760 {\r
1761 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
1762 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
1763 pulse_1_len = KASEIKYO_PULSE_LEN;\r
1764 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
1765 pulse_0_len = KASEIKYO_PULSE_LEN;\r
1766 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
1767 has_stop_bit = KASEIKYO_STOP_BIT;\r
1768 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1769 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1770 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1771 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1772 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1773 break;\r
1774 }\r
770a1a9d 1775#endif\r
4225a882 1776#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1777 case IRMP_RECS80_PROTOCOL:\r
1778 {\r
1779 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
1780 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
1781 pulse_1_len = RECS80_PULSE_LEN;\r
1782 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
1783 pulse_0_len = RECS80_PULSE_LEN;\r
1784 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
1785 has_stop_bit = RECS80_STOP_BIT;\r
1786 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1787 n_auto_repetitions = 1; // 1 frame\r
1788 auto_repetition_pause_len = 0;\r
1789 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
1790 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1791 break;\r
1792 }\r
4225a882 1793#endif\r
1794#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1795 case IRMP_RECS80EXT_PROTOCOL:\r
1796 {\r
1797 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
1798 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
1799 pulse_1_len = RECS80EXT_PULSE_LEN;\r
1800 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
1801 pulse_0_len = RECS80EXT_PULSE_LEN;\r
1802 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
1803 has_stop_bit = RECS80EXT_STOP_BIT;\r
1804 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1805 n_auto_repetitions = 1; // 1 frame\r
1806 auto_repetition_pause_len = 0;\r
1807 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
1808 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1809 break;\r
1810 }\r
4225a882 1811#endif\r
9c07687e 1812#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1813 case IRMP_TELEFUNKEN_PROTOCOL:\r
1814 {\r
1815 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;\r
1816 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;\r
1817 pulse_1_len = TELEFUNKEN_PULSE_LEN;\r
1818 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;\r
1819 pulse_0_len = TELEFUNKEN_PULSE_LEN;\r
1820 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;\r
1821 has_stop_bit = TELEFUNKEN_STOP_BIT;\r
1822 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;\r
1823 n_auto_repetitions = 1; // 1 frames\r
1824 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause\r
1825 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1826 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1827 break;\r
1828 }\r
1829#endif\r
4225a882 1830#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1831 case IRMP_RC5_PROTOCOL:\r
1832 {\r
1833 startbit_pulse_len = RC5_BIT_LEN;\r
1834 startbit_pause_len = RC5_BIT_LEN;\r
1835 pulse_len = RC5_BIT_LEN;\r
1836 pause_len = RC5_BIT_LEN;\r
1837 has_stop_bit = RC5_STOP_BIT;\r
1838 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1839 n_auto_repetitions = 1; // 1 frame\r
1840 auto_repetition_pause_len = 0;\r
1841 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
1842 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1843 break;\r
1844 }\r
4225a882 1845#endif\r
9547ee89 1846#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1847 case IRMP_RC6_PROTOCOL:\r
1848 {\r
1849 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1850 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1851 pulse_len = RC6_BIT_LEN;\r
1852 pause_len = RC6_BIT_LEN;\r
1853 has_stop_bit = RC6_STOP_BIT;\r
1854 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1855 n_auto_repetitions = 1; // 1 frame\r
1856 auto_repetition_pause_len = 0;\r
1857 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1858 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1859 break;\r
1860 }\r
9547ee89 1861#endif\r
1862#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1863 case IRMP_RC6A_PROTOCOL:\r
1864 {\r
1865 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1866 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1867 pulse_len = RC6_BIT_LEN;\r
1868 pause_len = RC6_BIT_LEN;\r
1869 has_stop_bit = RC6_STOP_BIT;\r
1870 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1871 n_auto_repetitions = 1; // 1 frame\r
1872 auto_repetition_pause_len = 0;\r
1873 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1874 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1875 break;\r
1876 }\r
9547ee89 1877#endif\r
4225a882 1878#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1879 case IRMP_DENON_PROTOCOL:\r
1880 {\r
1881 startbit_pulse_len = 0x00;\r
1882 startbit_pause_len = 0x00;\r
1883 pulse_1_len = DENON_PULSE_LEN;\r
1884 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
1885 pulse_0_len = DENON_PULSE_LEN;\r
1886 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
1887 has_stop_bit = DENON_STOP_BIT;\r
1888 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1889 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1890 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1891 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1892 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
1893 break;\r
1894 }\r
4225a882 1895#endif\r
beda975f 1896#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1897 case IRMP_THOMSON_PROTOCOL:\r
1898 {\r
1899 startbit_pulse_len = 0x00;\r
1900 startbit_pause_len = 0x00;\r
1901 pulse_1_len = THOMSON_PULSE_LEN;\r
1902 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1903 pulse_0_len = THOMSON_PULSE_LEN;\r
1904 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1905 has_stop_bit = THOMSON_STOP_BIT;\r
1906 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1907 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1908 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1909 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1910 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1911 break;\r
1912 }\r
beda975f 1913#endif\r
4225a882 1914#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1915 case IRMP_NUBERT_PROTOCOL:\r
1916 {\r
1917 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
1918 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
1919 pulse_1_len = NUBERT_1_PULSE_LEN;\r
1920 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
1921 pulse_0_len = NUBERT_0_PULSE_LEN;\r
1922 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
1923 has_stop_bit = NUBERT_STOP_BIT;\r
1924 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1925 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1926 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1927 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
1928 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1929 break;\r
1930 }\r
5481e9cd 1931#endif\r
0715cf5e 1932#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
1933 case IRMP_FAN_PROTOCOL:\r
1934 {\r
1935 startbit_pulse_len = FAN_START_BIT_PULSE_LEN;\r
1936 startbit_pause_len = FAN_START_BIT_PAUSE_LEN - 1;\r
1937 pulse_1_len = FAN_1_PULSE_LEN;\r
1938 pause_1_len = FAN_1_PAUSE_LEN - 1;\r
1939 pulse_0_len = FAN_0_PULSE_LEN;\r
1940 pause_0_len = FAN_0_PAUSE_LEN - 1;\r
1941 has_stop_bit = FAN_STOP_BIT;\r
1942 complete_data_len = FAN_COMPLETE_DATA_LEN;\r
1943 n_auto_repetitions = FAN_FRAMES; // only 1 frame\r
1944 auto_repetition_pause_len = FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1945 repeat_frame_pause_len = FAN_FRAME_REPEAT_PAUSE_LEN;\r
1946 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1947 break;\r
1948 }\r
1949#endif\r
15dd9c32 1950#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1951 case IRMP_SPEAKER_PROTOCOL:\r
1952 {\r
1953 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;\r
1954 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;\r
1955 pulse_1_len = SPEAKER_1_PULSE_LEN;\r
1956 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;\r
1957 pulse_0_len = SPEAKER_0_PULSE_LEN;\r
1958 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;\r
1959 has_stop_bit = SPEAKER_STOP_BIT;\r
1960 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;\r
1961 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames\r
1962 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1963 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;\r
1964 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1965 break;\r
1966 }\r
1967#endif\r
5481e9cd 1968#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1969 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1970 {\r
1971 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
1972 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
1973 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
1974 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
1975 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
1976 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
1977 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1978 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1979 n_auto_repetitions = 1; // 1 frame\r
1980 auto_repetition_pause_len = 0;\r
1981 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1982 last_bit_value = 0;\r
1983 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1984 break;\r
1985 }\r
5b437ff6 1986#endif\r
1987#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1988 case IRMP_GRUNDIG_PROTOCOL:\r
1989 {\r
1990 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1991 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1992 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1993 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1994 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1995 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1996 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1997 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1998 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1999 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2000 break;\r
2001 }\r
a48187fa 2002#endif\r
2003#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2004 case IRMP_IR60_PROTOCOL:\r
2005 {\r
2006 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2007 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
2008 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2009 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2010 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
2011 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
2012 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
2013 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
2014 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
2015 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
2016 break;\r
2017 }\r
d155e9ab 2018#endif\r
2019#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2020 case IRMP_NOKIA_PROTOCOL:\r
2021 {\r
2022 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2023 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
2024 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2025 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2026 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
2027 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
2028 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
2029 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
2030 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
2031 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2032 break;\r
2033 }\r
a7054daf 2034#endif\r
2035#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2036 case IRMP_SIEMENS_PROTOCOL:\r
2037 {\r
2038 startbit_pulse_len = SIEMENS_BIT_LEN;\r
2039 startbit_pause_len = SIEMENS_BIT_LEN;\r
2040 pulse_len = SIEMENS_BIT_LEN;\r
2041 pause_len = SIEMENS_BIT_LEN;\r
2042 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
cb93f9e9 2043 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;\r
e664a9f3 2044 n_auto_repetitions = 1; // 1 frame\r
2045 auto_repetition_pause_len = 0;\r
2046 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
2047 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
2048 break;\r
2049 }\r
b5ea7869 2050#endif\r
cb93f9e9 2051#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
2052 case IRMP_RUWIDO_PROTOCOL:\r
2053 {\r
2054 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;\r
2055 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;\r
2056 pulse_len = RUWIDO_BIT_PULSE_LEN;\r
2057 pause_len = RUWIDO_BIT_PAUSE_LEN;\r
2058 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
2059 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;\r
2060 n_auto_repetitions = 1; // 1 frame\r
2061 auto_repetition_pause_len = 0;\r
2062 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;\r
2063 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
2064 break;\r
2065 }\r
2066#endif\r
48664931 2067#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2068 case IRMP_FDC_PROTOCOL:\r
2069 {\r
2070 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
2071 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
2072 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
2073 pulse_1_len = FDC_PULSE_LEN;\r
2074 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
2075 pulse_0_len = FDC_PULSE_LEN;\r
2076 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
2077 has_stop_bit = FDC_STOP_BIT;\r
2078 n_auto_repetitions = 1; // 1 frame\r
2079 auto_repetition_pause_len = 0;\r
2080 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
2081 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2082 break;\r
2083 }\r
c7c9a4a1 2084#endif\r
2085#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 2086 case IRMP_RCCAR_PROTOCOL:\r
2087 {\r
2088 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
2089 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
2090 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
2091 pulse_1_len = RCCAR_PULSE_LEN;\r
2092 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
2093 pulse_0_len = RCCAR_PULSE_LEN;\r
2094 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
2095 has_stop_bit = RCCAR_STOP_BIT;\r
2096 n_auto_repetitions = 1; // 1 frame\r
2097 auto_repetition_pause_len = 0;\r
2098 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
2099 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2100 break;\r
2101 }\r
4225a882 2102#endif\r
c7a47e89 2103#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2104 case IRMP_JVC_PROTOCOL:\r
2105 {\r
2106 if (repeat_counter != 0) // skip start bit if repetition frame\r
2107 {\r
2108 current_bit = 0;\r
2109 }\r
2110\r
2111 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
2112 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
2113 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
2114 pulse_1_len = JVC_PULSE_LEN;\r
2115 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
2116 pulse_0_len = JVC_PULSE_LEN;\r
2117 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
2118 has_stop_bit = JVC_STOP_BIT;\r
2119 n_auto_repetitions = 1; // 1 frame\r
2120 auto_repetition_pause_len = 0;\r
2121 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
2122 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2123 break;\r
2124 }\r
c7a47e89 2125#endif\r
9405f84a 2126#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2127 case IRMP_NIKON_PROTOCOL:\r
2128 {\r
2129 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
2130 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
2131 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
2132 pulse_1_len = NIKON_PULSE_LEN;\r
2133 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
2134 pulse_0_len = NIKON_PULSE_LEN;\r
2135 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
2136 has_stop_bit = NIKON_STOP_BIT;\r
2137 n_auto_repetitions = 1; // 1 frame\r
2138 auto_repetition_pause_len = 0;\r
2139 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
2140 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2141 break;\r
2142 }\r
9405f84a 2143#endif\r
f50e01e7 2144#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2145 case IRMP_LEGO_PROTOCOL:\r
2146 {\r
2147 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
2148 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
2149 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
2150 pulse_1_len = LEGO_PULSE_LEN;\r
2151 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
2152 pulse_0_len = LEGO_PULSE_LEN;\r
2153 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
2154 has_stop_bit = LEGO_STOP_BIT;\r
2155 n_auto_repetitions = 1; // 1 frame\r
2156 auto_repetition_pause_len = 0;\r
2157 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
2158 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2159 break;\r
2160 }\r
fa09ce10 2161#endif\r
2162#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2163 case IRMP_A1TVBOX_PROTOCOL:\r
2164 {\r
2165 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r
2166 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r
2167 pulse_len = A1TVBOX_BIT_PULSE_LEN;\r
2168 pause_len = A1TVBOX_BIT_PAUSE_LEN;\r
2169 has_stop_bit = A1TVBOX_STOP_BIT;\r
2170 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r
2171 n_auto_repetitions = 1; // 1 frame\r
2172 auto_repetition_pause_len = 0;\r
2173 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r
2174 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2175 break;\r
2176 }\r
c9b6916a 2177#endif\r
2178#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2179 case IRMP_ROOMBA_PROTOCOL:\r
2180 {\r
2181 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r
2182 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r
2183 pulse_1_len = ROOMBA_1_PULSE_LEN;\r
2184 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r
2185 pulse_0_len = ROOMBA_0_PULSE_LEN;\r
2186 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r
2187 has_stop_bit = ROOMBA_STOP_BIT;\r
2188 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r
cb93f9e9 2189 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames\r
2190 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
c9b6916a 2191 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
2192 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2193 break;\r
2194 }\r
003c1008 2195#endif\r
2196#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2197 case IRMP_PENTAX_PROTOCOL:\r
2198 {\r
2199 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;\r
2200 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;\r
2201 complete_data_len = PENTAX_COMPLETE_DATA_LEN;\r
2202 pulse_1_len = PENTAX_PULSE_LEN;\r
2203 pause_1_len = PENTAX_1_PAUSE_LEN - 1;\r
2204 pulse_0_len = PENTAX_PULSE_LEN;\r
2205 pause_0_len = PENTAX_0_PAUSE_LEN - 1;\r
2206 has_stop_bit = PENTAX_STOP_BIT;\r
2207 n_auto_repetitions = 1; // 1 frame\r
2208 auto_repetition_pause_len = 0;\r
2209 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;\r
2210 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2211 break;\r
2212 }\r
43c535be 2213#endif\r
2214#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
2215 case IRMP_ACP24_PROTOCOL:\r
2216 {\r
2217 startbit_pulse_len = ACP24_START_BIT_PULSE_LEN;\r
2218 startbit_pause_len = ACP24_START_BIT_PAUSE_LEN - 1;\r
2219 complete_data_len = ACP24_COMPLETE_DATA_LEN;\r
2220 pulse_1_len = ACP24_PULSE_LEN;\r
2221 pause_1_len = ACP24_1_PAUSE_LEN - 1;\r
2222 pulse_0_len = ACP24_PULSE_LEN;\r
2223 pause_0_len = ACP24_0_PAUSE_LEN - 1;\r
2224 has_stop_bit = ACP24_STOP_BIT;\r
2225 n_auto_repetitions = 1; // 1 frame\r
2226 auto_repetition_pause_len = 0;\r
2227 repeat_frame_pause_len = ACP24_FRAME_REPEAT_PAUSE_LEN;\r
2228 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2229 break;\r
2230 }\r
e664a9f3 2231#endif\r
2232 default:\r
2233 {\r
2234 irsnd_busy = FALSE;\r
2235 break;\r
2236 }\r
2237 }\r
2238 }\r
2239 }\r
2240\r
2241 if (irsnd_busy)\r
2242 {\r
2243 new_frame = FALSE;\r
2244\r
2245 switch (irsnd_protocol)\r
2246 {\r
4225a882 2247#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 2248 case IRMP_SIRCS_PROTOCOL:\r
4225a882 2249#endif\r
2250#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 2251 case IRMP_NEC_PROTOCOL:\r
4225a882 2252#endif\r
7644ac04 2253#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2254 case IRMP_NEC16_PROTOCOL:\r
7644ac04 2255#endif\r
2256#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 2257 case IRMP_NEC42_PROTOCOL:\r
7644ac04 2258#endif\r
c1dfa01f 2259#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
2260 case IRMP_LGAIR_PROTOCOL:\r
2261#endif\r
4225a882 2262#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2263 case IRMP_SAMSUNG_PROTOCOL:\r
2264 case IRMP_SAMSUNG32_PROTOCOL:\r
4225a882 2265#endif\r
ac8504f8 2266#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
2267 case IRMP_SAMSUNG48_PROTOCOL:\r
2268#endif\r
4225a882 2269#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 2270 case IRMP_MATSUSHITA_PROTOCOL:\r
4225a882 2271#endif\r
770a1a9d 2272#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 2273 case IRMP_KASEIKYO_PROTOCOL:\r
770a1a9d 2274#endif\r
4225a882 2275#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 2276 case IRMP_RECS80_PROTOCOL:\r
4225a882 2277#endif\r
2278#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 2279 case IRMP_RECS80EXT_PROTOCOL:\r
4225a882 2280#endif\r
9c07687e 2281#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
2282 case IRMP_TELEFUNKEN_PROTOCOL:\r
2283#endif\r
4225a882 2284#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2285 case IRMP_DENON_PROTOCOL:\r
4225a882 2286#endif\r
2287#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 2288 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 2289#endif\r
0715cf5e 2290#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
2291 case IRMP_FAN_PROTOCOL:\r
2292#endif\r
15dd9c32 2293#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
2294 case IRMP_SPEAKER_PROTOCOL:\r
2295#endif\r
5481e9cd 2296#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2297 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 2298#endif\r
c7c9a4a1 2299#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2300 case IRMP_FDC_PROTOCOL:\r
b5ea7869 2301#endif\r
c7c9a4a1 2302#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 2303 case IRMP_RCCAR_PROTOCOL:\r
c7c9a4a1 2304#endif\r
c7a47e89 2305#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2306 case IRMP_JVC_PROTOCOL:\r
c7a47e89 2307#endif\r
9405f84a 2308#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2309 case IRMP_NIKON_PROTOCOL:\r
9405f84a 2310#endif\r
f50e01e7 2311#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2312 case IRMP_LEGO_PROTOCOL:\r
f50e01e7 2313#endif\r
cb93f9e9 2314#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
2315 case IRMP_THOMSON_PROTOCOL:\r
2316#endif\r
c9b6916a 2317#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2318 case IRMP_ROOMBA_PROTOCOL:\r
2319#endif\r
003c1008 2320#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2321 case IRMP_PENTAX_PROTOCOL:\r
2322#endif\r
43c535be 2323#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
2324 case IRMP_ACP24_PROTOCOL:\r
2325#endif\r
a7054daf 2326\r
7644ac04 2327#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
c1dfa01f 2328 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 2329 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
0715cf5e 2330 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \\r
2331 IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \\r
2332 IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \\r
43c535be 2333 IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
e664a9f3 2334 {\r
08f2dd9d 2335#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2336 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
2337 {\r
2338 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
2339 {\r
2340 auto_repetition_pause_len--;\r
2341 }\r
2342\r
2343 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
2344 {\r
2345 repeat_frame_pause_len--;\r
2346 }\r
2347 }\r
2348#endif\r
2349\r
2350 if (pulse_counter == 0)\r
2351 {\r
2352 if (current_bit == 0xFF) // send start bit\r
2353 {\r
2354 pulse_len = startbit_pulse_len;\r
2355 pause_len = startbit_pause_len;\r
2356 }\r
2357 else if (current_bit < complete_data_len) // send n'th bit\r
2358 {\r
5481e9cd 2359#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2360 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
2361 {\r
2362 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
2363 {\r
2364 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2365 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2366 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2367 }\r
2368 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
2369 {\r
2370 pulse_len = SAMSUNG_PULSE_LEN;\r
2371 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
2372 }\r
2373 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
2374 {\r
2375 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2376\r
2377 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2378 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2379 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2380 }\r
2381 }\r
2382 else\r
5481e9cd 2383#endif\r
2384\r
7644ac04 2385#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2386 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
2387 {\r
2388 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
2389 {\r
2390 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2391 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2392 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2393 }\r
2394 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
2395 {\r
2396 pulse_len = NEC_PULSE_LEN;\r
2397 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
2398 }\r
2399 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
2400 {\r
2401 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2402\r
2403 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2404 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2405 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2406 }\r
2407 }\r
2408 else\r
7644ac04 2409#endif\r
2410\r
5481e9cd 2411#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2412 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
2413 {\r
2414 if (current_bit == 0) // send 2nd start bit\r
2415 {\r
2416 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2417 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2418 }\r
2419 else if (current_bit == 1) // send 3rd start bit\r
2420 {\r
2421 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
2422 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
2423 }\r
2424 else if (current_bit == 2) // send 4th start bit\r
2425 {\r
2426 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2427 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2428 }\r
2429 else if (current_bit == 19) // send trailer bit\r
2430 {\r
2431 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2432 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
2433 }\r
2434 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
2435 {\r
7fe8188d 2436 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;\r
e664a9f3 2437 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2438\r
2439 if (cur_bit_value == last_bit_value)\r
2440 {\r
2441 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
2442 }\r
2443 else\r
2444 {\r
2445 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
2446 last_bit_value = cur_bit_value;\r
2447 }\r
2448 }\r
2449 }\r
2450 else\r
2451#endif\r
7fe8188d 2452 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))\r
e664a9f3 2453 {\r
2454 pulse_len = pulse_1_len;\r
2455 pause_len = pause_1_len;\r
2456 }\r
2457 else\r
2458 {\r
2459 pulse_len = pulse_0_len;\r
2460 pause_len = pause_0_len;\r
2461 }\r
2462 }\r
2463 else if (has_stop_bit) // send stop bit\r
2464 {\r
2465 pulse_len = pulse_0_len;\r
2466\r
2467 if (auto_repetition_counter < n_auto_repetitions)\r
2468 {\r
2469 pause_len = pause_0_len;\r
2470 }\r
2471 else\r
2472 {\r
2473 pause_len = 255; // last frame: pause of 255\r
2474 }\r
2475 }\r
2476 }\r
2477\r
2478 if (pulse_counter < pulse_len)\r
2479 {\r
2480 if (pulse_counter == 0)\r
2481 {\r
2482 irsnd_on ();\r
2483 }\r
2484 pulse_counter++;\r
2485 }\r
2486 else if (pause_counter < pause_len)\r
2487 {\r
2488 if (pause_counter == 0)\r
2489 {\r
2490 irsnd_off ();\r
2491 }\r
2492 pause_counter++;\r
2493 }\r
2494 else\r
2495 {\r
2496 current_bit++;\r
2497\r
2498 if (current_bit >= complete_data_len + has_stop_bit)\r
2499 {\r
2500 current_bit = 0xFF;\r
2501 auto_repetition_counter++;\r
2502\r
2503 if (auto_repetition_counter == n_auto_repetitions)\r
2504 {\r
2505 irsnd_busy = FALSE;\r
2506 auto_repetition_counter = 0;\r
2507 }\r
2508 new_frame = TRUE;\r
2509 }\r
2510\r
2511 pulse_counter = 0;\r
2512 pause_counter = 0;\r
2513 }\r
2514 break;\r
2515 }\r
a7054daf 2516#endif\r
2517\r
4225a882 2518#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 2519 case IRMP_RC5_PROTOCOL:\r
a7054daf 2520#endif\r
9547ee89 2521#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 2522 case IRMP_RC6_PROTOCOL:\r
9547ee89 2523#endif\r
2524#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2525 case IRMP_RC6A_PROTOCOL:\r
9547ee89 2526#endif\r
a7054daf 2527#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2528 case IRMP_SIEMENS_PROTOCOL:\r
a7054daf 2529#endif\r
cb93f9e9 2530#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
2531 case IRMP_RUWIDO_PROTOCOL:\r
2532#endif\r
a7054daf 2533#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2534 case IRMP_GRUNDIG_PROTOCOL:\r
a7054daf 2535#endif\r
a48187fa 2536#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2537 case IRMP_IR60_PROTOCOL:\r
a48187fa 2538#endif\r
a7054daf 2539#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2540 case IRMP_NOKIA_PROTOCOL:\r
fa09ce10 2541#endif\r
2542#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2543 case IRMP_A1TVBOX_PROTOCOL:\r
a7054daf 2544#endif\r
4225a882 2545\r
cb93f9e9 2546#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \\r
2547 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \\r
2548 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \\r
2549 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \\r
2550 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
2551 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \\r
2552 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \\r
2553 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \\r
2554 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2555 {\r
2556 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
2557 {\r
2558 current_bit++;\r
4225a882 2559\r
e664a9f3 2560 if (current_bit >= complete_data_len)\r
2561 {\r
2562 current_bit = 0xFF;\r
a7054daf 2563\r
a48187fa 2564#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2565 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2566 {\r
2567 auto_repetition_counter++;\r
2568\r
2569 if (repeat_counter > 0)\r
2570 { // set 117 msec pause time\r
2571 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
2572 }\r
2573\r
2574 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2575 {\r
2576 n_auto_repetitions++; // increment number of auto repetitions\r
2577 repeat_counter++;\r
2578 }\r
2579 else if (auto_repetition_counter == n_auto_repetitions)\r
2580 {\r
2581 irsnd_busy = FALSE;\r
2582 auto_repetition_counter = 0;\r
2583 }\r
2584 }\r
2585 else\r
2586#endif\r
2587 {\r
2588 irsnd_busy = FALSE;\r
2589 }\r
2590\r
2591 new_frame = TRUE;\r
2592 irsnd_off ();\r
2593 }\r
2594\r
2595 pulse_counter = 0;\r
2596 pause_counter = 0;\r
2597 }\r
2598\r
2599 if (! new_frame)\r
2600 {\r
2601 uint8_t first_pulse;\r
5b437ff6 2602\r
a48187fa 2603#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2604 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2605 {\r
2606 if (current_bit == 0xFF || // start bit of start-frame\r
2607 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
2608 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
2609 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
2610 {\r
2611 pulse_len = startbit_pulse_len;\r
2612 pause_len = startbit_pause_len;\r
2613 first_pulse = TRUE;\r
2614 }\r
2615 else // send n'th bit\r
2616 {\r
2617 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2618 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
7fe8188d 2619 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2620 }\r
2621 }\r
2622 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
cb93f9e9 2623 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)\r
e664a9f3 2624#endif\r
2625 {\r
2626 if (current_bit == 0xFF) // 1 start bit\r
2627 {\r
9547ee89 2628#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2629 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2630 {\r
2631 pulse_len = startbit_pulse_len;\r
2632 pause_len = startbit_pause_len;\r
2633 }\r
2634 else\r
fa09ce10 2635#endif\r
2636#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2637 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r
2638 {\r
2639 current_bit = 0;\r
2640 }\r
2641 else\r
2642#endif\r
2643 {\r
2644 ;\r
2645 }\r
2646\r
2647 first_pulse = TRUE;\r
2648 }\r
2649 else // send n'th bit\r
2650 {\r
9547ee89 2651#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2652 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2653 {\r
2654 pulse_len = RC6_BIT_LEN;\r
2655 pause_len = RC6_BIT_LEN;\r
2656\r
2657 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2658 {\r
2659 if (current_bit == 4) // toggle bit (double len)\r
2660 {\r
2661 pulse_len = 2 * RC6_BIT_LEN;\r
2662 pause_len = 2 * RC6_BIT_LEN;\r
2663 }\r
2664 }\r
2665 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2666 {\r
2667 if (current_bit == 4) // toggle bit (double len)\r
2668 {\r
2669 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2670 pause_len = 2 * RC6_BIT_LEN;\r
2671 }\r
2672 else if (current_bit == 5) // toggle bit (double len)\r
2673 {\r
2674 pause_len = 2 * RC6_BIT_LEN;\r
2675 }\r
2676 }\r
2677 }\r
2678#endif\r
7fe8188d 2679 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2680 }\r
2681\r
2682 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2683 {\r
2684 first_pulse = first_pulse ? FALSE : TRUE;\r
2685 }\r
2686 }\r
2687\r
2688 if (first_pulse)\r
2689 {\r
2690 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2691\r
2692 if (pulse_counter < pulse_len)\r
2693 {\r
2694 if (pulse_counter == 0)\r
2695 {\r
2696 irsnd_on ();\r
2697 }\r
2698 pulse_counter++;\r
2699 }\r
2700 else // if (pause_counter < pause_len)\r
2701 {\r
2702 if (pause_counter == 0)\r
2703 {\r
2704 irsnd_off ();\r
2705 }\r
2706 pause_counter++;\r
2707 }\r
2708 }\r
2709 else\r
2710 {\r
2711 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2712\r
2713 if (pause_counter < pause_len)\r
2714 {\r
2715 if (pause_counter == 0)\r
2716 {\r
2717 irsnd_off ();\r
2718 }\r
2719 pause_counter++;\r
2720 }\r
2721 else // if (pulse_counter < pulse_len)\r
2722 {\r
2723 if (pulse_counter == 0)\r
2724 {\r
2725 irsnd_on ();\r
2726 }\r
2727 pulse_counter++;\r
2728 }\r
2729 }\r
2730 }\r
2731 break;\r
2732 }\r
9547ee89 2733#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
cb93f9e9 2734 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2735\r
e664a9f3 2736 default:\r
2737 {\r
2738 irsnd_busy = FALSE;\r
2739 break;\r
2740 }\r
2741 }\r
2742 }\r
2743\r
2744 if (! irsnd_busy)\r
2745 {\r
2746 if (repeat_counter < n_repeat_frames)\r
2747 {\r
c7c9a4a1 2748#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2749 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2750 {\r
2751 irsnd_buffer[2] |= 0x0F;\r
2752 }\r
2753#endif\r
2754 repeat_counter++;\r
2755 irsnd_busy = TRUE;\r
2756 }\r
2757 else\r
2758 {\r
2759 irsnd_busy = TRUE; //Rainer\r
2760 send_trailer = TRUE;\r
2761 n_repeat_frames = 0;\r
2762 repeat_counter = 0;\r
2763 }\r
2764 }\r
4225a882 2765 }\r
2766\r
cb93f9e9 2767#ifdef ANALYZE\r
4225a882 2768 if (irsnd_is_on)\r
2769 {\r
e664a9f3 2770 putchar ('0');\r
4225a882 2771 }\r
2772 else\r
2773 {\r
e664a9f3 2774 putchar ('1');\r
4225a882 2775 }\r
2776#endif\r
2777\r
2778 return irsnd_busy;\r
2779}\r
2780\r
cb93f9e9 2781#ifdef ANALYZE\r
4225a882 2782\r
2783// main function - for unix/linux + windows only!\r
2784// AVR: see main.c!\r
2785// Compile it under linux with:\r
2786// cc irsnd.c -o irsnd\r
2787//\r
2788// usage: ./irsnd protocol hex-address hex-command >filename\r
2789\r
2790int\r
2791main (int argc, char ** argv)\r
2792{\r
4225a882 2793 int protocol;\r
2794 int address;\r
2795 int command;\r
4225a882 2796 IRMP_DATA irmp_data;\r
2797\r
a7054daf 2798 if (argc != 4 && argc != 5)\r
4225a882 2799 {\r
e664a9f3 2800 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
2801 return 1;\r
4225a882 2802 }\r
2803\r
2804 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
e664a9f3 2805 sscanf (argv[2], "%x", &address) == 1 &&\r
2806 sscanf (argv[3], "%x", &command) == 1)\r
4225a882 2807 {\r
e664a9f3 2808 irmp_data.protocol = protocol;\r
2809 irmp_data.address = address;\r
2810 irmp_data.command = command;\r
4225a882 2811\r
e664a9f3 2812 if (argc == 5)\r
2813 {\r
2814 irmp_data.flags = atoi (argv[4]);\r
2815 }\r
2816 else\r
2817 {\r
2818 irmp_data.flags = 0;\r
2819 }\r
a7054daf 2820\r
e664a9f3 2821 irsnd_init ();\r
4225a882 2822\r
e664a9f3 2823 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2824\r
e664a9f3 2825 while (irsnd_busy)\r
2826 {\r
2827 irsnd_ISR ();\r
2828 }\r
beda975f 2829\r
e664a9f3 2830 putchar ('\n');\r
a03ad359 2831\r
f874da09 2832#if 1 // enable here to send twice\r
e664a9f3 2833 (void) irsnd_send_data (&irmp_data, TRUE);\r
a03ad359 2834\r
e664a9f3 2835 while (irsnd_busy)\r
2836 {\r
2837 irsnd_ISR ();\r
2838 }\r
a03ad359 2839\r
e664a9f3 2840 putchar ('\n');\r
f874da09 2841#endif\r
4225a882 2842 }\r
2843 else\r
2844 {\r
e664a9f3 2845 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2846 return 1;\r
4225a882 2847 }\r
2848 return 0;\r
2849}\r
2850\r
cb93f9e9 2851#endif // ANALYZE\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)