| 4225a882 |
1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 2 | * @file irsnd.c\r |
| 3 | *\r |
| 2ac088b2 |
4 | * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r |
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5 | *\r |
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6 | * Supported mikrocontrollers:\r |
| 7 | *\r |
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8 | * ATtiny87, ATtiny167\r |
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9 | * ATtiny45, ATtiny85\r |
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10 | * ATtiny44 ATtiny84\r |
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11 | * ATmega8, ATmega16, ATmega32\r |
| 12 | * ATmega162\r |
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13 | * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r |
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14 | * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r |
| 15 | *\r |
| c1dfa01f |
16 | * $Id: irsnd.c,v 1.76 2014/06/23 06:56:00 fm Exp $\r |
| 5481e9cd |
17 | *\r |
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18 | * This program is free software; you can redistribute it and/or modify\r |
| 19 | * it under the terms of the GNU General Public License as published by\r |
| 20 | * the Free Software Foundation; either version 2 of the License, or\r |
| 21 | * (at your option) any later version.\r |
| 22 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 23 | */\r |
| 24 | \r |
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25 | #include "irsnd.h"\r |
| 26 | \r |
| a03ad359 |
27 | #ifndef F_CPU\r |
| 28 | # error F_CPU unkown\r |
| 29 | #endif\r |
| 30 | \r |
| 1f54e86c |
31 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 32 | * ATtiny pin definition of OC0A / OC0B\r |
| 33 | * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r |
| 34 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 35 | */\r |
| 2ac088b2 |
36 | #if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r |
| 08f2dd9d |
37 | # if IRSND_OCx == IRSND_OC0A // OC0A\r |
| f874da09 |
38 | # define IRSND_PORT_LETTER B\r |
| 39 | # define IRSND_BIT_NUMBER 2\r |
| 08f2dd9d |
40 | # elif IRSND_OCx == IRSND_OC0B // OC0B\r |
| f874da09 |
41 | # define IRSND_PORT_LETTER A\r |
| 42 | # define IRSND_BIT_NUMBER 7\r |
| 08f2dd9d |
43 | # else\r |
| 44 | # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r |
| 45 | # endif // IRSND_OCx\r |
| 46 | #elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r |
| 47 | # if IRSND_OCx == IRSND_OC0A // OC0A\r |
| f874da09 |
48 | # define IRSND_PORT_LETTER B\r |
| 49 | # define IRSND_BIT_NUMBER 0\r |
| 08f2dd9d |
50 | # elif IRSND_OCx == IRSND_OC0B // OC0B\r |
| f874da09 |
51 | # define IRSND_PORT_LETTER B\r |
| 52 | # define IRSND_BIT_NUMBER 1\r |
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53 | # else\r |
| 54 | # error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r |
| 55 | # endif // IRSND_OCx\r |
| 21a4e0ee |
56 | #elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r |
| 90387f65 |
57 | # if IRSND_OCx == IRSND_OC0A // OC0A\r |
| f874da09 |
58 | # define IRSND_PORT_LETTER A\r |
| 59 | # define IRSND_BIT_NUMBER 2\r |
| 90387f65 |
60 | # else\r |
| 61 | # error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r |
| 62 | # endif // IRSND_OCx\r |
| 08f2dd9d |
63 | #elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r |
| 64 | # if IRSND_OCx == IRSND_OC2 // OC0A\r |
| f874da09 |
65 | # define IRSND_PORT_LETTER B\r |
| 66 | # define IRSND_BIT_NUMBER 3\r |
| 08f2dd9d |
67 | # else\r |
| 68 | # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r |
| 69 | # endif // IRSND_OCx\r |
| 70 | #elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r |
| 71 | # if IRSND_OCx == IRSND_OC2 // OC2\r |
| f874da09 |
72 | # define IRSND_PORT_LETTER D\r |
| 73 | # define IRSND_BIT_NUMBER 7\r |
| 08f2dd9d |
74 | # else\r |
| 75 | # error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r |
| 76 | # endif // IRSND_OCx\r |
| 77 | #elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r |
| 78 | # if IRSND_OCx == IRSND_OC2 // OC2\r |
| f874da09 |
79 | # define IRSND_PORT_LETTER B\r |
| 80 | # define IRSND_BIT_NUMBER 1\r |
| 08f2dd9d |
81 | # elif IRSND_OCx == IRSND_OC0 // OC0\r |
| f874da09 |
82 | # define IRSND_PORT_LETTER B\r |
| 83 | # define IRSND_BIT_NUMBER 0\r |
| 08f2dd9d |
84 | # else\r |
| 85 | # error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r |
| 86 | # endif // IRSND_OCx\r |
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87 | #elif defined (__AVR_ATmega164__) \\r |
| 88 | || defined (__AVR_ATmega324__) \\r |
| 89 | || defined (__AVR_ATmega644__) \\r |
| 90 | || defined (__AVR_ATmega644P__) \\r |
| 0f700c8e |
91 | || defined (__AVR_ATmega1284__) \\r |
| 08f2dd9d |
92 | || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r |
| 93 | # if IRSND_OCx == IRSND_OC2A // OC2A\r |
| f874da09 |
94 | # define IRSND_PORT_LETTER D\r |
| 95 | # define IRSND_BIT_NUMBER 7\r |
| 08f2dd9d |
96 | # elif IRSND_OCx == IRSND_OC2B // OC2B\r |
| f874da09 |
97 | # define IRSND_PORT_LETTER D\r |
| 98 | # define IRSND_BIT_NUMBER 6\r |
| 08f2dd9d |
99 | # elif IRSND_OCx == IRSND_OC0A // OC0A\r |
| f874da09 |
100 | # define IRSND_PORT_LETTER B\r |
| 101 | # define IRSND_BIT_NUMBER 3\r |
| 08f2dd9d |
102 | # elif IRSND_OCx == IRSND_OC0B // OC0B\r |
| f874da09 |
103 | # define IRSND_PORT_LETTER B\r |
| 104 | # define IRSND_BIT_NUMBER 4\r |
| 08f2dd9d |
105 | # else\r |
| 106 | # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r |
| 107 | # endif // IRSND_OCx\r |
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108 | #elif defined (__AVR_ATmega48__) \\r |
| 109 | || defined (__AVR_ATmega88__) \\r |
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110 | || defined (__AVR_ATmega88P__) \\r |
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111 | || defined (__AVR_ATmega168__) \\r |
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112 | || defined (__AVR_ATmega168P__) \\r |
| 08f2dd9d |
113 | || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r |
| 114 | # if IRSND_OCx == IRSND_OC2A // OC2A\r |
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115 | # define IRSND_PORT_LETTER B\r |
| 116 | # define IRSND_BIT_NUMBER 3\r |
| 08f2dd9d |
117 | # elif IRSND_OCx == IRSND_OC2B // OC2B\r |
| f874da09 |
118 | # define IRSND_PORT_LETTER D\r |
| 119 | # define IRSND_BIT_NUMBER 3\r |
| 08f2dd9d |
120 | # elif IRSND_OCx == IRSND_OC0A // OC0A\r |
| f874da09 |
121 | # define IRSND_PORT_LETTER D\r |
| 122 | # define IRSND_BIT_NUMBER 6\r |
| 08f2dd9d |
123 | # elif IRSND_OCx == IRSND_OC0B // OC0B\r |
| f874da09 |
124 | # define IRSND_PORT_LETTER D\r |
| 125 | # define IRSND_BIT_NUMBER 5\r |
| 08f2dd9d |
126 | # else\r |
| 127 | # error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r |
| 128 | # endif // IRSND_OCx\r |
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129 | #elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r |
| 08f2dd9d |
130 | # if IRSND_OCx == IRSND_OC0 \r |
| f874da09 |
131 | # define IRSND_PORT_LETTER B\r |
| 132 | # define IRSND_BIT_NUMBER 0\r |
| 08f2dd9d |
133 | # elif IRSND_OCx == IRSND_OC1A \r |
| f874da09 |
134 | # define IRSND_PORT_LETTER D\r |
| 135 | # define IRSND_BIT_NUMBER 5\r |
| 08f2dd9d |
136 | # elif IRSND_OCx == IRSND_OC1B \r |
| f874da09 |
137 | # define IRSND_PORT_LETTER E\r |
| 138 | # define IRSND_BIT_NUMBER 2\r |
| 08f2dd9d |
139 | # else\r |
| 140 | # error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r |
| 141 | # endif // IRSND_OCx\r |
| 9c86ff1a |
142 | #elif defined (PIC_C18) //Microchip C18 compiler\r |
| 143 | //Nothing here to do here -> See irsndconfig.h\r |
| 08f2dd9d |
144 | #elif defined (ARM_STM32) //STM32\r |
| 145 | //Nothing here to do here -> See irsndconfig.h\r |
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146 | #else\r |
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147 | # if !defined (unix) && !defined (WIN32)\r |
| 148 | # error mikrocontroller not defined, please fill in definitions here.\r |
| 149 | # endif // unix, WIN32\r |
| f50e01e7 |
150 | #endif // __AVR...\r |
| 151 | \r |
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152 | #if defined(ATMEL_AVR)\r |
| 153 | # define _CONCAT(a,b) a##b\r |
| 154 | # define CONCAT(a,b) _CONCAT(a,b)\r |
| 155 | # define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r |
| 156 | # define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r |
| 157 | # define IRSND_BIT IRSND_BIT_NUMBER\r |
| 158 | #endif\r |
| 159 | \r |
| 9405f84a |
160 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
| 9c86ff1a |
161 | typedef uint16_t IRSND_PAUSE_LEN;\r |
| 9405f84a |
162 | #else\r |
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163 | typedef uint8_t IRSND_PAUSE_LEN;\r |
| 9405f84a |
164 | #endif\r |
| 165 | \r |
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166 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 167 | * IR timings\r |
| 168 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 169 | */\r |
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170 | #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r |
| 171 | #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r |
| 172 | #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r |
| 173 | #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r |
| 174 | #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r |
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175 | #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 176 | #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
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177 | \r |
| 178 | #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r |
| 179 | #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r |
| a7054daf |
180 | #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r |
| 4225a882 |
181 | #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r |
| 182 | #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r |
| 183 | #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r |
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184 | #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
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185 | \r |
| 186 | #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r |
| 187 | #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r |
| 188 | #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r |
| 189 | #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r |
| 190 | #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
191 | #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 4225a882 |
192 | \r |
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193 | #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 194 | #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
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195 | \r |
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196 | #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r |
| 197 | #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r |
| 198 | #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r |
| 199 | #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r |
| 200 | #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
201 | #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
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202 | \r |
| 770a1a9d |
203 | #define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r |
| 204 | #define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r |
| 205 | #define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r |
| 206 | #define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r |
| 207 | #define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
208 | #define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 209 | #define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
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210 | \r |
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211 | #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r |
| 212 | #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r |
| 213 | #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r |
| 214 | #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r |
| 215 | #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
216 | #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
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217 | \r |
| 218 | #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r |
| 219 | #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r |
| 9c07687e |
220 | #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 4225a882 |
221 | \r |
| 222 | #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r |
| 223 | #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r |
| 224 | #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r |
| 225 | #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r |
| 9c07687e |
226 | #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 4225a882 |
227 | \r |
| 228 | #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r |
| 229 | #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r |
| 230 | #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
231 | #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 232 | #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 4225a882 |
233 | \r |
| beda975f |
234 | #define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r |
| 235 | #define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r |
| 236 | #define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
237 | #define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 238 | #define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| beda975f |
239 | \r |
| 4225a882 |
240 | #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r |
| 241 | #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r |
| 242 | #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r |
| 243 | #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r |
| 244 | #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
245 | #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 246 | \r |
| 247 | #define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)\r |
| 248 | #define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)\r |
| 249 | #define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)\r |
| 250 | #define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)\r |
| 251 | #define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)\r |
| 252 | #define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 253 | #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 4225a882 |
254 | \r |
| 255 | #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r |
| 256 | #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r |
| 257 | #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r |
| 258 | #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r |
| 259 | #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r |
| 260 | #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
261 | #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 262 | #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 4225a882 |
263 | \r |
| 15dd9c32 |
264 | #define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)\r |
| 265 | #define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)\r |
| 266 | #define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)\r |
| 267 | #define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)\r |
| 268 | #define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)\r |
| 269 | #define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)\r |
| 9c07687e |
270 | #define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 271 | #define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 15dd9c32 |
272 | \r |
| 5481e9cd |
273 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r |
| 274 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r |
| 275 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r |
| 276 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r |
| 277 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r |
| 278 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r |
| 279 | #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r |
| 280 | #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r |
| 281 | #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r |
| 282 | #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r |
| 283 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r |
| 9c07687e |
284 | #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 5481e9cd |
285 | \r |
| 9c86ff1a |
286 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r |
| 287 | #define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r |
| 9c07687e |
288 | #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 289 | #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 89e8cafb |
290 | #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| a7054daf |
291 | \r |
| 9c07687e |
292 | #define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
| a48187fa |
293 | \r |
| 02ccdb69 |
294 | #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r |
| 295 | #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r |
| 9c07687e |
296 | #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 5b437ff6 |
297 | \r |
| cb93f9e9 |
298 | #define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r |
| 299 | #define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)\r |
| 300 | #define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r |
| 301 | #define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)\r |
| 9c07687e |
302 | #define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| cb93f9e9 |
303 | \r |
| 08f2dd9d |
304 | #ifdef PIC_C18 // PIC C18\r |
| 305 | # define IRSND_FREQ_TYPE uint8_t\r |
| 306 | # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r |
| 307 | # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r |
| 308 | # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r |
| 309 | # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r |
| 310 | # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r |
| 311 | # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r |
| 312 | # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r |
| 313 | #elif defined (ARM_STM32) // STM32\r |
| 314 | # define IRSND_FREQ_TYPE uint32_t\r |
| 315 | # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r |
| 316 | # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r |
| 317 | # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r |
| 318 | # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r |
| 319 | # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r |
| 320 | # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r |
| 321 | # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r |
| 322 | #else // AVR\r |
| a03ad359 |
323 | # if F_CPU >= 16000000L\r |
| 324 | # define AVR_PRESCALER 8\r |
| 325 | # else\r |
| 326 | # define AVR_PRESCALER 1\r |
| 327 | # endif\r |
| 08f2dd9d |
328 | # define IRSND_FREQ_TYPE uint8_t\r |
| a03ad359 |
329 | # define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r |
| 330 | # define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r |
| 331 | # define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r |
| 332 | # define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r |
| 333 | # define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r |
| 334 | # define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r |
| 335 | # define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r |
| 9c86ff1a |
336 | #endif\r |
| 4225a882 |
337 | \r |
| 48664931 |
338 | #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r |
| 339 | #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r |
| 340 | #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r |
| 341 | #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r |
| 342 | #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r |
| 343 | #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| b5ea7869 |
344 | \r |
| c7c9a4a1 |
345 | #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r |
| 346 | #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r |
| 347 | #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r |
| 348 | #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r |
| 349 | #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r |
| 350 | #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 351 | \r |
| c7a47e89 |
352 | #define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r |
| 353 | #define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r |
| 354 | #define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r |
| 355 | #define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r |
| 356 | #define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r |
| 357 | #define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r |
| 358 | #define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 359 | \r |
| 9405f84a |
360 | #define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r |
| 361 | #define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r |
| 362 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r |
| 363 | #define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r |
| 364 | #define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r |
| 365 | #define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r |
| f50e01e7 |
366 | #define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 367 | \r |
| 368 | #define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r |
| 369 | #define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r |
| 370 | #define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r |
| 371 | #define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r |
| 372 | #define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r |
| 373 | #define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r |
| 374 | #define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 9405f84a |
375 | \r |
| fa09ce10 |
376 | #define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r |
| 377 | #define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r |
| 378 | #define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r |
| 379 | #define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r |
| 380 | #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 381 | #define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 382 | \r |
| c9b6916a |
383 | #define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r |
| 384 | #define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r |
| 385 | #define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r |
| 386 | #define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r |
| 387 | #define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r |
| 388 | #define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r |
| 389 | #define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
| 390 | \r |
| 9c86ff1a |
391 | static volatile uint8_t irsnd_busy = 0;\r |
| 392 | static volatile uint8_t irsnd_protocol = 0;\r |
| 393 | static volatile uint8_t irsnd_buffer[6] = {0};\r |
| 394 | static volatile uint8_t irsnd_repeat = 0;\r |
| 4225a882 |
395 | static volatile uint8_t irsnd_is_on = FALSE;\r |
| 396 | \r |
| f50e01e7 |
397 | #if IRSND_USE_CALLBACK == 1\r |
| 398 | static void (*irsnd_callback_ptr) (uint8_t);\r |
| 399 | #endif // IRSND_USE_CALLBACK == 1\r |
| 400 | \r |
| 4225a882 |
401 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 402 | * Switch PWM on\r |
| 4225a882 |
403 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 404 | */\r |
| 405 | static void\r |
| 406 | irsnd_on (void)\r |
| 407 | {\r |
| 408 | if (! irsnd_is_on)\r |
| 409 | {\r |
| cb93f9e9 |
410 | #ifndef ANALYZE\r |
| 08f2dd9d |
411 | # if defined(PIC_C18) // PIC C18\r |
| cb93f9e9 |
412 | PWMon();\r |
| 413 | // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r |
| 08f2dd9d |
414 | # elif defined (ARM_STM32) // STM32\r |
| e664a9f3 |
415 | TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r |
| 416 | TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r |
| 417 | TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r |
| 08f2dd9d |
418 | # else // AVR\r |
| 419 | # if IRSND_OCx == IRSND_OC2 // use OC2\r |
| e664a9f3 |
420 | TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r |
| 08f2dd9d |
421 | # elif IRSND_OCx == IRSND_OC2A // use OC2A\r |
| e664a9f3 |
422 | TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r |
| 08f2dd9d |
423 | # elif IRSND_OCx == IRSND_OC2B // use OC2B\r |
| e664a9f3 |
424 | TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r |
| 08f2dd9d |
425 | # elif IRSND_OCx == IRSND_OC0 // use OC0\r |
| e664a9f3 |
426 | TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r |
| 08f2dd9d |
427 | # elif IRSND_OCx == IRSND_OC0A // use OC0A\r |
| e664a9f3 |
428 | TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r |
| 08f2dd9d |
429 | # elif IRSND_OCx == IRSND_OC0B // use OC0B\r |
| e664a9f3 |
430 | TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r |
| 08f2dd9d |
431 | # else\r |
| 432 | # error wrong value of IRSND_OCx\r |
| 433 | # endif // IRSND_OCx\r |
| 434 | # endif // C18\r |
| cb93f9e9 |
435 | #endif // ANALYZE\r |
| f50e01e7 |
436 | \r |
| 437 | #if IRSND_USE_CALLBACK == 1\r |
| e664a9f3 |
438 | if (irsnd_callback_ptr)\r |
| 439 | {\r |
| 440 | (*irsnd_callback_ptr) (TRUE);\r |
| 441 | }\r |
| f50e01e7 |
442 | #endif // IRSND_USE_CALLBACK == 1\r |
| 443 | \r |
| e664a9f3 |
444 | irsnd_is_on = TRUE;\r |
| 4225a882 |
445 | }\r |
| 446 | }\r |
| 447 | \r |
| 448 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 449 | * Switch PWM off\r |
| 450 | * @details Switches PWM off\r |
| 451 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 452 | */\r |
| 453 | static void\r |
| 454 | irsnd_off (void)\r |
| 455 | {\r |
| 456 | if (irsnd_is_on)\r |
| 457 | {\r |
| cb93f9e9 |
458 | #ifndef ANALYZE\r |
| 9c86ff1a |
459 | \r |
| 08f2dd9d |
460 | # if defined(PIC_C18) // PIC C18\r |
| cb93f9e9 |
461 | PWMoff();\r |
| 462 | // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r |
| 08f2dd9d |
463 | # elif defined (ARM_STM32) // STM32\r |
| e664a9f3 |
464 | TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r |
| 465 | TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r |
| 466 | TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r |
| 467 | TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r |
| 08f2dd9d |
468 | # else //AVR\r |
| 9c86ff1a |
469 | \r |
| 08f2dd9d |
470 | # if IRSND_OCx == IRSND_OC2 // use OC2\r |
| e664a9f3 |
471 | TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r |
| 08f2dd9d |
472 | # elif IRSND_OCx == IRSND_OC2A // use OC2A\r |
| e664a9f3 |
473 | TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r |
| 08f2dd9d |
474 | # elif IRSND_OCx == IRSND_OC2B // use OC2B\r |
| e664a9f3 |
475 | TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r |
| 08f2dd9d |
476 | # elif IRSND_OCx == IRSND_OC0 // use OC0\r |
| e664a9f3 |
477 | TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r |
| 08f2dd9d |
478 | # elif IRSND_OCx == IRSND_OC0A // use OC0A\r |
| e664a9f3 |
479 | TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r |
| 08f2dd9d |
480 | # elif IRSND_OCx == IRSND_OC0B // use OC0B\r |
| e664a9f3 |
481 | TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r |
| 08f2dd9d |
482 | # else\r |
| 483 | # error wrong value of IRSND_OCx\r |
| 484 | # endif // IRSND_OCx\r |
| e664a9f3 |
485 | IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r |
| 08f2dd9d |
486 | # endif //C18\r |
| cb93f9e9 |
487 | #endif // ANALYZE\r |
| f50e01e7 |
488 | \r |
| 489 | #if IRSND_USE_CALLBACK == 1\r |
| e664a9f3 |
490 | if (irsnd_callback_ptr)\r |
| 491 | {\r |
| 492 | (*irsnd_callback_ptr) (FALSE);\r |
| 493 | }\r |
| f50e01e7 |
494 | #endif // IRSND_USE_CALLBACK == 1\r |
| 495 | \r |
| e664a9f3 |
496 | irsnd_is_on = FALSE;\r |
| 4225a882 |
497 | }\r |
| 498 | }\r |
| 499 | \r |
| 500 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 501 | * Set PWM frequency\r |
| 502 | * @details sets pwm frequency\r |
| 503 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 504 | */\r |
| 505 | static void\r |
| 08f2dd9d |
506 | irsnd_set_freq (IRSND_FREQ_TYPE freq)\r |
| 4225a882 |
507 | {\r |
| cb93f9e9 |
508 | #ifndef ANALYZE\r |
| 08f2dd9d |
509 | # if defined(PIC_C18) // PIC C18\r |
| e664a9f3 |
510 | OpenPWM(freq); \r |
| cb93f9e9 |
511 | SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r |
| 512 | PWMoff();\r |
| 08f2dd9d |
513 | # elif defined (ARM_STM32) // STM32\r |
| e664a9f3 |
514 | static uint32_t TimeBaseFreq = 0;\r |
| 08f2dd9d |
515 | \r |
| e664a9f3 |
516 | if (TimeBaseFreq == 0)\r |
| 517 | {\r |
| 518 | RCC_ClocksTypeDef RCC_ClocksStructure;\r |
| 519 | /* Get system clocks and store timer clock in variable */\r |
| 520 | RCC_GetClocksFreq(&RCC_ClocksStructure);\r |
| 08f2dd9d |
521 | # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r |
| e664a9f3 |
522 | if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r |
| 523 | {\r |
| 524 | TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r |
| 525 | }\r |
| 526 | else\r |
| 527 | {\r |
| 528 | TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r |
| 529 | }\r |
| 08f2dd9d |
530 | # else\r |
| e664a9f3 |
531 | if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r |
| 532 | {\r |
| 533 | TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r |
| 534 | }\r |
| 535 | else\r |
| 536 | {\r |
| 537 | TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r |
| 538 | }\r |
| 08f2dd9d |
539 | # endif\r |
| e664a9f3 |
540 | }\r |
| 08f2dd9d |
541 | \r |
| e664a9f3 |
542 | freq = TimeBaseFreq/freq;\r |
| 08f2dd9d |
543 | \r |
| e664a9f3 |
544 | /* Set frequency */\r |
| 545 | TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r |
| 546 | /* Set duty cycle */\r |
| 547 | TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r |
| 08f2dd9d |
548 | # else // AVR\r |
| 549 | \r |
| 550 | # if IRSND_OCx == IRSND_OC2\r |
| e664a9f3 |
551 | OCR2 = freq; // use register OCR2 for OC2\r |
| 08f2dd9d |
552 | # elif IRSND_OCx == IRSND_OC2A // use OC2A\r |
| e664a9f3 |
553 | OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r |
| 08f2dd9d |
554 | # elif IRSND_OCx == IRSND_OC2B // use OC2B\r |
| e664a9f3 |
555 | OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r |
| 08f2dd9d |
556 | # elif IRSND_OCx == IRSND_OC0 // use OC0\r |
| e664a9f3 |
557 | OCR0 = freq; // use register OCR2 for OC2\r |
| 08f2dd9d |
558 | # elif IRSND_OCx == IRSND_OC0A // use OC0A\r |
| e664a9f3 |
559 | OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r |
| 08f2dd9d |
560 | # elif IRSND_OCx == IRSND_OC0B // use OC0B\r |
| e664a9f3 |
561 | OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r |
| 08f2dd9d |
562 | # else\r |
| 563 | # error wrong value of IRSND_OCx\r |
| 564 | # endif\r |
| 565 | # endif //PIC_C18\r |
| cb93f9e9 |
566 | #endif // ANALYZE\r |
| 4225a882 |
567 | }\r |
| 568 | \r |
| 569 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 570 | * Initialize the PWM\r |
| 571 | * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r |
| 572 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 573 | */\r |
| 574 | void\r |
| 575 | irsnd_init (void)\r |
| 576 | {\r |
| cb93f9e9 |
577 | #ifndef ANALYZE\r |
| 08f2dd9d |
578 | # if defined(PIC_C18) // PIC C18\r |
| e664a9f3 |
579 | OpenTimer;\r |
| cb93f9e9 |
580 | irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r |
| 581 | IRSND_PIN = 0; // set IO to outout\r |
| 582 | PWMoff();\r |
| 08f2dd9d |
583 | # elif defined (ARM_STM32) // STM32\r |
| e664a9f3 |
584 | GPIO_InitTypeDef GPIO_InitStructure;\r |
| 585 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r |
| 586 | TIM_OCInitTypeDef TIM_OCInitStructure;\r |
| 08f2dd9d |
587 | \r |
| 588 | /* GPIOx clock enable */\r |
| 589 | # if defined (ARM_STM32L1XX)\r |
| e664a9f3 |
590 | RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r |
| 08f2dd9d |
591 | # elif defined (ARM_STM32F10X)\r |
| e664a9f3 |
592 | RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r |
| 08f2dd9d |
593 | # elif defined (ARM_STM32F4XX)\r |
| e664a9f3 |
594 | RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r |
| 08f2dd9d |
595 | # endif\r |
| 596 | \r |
| e664a9f3 |
597 | /* GPIO Configuration */\r |
| 598 | GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r |
| 08f2dd9d |
599 | # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r |
| e664a9f3 |
600 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r |
| 601 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r |
| 602 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r |
| 603 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r |
| 604 | GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r |
| 605 | GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r |
| 08f2dd9d |
606 | # elif defined (ARM_STM32F10X)\r |
| e664a9f3 |
607 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r |
| 608 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r |
| 609 | GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r |
| 610 | GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r |
| 08f2dd9d |
611 | # endif\r |
| 612 | \r |
| e664a9f3 |
613 | /* TIMx clock enable */\r |
| 08f2dd9d |
614 | # if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r |
| e664a9f3 |
615 | RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r |
| 08f2dd9d |
616 | # else\r |
| e664a9f3 |
617 | RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r |
| 08f2dd9d |
618 | # endif\r |
| 08f2dd9d |
619 | \r |
| e664a9f3 |
620 | /* Time base configuration */\r |
| 621 | TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r |
| 622 | TIM_TimeBaseStructure.TIM_Prescaler = 0;\r |
| 623 | TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r |
| 624 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r |
| 625 | TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r |
| 626 | \r |
| 627 | /* PWM1 Mode configuration */\r |
| 628 | TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r |
| 629 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r |
| 630 | TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r |
| 631 | TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r |
| 632 | TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r |
| 633 | \r |
| 634 | /* Preload configuration */\r |
| 635 | TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r |
| 636 | TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r |
| 637 | \r |
| 638 | irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r |
| 08f2dd9d |
639 | # else // AVR\r |
| e664a9f3 |
640 | IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r |
| 641 | IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r |
| 08f2dd9d |
642 | \r |
| 643 | # if IRSND_OCx == IRSND_OC2 // use OC2\r |
| e664a9f3 |
644 | TCCR2 = (1<<WGM21); // CTC mode\r |
| a03ad359 |
645 | # if AVR_PRESCALER == 8\r |
| e664a9f3 |
646 | TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r |
| a03ad359 |
647 | # else\r |
| e664a9f3 |
648 | TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r |
| a03ad359 |
649 | # endif\r |
| 08f2dd9d |
650 | # elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r |
| e664a9f3 |
651 | TCCR2A = (1<<WGM21); // CTC mode\r |
| a03ad359 |
652 | # if AVR_PRESCALER == 8\r |
| e664a9f3 |
653 | TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r |
| a03ad359 |
654 | # else\r |
| e664a9f3 |
655 | TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r |
| a03ad359 |
656 | # endif\r |
| 08f2dd9d |
657 | # elif IRSND_OCx == IRSND_OC0 // use OC0\r |
| e664a9f3 |
658 | TCCR0 = (1<<WGM01); // CTC mode\r |
| a03ad359 |
659 | # if AVR_PRESCALER == 8\r |
| e664a9f3 |
660 | TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r |
| a03ad359 |
661 | # else\r |
| e664a9f3 |
662 | TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r |
| a03ad359 |
663 | # endif\r |
| 08f2dd9d |
664 | # elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r |
| e664a9f3 |
665 | TCCR0A = (1<<WGM01); // CTC mode\r |
| a03ad359 |
666 | # if AVR_PRESCALER == 8\r |
| e664a9f3 |
667 | TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r |
| a03ad359 |
668 | # else\r |
| e664a9f3 |
669 | TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r |
| a03ad359 |
670 | # endif\r |
| 08f2dd9d |
671 | # else\r |
| 672 | # error wrong value of IRSND_OCx\r |
| 673 | # endif\r |
| e664a9f3 |
674 | irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r |
| 08f2dd9d |
675 | # endif //PIC_C18\r |
| cb93f9e9 |
676 | #endif // ANALYZE\r |
| 4225a882 |
677 | }\r |
| 678 | \r |
| f50e01e7 |
679 | #if IRSND_USE_CALLBACK == 1\r |
| 680 | void\r |
| 681 | irsnd_set_callback_ptr (void (*cb)(uint8_t))\r |
| 682 | {\r |
| 683 | irsnd_callback_ptr = cb;\r |
| 684 | }\r |
| 685 | #endif // IRSND_USE_CALLBACK == 1\r |
| 686 | \r |
| 4225a882 |
687 | uint8_t\r |
| 688 | irsnd_is_busy (void)\r |
| 689 | {\r |
| 690 | return irsnd_busy;\r |
| 691 | }\r |
| 692 | \r |
| 693 | static uint16_t\r |
| 694 | bitsrevervse (uint16_t x, uint8_t len)\r |
| 695 | {\r |
| 696 | uint16_t xx = 0;\r |
| 697 | \r |
| 698 | while(len)\r |
| 699 | {\r |
| e664a9f3 |
700 | xx <<= 1;\r |
| 701 | if (x & 1)\r |
| 702 | {\r |
| 703 | xx |= 1;\r |
| 704 | }\r |
| 705 | x >>= 1;\r |
| 706 | len--;\r |
| 4225a882 |
707 | }\r |
| 708 | return xx;\r |
| 709 | }\r |
| 710 | \r |
| 711 | \r |
| 9547ee89 |
712 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r |
| 713 | static uint8_t sircs_additional_bitlen;\r |
| 714 | #endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r |
| 715 | \r |
| 4225a882 |
716 | uint8_t\r |
| 879b06c2 |
717 | irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r |
| 4225a882 |
718 | {\r |
| 719 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r |
| 720 | static uint8_t toggle_bit_recs80;\r |
| 721 | #endif\r |
| 722 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r |
| 723 | static uint8_t toggle_bit_recs80ext;\r |
| 724 | #endif\r |
| 725 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r |
| 726 | static uint8_t toggle_bit_rc5;\r |
| 9547ee89 |
727 | #endif\r |
| 779fbc81 |
728 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
| 9547ee89 |
729 | static uint8_t toggle_bit_rc6;\r |
| beda975f |
730 | #endif\r |
| 731 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r |
| 732 | static uint8_t toggle_bit_thomson;\r |
| 4225a882 |
733 | #endif\r |
| 734 | uint16_t address;\r |
| 735 | uint16_t command;\r |
| 736 | \r |
| 879b06c2 |
737 | if (do_wait)\r |
| 4225a882 |
738 | {\r |
| e664a9f3 |
739 | while (irsnd_busy)\r |
| 740 | {\r |
| 741 | // do nothing;\r |
| 742 | }\r |
| 879b06c2 |
743 | }\r |
| 744 | else if (irsnd_busy)\r |
| 745 | {\r |
| e664a9f3 |
746 | return (FALSE);\r |
| 4225a882 |
747 | }\r |
| 748 | \r |
| 749 | irsnd_protocol = irmp_data_p->protocol;\r |
| beda975f |
750 | irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r |
| 4225a882 |
751 | \r |
| 752 | switch (irsnd_protocol)\r |
| 753 | {\r |
| 754 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r |
| e664a9f3 |
755 | case IRMP_SIRCS_PROTOCOL:\r |
| 756 | {\r |
| 757 | // uint8_t sircs_additional_command_len;\r |
| 758 | uint8_t sircs_additional_address_len;\r |
| 759 | \r |
| 760 | sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r |
| 761 | \r |
| 762 | if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r |
| 763 | {\r |
| 764 | // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r |
| 765 | sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r |
| 766 | }\r |
| 767 | else\r |
| 768 | {\r |
| 769 | // sircs_additional_command_len = sircs_additional_bitlen;\r |
| 770 | sircs_additional_address_len = 0;\r |
| 771 | }\r |
| 772 | \r |
| 773 | command = bitsrevervse (irmp_data_p->command, 15);\r |
| 774 | \r |
| 775 | irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r |
| 776 | irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r |
| 777 | \r |
| 778 | if (sircs_additional_address_len > 0)\r |
| 779 | {\r |
| 780 | address = bitsrevervse (irmp_data_p->address, 5);\r |
| 781 | irsnd_buffer[1] |= (address & 0x0010) >> 4;\r |
| 782 | irsnd_buffer[2] = (address & 0x000F) << 4;\r |
| 783 | }\r |
| 784 | irsnd_busy = TRUE;\r |
| 785 | break;\r |
| 786 | }\r |
| 4225a882 |
787 | #endif\r |
| 788 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r |
| e664a9f3 |
789 | case IRMP_APPLE_PROTOCOL:\r |
| 790 | {\r |
| 791 | command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r |
| 792 | address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r |
| 793 | \r |
| 794 | address = bitsrevervse (address, NEC_ADDRESS_LEN);\r |
| 795 | command = bitsrevervse (command, NEC_COMMAND_LEN);\r |
| 796 | \r |
| 797 | irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r |
| 798 | \r |
| 799 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
| 800 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r |
| 801 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r |
| 802 | irsnd_buffer[3] = 0x8B; // 10001011 (id)\r |
| 803 | irsnd_busy = TRUE;\r |
| 804 | break;\r |
| 805 | }\r |
| 806 | case IRMP_NEC_PROTOCOL:\r |
| 807 | {\r |
| 808 | address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r |
| 809 | command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r |
| 810 | \r |
| 811 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
| 812 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r |
| 813 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r |
| 814 | irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r |
| 815 | irsnd_busy = TRUE;\r |
| 816 | break;\r |
| 817 | }\r |
| 7644ac04 |
818 | #endif\r |
| 819 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r |
| e664a9f3 |
820 | case IRMP_NEC16_PROTOCOL:\r |
| 821 | {\r |
| 822 | address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r |
| 823 | command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r |
| 46dd89b7 |
824 | \r |
| e664a9f3 |
825 | irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r |
| 826 | irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r |
| 827 | irsnd_busy = TRUE;\r |
| 828 | break;\r |
| 829 | }\r |
| 7644ac04 |
830 | #endif\r |
| 831 | #if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r |
| e664a9f3 |
832 | case IRMP_NEC42_PROTOCOL:\r |
| 833 | {\r |
| 834 | address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r |
| 835 | command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r |
| 836 | \r |
| 837 | irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r |
| 838 | irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r |
| 839 | irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r |
| 840 | irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r |
| 841 | irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r |
| 842 | irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r |
| 843 | irsnd_busy = TRUE;\r |
| 844 | break;\r |
| 845 | }\r |
| 4225a882 |
846 | #endif\r |
| c1dfa01f |
847 | #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r |
| 848 | case IRMP_LGAIR_PROTOCOL:\r |
| 849 | {\r |
| 850 | address = irmp_data_p->address;\r |
| 851 | command = irmp_data_p->command;\r |
| 852 | \r |
| 853 | irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA\r |
| 854 | irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC\r |
| 855 | irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC\r |
| 856 | irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum\r |
| 857 | ((command & 0x0F00) >> 8) +\r |
| 858 | ((command & 0x00F0) >>4 ) +\r |
| 859 | ((command & 0x000F))) & 0x000F) << 4;\r |
| 860 | irsnd_busy = TRUE;\r |
| 861 | break;\r |
| 862 | }\r |
| 863 | #endif\r |
| 4225a882 |
864 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
| e664a9f3 |
865 | case IRMP_SAMSUNG_PROTOCOL:\r |
| 866 | {\r |
| 867 | address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r |
| 868 | command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r |
| 869 | \r |
| 870 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
| 871 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r |
| 872 | irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r |
| 873 | irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r |
| 874 | irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r |
| 875 | irsnd_busy = TRUE;\r |
| 876 | break;\r |
| 877 | }\r |
| 878 | case IRMP_SAMSUNG32_PROTOCOL:\r |
| 879 | {\r |
| 880 | address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r |
| 881 | command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r |
| 882 | \r |
| 883 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
| 884 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r |
| 885 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r |
| 886 | irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r |
| 887 | irsnd_busy = TRUE;\r |
| 888 | break;\r |
| 889 | }\r |
| 4225a882 |
890 | #endif\r |
| 891 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
| e664a9f3 |
892 | case IRMP_MATSUSHITA_PROTOCOL:\r |
| 893 | {\r |
| 894 | address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r |
| 895 | command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r |
| 896 | \r |
| 897 | irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r |
| 898 | irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r |
| 899 | irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r |
| 900 | irsnd_busy = TRUE;\r |
| 901 | break;\r |
| 902 | }\r |
| 4225a882 |
903 | #endif\r |
| 770a1a9d |
904 | #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
| e664a9f3 |
905 | case IRMP_KASEIKYO_PROTOCOL:\r |
| 906 | {\r |
| 907 | uint8_t xor_value;\r |
| 908 | uint16_t genre2;\r |
| 770a1a9d |
909 | \r |
| e664a9f3 |
910 | address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r |
| 911 | command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r |
| 912 | genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r |
| 770a1a9d |
913 | \r |
| e664a9f3 |
914 | xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r |
| 770a1a9d |
915 | \r |
| e664a9f3 |
916 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
| 917 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r |
| 918 | irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r |
| 919 | irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r |
| 920 | irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r |
| 770a1a9d |
921 | \r |
| e664a9f3 |
922 | xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r |
| 770a1a9d |
923 | \r |
| e664a9f3 |
924 | irsnd_buffer[5] = xor_value;\r |
| 925 | irsnd_busy = TRUE;\r |
| 926 | break;\r |
| 927 | }\r |
| 770a1a9d |
928 | #endif\r |
| 4225a882 |
929 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r |
| e664a9f3 |
930 | case IRMP_RECS80_PROTOCOL:\r |
| 931 | {\r |
| 932 | toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r |
| 4225a882 |
933 | \r |
| e664a9f3 |
934 | irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r |
| 935 | ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r |
| 936 | irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r |
| 937 | irsnd_busy = TRUE;\r |
| 938 | break;\r |
| 939 | }\r |
| 4225a882 |
940 | #endif\r |
| 941 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r |
| e664a9f3 |
942 | case IRMP_RECS80EXT_PROTOCOL:\r |
| 943 | {\r |
| 944 | toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r |
| 4225a882 |
945 | \r |
| e664a9f3 |
946 | irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r |
| 947 | ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r |
| 948 | irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r |
| 949 | irsnd_busy = TRUE;\r |
| 950 | break;\r |
| 951 | }\r |
| 4225a882 |
952 | #endif\r |
| 953 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r |
| e664a9f3 |
954 | case IRMP_RC5_PROTOCOL:\r |
| 955 | {\r |
| 956 | toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r |
| 4225a882 |
957 | \r |
| e664a9f3 |
958 | irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r |
| 959 | ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r |
| 960 | irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r |
| 961 | irsnd_busy = TRUE;\r |
| 962 | break;\r |
| 963 | }\r |
| 4225a882 |
964 | #endif\r |
| 9547ee89 |
965 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1\r |
| e664a9f3 |
966 | case IRMP_RC6_PROTOCOL:\r |
| 967 | {\r |
| 968 | toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r |
| 9547ee89 |
969 | \r |
| e664a9f3 |
970 | irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r |
| 971 | irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r |
| 972 | irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r |
| 973 | irsnd_busy = TRUE;\r |
| 974 | break;\r |
| 975 | }\r |
| 9547ee89 |
976 | #endif\r |
| 977 | #if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
| e664a9f3 |
978 | case IRMP_RC6A_PROTOCOL:\r |
| 979 | {\r |
| 980 | toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r |
| 981 | \r |
| 982 | irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r |
| 983 | irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r |
| 984 | irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r |
| 985 | irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r |
| 986 | irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r |
| 987 | irsnd_busy = TRUE;\r |
| 988 | break;\r |
| 989 | }\r |
| 9547ee89 |
990 | #endif\r |
| 4225a882 |
991 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
| e664a9f3 |
992 | case IRMP_DENON_PROTOCOL:\r |
| 993 | {\r |
| 994 | irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r |
| 995 | irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r |
| 996 | irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r |
| 997 | irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r |
| 998 | irsnd_busy = TRUE;\r |
| 999 | break;\r |
| 1000 | }\r |
| 4225a882 |
1001 | #endif\r |
| beda975f |
1002 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r |
| e664a9f3 |
1003 | case IRMP_THOMSON_PROTOCOL:\r |
| 1004 | {\r |
| 1005 | toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r |
| beda975f |
1006 | \r |
| e664a9f3 |
1007 | irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r |
| 1008 | irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r |
| 1009 | irsnd_busy = TRUE;\r |
| 1010 | break;\r |
| 1011 | }\r |
| beda975f |
1012 | #endif\r |
| 4225a882 |
1013 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r |
| e664a9f3 |
1014 | case IRMP_NUBERT_PROTOCOL:\r |
| 1015 | {\r |
| 1016 | irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r |
| 1017 | irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r |
| 1018 | irsnd_busy = TRUE;\r |
| 1019 | break;\r |
| 1020 | }\r |
| 5481e9cd |
1021 | #endif\r |
| 15dd9c32 |
1022 | #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r |
| 1023 | case IRMP_SPEAKER_PROTOCOL:\r |
| 1024 | {\r |
| 1025 | irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r |
| 1026 | irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r |
| 1027 | irsnd_busy = TRUE;\r |
| 1028 | break;\r |
| 1029 | }\r |
| 1030 | #endif\r |
| 5481e9cd |
1031 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
| e664a9f3 |
1032 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r |
| 1033 | {\r |
| 1034 | irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r |
| 1035 | irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r |
| 1036 | irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r |
| 1037 | irsnd_busy = TRUE;\r |
| 1038 | break;\r |
| 1039 | }\r |
| 4225a882 |
1040 | #endif\r |
| 5b437ff6 |
1041 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r |
| e664a9f3 |
1042 | case IRMP_GRUNDIG_PROTOCOL:\r |
| 1043 | {\r |
| 9c07687e |
1044 | command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);\r |
| 5b437ff6 |
1045 | \r |
| e664a9f3 |
1046 | irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r |
| 1047 | irsnd_buffer[1] = 0xC0; // 11\r |
| 1048 | irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r |
| 1049 | irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r |
| d155e9ab |
1050 | \r |
| e664a9f3 |
1051 | irsnd_busy = TRUE;\r |
| 1052 | break;\r |
| 1053 | }\r |
| d155e9ab |
1054 | #endif\r |
| 9c07687e |
1055 | #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
| 1056 | case IRMP_TELEFUNKEN_PROTOCOL:\r |
| 1057 | {\r |
| 1058 | irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC\r |
| 1059 | irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC\r |
| 1060 | \r |
| 1061 | irsnd_busy = TRUE;\r |
| 1062 | break;\r |
| 1063 | }\r |
| 1064 | #endif\r |
| a48187fa |
1065 | #if IRSND_SUPPORT_IR60_PROTOCOL == 1\r |
| e664a9f3 |
1066 | case IRMP_IR60_PROTOCOL:\r |
| 1067 | {\r |
| 1068 | command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r |
| 08f2dd9d |
1069 | #if 0\r |
| e664a9f3 |
1070 | irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r |
| 1071 | irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r |
| 08f2dd9d |
1072 | #else\r |
| e664a9f3 |
1073 | irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r |
| 1074 | irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r |
| 08f2dd9d |
1075 | #endif\r |
| a48187fa |
1076 | \r |
| e664a9f3 |
1077 | irsnd_busy = TRUE;\r |
| 1078 | break;\r |
| 1079 | }\r |
| a48187fa |
1080 | #endif\r |
| d155e9ab |
1081 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
| e664a9f3 |
1082 | case IRMP_NOKIA_PROTOCOL:\r |
| 1083 | {\r |
| 1084 | address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r |
| 1085 | command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r |
| 1086 | \r |
| 1087 | irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r |
| 1088 | irsnd_buffer[1] = 0xFF; // 11111111\r |
| 1089 | irsnd_buffer[2] = 0x80; // 1\r |
| 1090 | irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r |
| 1091 | irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r |
| 1092 | irsnd_buffer[5] = (address << 7); // A\r |
| 1093 | \r |
| 1094 | irsnd_busy = TRUE;\r |
| 1095 | break;\r |
| 1096 | }\r |
| 5b437ff6 |
1097 | #endif\r |
| a7054daf |
1098 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r |
| e664a9f3 |
1099 | case IRMP_SIEMENS_PROTOCOL:\r |
| 1100 | {\r |
| cb93f9e9 |
1101 | irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA\r |
| 1102 | irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC\r |
| 1103 | irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r |
| 9405f84a |
1104 | \r |
| e664a9f3 |
1105 | irsnd_busy = TRUE;\r |
| 1106 | break;\r |
| 1107 | }\r |
| b5ea7869 |
1108 | #endif\r |
| cb93f9e9 |
1109 | #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r |
| 1110 | case IRMP_RUWIDO_PROTOCOL:\r |
| 1111 | {\r |
| 1112 | irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA\r |
| 1113 | irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC\r |
| 1114 | irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c\r |
| 1115 | irsnd_busy = TRUE;\r |
| 1116 | break;\r |
| 1117 | }\r |
| 1118 | #endif\r |
| 48664931 |
1119 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
| e664a9f3 |
1120 | case IRMP_FDC_PROTOCOL:\r |
| 1121 | {\r |
| 1122 | address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r |
| 1123 | command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r |
| 1124 | \r |
| 1125 | irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r |
| 1126 | irsnd_buffer[1] = 0; // 00000000\r |
| 1127 | irsnd_buffer[2] = 0; // 0000RRRR\r |
| 1128 | irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r |
| 1129 | irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r |
| 1130 | irsnd_busy = TRUE;\r |
| 1131 | break;\r |
| 1132 | }\r |
| c7c9a4a1 |
1133 | #endif\r |
| 1134 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r |
| e664a9f3 |
1135 | case IRMP_RCCAR_PROTOCOL:\r |
| 1136 | {\r |
| 1137 | address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r |
| 1138 | command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r |
| 1139 | \r |
| 1140 | irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r |
| 1141 | irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r |
| 1142 | \r |
| 1143 | irsnd_busy = TRUE;\r |
| 1144 | break;\r |
| 1145 | }\r |
| a7054daf |
1146 | #endif\r |
| c7a47e89 |
1147 | #if IRSND_SUPPORT_JVC_PROTOCOL == 1\r |
| e664a9f3 |
1148 | case IRMP_JVC_PROTOCOL:\r |
| 1149 | {\r |
| 1150 | address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r |
| 1151 | command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r |
| c7a47e89 |
1152 | \r |
| e664a9f3 |
1153 | irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r |
| 1154 | irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r |
| c7a47e89 |
1155 | \r |
| e664a9f3 |
1156 | irsnd_busy = TRUE;\r |
| 1157 | break;\r |
| 1158 | }\r |
| c7a47e89 |
1159 | #endif\r |
| 9405f84a |
1160 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
| e664a9f3 |
1161 | case IRMP_NIKON_PROTOCOL:\r |
| 1162 | {\r |
| 1163 | irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r |
| 1164 | irsnd_busy = TRUE;\r |
| 1165 | break;\r |
| 1166 | }\r |
| f50e01e7 |
1167 | #endif\r |
| 1168 | #if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r |
| e664a9f3 |
1169 | case IRMP_LEGO_PROTOCOL:\r |
| 1170 | {\r |
| 1171 | uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r |
| fa09ce10 |
1172 | \r |
| e664a9f3 |
1173 | irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r |
| 1174 | irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r |
| 1175 | irsnd_busy = TRUE;\r |
| 1176 | break;\r |
| 1177 | }\r |
| fa09ce10 |
1178 | #endif\r |
| 1179 | #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
| e664a9f3 |
1180 | case IRMP_A1TVBOX_PROTOCOL:\r |
| 1181 | {\r |
| 1182 | irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r |
| 1183 | irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r |
| 1184 | irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r |
| 1185 | \r |
| 1186 | irsnd_busy = TRUE;\r |
| 1187 | break;\r |
| 1188 | }\r |
| 1189 | #endif\r |
| c9b6916a |
1190 | #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r |
| 1191 | case IRMP_ROOMBA_PROTOCOL:\r |
| 1192 | {\r |
| 1193 | \r |
| 1194 | irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r |
| 1195 | irsnd_busy = TRUE;\r |
| 1196 | break;\r |
| 1197 | }\r |
| 1198 | #endif\r |
| e664a9f3 |
1199 | default:\r |
| 1200 | {\r |
| 1201 | break;\r |
| 1202 | }\r |
| 4225a882 |
1203 | }\r |
| 1204 | \r |
| 1205 | return irsnd_busy;\r |
| 1206 | }\r |
| 1207 | \r |
| beda975f |
1208 | void\r |
| 1209 | irsnd_stop (void)\r |
| 1210 | {\r |
| acf7fb44 |
1211 | irsnd_repeat = 0;\r |
| beda975f |
1212 | }\r |
| 1213 | \r |
| 4225a882 |
1214 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 1215 | * ISR routine\r |
| 1216 | * @details ISR routine, called 10000 times per second\r |
| 1217 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 1218 | */\r |
| 1219 | uint8_t\r |
| 1220 | irsnd_ISR (void)\r |
| 1221 | {\r |
| a48187fa |
1222 | static uint8_t send_trailer = FALSE;\r |
| 1223 | static uint8_t current_bit = 0xFF;\r |
| 1224 | static uint8_t pulse_counter = 0;\r |
| 1225 | static IRSND_PAUSE_LEN pause_counter = 0;\r |
| 1226 | static uint8_t startbit_pulse_len = 0;\r |
| 1227 | static IRSND_PAUSE_LEN startbit_pause_len = 0;\r |
| 1228 | static uint8_t pulse_1_len = 0;\r |
| 1229 | static uint8_t pause_1_len = 0;\r |
| 1230 | static uint8_t pulse_0_len = 0;\r |
| 1231 | static uint8_t pause_0_len = 0;\r |
| 1232 | static uint8_t has_stop_bit = 0;\r |
| 1233 | static uint8_t new_frame = TRUE;\r |
| 1234 | static uint8_t complete_data_len = 0;\r |
| 1235 | static uint8_t n_repeat_frames = 0; // number of repetition frames\r |
| 1236 | static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r |
| 1237 | static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r |
| 1238 | static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r |
| 1239 | static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r |
| 1240 | static uint8_t repeat_counter = 0; // repeat counter\r |
| 1241 | static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r |
| 1242 | static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r |
| 5481e9cd |
1243 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
| a48187fa |
1244 | static uint8_t last_bit_value;\r |
| 5481e9cd |
1245 | #endif\r |
| a48187fa |
1246 | static uint8_t pulse_len = 0xFF;\r |
| 08f2dd9d |
1247 | static IRSND_PAUSE_LEN pause_len = 0xFF;\r |
| 4225a882 |
1248 | \r |
| 1249 | if (irsnd_busy)\r |
| 1250 | {\r |
| e664a9f3 |
1251 | if (current_bit == 0xFF && new_frame) // start of transmission...\r |
| 1252 | {\r |
| 1253 | if (auto_repetition_counter > 0)\r |
| 1254 | {\r |
| 1255 | auto_repetition_pause_counter++;\r |
| 4225a882 |
1256 | \r |
| 08f2dd9d |
1257 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
| e664a9f3 |
1258 | if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r |
| 1259 | {\r |
| 1260 | repeat_frame_pause_len--;\r |
| 1261 | }\r |
| 08f2dd9d |
1262 | #endif\r |
| 1263 | \r |
| e664a9f3 |
1264 | if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r |
| 1265 | {\r |
| 1266 | auto_repetition_pause_counter = 0;\r |
| 4225a882 |
1267 | \r |
| 08f2dd9d |
1268 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
| e664a9f3 |
1269 | if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r |
| 1270 | {\r |
| 1271 | current_bit = 16;\r |
| 1272 | complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r |
| 1273 | }\r |
| 1274 | else\r |
| 08f2dd9d |
1275 | #endif\r |
| 1276 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r |
| e664a9f3 |
1277 | if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r |
| 1278 | {\r |
| 1279 | current_bit = 15;\r |
| 1280 | complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r |
| 1281 | }\r |
| 1282 | else\r |
| 08f2dd9d |
1283 | #endif\r |
| 1284 | #if IRSND_SUPPORT_IR60_PROTOCOL == 1\r |
| e664a9f3 |
1285 | if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r |
| 1286 | {\r |
| 1287 | current_bit = 7;\r |
| 1288 | complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r |
| 1289 | }\r |
| 1290 | else\r |
| 08f2dd9d |
1291 | #endif\r |
| 1292 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
| e664a9f3 |
1293 | if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r |
| 1294 | {\r |
| 1295 | if (auto_repetition_counter + 1 < n_auto_repetitions)\r |
| 1296 | {\r |
| 1297 | current_bit = 23;\r |
| 1298 | complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r |
| 1299 | }\r |
| 1300 | else // nokia stop frame\r |
| 1301 | {\r |
| 1302 | current_bit = 0xFF;\r |
| 1303 | complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r |
| 1304 | }\r |
| 1305 | }\r |
| 1306 | else\r |
| 1307 | #endif\r |
| 1308 | {\r |
| 1309 | ;\r |
| 1310 | }\r |
| 1311 | }\r |
| 1312 | else\r |
| 1313 | {\r |
| cb93f9e9 |
1314 | #ifdef ANALYZE\r |
| e664a9f3 |
1315 | if (irsnd_is_on)\r |
| 1316 | {\r |
| 1317 | putchar ('0');\r |
| 1318 | }\r |
| 1319 | else\r |
| 1320 | {\r |
| 1321 | putchar ('1');\r |
| 1322 | }\r |
| 1323 | #endif\r |
| 1324 | return irsnd_busy;\r |
| 1325 | }\r |
| 1326 | }\r |
| e664a9f3 |
1327 | else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r |
| e664a9f3 |
1328 | {\r |
| 1329 | packet_repeat_pause_counter++;\r |
| cb93f9e9 |
1330 | #ifdef ANALYZE\r |
| e664a9f3 |
1331 | if (irsnd_is_on)\r |
| 1332 | {\r |
| 1333 | putchar ('0');\r |
| 1334 | }\r |
| 1335 | else\r |
| 1336 | {\r |
| 1337 | putchar ('1');\r |
| 1338 | }\r |
| 1339 | #endif\r |
| 1340 | return irsnd_busy;\r |
| 1341 | }\r |
| 1342 | else\r |
| 1343 | {\r |
| 1344 | if (send_trailer)\r |
| 1345 | {\r |
| 1346 | irsnd_busy = FALSE;\r |
| 1347 | send_trailer = FALSE;\r |
| 1348 | return irsnd_busy;\r |
| 1349 | }\r |
| 1350 | \r |
| 1351 | n_repeat_frames = irsnd_repeat;\r |
| 1352 | \r |
| 1353 | if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r |
| 1354 | {\r |
| 1355 | n_repeat_frames = 255;\r |
| 1356 | }\r |
| 1357 | \r |
| 1358 | packet_repeat_pause_counter = 0;\r |
| 1359 | pulse_counter = 0;\r |
| 1360 | pause_counter = 0;\r |
| 1361 | \r |
| 1362 | switch (irsnd_protocol)\r |
| 1363 | {\r |
| 4225a882 |
1364 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r |
| e664a9f3 |
1365 | case IRMP_SIRCS_PROTOCOL:\r |
| 1366 | {\r |
| 1367 | startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r |
| 1368 | startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r |
| 1369 | pulse_1_len = SIRCS_1_PULSE_LEN;\r |
| 1370 | pause_1_len = SIRCS_PAUSE_LEN - 1;\r |
| 1371 | pulse_0_len = SIRCS_0_PULSE_LEN;\r |
| 1372 | pause_0_len = SIRCS_PAUSE_LEN - 1;\r |
| 1373 | has_stop_bit = SIRCS_STOP_BIT;\r |
| 1374 | complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r |
| 1375 | n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r |
| 1376 | auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r |
| 1377 | repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r |
| 1378 | irsnd_set_freq (IRSND_FREQ_40_KHZ);\r |
| 1379 | break;\r |
| 1380 | }\r |
| 4225a882 |
1381 | #endif\r |
| 1382 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r |
| e664a9f3 |
1383 | case IRMP_NEC_PROTOCOL:\r |
| 1384 | {\r |
| 1385 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r |
| 1386 | \r |
| 1387 | if (repeat_counter > 0)\r |
| 1388 | {\r |
| 1389 | startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r |
| 1390 | complete_data_len = 0;\r |
| 1391 | }\r |
| 1392 | else\r |
| 1393 | {\r |
| 1394 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r |
| 1395 | complete_data_len = NEC_COMPLETE_DATA_LEN;\r |
| 1396 | }\r |
| 1397 | \r |
| 1398 | pulse_1_len = NEC_PULSE_LEN;\r |
| 1399 | pause_1_len = NEC_1_PAUSE_LEN - 1;\r |
| 1400 | pulse_0_len = NEC_PULSE_LEN;\r |
| 1401 | pause_0_len = NEC_0_PAUSE_LEN - 1;\r |
| 1402 | has_stop_bit = NEC_STOP_BIT;\r |
| 1403 | n_auto_repetitions = 1; // 1 frame\r |
| 1404 | auto_repetition_pause_len = 0;\r |
| 1405 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r |
| 1406 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1407 | break;\r |
| 1408 | }\r |
| 4225a882 |
1409 | #endif\r |
| 7644ac04 |
1410 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r |
| e664a9f3 |
1411 | case IRMP_NEC16_PROTOCOL:\r |
| 1412 | {\r |
| 1413 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r |
| 1414 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r |
| 1415 | pulse_1_len = NEC_PULSE_LEN;\r |
| 1416 | pause_1_len = NEC_1_PAUSE_LEN - 1;\r |
| 1417 | pulse_0_len = NEC_PULSE_LEN;\r |
| 1418 | pause_0_len = NEC_0_PAUSE_LEN - 1;\r |
| 1419 | has_stop_bit = NEC_STOP_BIT;\r |
| 1420 | complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r |
| 1421 | n_auto_repetitions = 1; // 1 frame\r |
| 1422 | auto_repetition_pause_len = 0;\r |
| 1423 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r |
| 1424 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1425 | break;\r |
| 1426 | }\r |
| 7644ac04 |
1427 | #endif\r |
| 1428 | #if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r |
| e664a9f3 |
1429 | case IRMP_NEC42_PROTOCOL:\r |
| 1430 | {\r |
| 1431 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r |
| 1432 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r |
| 1433 | pulse_1_len = NEC_PULSE_LEN;\r |
| 1434 | pause_1_len = NEC_1_PAUSE_LEN - 1;\r |
| 1435 | pulse_0_len = NEC_PULSE_LEN;\r |
| 1436 | pause_0_len = NEC_0_PAUSE_LEN - 1;\r |
| 1437 | has_stop_bit = NEC_STOP_BIT;\r |
| 1438 | complete_data_len = NEC42_COMPLETE_DATA_LEN;\r |
| 1439 | n_auto_repetitions = 1; // 1 frame\r |
| 1440 | auto_repetition_pause_len = 0;\r |
| 1441 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r |
| 1442 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1443 | break;\r |
| 1444 | }\r |
| 7644ac04 |
1445 | #endif\r |
| c1dfa01f |
1446 | #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r |
| 1447 | case IRMP_LGAIR_PROTOCOL:\r |
| 1448 | {\r |
| 1449 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r |
| 1450 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r |
| 1451 | pulse_1_len = NEC_PULSE_LEN;\r |
| 1452 | pause_1_len = NEC_1_PAUSE_LEN - 1;\r |
| 1453 | pulse_0_len = NEC_PULSE_LEN;\r |
| 1454 | pause_0_len = NEC_0_PAUSE_LEN - 1;\r |
| 1455 | has_stop_bit = NEC_STOP_BIT;\r |
| 1456 | complete_data_len = LGAIR_COMPLETE_DATA_LEN;\r |
| 1457 | n_auto_repetitions = 1; // 1 frame\r |
| 1458 | auto_repetition_pause_len = 0;\r |
| 1459 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r |
| 1460 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1461 | break;\r |
| 1462 | }\r |
| 1463 | #endif\r |
| 4225a882 |
1464 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
| e664a9f3 |
1465 | case IRMP_SAMSUNG_PROTOCOL:\r |
| 1466 | {\r |
| 1467 | startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r |
| 1468 | startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r |
| 1469 | pulse_1_len = SAMSUNG_PULSE_LEN;\r |
| 1470 | pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r |
| 1471 | pulse_0_len = SAMSUNG_PULSE_LEN;\r |
| 1472 | pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r |
| 1473 | has_stop_bit = SAMSUNG_STOP_BIT;\r |
| 1474 | complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r |
| 1475 | n_auto_repetitions = 1; // 1 frame\r |
| 1476 | auto_repetition_pause_len = 0;\r |
| 1477 | repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r |
| 1478 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1479 | break;\r |
| 1480 | }\r |
| 1481 | \r |
| 1482 | case IRMP_SAMSUNG32_PROTOCOL:\r |
| 1483 | {\r |
| 1484 | startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r |
| 1485 | startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r |
| 1486 | pulse_1_len = SAMSUNG_PULSE_LEN;\r |
| 1487 | pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r |
| 1488 | pulse_0_len = SAMSUNG_PULSE_LEN;\r |
| 1489 | pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r |
| 1490 | has_stop_bit = SAMSUNG_STOP_BIT;\r |
| 1491 | complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r |
| 1492 | n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r |
| 1493 | auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r |
| 1494 | repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r |
| 1495 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1496 | break;\r |
| 1497 | }\r |
| 4225a882 |
1498 | #endif\r |
| 1499 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
| e664a9f3 |
1500 | case IRMP_MATSUSHITA_PROTOCOL:\r |
| 1501 | {\r |
| 1502 | startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r |
| 1503 | startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r |
| 1504 | pulse_1_len = MATSUSHITA_PULSE_LEN;\r |
| 1505 | pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r |
| 1506 | pulse_0_len = MATSUSHITA_PULSE_LEN;\r |
| 1507 | pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r |
| 1508 | has_stop_bit = MATSUSHITA_STOP_BIT;\r |
| 1509 | complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r |
| 1510 | n_auto_repetitions = 1; // 1 frame\r |
| 1511 | auto_repetition_pause_len = 0;\r |
| 1512 | repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r |
| 1513 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
| 1514 | break;\r |
| 1515 | }\r |
| 4225a882 |
1516 | #endif\r |
| 770a1a9d |
1517 | #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
| e664a9f3 |
1518 | case IRMP_KASEIKYO_PROTOCOL:\r |
| 1519 | {\r |
| 1520 | startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r |
| 1521 | startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r |
| 1522 | pulse_1_len = KASEIKYO_PULSE_LEN;\r |
| 1523 | pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r |
| 1524 | pulse_0_len = KASEIKYO_PULSE_LEN;\r |
| 1525 | pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r |
| 1526 | has_stop_bit = KASEIKYO_STOP_BIT;\r |
| 1527 | complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r |
| 1528 | n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r |
| 1529 | auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r |
| 1530 | repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r |
| 1531 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1532 | break;\r |
| 1533 | }\r |
| 770a1a9d |
1534 | #endif\r |
| 4225a882 |
1535 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r |
| e664a9f3 |
1536 | case IRMP_RECS80_PROTOCOL:\r |
| 1537 | {\r |
| 1538 | startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r |
| 1539 | startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r |
| 1540 | pulse_1_len = RECS80_PULSE_LEN;\r |
| 1541 | pause_1_len = RECS80_1_PAUSE_LEN - 1;\r |
| 1542 | pulse_0_len = RECS80_PULSE_LEN;\r |
| 1543 | pause_0_len = RECS80_0_PAUSE_LEN - 1;\r |
| 1544 | has_stop_bit = RECS80_STOP_BIT;\r |
| 1545 | complete_data_len = RECS80_COMPLETE_DATA_LEN;\r |
| 1546 | n_auto_repetitions = 1; // 1 frame\r |
| 1547 | auto_repetition_pause_len = 0;\r |
| 1548 | repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r |
| 1549 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1550 | break;\r |
| 1551 | }\r |
| 4225a882 |
1552 | #endif\r |
| 1553 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r |
| e664a9f3 |
1554 | case IRMP_RECS80EXT_PROTOCOL:\r |
| 1555 | {\r |
| 1556 | startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r |
| 1557 | startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r |
| 1558 | pulse_1_len = RECS80EXT_PULSE_LEN;\r |
| 1559 | pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r |
| 1560 | pulse_0_len = RECS80EXT_PULSE_LEN;\r |
| 1561 | pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r |
| 1562 | has_stop_bit = RECS80EXT_STOP_BIT;\r |
| 1563 | complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r |
| 1564 | n_auto_repetitions = 1; // 1 frame\r |
| 1565 | auto_repetition_pause_len = 0;\r |
| 1566 | repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r |
| 1567 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1568 | break;\r |
| 1569 | }\r |
| 4225a882 |
1570 | #endif\r |
| 9c07687e |
1571 | #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
| 1572 | case IRMP_TELEFUNKEN_PROTOCOL:\r |
| 1573 | {\r |
| 1574 | startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;\r |
| 1575 | startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;\r |
| 1576 | pulse_1_len = TELEFUNKEN_PULSE_LEN;\r |
| 1577 | pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;\r |
| 1578 | pulse_0_len = TELEFUNKEN_PULSE_LEN;\r |
| 1579 | pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;\r |
| 1580 | has_stop_bit = TELEFUNKEN_STOP_BIT;\r |
| 1581 | complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;\r |
| 1582 | n_auto_repetitions = 1; // 1 frames\r |
| 1583 | auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause\r |
| 1584 | repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r |
| 1585 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1586 | break;\r |
| 1587 | }\r |
| 1588 | #endif\r |
| 4225a882 |
1589 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r |
| e664a9f3 |
1590 | case IRMP_RC5_PROTOCOL:\r |
| 1591 | {\r |
| 1592 | startbit_pulse_len = RC5_BIT_LEN;\r |
| 1593 | startbit_pause_len = RC5_BIT_LEN;\r |
| 1594 | pulse_len = RC5_BIT_LEN;\r |
| 1595 | pause_len = RC5_BIT_LEN;\r |
| 1596 | has_stop_bit = RC5_STOP_BIT;\r |
| 1597 | complete_data_len = RC5_COMPLETE_DATA_LEN;\r |
| 1598 | n_auto_repetitions = 1; // 1 frame\r |
| 1599 | auto_repetition_pause_len = 0;\r |
| 1600 | repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r |
| 1601 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
| 1602 | break;\r |
| 1603 | }\r |
| 4225a882 |
1604 | #endif\r |
| 9547ee89 |
1605 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1\r |
| e664a9f3 |
1606 | case IRMP_RC6_PROTOCOL:\r |
| 1607 | {\r |
| 1608 | startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r |
| 1609 | startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r |
| 1610 | pulse_len = RC6_BIT_LEN;\r |
| 1611 | pause_len = RC6_BIT_LEN;\r |
| 1612 | has_stop_bit = RC6_STOP_BIT;\r |
| 1613 | complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r |
| 1614 | n_auto_repetitions = 1; // 1 frame\r |
| 1615 | auto_repetition_pause_len = 0;\r |
| 1616 | repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r |
| 1617 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
| 1618 | break;\r |
| 1619 | }\r |
| 9547ee89 |
1620 | #endif\r |
| 1621 | #if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
| e664a9f3 |
1622 | case IRMP_RC6A_PROTOCOL:\r |
| 1623 | {\r |
| 1624 | startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r |
| 1625 | startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r |
| 1626 | pulse_len = RC6_BIT_LEN;\r |
| 1627 | pause_len = RC6_BIT_LEN;\r |
| 1628 | has_stop_bit = RC6_STOP_BIT;\r |
| 1629 | complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r |
| 1630 | n_auto_repetitions = 1; // 1 frame\r |
| 1631 | auto_repetition_pause_len = 0;\r |
| 1632 | repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r |
| 1633 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
| 1634 | break;\r |
| 1635 | }\r |
| 9547ee89 |
1636 | #endif\r |
| 4225a882 |
1637 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
| e664a9f3 |
1638 | case IRMP_DENON_PROTOCOL:\r |
| 1639 | {\r |
| 1640 | startbit_pulse_len = 0x00;\r |
| 1641 | startbit_pause_len = 0x00;\r |
| 1642 | pulse_1_len = DENON_PULSE_LEN;\r |
| 1643 | pause_1_len = DENON_1_PAUSE_LEN - 1;\r |
| 1644 | pulse_0_len = DENON_PULSE_LEN;\r |
| 1645 | pause_0_len = DENON_0_PAUSE_LEN - 1;\r |
| 1646 | has_stop_bit = DENON_STOP_BIT;\r |
| 1647 | complete_data_len = DENON_COMPLETE_DATA_LEN;\r |
| 1648 | n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r |
| 1649 | auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r |
| 1650 | repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r |
| 1651 | irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r |
| 1652 | break;\r |
| 1653 | }\r |
| 4225a882 |
1654 | #endif\r |
| beda975f |
1655 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r |
| e664a9f3 |
1656 | case IRMP_THOMSON_PROTOCOL:\r |
| 1657 | {\r |
| 1658 | startbit_pulse_len = 0x00;\r |
| 1659 | startbit_pause_len = 0x00;\r |
| 1660 | pulse_1_len = THOMSON_PULSE_LEN;\r |
| 1661 | pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r |
| 1662 | pulse_0_len = THOMSON_PULSE_LEN;\r |
| 1663 | pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r |
| 1664 | has_stop_bit = THOMSON_STOP_BIT;\r |
| 1665 | complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r |
| 1666 | n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r |
| 1667 | auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r |
| 1668 | repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r |
| 1669 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1670 | break;\r |
| 1671 | }\r |
| beda975f |
1672 | #endif\r |
| 4225a882 |
1673 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r |
| e664a9f3 |
1674 | case IRMP_NUBERT_PROTOCOL:\r |
| 1675 | {\r |
| 1676 | startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r |
| 1677 | startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r |
| 1678 | pulse_1_len = NUBERT_1_PULSE_LEN;\r |
| 1679 | pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r |
| 1680 | pulse_0_len = NUBERT_0_PULSE_LEN;\r |
| 1681 | pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r |
| 1682 | has_stop_bit = NUBERT_STOP_BIT;\r |
| 1683 | complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r |
| 1684 | n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r |
| 1685 | auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r |
| 1686 | repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r |
| 1687 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
| 1688 | break;\r |
| 1689 | }\r |
| 5481e9cd |
1690 | #endif\r |
| 15dd9c32 |
1691 | #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r |
| 1692 | case IRMP_SPEAKER_PROTOCOL:\r |
| 1693 | {\r |
| 1694 | startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;\r |
| 1695 | startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;\r |
| 1696 | pulse_1_len = SPEAKER_1_PULSE_LEN;\r |
| 1697 | pause_1_len = SPEAKER_1_PAUSE_LEN - 1;\r |
| 1698 | pulse_0_len = SPEAKER_0_PULSE_LEN;\r |
| 1699 | pause_0_len = SPEAKER_0_PAUSE_LEN - 1;\r |
| 1700 | has_stop_bit = SPEAKER_STOP_BIT;\r |
| 1701 | complete_data_len = SPEAKER_COMPLETE_DATA_LEN;\r |
| 1702 | n_auto_repetitions = SPEAKER_FRAMES; // 2 frames\r |
| 1703 | auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r |
| 1704 | repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;\r |
| 1705 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1706 | break;\r |
| 1707 | }\r |
| 1708 | #endif\r |
| 5481e9cd |
1709 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
| e664a9f3 |
1710 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r |
| 1711 | {\r |
| 1712 | startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r |
| 1713 | startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r |
| 1714 | pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r |
| 1715 | pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r |
| 1716 | pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r |
| 1717 | pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r |
| 1718 | has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r |
| 1719 | complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r |
| 1720 | n_auto_repetitions = 1; // 1 frame\r |
| 1721 | auto_repetition_pause_len = 0;\r |
| 1722 | repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r |
| 1723 | last_bit_value = 0;\r |
| 1724 | irsnd_set_freq (IRSND_FREQ_455_KHZ);\r |
| 1725 | break;\r |
| 1726 | }\r |
| 5b437ff6 |
1727 | #endif\r |
| 1728 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r |
| e664a9f3 |
1729 | case IRMP_GRUNDIG_PROTOCOL:\r |
| 1730 | {\r |
| 1731 | startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1732 | startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r |
| 1733 | pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1734 | pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1735 | has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r |
| 1736 | complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r |
| 1737 | n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r |
| 1738 | auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r |
| 1739 | repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r |
| 1740 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1741 | break;\r |
| 1742 | }\r |
| a48187fa |
1743 | #endif\r |
| 1744 | #if IRSND_SUPPORT_IR60_PROTOCOL == 1\r |
| e664a9f3 |
1745 | case IRMP_IR60_PROTOCOL:\r |
| 1746 | {\r |
| 1747 | startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1748 | startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r |
| 1749 | pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1750 | pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1751 | has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r |
| 1752 | complete_data_len = IR60_COMPLETE_DATA_LEN;\r |
| 1753 | n_auto_repetitions = IR60_FRAMES; // 2 frames\r |
| 1754 | auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r |
| 1755 | repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r |
| 1756 | irsnd_set_freq (IRSND_FREQ_30_KHZ);\r |
| 1757 | break;\r |
| 1758 | }\r |
| d155e9ab |
1759 | #endif\r |
| 1760 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
| e664a9f3 |
1761 | case IRMP_NOKIA_PROTOCOL:\r |
| 1762 | {\r |
| 1763 | startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1764 | startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r |
| 1765 | pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1766 | pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 1767 | has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r |
| 1768 | complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r |
| 1769 | n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r |
| 1770 | auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r |
| 1771 | repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r |
| 1772 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1773 | break;\r |
| 1774 | }\r |
| a7054daf |
1775 | #endif\r |
| 1776 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r |
| e664a9f3 |
1777 | case IRMP_SIEMENS_PROTOCOL:\r |
| 1778 | {\r |
| 1779 | startbit_pulse_len = SIEMENS_BIT_LEN;\r |
| 1780 | startbit_pause_len = SIEMENS_BIT_LEN;\r |
| 1781 | pulse_len = SIEMENS_BIT_LEN;\r |
| 1782 | pause_len = SIEMENS_BIT_LEN;\r |
| 1783 | has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r |
| cb93f9e9 |
1784 | complete_data_len = SIEMENS_COMPLETE_DATA_LEN;\r |
| e664a9f3 |
1785 | n_auto_repetitions = 1; // 1 frame\r |
| 1786 | auto_repetition_pause_len = 0;\r |
| 1787 | repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r |
| 1788 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
| 1789 | break;\r |
| 1790 | }\r |
| b5ea7869 |
1791 | #endif\r |
| cb93f9e9 |
1792 | #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r |
| 1793 | case IRMP_RUWIDO_PROTOCOL:\r |
| 1794 | {\r |
| 1795 | startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;\r |
| 1796 | startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;\r |
| 1797 | pulse_len = RUWIDO_BIT_PULSE_LEN;\r |
| 1798 | pause_len = RUWIDO_BIT_PAUSE_LEN;\r |
| 1799 | has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r |
| 1800 | complete_data_len = RUWIDO_COMPLETE_DATA_LEN;\r |
| 1801 | n_auto_repetitions = 1; // 1 frame\r |
| 1802 | auto_repetition_pause_len = 0;\r |
| 1803 | repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;\r |
| 1804 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
| 1805 | break;\r |
| 1806 | }\r |
| 1807 | #endif\r |
| 48664931 |
1808 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
| e664a9f3 |
1809 | case IRMP_FDC_PROTOCOL:\r |
| 1810 | {\r |
| 1811 | startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r |
| 1812 | startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r |
| 1813 | complete_data_len = FDC_COMPLETE_DATA_LEN;\r |
| 1814 | pulse_1_len = FDC_PULSE_LEN;\r |
| 1815 | pause_1_len = FDC_1_PAUSE_LEN - 1;\r |
| 1816 | pulse_0_len = FDC_PULSE_LEN;\r |
| 1817 | pause_0_len = FDC_0_PAUSE_LEN - 1;\r |
| 1818 | has_stop_bit = FDC_STOP_BIT;\r |
| 1819 | n_auto_repetitions = 1; // 1 frame\r |
| 1820 | auto_repetition_pause_len = 0;\r |
| 1821 | repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r |
| 1822 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1823 | break;\r |
| 1824 | }\r |
| c7c9a4a1 |
1825 | #endif\r |
| 1826 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r |
| e664a9f3 |
1827 | case IRMP_RCCAR_PROTOCOL:\r |
| 1828 | {\r |
| 1829 | startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r |
| 1830 | startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r |
| 1831 | complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r |
| 1832 | pulse_1_len = RCCAR_PULSE_LEN;\r |
| 1833 | pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r |
| 1834 | pulse_0_len = RCCAR_PULSE_LEN;\r |
| 1835 | pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r |
| 1836 | has_stop_bit = RCCAR_STOP_BIT;\r |
| 1837 | n_auto_repetitions = 1; // 1 frame\r |
| 1838 | auto_repetition_pause_len = 0;\r |
| 1839 | repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r |
| 1840 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1841 | break;\r |
| 1842 | }\r |
| 4225a882 |
1843 | #endif\r |
| c7a47e89 |
1844 | #if IRSND_SUPPORT_JVC_PROTOCOL == 1\r |
| e664a9f3 |
1845 | case IRMP_JVC_PROTOCOL:\r |
| 1846 | {\r |
| 1847 | if (repeat_counter != 0) // skip start bit if repetition frame\r |
| 1848 | {\r |
| 1849 | current_bit = 0;\r |
| 1850 | }\r |
| 1851 | \r |
| 1852 | startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r |
| 1853 | startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r |
| 1854 | complete_data_len = JVC_COMPLETE_DATA_LEN;\r |
| 1855 | pulse_1_len = JVC_PULSE_LEN;\r |
| 1856 | pause_1_len = JVC_1_PAUSE_LEN - 1;\r |
| 1857 | pulse_0_len = JVC_PULSE_LEN;\r |
| 1858 | pause_0_len = JVC_0_PAUSE_LEN - 1;\r |
| 1859 | has_stop_bit = JVC_STOP_BIT;\r |
| 1860 | n_auto_repetitions = 1; // 1 frame\r |
| 1861 | auto_repetition_pause_len = 0;\r |
| 1862 | repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r |
| 1863 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1864 | break;\r |
| 1865 | }\r |
| c7a47e89 |
1866 | #endif\r |
| 9405f84a |
1867 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
| e664a9f3 |
1868 | case IRMP_NIKON_PROTOCOL:\r |
| 1869 | {\r |
| 1870 | startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r |
| 1871 | startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r |
| 1872 | complete_data_len = NIKON_COMPLETE_DATA_LEN;\r |
| 1873 | pulse_1_len = NIKON_PULSE_LEN;\r |
| 1874 | pause_1_len = NIKON_1_PAUSE_LEN - 1;\r |
| 1875 | pulse_0_len = NIKON_PULSE_LEN;\r |
| 1876 | pause_0_len = NIKON_0_PAUSE_LEN - 1;\r |
| 1877 | has_stop_bit = NIKON_STOP_BIT;\r |
| 1878 | n_auto_repetitions = 1; // 1 frame\r |
| 1879 | auto_repetition_pause_len = 0;\r |
| 1880 | repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r |
| 1881 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1882 | break;\r |
| 1883 | }\r |
| 9405f84a |
1884 | #endif\r |
| f50e01e7 |
1885 | #if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r |
| e664a9f3 |
1886 | case IRMP_LEGO_PROTOCOL:\r |
| 1887 | {\r |
| 1888 | startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r |
| 1889 | startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r |
| 1890 | complete_data_len = LEGO_COMPLETE_DATA_LEN;\r |
| 1891 | pulse_1_len = LEGO_PULSE_LEN;\r |
| 1892 | pause_1_len = LEGO_1_PAUSE_LEN - 1;\r |
| 1893 | pulse_0_len = LEGO_PULSE_LEN;\r |
| 1894 | pause_0_len = LEGO_0_PAUSE_LEN - 1;\r |
| 1895 | has_stop_bit = LEGO_STOP_BIT;\r |
| 1896 | n_auto_repetitions = 1; // 1 frame\r |
| 1897 | auto_repetition_pause_len = 0;\r |
| 1898 | repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r |
| 1899 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1900 | break;\r |
| 1901 | }\r |
| fa09ce10 |
1902 | #endif\r |
| 1903 | #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
| e664a9f3 |
1904 | case IRMP_A1TVBOX_PROTOCOL:\r |
| 1905 | {\r |
| 1906 | startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r |
| 1907 | startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r |
| 1908 | pulse_len = A1TVBOX_BIT_PULSE_LEN;\r |
| 1909 | pause_len = A1TVBOX_BIT_PAUSE_LEN;\r |
| 1910 | has_stop_bit = A1TVBOX_STOP_BIT;\r |
| 1911 | complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r |
| 1912 | n_auto_repetitions = 1; // 1 frame\r |
| 1913 | auto_repetition_pause_len = 0;\r |
| 1914 | repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r |
| 1915 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1916 | break;\r |
| 1917 | }\r |
| c9b6916a |
1918 | #endif\r |
| 1919 | #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r |
| 1920 | case IRMP_ROOMBA_PROTOCOL:\r |
| 1921 | {\r |
| 1922 | startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r |
| 1923 | startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r |
| 1924 | pulse_1_len = ROOMBA_1_PULSE_LEN;\r |
| 1925 | pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r |
| 1926 | pulse_0_len = ROOMBA_0_PULSE_LEN;\r |
| 1927 | pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r |
| 1928 | has_stop_bit = ROOMBA_STOP_BIT;\r |
| 1929 | complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r |
| cb93f9e9 |
1930 | n_auto_repetitions = ROOMBA_FRAMES; // 8 frames\r |
| 1931 | auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r |
| c9b6916a |
1932 | repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r |
| 1933 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
| 1934 | break;\r |
| 1935 | }\r |
| e664a9f3 |
1936 | #endif\r |
| 1937 | default:\r |
| 1938 | {\r |
| 1939 | irsnd_busy = FALSE;\r |
| 1940 | break;\r |
| 1941 | }\r |
| 1942 | }\r |
| 1943 | }\r |
| 1944 | }\r |
| 1945 | \r |
| 1946 | if (irsnd_busy)\r |
| 1947 | {\r |
| 1948 | new_frame = FALSE;\r |
| 1949 | \r |
| 1950 | switch (irsnd_protocol)\r |
| 1951 | {\r |
| 4225a882 |
1952 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r |
| e664a9f3 |
1953 | case IRMP_SIRCS_PROTOCOL:\r |
| 4225a882 |
1954 | #endif\r |
| 1955 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r |
| e664a9f3 |
1956 | case IRMP_NEC_PROTOCOL:\r |
| 4225a882 |
1957 | #endif\r |
| 7644ac04 |
1958 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r |
| e664a9f3 |
1959 | case IRMP_NEC16_PROTOCOL:\r |
| 7644ac04 |
1960 | #endif\r |
| 1961 | #if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r |
| e664a9f3 |
1962 | case IRMP_NEC42_PROTOCOL:\r |
| 7644ac04 |
1963 | #endif\r |
| c1dfa01f |
1964 | #if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r |
| 1965 | case IRMP_LGAIR_PROTOCOL:\r |
| 1966 | #endif\r |
| 4225a882 |
1967 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
| e664a9f3 |
1968 | case IRMP_SAMSUNG_PROTOCOL:\r |
| 1969 | case IRMP_SAMSUNG32_PROTOCOL:\r |
| 4225a882 |
1970 | #endif\r |
| 1971 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
| e664a9f3 |
1972 | case IRMP_MATSUSHITA_PROTOCOL:\r |
| 4225a882 |
1973 | #endif\r |
| 770a1a9d |
1974 | #if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
| e664a9f3 |
1975 | case IRMP_KASEIKYO_PROTOCOL:\r |
| 770a1a9d |
1976 | #endif\r |
| 4225a882 |
1977 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r |
| e664a9f3 |
1978 | case IRMP_RECS80_PROTOCOL:\r |
| 4225a882 |
1979 | #endif\r |
| 1980 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r |
| e664a9f3 |
1981 | case IRMP_RECS80EXT_PROTOCOL:\r |
| 4225a882 |
1982 | #endif\r |
| 9c07687e |
1983 | #if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
| 1984 | case IRMP_TELEFUNKEN_PROTOCOL:\r |
| 1985 | #endif\r |
| 4225a882 |
1986 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
| e664a9f3 |
1987 | case IRMP_DENON_PROTOCOL:\r |
| 4225a882 |
1988 | #endif\r |
| 1989 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r |
| e664a9f3 |
1990 | case IRMP_NUBERT_PROTOCOL:\r |
| 5481e9cd |
1991 | #endif\r |
| 15dd9c32 |
1992 | #if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r |
| 1993 | case IRMP_SPEAKER_PROTOCOL:\r |
| 1994 | #endif\r |
| 5481e9cd |
1995 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
| e664a9f3 |
1996 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r |
| 4225a882 |
1997 | #endif\r |
| c7c9a4a1 |
1998 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
| e664a9f3 |
1999 | case IRMP_FDC_PROTOCOL:\r |
| b5ea7869 |
2000 | #endif\r |
| c7c9a4a1 |
2001 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r |
| e664a9f3 |
2002 | case IRMP_RCCAR_PROTOCOL:\r |
| c7c9a4a1 |
2003 | #endif\r |
| c7a47e89 |
2004 | #if IRSND_SUPPORT_JVC_PROTOCOL == 1\r |
| e664a9f3 |
2005 | case IRMP_JVC_PROTOCOL:\r |
| c7a47e89 |
2006 | #endif\r |
| 9405f84a |
2007 | #if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r |
| e664a9f3 |
2008 | case IRMP_NIKON_PROTOCOL:\r |
| 9405f84a |
2009 | #endif\r |
| f50e01e7 |
2010 | #if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r |
| e664a9f3 |
2011 | case IRMP_LEGO_PROTOCOL:\r |
| f50e01e7 |
2012 | #endif\r |
| cb93f9e9 |
2013 | #if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r |
| 2014 | case IRMP_THOMSON_PROTOCOL:\r |
| 2015 | #endif\r |
| c9b6916a |
2016 | #if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r |
| 2017 | case IRMP_ROOMBA_PROTOCOL:\r |
| 2018 | #endif\r |
| a7054daf |
2019 | \r |
| 7644ac04 |
2020 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r |
| c1dfa01f |
2021 | IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r |
| 770a1a9d |
2022 | IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r |
| 15dd9c32 |
2023 | IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r |
| cb93f9e9 |
2024 | IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \\r |
| 9c07687e |
2025 | IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
| e664a9f3 |
2026 | {\r |
| 08f2dd9d |
2027 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r |
| e664a9f3 |
2028 | if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r |
| 2029 | {\r |
| 2030 | if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r |
| 2031 | {\r |
| 2032 | auto_repetition_pause_len--;\r |
| 2033 | }\r |
| 2034 | \r |
| 2035 | if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r |
| 2036 | {\r |
| 2037 | repeat_frame_pause_len--;\r |
| 2038 | }\r |
| 2039 | }\r |
| 2040 | #endif\r |
| 2041 | \r |
| 2042 | if (pulse_counter == 0)\r |
| 2043 | {\r |
| 2044 | if (current_bit == 0xFF) // send start bit\r |
| 2045 | {\r |
| 2046 | pulse_len = startbit_pulse_len;\r |
| 2047 | pause_len = startbit_pause_len;\r |
| 2048 | }\r |
| 2049 | else if (current_bit < complete_data_len) // send n'th bit\r |
| 2050 | {\r |
| 5481e9cd |
2051 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
| e664a9f3 |
2052 | if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r |
| 2053 | {\r |
| 2054 | if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r |
| 2055 | {\r |
| 2056 | pulse_len = SAMSUNG_PULSE_LEN;\r |
| 2057 | pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r |
| 2058 | (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r |
| 2059 | }\r |
| 2060 | else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r |
| 2061 | {\r |
| 2062 | pulse_len = SAMSUNG_PULSE_LEN;\r |
| 2063 | pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r |
| 2064 | }\r |
| 2065 | else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r |
| 2066 | {\r |
| 2067 | uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r |
| 2068 | \r |
| 2069 | pulse_len = SAMSUNG_PULSE_LEN;\r |
| 2070 | pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r |
| 2071 | (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r |
| 2072 | }\r |
| 2073 | }\r |
| 2074 | else\r |
| 5481e9cd |
2075 | #endif\r |
| 2076 | \r |
| 7644ac04 |
2077 | #if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r |
| e664a9f3 |
2078 | if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r |
| 2079 | {\r |
| 2080 | if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r |
| 2081 | {\r |
| 2082 | pulse_len = NEC_PULSE_LEN;\r |
| 2083 | pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r |
| 2084 | (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r |
| 2085 | }\r |
| 2086 | else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r |
| 2087 | {\r |
| 2088 | pulse_len = NEC_PULSE_LEN;\r |
| 2089 | pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r |
| 2090 | }\r |
| 2091 | else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r |
| 2092 | {\r |
| 2093 | uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r |
| 2094 | \r |
| 2095 | pulse_len = NEC_PULSE_LEN;\r |
| 2096 | pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r |
| 2097 | (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r |
| 2098 | }\r |
| 2099 | }\r |
| 2100 | else\r |
| 7644ac04 |
2101 | #endif\r |
| 2102 | \r |
| 5481e9cd |
2103 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
| e664a9f3 |
2104 | if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r |
| 2105 | {\r |
| 2106 | if (current_bit == 0) // send 2nd start bit\r |
| 2107 | {\r |
| 2108 | pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r |
| 2109 | pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r |
| 2110 | }\r |
| 2111 | else if (current_bit == 1) // send 3rd start bit\r |
| 2112 | {\r |
| 2113 | pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r |
| 2114 | pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r |
| 2115 | }\r |
| 2116 | else if (current_bit == 2) // send 4th start bit\r |
| 2117 | {\r |
| 2118 | pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r |
| 2119 | pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r |
| 2120 | }\r |
| 2121 | else if (current_bit == 19) // send trailer bit\r |
| 2122 | {\r |
| 2123 | pulse_len = BANG_OLUFSEN_PULSE_LEN;\r |
| 2124 | pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r |
| 2125 | }\r |
| 2126 | else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r |
| 2127 | {\r |
| 2128 | uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r |
| 2129 | pulse_len = BANG_OLUFSEN_PULSE_LEN;\r |
| 2130 | \r |
| 2131 | if (cur_bit_value == last_bit_value)\r |
| 2132 | {\r |
| 2133 | pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r |
| 2134 | }\r |
| 2135 | else\r |
| 2136 | {\r |
| 2137 | pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r |
| 2138 | last_bit_value = cur_bit_value;\r |
| 2139 | }\r |
| 2140 | }\r |
| 2141 | }\r |
| 2142 | else\r |
| 2143 | #endif\r |
| 2144 | if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r |
| 2145 | {\r |
| 2146 | pulse_len = pulse_1_len;\r |
| 2147 | pause_len = pause_1_len;\r |
| 2148 | }\r |
| 2149 | else\r |
| 2150 | {\r |
| 2151 | pulse_len = pulse_0_len;\r |
| 2152 | pause_len = pause_0_len;\r |
| 2153 | }\r |
| 2154 | }\r |
| 2155 | else if (has_stop_bit) // send stop bit\r |
| 2156 | {\r |
| 2157 | pulse_len = pulse_0_len;\r |
| 2158 | \r |
| 2159 | if (auto_repetition_counter < n_auto_repetitions)\r |
| 2160 | {\r |
| 2161 | pause_len = pause_0_len;\r |
| 2162 | }\r |
| 2163 | else\r |
| 2164 | {\r |
| 2165 | pause_len = 255; // last frame: pause of 255\r |
| 2166 | }\r |
| 2167 | }\r |
| 2168 | }\r |
| 2169 | \r |
| 2170 | if (pulse_counter < pulse_len)\r |
| 2171 | {\r |
| 2172 | if (pulse_counter == 0)\r |
| 2173 | {\r |
| 2174 | irsnd_on ();\r |
| 2175 | }\r |
| 2176 | pulse_counter++;\r |
| 2177 | }\r |
| 2178 | else if (pause_counter < pause_len)\r |
| 2179 | {\r |
| 2180 | if (pause_counter == 0)\r |
| 2181 | {\r |
| 2182 | irsnd_off ();\r |
| 2183 | }\r |
| 2184 | pause_counter++;\r |
| 2185 | }\r |
| 2186 | else\r |
| 2187 | {\r |
| 2188 | current_bit++;\r |
| 2189 | \r |
| 2190 | if (current_bit >= complete_data_len + has_stop_bit)\r |
| 2191 | {\r |
| 2192 | current_bit = 0xFF;\r |
| 2193 | auto_repetition_counter++;\r |
| 2194 | \r |
| 2195 | if (auto_repetition_counter == n_auto_repetitions)\r |
| 2196 | {\r |
| 2197 | irsnd_busy = FALSE;\r |
| 2198 | auto_repetition_counter = 0;\r |
| 2199 | }\r |
| 2200 | new_frame = TRUE;\r |
| 2201 | }\r |
| 2202 | \r |
| 2203 | pulse_counter = 0;\r |
| 2204 | pause_counter = 0;\r |
| 2205 | }\r |
| 2206 | break;\r |
| 2207 | }\r |
| a7054daf |
2208 | #endif\r |
| 2209 | \r |
| 4225a882 |
2210 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r |
| e664a9f3 |
2211 | case IRMP_RC5_PROTOCOL:\r |
| a7054daf |
2212 | #endif\r |
| 9547ee89 |
2213 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1\r |
| e664a9f3 |
2214 | case IRMP_RC6_PROTOCOL:\r |
| 9547ee89 |
2215 | #endif\r |
| 2216 | #if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
| e664a9f3 |
2217 | case IRMP_RC6A_PROTOCOL:\r |
| 9547ee89 |
2218 | #endif\r |
| a7054daf |
2219 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r |
| e664a9f3 |
2220 | case IRMP_SIEMENS_PROTOCOL:\r |
| a7054daf |
2221 | #endif\r |
| cb93f9e9 |
2222 | #if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r |
| 2223 | case IRMP_RUWIDO_PROTOCOL:\r |
| 2224 | #endif\r |
| a7054daf |
2225 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r |
| e664a9f3 |
2226 | case IRMP_GRUNDIG_PROTOCOL:\r |
| a7054daf |
2227 | #endif\r |
| a48187fa |
2228 | #if IRSND_SUPPORT_IR60_PROTOCOL == 1\r |
| e664a9f3 |
2229 | case IRMP_IR60_PROTOCOL:\r |
| a48187fa |
2230 | #endif\r |
| a7054daf |
2231 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
| e664a9f3 |
2232 | case IRMP_NOKIA_PROTOCOL:\r |
| fa09ce10 |
2233 | #endif\r |
| 2234 | #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
| e664a9f3 |
2235 | case IRMP_A1TVBOX_PROTOCOL:\r |
| a7054daf |
2236 | #endif\r |
| 4225a882 |
2237 | \r |
| cb93f9e9 |
2238 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \\r |
| 2239 | IRSND_SUPPORT_RC6_PROTOCOL == 1 || \\r |
| 2240 | IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \\r |
| 2241 | IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \\r |
| 2242 | IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r |
| 2243 | IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \\r |
| 2244 | IRSND_SUPPORT_IR60_PROTOCOL == 1 || \\r |
| 2245 | IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \\r |
| 2246 | IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
| e664a9f3 |
2247 | {\r |
| 2248 | if (pulse_counter == pulse_len && pause_counter == pause_len)\r |
| 2249 | {\r |
| 2250 | current_bit++;\r |
| 4225a882 |
2251 | \r |
| e664a9f3 |
2252 | if (current_bit >= complete_data_len)\r |
| 2253 | {\r |
| 2254 | current_bit = 0xFF;\r |
| a7054daf |
2255 | \r |
| a48187fa |
2256 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
| e664a9f3 |
2257 | if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r |
| 2258 | {\r |
| 2259 | auto_repetition_counter++;\r |
| 2260 | \r |
| 2261 | if (repeat_counter > 0)\r |
| 2262 | { // set 117 msec pause time\r |
| 2263 | auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r |
| 2264 | }\r |
| 2265 | \r |
| 2266 | if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r |
| 2267 | {\r |
| 2268 | n_auto_repetitions++; // increment number of auto repetitions\r |
| 2269 | repeat_counter++;\r |
| 2270 | }\r |
| 2271 | else if (auto_repetition_counter == n_auto_repetitions)\r |
| 2272 | {\r |
| 2273 | irsnd_busy = FALSE;\r |
| 2274 | auto_repetition_counter = 0;\r |
| 2275 | }\r |
| 2276 | }\r |
| 2277 | else\r |
| 2278 | #endif\r |
| 2279 | {\r |
| 2280 | irsnd_busy = FALSE;\r |
| 2281 | }\r |
| 2282 | \r |
| 2283 | new_frame = TRUE;\r |
| 2284 | irsnd_off ();\r |
| 2285 | }\r |
| 2286 | \r |
| 2287 | pulse_counter = 0;\r |
| 2288 | pause_counter = 0;\r |
| 2289 | }\r |
| 2290 | \r |
| 2291 | if (! new_frame)\r |
| 2292 | {\r |
| 2293 | uint8_t first_pulse;\r |
| 5b437ff6 |
2294 | \r |
| a48187fa |
2295 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
| e664a9f3 |
2296 | if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r |
| 2297 | {\r |
| 2298 | if (current_bit == 0xFF || // start bit of start-frame\r |
| 2299 | (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r |
| 2300 | (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r |
| 2301 | (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r |
| 2302 | {\r |
| 2303 | pulse_len = startbit_pulse_len;\r |
| 2304 | pause_len = startbit_pause_len;\r |
| 2305 | first_pulse = TRUE;\r |
| 2306 | }\r |
| 2307 | else // send n'th bit\r |
| 2308 | {\r |
| 2309 | pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 2310 | pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r |
| 2311 | first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r |
| 2312 | }\r |
| 2313 | }\r |
| 2314 | else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r |
| cb93f9e9 |
2315 | // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)\r |
| e664a9f3 |
2316 | #endif\r |
| 2317 | {\r |
| 2318 | if (current_bit == 0xFF) // 1 start bit\r |
| 2319 | {\r |
| 9547ee89 |
2320 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
| e664a9f3 |
2321 | if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r |
| 2322 | {\r |
| 2323 | pulse_len = startbit_pulse_len;\r |
| 2324 | pause_len = startbit_pause_len;\r |
| 2325 | }\r |
| 2326 | else\r |
| fa09ce10 |
2327 | #endif\r |
| 2328 | #if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
| e664a9f3 |
2329 | if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r |
| 2330 | {\r |
| 2331 | current_bit = 0;\r |
| 2332 | }\r |
| 2333 | else\r |
| 2334 | #endif\r |
| 2335 | {\r |
| 2336 | ;\r |
| 2337 | }\r |
| 2338 | \r |
| 2339 | first_pulse = TRUE;\r |
| 2340 | }\r |
| 2341 | else // send n'th bit\r |
| 2342 | {\r |
| 9547ee89 |
2343 | #if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r |
| e664a9f3 |
2344 | if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r |
| 2345 | {\r |
| 2346 | pulse_len = RC6_BIT_LEN;\r |
| 2347 | pause_len = RC6_BIT_LEN;\r |
| 2348 | \r |
| 2349 | if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r |
| 2350 | {\r |
| 2351 | if (current_bit == 4) // toggle bit (double len)\r |
| 2352 | {\r |
| 2353 | pulse_len = 2 * RC6_BIT_LEN;\r |
| 2354 | pause_len = 2 * RC6_BIT_LEN;\r |
| 2355 | }\r |
| 2356 | }\r |
| 2357 | else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r |
| 2358 | {\r |
| 2359 | if (current_bit == 4) // toggle bit (double len)\r |
| 2360 | {\r |
| 2361 | pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r |
| 2362 | pause_len = 2 * RC6_BIT_LEN;\r |
| 2363 | }\r |
| 2364 | else if (current_bit == 5) // toggle bit (double len)\r |
| 2365 | {\r |
| 2366 | pause_len = 2 * RC6_BIT_LEN;\r |
| 2367 | }\r |
| 2368 | }\r |
| 2369 | }\r |
| 2370 | #endif\r |
| 2371 | first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r |
| 2372 | }\r |
| 2373 | \r |
| 2374 | if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r |
| 2375 | {\r |
| 2376 | first_pulse = first_pulse ? FALSE : TRUE;\r |
| 2377 | }\r |
| 2378 | }\r |
| 2379 | \r |
| 2380 | if (first_pulse)\r |
| 2381 | {\r |
| 2382 | // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r |
| 2383 | \r |
| 2384 | if (pulse_counter < pulse_len)\r |
| 2385 | {\r |
| 2386 | if (pulse_counter == 0)\r |
| 2387 | {\r |
| 2388 | irsnd_on ();\r |
| 2389 | }\r |
| 2390 | pulse_counter++;\r |
| 2391 | }\r |
| 2392 | else // if (pause_counter < pause_len)\r |
| 2393 | {\r |
| 2394 | if (pause_counter == 0)\r |
| 2395 | {\r |
| 2396 | irsnd_off ();\r |
| 2397 | }\r |
| 2398 | pause_counter++;\r |
| 2399 | }\r |
| 2400 | }\r |
| 2401 | else\r |
| 2402 | {\r |
| 2403 | // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r |
| 2404 | \r |
| 2405 | if (pause_counter < pause_len)\r |
| 2406 | {\r |
| 2407 | if (pause_counter == 0)\r |
| 2408 | {\r |
| 2409 | irsnd_off ();\r |
| 2410 | }\r |
| 2411 | pause_counter++;\r |
| 2412 | }\r |
| 2413 | else // if (pulse_counter < pulse_len)\r |
| 2414 | {\r |
| 2415 | if (pulse_counter == 0)\r |
| 2416 | {\r |
| 2417 | irsnd_on ();\r |
| 2418 | }\r |
| 2419 | pulse_counter++;\r |
| 2420 | }\r |
| 2421 | }\r |
| 2422 | }\r |
| 2423 | break;\r |
| 2424 | }\r |
| 9547ee89 |
2425 | #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r |
| cb93f9e9 |
2426 | // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
| 5b437ff6 |
2427 | \r |
| e664a9f3 |
2428 | default:\r |
| 2429 | {\r |
| 2430 | irsnd_busy = FALSE;\r |
| 2431 | break;\r |
| 2432 | }\r |
| 2433 | }\r |
| 2434 | }\r |
| 2435 | \r |
| 2436 | if (! irsnd_busy)\r |
| 2437 | {\r |
| 2438 | if (repeat_counter < n_repeat_frames)\r |
| 2439 | {\r |
| c7c9a4a1 |
2440 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
| e664a9f3 |
2441 | if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r |
| 2442 | {\r |
| 2443 | irsnd_buffer[2] |= 0x0F;\r |
| 2444 | }\r |
| 2445 | #endif\r |
| 2446 | repeat_counter++;\r |
| 2447 | irsnd_busy = TRUE;\r |
| 2448 | }\r |
| 2449 | else\r |
| 2450 | {\r |
| 2451 | irsnd_busy = TRUE; //Rainer\r |
| 2452 | send_trailer = TRUE;\r |
| 2453 | n_repeat_frames = 0;\r |
| 2454 | repeat_counter = 0;\r |
| 2455 | }\r |
| 2456 | }\r |
| 4225a882 |
2457 | }\r |
| 2458 | \r |
| cb93f9e9 |
2459 | #ifdef ANALYZE\r |
| 4225a882 |
2460 | if (irsnd_is_on)\r |
| 2461 | {\r |
| e664a9f3 |
2462 | putchar ('0');\r |
| 4225a882 |
2463 | }\r |
| 2464 | else\r |
| 2465 | {\r |
| e664a9f3 |
2466 | putchar ('1');\r |
| 4225a882 |
2467 | }\r |
| 2468 | #endif\r |
| 2469 | \r |
| 2470 | return irsnd_busy;\r |
| 2471 | }\r |
| 2472 | \r |
| cb93f9e9 |
2473 | #ifdef ANALYZE\r |
| 4225a882 |
2474 | \r |
| 2475 | // main function - for unix/linux + windows only!\r |
| 2476 | // AVR: see main.c!\r |
| 2477 | // Compile it under linux with:\r |
| 2478 | // cc irsnd.c -o irsnd\r |
| 2479 | //\r |
| 2480 | // usage: ./irsnd protocol hex-address hex-command >filename\r |
| 2481 | \r |
| 2482 | int\r |
| 2483 | main (int argc, char ** argv)\r |
| 2484 | {\r |
| 4225a882 |
2485 | int protocol;\r |
| 2486 | int address;\r |
| 2487 | int command;\r |
| 4225a882 |
2488 | IRMP_DATA irmp_data;\r |
| 2489 | \r |
| a7054daf |
2490 | if (argc != 4 && argc != 5)\r |
| 4225a882 |
2491 | {\r |
| e664a9f3 |
2492 | fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r |
| 2493 | return 1;\r |
| 4225a882 |
2494 | }\r |
| 2495 | \r |
| 2496 | if (sscanf (argv[1], "%d", &protocol) == 1 &&\r |
| e664a9f3 |
2497 | sscanf (argv[2], "%x", &address) == 1 &&\r |
| 2498 | sscanf (argv[3], "%x", &command) == 1)\r |
| 4225a882 |
2499 | {\r |
| e664a9f3 |
2500 | irmp_data.protocol = protocol;\r |
| 2501 | irmp_data.address = address;\r |
| 2502 | irmp_data.command = command;\r |
| 4225a882 |
2503 | \r |
| e664a9f3 |
2504 | if (argc == 5)\r |
| 2505 | {\r |
| 2506 | irmp_data.flags = atoi (argv[4]);\r |
| 2507 | }\r |
| 2508 | else\r |
| 2509 | {\r |
| 2510 | irmp_data.flags = 0;\r |
| 2511 | }\r |
| a7054daf |
2512 | \r |
| e664a9f3 |
2513 | irsnd_init ();\r |
| 4225a882 |
2514 | \r |
| e664a9f3 |
2515 | (void) irsnd_send_data (&irmp_data, TRUE);\r |
| 4225a882 |
2516 | \r |
| e664a9f3 |
2517 | while (irsnd_busy)\r |
| 2518 | {\r |
| 2519 | irsnd_ISR ();\r |
| 2520 | }\r |
| beda975f |
2521 | \r |
| e664a9f3 |
2522 | putchar ('\n');\r |
| a03ad359 |
2523 | \r |
| f874da09 |
2524 | #if 1 // enable here to send twice\r |
| e664a9f3 |
2525 | (void) irsnd_send_data (&irmp_data, TRUE);\r |
| a03ad359 |
2526 | \r |
| e664a9f3 |
2527 | while (irsnd_busy)\r |
| 2528 | {\r |
| 2529 | irsnd_ISR ();\r |
| 2530 | }\r |
| a03ad359 |
2531 | \r |
| e664a9f3 |
2532 | putchar ('\n');\r |
| f874da09 |
2533 | #endif\r |
| 4225a882 |
2534 | }\r |
| 2535 | else\r |
| 2536 | {\r |
| e664a9f3 |
2537 | fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r |
| 2538 | return 1;\r |
| 4225a882 |
2539 | }\r |
| 2540 | return 0;\r |
| 2541 | }\r |
| 2542 | \r |
| cb93f9e9 |
2543 | #endif // ANALYZE\r |
projects / irmp.git / blame