*\r
* Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.c,v 1.161 2014/07/21 08:58:58 fm Exp $\r
+ * $Id: irmp.c,v 1.162 2014/09/15 10:27:37 fm Exp $\r
*\r
- * ATMEGA88 @ 8 MHz\r
- *\r
- * Supported mikrocontrollers:\r
+ * Supported AVR mikrocontrollers:\r
*\r
* ATtiny87, ATtiny167\r
* ATtiny45, ATtiny85\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
#if defined(UNIX_OR_WINDOWS) || IRMP_PROTOCOL_NAMES == 1\r
-const char *\r
-irmp_protocol_names[IRMP_N_PROTOCOLS + 1] =\r
+static const char proto_unknown[] PROGMEM = "UNKNOWN";\r
+static const char proto_sircs[] PROGMEM = "SIRCS";\r
+static const char proto_nec[] PROGMEM = "NEC";\r
+static const char proto_samsung[] PROGMEM = "SAMSUNG";\r
+static const char proto_matsushita[] PROGMEM = "MATSUSH";\r
+static const char proto_kaseikyo[] PROGMEM = "KASEIKYO";\r
+static const char proto_recs80[] PROGMEM = "RECS80";\r
+static const char proto_rc5[] PROGMEM = "RC5";\r
+static const char proto_denon[] PROGMEM = "DENON";\r
+static const char proto_rc6[] PROGMEM = "RC6";\r
+static const char proto_samsung32[] PROGMEM = "SAMSG32";\r
+static const char proto_apple[] PROGMEM = "APPLE";\r
+static const char proto_recs80ext[] PROGMEM = "RECS80EX";\r
+static const char proto_nubert[] PROGMEM = "NUBERT";\r
+static const char proto_bang_olufsen[] PROGMEM = "BANG OLU";\r
+static const char proto_grundig[] PROGMEM = "GRUNDIG";\r
+static const char proto_nokia[] PROGMEM = "NOKIA";\r
+static const char proto_siemens[] PROGMEM = "SIEMENS";\r
+static const char proto_fdc[] PROGMEM = "FDC";\r
+static const char proto_rccar[] PROGMEM = "RCCAR";\r
+static const char proto_jvc[] PROGMEM = "JVC";\r
+static const char proto_rc6a[] PROGMEM = "RC6A";\r
+static const char proto_nikon[] PROGMEM = "NIKON";\r
+static const char proto_ruwido[] PROGMEM = "RUWIDO";\r
+static const char proto_ir60[] PROGMEM = "IR60";\r
+static const char proto_kathrein[] PROGMEM = "KATHREIN";\r
+static const char proto_netbox[] PROGMEM = "NETBOX";\r
+static const char proto_nec16[] PROGMEM = "NEC16";\r
+static const char proto_nec42[] PROGMEM = "NEC42";\r
+static const char proto_lego[] PROGMEM = "LEGO";\r
+static const char proto_thomson[] PROGMEM = "THOMSON";\r
+static const char proto_bose[] PROGMEM = "BOSE";\r
+static const char proto_a1tvbox[] PROGMEM = "A1TVBOX";\r
+static const char proto_ortek[] PROGMEM = "ORTEK";\r
+static const char proto_telefunken[] PROGMEM = "TELEFUNKEN";\r
+static const char proto_roomba[] PROGMEM = "ROOMBA";\r
+static const char proto_rcmm32[] PROGMEM = "RCMM32";\r
+static const char proto_rcmm24[] PROGMEM = "RCMM24";\r
+static const char proto_rcmm12[] PROGMEM = "RCMM12";\r
+static const char proto_speaker[] PROGMEM = "SPEAKER";\r
+static const char proto_lgair[] PROGMEM = "LGAIR";\r
+static const char proto_samsung48[] PROGMEM = "SAMSG48";\r
+static const char proto_radio1[] PROGMEM = "RADIO1";\r
+\r
+const char * const\r
+irmp_protocol_names[IRMP_N_PROTOCOLS + 1] PROGMEM =\r
{\r
- "UNKNOWN",\r
- "SIRCS",\r
- "NEC",\r
- "SAMSUNG",\r
- "MATSUSH",\r
- "KASEIKYO",\r
- "RECS80",\r
- "RC5",\r
- "DENON",\r
- "RC6",\r
- "SAMSG32",\r
- "APPLE",\r
- "RECS80EX",\r
- "NUBERT",\r
- "BANG OLU",\r
- "GRUNDIG",\r
- "NOKIA",\r
- "SIEMENS",\r
- "FDC",\r
- "RCCAR",\r
- "JVC",\r
- "RC6A",\r
- "NIKON",\r
- "RUWIDO",\r
- "IR60",\r
- "KATHREIN",\r
- "NETBOX",\r
- "NEC16",\r
- "NEC42",\r
- "LEGO",\r
- "THOMSON",\r
- "BOSE",\r
- "A1TVBOX",\r
- "ORTEK",\r
- "TELEFUNKEN",\r
- "ROOMBA",\r
- "RCMM32",\r
- "RCMM24",\r
- "RCMM12",\r
- "SPEAKER",\r
- "LGAIR",\r
- "SAMSG48",\r
- "RADIO1"\r
+ proto_unknown,\r
+ proto_sircs,\r
+ proto_nec,\r
+ proto_samsung,\r
+ proto_matsushita,\r
+ proto_kaseikyo,\r
+ proto_recs80,\r
+ proto_rc5,\r
+ proto_denon,\r
+ proto_rc6,\r
+ proto_samsung32,\r
+ proto_apple,\r
+ proto_recs80ext,\r
+ proto_nubert,\r
+ proto_bang_olufsen,\r
+ proto_grundig,\r
+ proto_nokia,\r
+ proto_siemens,\r
+ proto_fdc,\r
+ proto_rccar,\r
+ proto_jvc,\r
+ proto_rc6a,\r
+ proto_nikon,\r
+ proto_ruwido,\r
+ proto_ir60,\r
+ proto_kathrein,\r
+ proto_netbox,\r
+ proto_nec16,\r
+ proto_nec42,\r
+ proto_lego,\r
+ proto_thomson,\r
+ proto_bose,\r
+ proto_a1tvbox,\r
+ proto_ortek,\r
+ proto_telefunken,\r
+ proto_roomba,\r
+ proto_rcmm32,\r
+ proto_rcmm24,\r
+ proto_rcmm12,\r
+ proto_speaker,\r
+ proto_lgair,\r
+ proto_samsung48,\r
+ proto_radio1\r
};\r
\r
#endif\r
#define ENDBITS 1000 // number of sequenced highbits to detect end\r
#define DATALEN 700 // log buffer size\r
\r
-#if 0 // old log routine\r
-\r
-static void\r
-irmp_log (uint8_t val)\r
-{\r
- static uint8_t buf[DATALEN]; // logging buffer\r
- static uint16_t buf_idx; // number of written bits\r
- static uint8_t startcycles; // current number of start-zeros\r
- static uint16_t cnt; // counts sequenced highbits - to detect end\r
-\r
- if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r
- {\r
- startcycles++;\r
- }\r
- else\r
- {\r
- startcycles = 0;\r
-\r
- if (! val || (val && buf_idx != 0)) // start or continue logging on "0", "1" cannot init logging\r
- {\r
- if (buf_idx < DATALEN * 8) // index in range?\r
- { // yes\r
- if (val)\r
- {\r
- buf[(buf_idx / 8)] |= (1<<(buf_idx % 8)); // set bit\r
- }\r
- else\r
- {\r
- buf[(buf_idx / 8)] &= ~(1<<(buf_idx % 8)); // reset bit\r
- }\r
-\r
- buf_idx++;\r
- }\r
-\r
- if (val)\r
- { // if high received then look at log-stop condition\r
- cnt++;\r
-\r
- if (cnt > ENDBITS)\r
- { // if stop condition is true, output on uart\r
- uint16_t i;\r
-\r
- for (i = 0; i < STARTCYCLES; i++)\r
- {\r
- irmp_uart_putc ('0'); // the ignored starting zeros\r
- }\r
-\r
- for (i = 0; i < (buf_idx - ENDBITS + 20) / 8; i++) // transform bitset into uart chars\r
- {\r
- uint8_t d = buf[i];\r
- uint8_t j;\r
-\r
- for (j = 0; j < 8; j++)\r
- {\r
- irmp_uart_putc ((d & 1) + '0');\r
- d >>= 1;\r
- }\r
- }\r
-\r
- irmp_uart_putc ('\n');\r
- buf_idx = 0;\r
- }\r
- }\r
- else\r
- {\r
- cnt = 0;\r
- }\r
- }\r
- }\r
-}\r
-\r
-#else // new log routine\r
-\r
static void\r
irmp_log (uint8_t val)\r
{\r
}\r
}\r
\r
-#endif\r
-\r
#else\r
#define irmp_log(val)\r
#endif //IRMP_LOGGING\r
*\r
* Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.h,v 1.88 2014/07/21 08:58:58 fm Exp $\r
- *\r
- * ATMEGA88 @ 8 MHz\r
+ * $Id: irmp.h,v 1.89 2014/09/15 10:27:38 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
extern uint8_t irmp_ISR (void);\r
\r
#if IRMP_PROTOCOL_NAMES == 1\r
-extern const char * irmp_protocol_names[IRMP_N_PROTOCOLS + 1];\r
+extern const char * const irmp_protocol_names[IRMP_N_PROTOCOLS + 1] PROGMEM;\r
#endif\r
\r
#if IRMP_USE_CALLBACK == 1\r
* Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de\r
* Extensions for PIC 12F1820 W.Strobl 2014-07-20\r
*\r
- * $Id: irmpconfig.h,v 1.117 2014/07/21 08:56:39 fm Exp $\r
+ * $Id: irmpconfig.h,v 1.119 2014/09/15 10:31:22 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*\r
* Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmpsystem.h,v 1.13 2014/07/21 08:58:58 fm Exp $\r
+ * $Id: irmpsystem.h,v 1.14 2014/09/15 10:27:38 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
# include <stm32f10x.h>\r
# define ARM_STM32\r
# define ARM_STM32F10X\r
+# define F_CPU (SysCtlClockGet())\r
#elif defined(STM32F4XX) // ARM STM32\r
# include <stm32f4xx.h>\r
# define ARM_STM32\r
# define PROGMEM volatile\r
# define memcpy_P memcpy\r
# define APP_SYSTICKS_PER_SEC 32\r
+#elif defined(ARM_STM32F10X)\r
+# include "stm32f10x_gpio.h"\r
+# include "stm32f10x_rcc.h"\r
+# include "stm32f10x_tim.h"\r
+# include "misc.h"\r
+# define PROGMEM\r
+# define memcpy_P memcpy\r
#else\r
# define PROGMEM\r
# define memcpy_P memcpy\r
*\r
* Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * Supported mikrocontrollers:\r
+ * Supported AVR mikrocontrollers:\r
*\r
* ATtiny87, ATtiny167\r
* ATtiny45, ATtiny85\r
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * $Id: irsnd.c,v 1.81 2014/07/21 08:58:58 fm Exp $\r
+ * $Id: irsnd.c,v 1.82 2014/09/15 10:27:38 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*\r
* Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irsnd.h,v 1.19 2014/07/21 08:58:58 fm Exp $\r
- *\r
- * ATMEGA88 @ 8 MHz\r
+ * $Id: irsnd.h,v 1.20 2014/09/15 10:27:38 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*\r
* Copyright (c) 2010-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irsndconfig.h,v 1.62 2014/07/21 08:56:39 fm Exp $\r
- *\r
- * ATMEGA88 @ 8 MHz\r
+ * $Id: irsndconfig.h,v 1.63 2014/09/15 10:27:38 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*\r
* Copyright (c) 2009-2014 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: main.c,v 1.19 2014/07/21 08:58:59 fm Exp $\r
+ * $Id: main.c,v 1.20 2014/09/15 10:27:38 fm Exp $\r
*\r
* This demo module is runnable on AVRs and LM4F120 Launchpad (ARM Cortex M4)\r
*\r
*/\r
#if defined (ATMEL_AVR)\r
\r
-void\r
+#include "irmp.h"\r
+#define BAUD 9600L\r
+#include <util/setbaud.h>\r
+\r
+#ifdef UBRR0H\r
+\r
+#define UART0_UBRRH UBRR0H\r
+#define UART0_UBRRL UBRR0L\r
+#define UART0_UCSRA UCSR0A\r
+#define UART0_UCSRB UCSR0B\r
+#define UART0_UCSRC UCSR0C\r
+#define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r
+#define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r
+#define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r
+#ifdef URSEL0\r
+#define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r
+#else\r
+#define UART0_URSEL_BIT_VALUE (0)\r
+#endif\r
+#define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r
+#define UART0_UDR UDR0\r
+#define UART0_U2X U2X0\r
+ \r
+#else\r
+\r
+#define UART0_UBRRH UBRRH\r
+#define UART0_UBRRL UBRRL\r
+#define UART0_UCSRA UCSRA\r
+#define UART0_UCSRB UCSRB\r
+#define UART0_UCSRC UCSRC\r
+#define UART0_UDRE_BIT_VALUE (1<<UDRE)\r
+#define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r
+#define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r
+#ifdef URSEL\r
+#define UART0_URSEL_BIT_VALUE (1<<URSEL)\r
+#else\r
+#define UART0_URSEL_BIT_VALUE (0)\r
+#endif\r
+#define UART0_TXEN_BIT_VALUE (1<<TXEN)\r
+#define UART0_UDR UDR\r
+#define UART0_U2X U2X\r
+\r
+#endif //UBRR0H\r
+\r
+static void\r
+uart_init (void)\r
+{\r
+ UART0_UBRRH = UBRRH_VALUE; // set baud rate\r
+ UART0_UBRRL = UBRRL_VALUE;\r
+\r
+#if USE_2X\r
+ UART0_UCSRA |= (1<<UART0_U2X);\r
+#else\r
+ UART0_UCSRA &= ~(1<<UART0_U2X);\r
+#endif\r
+\r
+ UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r
+ UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r
+}\r
+\r
+static void\r
+uart_putc (unsigned char ch)\r
+{\r
+ while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r
+ {\r
+ ;\r
+ }\r
+\r
+ UART0_UDR = ch;\r
+}\r
+\r
+static void\r
+uart_puts (char * s)\r
+{\r
+ while (*s)\r
+ {\r
+ uart_putc (*s);\r
+ s++;\r
+ }\r
+}\r
+\r
+static void\r
+uart_puts_P (PGM_P s)\r
+{\r
+ uint8_t ch;\r
+\r
+ while ((ch = pgm_read_byte(s)) != '\0')\r
+ {\r
+ uart_putc (ch);\r
+ s++;\r
+ }\r
+}\r
+\r
+static uint8_t\r
+itox (uint8_t val)\r
+{\r
+ uint8_t rtc;\r
+\r
+ val &= 0x0F;\r
+\r
+ if (val <= 9)\r
+ {\r
+ rtc = val + '0';\r
+ }\r
+ else\r
+ {\r
+ rtc = val - 10 + 'A';\r
+ }\r
+ return (rtc);\r
+}\r
+\r
+static void\r
+itoxx (char * xx, unsigned char i)\r
+{\r
+ *xx++ = itox (i >> 4);\r
+ *xx++ = itox (i & 0x0F);\r
+ *xx = '\0';\r
+}\r
+\r
+static void\r
timer1_init (void)\r
{\r
#if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85:\r
int\r
main (void)\r
{\r
- IRMP_DATA irmp_data;\r
+ IRMP_DATA irmp_data;\r
+ char buf[3];\r
\r
irmp_init(); // initialize irmp\r
timer1_init(); // initialize timer1\r
+ uart_init(); // initialize uart\r
+\r
sei (); // enable interrupts\r
\r
for (;;)\r
{\r
if (irmp_get_data (&irmp_data))\r
{\r
- // ir signal decoded, do something here...\r
- // irmp_data.protocol is the protocol, see irmp.h\r
- // irmp_data.address is the address/manufacturer code of ir sender\r
- // irmp_data.command is the command code\r
- // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)\r
+ uart_puts_P (PSTR("protocol: 0x"));\r
+ itoxx (buf, irmp_data.protocol);\r
+ uart_puts (buf);\r
+\r
+#if IRMP_PROTOCOL_NAMES == 1\r
+ uart_puts_P (PSTR(" "));\r
+ uart_puts_P (irmp_protocol_names[irmp_data.protocol]);\r
+#endif\r
+\r
+ uart_puts_P (PSTR(" address: 0x"));\r
+ itoxx (buf, irmp_data.address >> 8);\r
+ uart_puts (buf);\r
+ itoxx (buf, irmp_data.address & 0xFF);\r
+ uart_puts (buf);\r
+\r
+ uart_puts_P (PSTR(" command: 0x"));\r
+ itoxx (buf, irmp_data.command >> 8);\r
+ uart_puts (buf);\r
+ itoxx (buf, irmp_data.command & 0xFF);\r
+ uart_puts (buf);\r
+\r
+ uart_puts_P (PSTR(" flags: 0x"));\r
+ itoxx (buf, irmp_data.flags);\r
+ uart_puts (buf);\r
+\r
+ uart_puts_P (PSTR("\r\n"));\r
}\r
}\r
}\r
}\r
}\r
\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * STM32:\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#elif defined(ARM_STM32)\r
+\r
+uint32_t\r
+SysCtlClockGet(void)\r
+{\r
+ RCC_ClocksTypeDef RCC_ClocksStatus;\r
+ RCC_GetClocksFreq(&RCC_ClocksStatus);\r
+ return RCC_ClocksStatus.SYSCLK_Frequency;\r
+}\r
+\r
+void\r
+timer2_init (void)\r
+{\r
+ TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
+ NVIC_InitTypeDef NVIC_InitStructure;\r
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);\r
+\r
+ TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;\r
+ TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
+ TIM_TimeBaseStructure.TIM_Period = 7;\r
+ TIM_TimeBaseStructure.TIM_Prescaler = ((F_CPU / F_INTERRUPTS)/8) - 1;\r
+ TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);\r
+\r
+ TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);\r
+\r
+ NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;\r
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;\r
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;\r
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;\r
+ NVIC_Init(&NVIC_InitStructure);\r
+\r
+ TIM_Cmd(TIM2, ENABLE);\r
+}\r
+\r
+void\r
+TIM2_IRQHandler(void) // Timer2 Interrupt Handler\r
+{\r
+ TIM_ClearITPendingBit(TIM2, TIM_IT_Update);\r
+ (void) irmp_ISR(); // call irmp ISR\r
+ // call other timer interrupt routines...\r
+}\r
+\r
+int\r
+main (void)\r
+{\r
+ IRMP_DATA irmp_data;\r
+ \r
+ irmp_init(); // initialize irmp\r
+ timer2_init(); // initialize timer2\r
+\r
+ for (;;)\r
+ {\r
+ if (irmp_get_data (&irmp_data))\r
+ {\r
+ // ir signal decoded, do something here...\r
+ // irmp_data.protocol is the protocol, see irmp.h\r
+ // irmp_data.address is the address/manufacturer code of ir sender\r
+ // irmp_data.command is the command code\r
+ // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)\r
+ }\r
+ }\r
+}\r
#endif\r
projects / irmp.git / commitdiff