*\r
* Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.c,v 1.45 2010/06/11 14:47:24 fm Exp $\r
+ * $Id: irmp.c,v 1.46 2010/06/12 20:29:43 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
#define FDC1_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
#define FDC1_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
#define FDC1_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
-#define FDC1_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
-#define FDC1_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
#define FDC1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
#define FDC1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
#define FDC1_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC1_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
#define FDC2_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
#define FDC2_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
#define FDC2_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
-#define FDC2_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
-#define FDC2_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
#define FDC2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
#define FDC2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r
#define FDC2_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r
#define FDC2_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC2_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r
#define FDC2_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC2_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r
\r
+#define RCCAR_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define RCCAR_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define RCCAR_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define RCCAR_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define RCCAR_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define RCCAR_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define RCCAR_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
+#define RCCAR_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+\r
#define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!\r
\r
#ifdef DEBUG\r
\r
#endif\r
\r
+#if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r
+\r
+static PROGMEM IRMP_PARAMETER rccar_param =\r
+{\r
+ IRMP_RCCAR_PROTOCOL, // protocol: ir protocol\r
+ RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r
+ RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r
+ RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r
+ RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r
+ RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r
+ RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r
+ RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r
+ RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r
+ RCCAR_ADDRESS_OFFSET, // address_offset: address offset\r
+ RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address\r
+ RCCAR_COMMAND_OFFSET, // command_offset: command offset\r
+ RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command\r
+ RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r
+ RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit\r
+ RCCAR_LSB, // lsb_first: flag: LSB first\r
+ RCCAR_FLAGS // flags: some flags\r
+};\r
+\r
+#endif\r
+\r
static uint8_t irmp_bit; // current bit position\r
static IRMP_PARAMETER irmp_param;\r
\r
}\r
else\r
#endif // IRMP_SUPPORT_FDC2_PROTOCOL == 1\r
+#if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r
+ if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r
+ irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r
+ {\r
+ DEBUG_PRINTF ("protocol = RCCAR, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r
+ RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r
+ RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r
+ irmp_param_p = (IRMP_PARAMETER *) &rccar_param;\r
+ }\r
+ else\r
+#endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r
{\r
DEBUG_PRINTF ("protocol = UNKNOWN\n");\r
irmp_start_bit_detected = 0; // wait for another start bit...\r
FDC1_START_BIT_PULSE_LEN_MIN, FDC1_START_BIT_PULSE_LEN_MAX, FDC1_START_BIT_PAUSE_LEN_MIN, FDC1_START_BIT_PAUSE_LEN_MAX);\r
printf ("FDC2 1 %3d - %3d %3d - %3d\n",\r
FDC2_START_BIT_PULSE_LEN_MIN, FDC2_START_BIT_PULSE_LEN_MAX, FDC2_START_BIT_PAUSE_LEN_MIN, FDC2_START_BIT_PAUSE_LEN_MAX);\r
+ printf ("RCCAR 1 %3d - %3d %3d - %3d\n",\r
+ RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX, RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r
}\r
\r
void\r
*\r
* Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.h,v 1.30 2010/06/11 14:47:24 fm Exp $\r
+ * $Id: irmp.h,v 1.31 2010/06/12 20:29:44 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
#define IRMP_SIEMENS_PROTOCOL 17 // Siemens, e.g. Gigaset\r
#define IRMP_FDC1_PROTOCOL 18 // FDC keyboard - protocol 1\r
#define IRMP_FDC2_PROTOCOL 19 // FDC keyboard - protocol 2\r
+#define IRMP_RCCAR_PROTOCOL 20 // RC Car\r
\r
// some flags of struct IRMP_PARAMETER:\r
#define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01\r
#define FDC2_LSB 1 // LSB...MSB\r
#define FDC2_FLAGS 0 // flags\r
\r
+#define RCCAR_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse\r
+#define RCCAR_START_BIT_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r
+#define RCCAR_PULSE_TIME 600.0e-6 // 360 usec pulse\r
+#define RCCAR_1_PAUSE_TIME 450.0e-6 // 650 usec pause\r
+#define RCCAR_0_PAUSE_TIME 900.0e-6 // 180 usec pause\r
+#define RCCAR_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
+#define RCCAR_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define RCCAR_ADDRESS_LEN 0 // read 8 address bits\r
+#define RCCAR_COMMAND_OFFSET 0 // skip 24 bits (8 address bits + 12 status bits + 4 repeat bits)\r
+#define RCCAR_COMMAND_LEN 13 // read 8 bits\r
+#define RCCAR_COMPLETE_DATA_LEN 13 // complete length\r
+#define RCCAR_STOP_BIT 1 // has stop bit\r
+#define RCCAR_LSB 0 // LSB...MSB\r
+#define RCCAR_FLAGS 0 // flags\r
+\r
#define AUTO_FRAME_REPETITION_TIME 50.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms\r
\r
#define TRUE 1\r
*\r
* Copyright (c) 2010 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmpconfig.h,v 1.15 2010/06/11 14:47:24 fm Exp $\r
+ * $Id: irmpconfig.h,v 1.16 2010/06/12 20:29:44 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
#define IRMP_SUPPORT_MATSUSHITA_PROTOCOL 1 // flag: support Matsushita uses ~50 bytes\r
#define IRMP_SUPPORT_KASEIKYO_PROTOCOL 1 // flag: support Kaseikyo uses ~50 bytes\r
#define IRMP_SUPPORT_RECS80_PROTOCOL 1 // flag: support RECS80 uses ~50 bytes\r
-#define IRMP_SUPPORT_RC5_PROTOCOL 1 // flag: support RC5 uses ~250 bytes\r
+#define IRMP_SUPPORT_RC5_PROTOCOL 0 // flag: support RC5 uses ~250 bytes\r
#define IRMP_SUPPORT_DENON_PROTOCOL 1 // flag: support DENON uses ~250 bytes\r
#define IRMP_SUPPORT_RC6_PROTOCOL 1 // flag: support RC6 uses ~200 bytes\r
#define IRMP_SUPPORT_RECS80EXT_PROTOCOL 1 // flag: support RECS80EXT uses ~50 bytes\r
#define IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL 1 // flag: support Bang & Olufsen uses ~200 bytes\r
#define IRMP_SUPPORT_GRUNDIG_PROTOCOL 1 // flag: support Grundig uses ~150 bytes\r
#define IRMP_SUPPORT_NOKIA_PROTOCOL 1 // flag: support Nokia uses ~150 bytes\r
+#define IRMP_SUPPORT_RCCAR_PROTOCOL 1 // flag: support RC car uses ~150 bytes\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* THE FOLLOWING DECODERS WORK ONLY FOR F_INTERRUPTS > 14500!\r