*\r
* Copyright (c) 2009-2015 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.h,v 1.92 2015/01/28 09:18:30 fm Exp $\r
+ * $Id: irmp.h,v 1.93 2015/02/26 15:42:53 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
# include "irmpconfig.h"\r
#endif\r
\r
-#if defined (ATMEL_AVR)\r
+#if defined (__AVR_XMEGA__)\r
+# define _CONCAT(a,b) a##b\r
+# define CONCAT(a,b) _CONCAT(a,b)\r
+# define IRMP_PORT_PRE CONCAT(PORT, IRMP_PORT_LETTER)\r
+# define IRMP_DDR_PRE CONCAT(DDR, IRMP_PORT_LETTER)\r
+# define IRMP_PIN_PRE CONCAT(PIN, IRMP_PORT_LETTER)\r
+# define IRMP_PORT IRMP_PORT_PRE.OUT\r
+# define IRMP_DDR IRMP_DDR_PRE.DIR\r
+# define IRMP_PIN IRMP_PIN_PRE.IN\r
+# define IRMP_BIT IRMP_BIT_NUMBER\r
+# define input(x) ((x) & (1 << IRMP_BIT))\r
+\r
+#elif defined (ATMEL_AVR)\r
# define _CONCAT(a,b) a##b\r
# define CONCAT(a,b) _CONCAT(a,b)\r
# define IRMP_PORT CONCAT(PORT, IRMP_PORT_LETTER)\r
# define IRMP_PIN CONCAT(PIN, IRMP_PORT_LETTER)\r
# define IRMP_BIT IRMP_BIT_NUMBER\r
# define input(x) ((x) & (1 << IRMP_BIT))\r
-#elif defined (PIC_C18)\r
-# define input(x) (x)\r
-#elif defined (PIC_CCS)\r
+\r
+#elif defined (PIC_C18) || defined (PIC_CCS)\r
# define input(x) (x)\r
+\r
#elif defined (ARM_STM32)\r
# define _CONCAT(a,b) a##b\r
# define CONCAT(a,b) _CONCAT(a,b)\r
# ifndef USE_STDPERIPH_DRIVER\r
# warning The STM32 port of IRMP uses the ST standard peripheral drivers which are not enabled in your build configuration.\r
# endif\r
+\r
#elif defined (STELLARIS_ARM_CORTEX_M4)\r
# define _CONCAT(a,b) a##b\r
# define CONCAT(a,b) _CONCAT(a,b)\r
# define IRMP_PIN IRMP_PORT_PIN\r
# define input(x) ((uint8_t)(ROM_GPIOPinRead(IRMP_PORT_BASE, IRMP_PORT_PIN)))\r
# define sei() IntMasterEnable()\r
+\r
#endif\r
\r
#if IRMP_SUPPORT_DENON_PROTOCOL == 1 && IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r
* Copyright (c) 2009-2015 Frank Meyer - frank(at)fli4l.de\r
* Extensions for PIC 12F1820 W.Strobl 2014-07-20\r
*\r
- * $Id: irmpconfig.h,v 1.124 2015/01/26 13:07:01 fm Exp $\r
+ * $Id: irmpconfig.h,v 1.125 2015/02/26 15:42:53 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
#define IRMP_SUPPORT_RADIO1_PROTOCOL 0 // RADIO, e.g. TEVION >= 10000 ~250 bytes (experimental)\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Change hardware pin here for ATMEL AVR\r
+ * Change hardware pin here for ATMEL ATMega/ATTiny/XMega\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#if defined (ATMEL_AVR) // use PB6 as IR input on AVR\r
+#if defined (ATMEL_AVR) || defined (__AVR_XMEGA__) // use PB6 as IR input on AVR\r
# define IRMP_PORT_LETTER B\r
# define IRMP_BIT_NUMBER 6\r
\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
#elif defined (PIC_C18) // use RB4 as IR input on PIC (C18 or XC8 compiler)\r
-#if defined(__12F1840)\r
-# define IRMP_PIN RA5 // on 12F1840 with XC8 compiler\r
-#endif\r
-# define IRMP_PIN PORTBbits.RB4 // PIC C18\r
+# if defined(__12F1840)\r
+# define IRMP_PIN RA5 // on 12F1840 with XC8 compiler\r
+# else\r
+# define IRMP_PIN PORTBbits.RB4 // PIC C18\r
+# endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* Change hardware pin here for PIC CCS compiler\r
# define IRMP_USE_CALLBACK 0 // 1: use callbacks. 0: do not. default is 0\r
#endif\r
\r
-#endif /* _WC_IRMPCONFIG_H_ */\r
+#endif // _IRMPCONFIG_H_\r
*\r
* Copyright (c) 2013-2015 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmpprotocols.h,v 1.30 2015/01/26 13:07:01 fm Exp $\r
+ * $Id: irmpprotocols.h,v 1.31 2015/02/26 15:42:53 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
#define RC5_BIT_TIME 889.0e-6 // 889 usec pulse/pause\r
-#define RC5_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+#define RC5_FRAME_REPEAT_PAUSE_TIME 88.9e-3 // frame repeat after 88.9ms\r
\r
#define RC5_ADDRESS_OFFSET 1 // skip 1 bit (2nd start)\r
#define RC5_ADDRESS_LEN 6 // read 1 toggle bit (for key repetition detection) + 5 address bits\r
*\r
* Copyright (c) 2009-2015 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmpsystem.h,v 1.16 2015/01/26 13:07:01 fm Exp $\r
+ * $Id: irmpsystem.h,v 1.17 2015/02/26 15:42:53 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
# define IRSND_OC0 3 // OC0\r
# define IRSND_OC0A 4 // OC0A\r
# define IRSND_OC0B 5 // OC0B\r
+\r
+# define IRSND_XMEGA_OC0A 0 // OC0A\r
+# define IRSND_XMEGA_OC0B 1 // OC0B\r
+# define IRSND_XMEGA_OC0C 2 // OC0C\r
+# define IRSND_XMEGA_OC0D 3 // OC0D\r
+# define IRSND_XMEGA_OC1A 4 // OC1A\r
+# define IRSND_XMEGA_OC1B 5 // OC1B\r
+\r
#elif defined(STELLARIS_ARM_CORTEX_M4)\r
+\r
# include "inc/hw_ints.h"\r
# include "inc/hw_memmap.h"\r
# include "inc/hw_types.h"\r
# include "driverlib/systick.h"\r
# include "driverlib/pin_map.h"\r
# include "driverlib/timer.h"\r
-# define PROGMEM volatile\r
-# define memcpy_P memcpy\r
+# define PROGMEM\r
+# define memcpy_P memcpy\r
# define APP_SYSTICKS_PER_SEC 32\r
+\r
#elif defined(ARM_STM32F10X)\r
+\r
# include "stm32f10x_gpio.h"\r
# include "stm32f10x_rcc.h"\r
# include "stm32f10x_tim.h"\r
# include "misc.h"\r
# define PROGMEM\r
# define memcpy_P memcpy\r
+\r
#else\r
+\r
# define PROGMEM\r
# define memcpy_P memcpy\r
+\r
#endif\r
\r
#if defined(PIC_CCS) || defined(PIC_C18) || defined(ARM_STM32) || defined(STELLARIS_ARM_CORTEX_M4)\r
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * $Id: irsnd.c,v 1.83 2015/01/26 13:09:28 fm Exp $\r
+ * $Id: irsnd.c,v 1.84 2015/02/26 15:42:53 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
# if IRSND_OCx == IRSND_OC0A // OC0A\r
# define IRSND_PORT_LETTER B\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
# if IRSND_OCx == IRSND_OC0A // OC0A\r
# define IRSND_PORT_LETTER A\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
# if IRSND_OCx == IRSND_OC2 // OC0A\r
# define IRSND_PORT_LETTER B\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
# if IRSND_OCx == IRSND_OC2 // OC2\r
# define IRSND_PORT_LETTER B\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega164__) \\r
|| defined (__AVR_ATmega324__) \\r
|| defined (__AVR_ATmega644__) \\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega48__) \\r
|| defined (__AVR_ATmega88__) \\r
|| defined (__AVR_ATmega88P__) \\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
# if IRSND_OCx == IRSND_OC0 \r
# define IRSND_PORT_LETTER B\r
# elif IRSND_OCx == IRSND_OC1B \r
# define IRSND_PORT_LETTER E\r
# define IRSND_BIT_NUMBER 2\r
+# endif // IRSND_OCx\r
+\r
+#elif defined (__AVR_ATxmega128A1U__) // ATxmega128A1U \r
+# if (XMEGA_Timer_NR == 1)\r
+# define IRSND_PORT_PRE PORTC\r
+# elif (XMEGA_Timer_NR == 2)\r
+# define IRSND_PORT_PRE PORTD\r
+# elif (XMEGA_Timer_NR == 3)\r
+# define IRSND_PORT_PRE PORTE\r
+# elif (XMEGA_Timer_NR == 4)\r
+# define IRSND_PORT_PRE PORTF\r
+# else\r
+# warning wrong XMEGA_Timer_NR, choose correct value in irsndconfig.h\r
+# endif\r
+# if IRSND_OCx == IRSND_XMEGA_OC0A \r
+# define IRSND_BIT_NUMBER 0\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0B\r
+# define IRSND_BIT_NUMBER 1\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0C\r
+# define IRSND_BIT_NUMBER 2\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0D\r
+# define IRSND_BIT_NUMBER 3\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1A\r
+# define IRSND_BIT_NUMBER 4\r
+# elif IRSND_OCx == IRSND_XMEGA_OC1B\r
+# define IRSND_BIT_NUMBER 5\r
# else\r
# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
# endif // IRSND_OCx\r
+\r
#elif defined (PIC_C18) //Microchip C18 compiler\r
//Nothing here to do here -> See irsndconfig.h\r
#elif defined (ARM_STM32) //STM32\r
# endif // unix, WIN32\r
#endif // __AVR...\r
\r
-#if defined(ATMEL_AVR)\r
+#if defined(__AVR_XMEGA__)\r
+# define _CONCAT(a,b) a##b\r
+# define CONCAT(a,b) _CONCAT(a,b)\r
+# define IRSND_PORT IRSND_PORT_PRE.OUT\r
+# define IRSND_DDR IRSND_DDR_PRE.DIR\r
+# define IRSND_PIN IRSND_PIN_PRE.IN\r
+# define IRSND_BIT IRSND_BIT_NUMBER\r
+\r
+#elif defined(ATMEL_AVR)\r
# define _CONCAT(a,b) a##b\r
# define CONCAT(a,b) _CONCAT(a,b)\r
# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
# if defined(PIC_C18) // PIC C18\r
PWMon();\r
// IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
+\r
# elif defined (ARM_STM32) // STM32\r
TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
+\r
+# elif defined (__AVR_XMEGA__) \r
+# if ( (IRSND_OCx == IRSND_XMEGA_OC0A) | (IRSND_OCx == IRSND_XMEGA_OC1A) ) // use OC0A or OC1A\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A \r
+# elif ((IRSND_OCx == IRSND_XMEGA_OC0B) | (IRSND_OCx == IRSND_XMEGA_OC1B) ) // use OC0B or OC1B\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B \r
+# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
+ XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif // IRSND_OCx\r
+\r
# else // AVR\r
# if IRSND_OCx == IRSND_OC2 // use OC2\r
TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
# if defined(PIC_C18) // PIC C18\r
PWMoff();\r
// IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
+\r
# elif defined (ARM_STM32) // STM32\r
TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
+\r
+# elif defined (__AVR_XMEGA__)\r
+# if ( (IRSND_OCx == IRSND_XMEGA_OC0A) | (IRSND_OCx == IRSND_XMEGA_OC1A) ) // use OC0A or OC1A\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected\r
+# elif ((IRSND_OCx == IRSND_XMEGA_OC0B) | (IRSND_OCx == IRSND_XMEGA_OC1B) ) // use OC0B or OC1B\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected\r
+# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
+ XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif // IRSND_OCx\r
+\r
# else //AVR\r
\r
# if IRSND_OCx == IRSND_OC2 // use OC2\r
TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
/* Set duty cycle */\r
TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
+\r
+# elif defined (__AVR_XMEGA__)\r
+ XMEGA_Timer.CCA = freq;\r
+\r
# else // AVR\r
\r
# if IRSND_OCx == IRSND_OC2\r
*\r
* Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irsndconfig.h,v 1.64 2015/01/26 13:09:28 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.65 2015/02/26 15:42:53 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
#define IRSND_SUPPORT_LGAIR_PROTOCOL 0 // LG Air Condition >= 10000 ~150 bytes.\r
#define IRSND_SUPPORT_SAMSUNG48_PROTOCOL 0 // Samsung48 >= 10000 ~100 bytes\r
\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * AVR XMega section:\r
+ *\r
+ * Change hardware pin here: IRSND_XMEGA_OC0A = OC0A on ATxmegas supporting OC0A, e.g. ATxmega128A1U\r
+ * IRSND_XMEGA_OC0B = OC0B on ATxmegas supporting OC0B, e.g. ATxmega128A1U\r
+ * IRSND_XMEGA_OC0C = OC0C on ATxmegas supporting OC0C, e.g. ATxmega128A1U\r
+ * IRSND_XMEGA_OC0D = OC0D on ATxmegas supporting OC0D, e.g. ATxmega128A1U\r
+ * IRSND_XMEGA_OC1A = OC0A on ATxmegas supporting OC1A, e.g. ATxmega128A1U\r
+ * IRSND_XMEGA_OC1B = OC0B on ATxmegas supporting OC1B, e.g. ATxmega128A1U\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#if defined(__AVR_XMEGA__) // XMEGA\r
+# define XMEGA_Timer_NR 2 // 1 == Timer PORTC //2 == Timer PORTD //3 == Timer PORTE //4 == Timer PORTF\r
+# define XMEGA_Timer TCD0\r
+# define IRSND_OCx IRSND_XMEGA_OC0B // use OC0B\r
+\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * AVR section:\r
+ * AVR ATMega/ATTiny section:\r
*\r
* Change hardware pin here: IRSND_OC2 = OC2 on ATmegas supporting OC2, e.g. ATmega8\r
* IRSND_OC2A = OC2A on ATmegas supporting OC2A, e.g. ATmega88\r
* IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#if defined(ATMEL_AVR)\r
+#elif defined(ATMEL_AVR)\r
# define IRSND_OCx IRSND_OC2B // use OC2B\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
#elif defined(PIC_C18) // C18 or XC8 compiler\r
-# if defined(__12F1840) // XC8 compiler\r
-# define Pre_Scaler 1 // define prescaler for timer2 e.g. 1,4,16\r
-# define F_CPU 32000000UL // PIC frequency: set your freq here\r
-# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
+# if defined(__12F1840) // XC8 compiler\r
+# define Pre_Scaler 1 // define prescaler for timer2 e.g. 1,4,16\r
+# define F_CPU 32000000UL // PIC frequency: set your freq here\r
+# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
\r
-# else // C18 compiler\r
-# define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC\r
+# else // C18 compiler\r
+# define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC\r
// change other PIC C18 specific settings:\r
-# define F_CPU 48000000UL // PIC frequency: set your freq here\r
-# define Pre_Scaler 4 // define prescaler for timer2 e.g. 1,4,16\r
-# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
-# endif\r
+# define F_CPU 48000000UL // PIC frequency: set your freq here\r
+# define Pre_Scaler 4 // define prescaler for timer2 e.g. 1,4,16\r
+# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
+# endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* ARM STM32 section:\r
# define IRSND_TIMER_CHANNEL_NUMBER 1 // only channel 1 can be used at the moment, others won't work\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Other target system\r
+ * Other target systems\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
#elif !defined (UNIX_OR_WINDOWS)\r
*\r
* Copyright (c) 2009-2015 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: main.c,v 1.24 2015/01/26 13:09:28 fm Exp $\r
+ * $Id: main.c,v 1.27 2015/02/27 10:19:20 fm Exp $\r
*\r
* This demo module is runnable on AVRs and LM4F120 Launchpad (ARM Cortex M4)\r
*\r
}\r
}\r
\r
-static uint8_t\r
-itox (uint8_t val)\r
+static char *\r
+itoh (char * buf, uint8_t digits, uint16_t number)\r
{\r
- uint8_t rtc;\r
-\r
- val &= 0x0F;\r
-\r
- if (val <= 9)\r
+ for (buf[digits] = 0; digits--; number >>= 4)\r
{\r
- rtc = val + '0';\r
+ buf[digits] = "0123456789ABCDEF"[number & 0x0F];\r
}\r
- else\r
- {\r
- rtc = val - 10 + 'A';\r
- }\r
- return (rtc);\r
-}\r
-\r
-static void\r
-itoxx (char * xx, unsigned char i)\r
-{\r
- *xx++ = itox (i >> 4);\r
- *xx++ = itox (i & 0x0F);\r
- *xx = '\0';\r
+ return buf;\r
}\r
\r
static void\r
if (irmp_get_data (&irmp_data))\r
{\r
uart_puts_P (PSTR("protocol: 0x"));\r
- itoxx (buf, irmp_data.protocol);\r
+ itoh (buf, 2, irmp_data.protocol);\r
uart_puts (buf);\r
\r
#if IRMP_PROTOCOL_NAMES == 1\r
#endif\r
\r
uart_puts_P (PSTR(" address: 0x"));\r
- itoxx (buf, irmp_data.address >> 8);\r
- uart_puts (buf);\r
- itoxx (buf, irmp_data.address & 0xFF);\r
+ itoh (buf, 4, irmp_data.address);\r
uart_puts (buf);\r
\r
uart_puts_P (PSTR(" command: 0x"));\r
- itoxx (buf, irmp_data.command >> 8);\r
- uart_puts (buf);\r
- itoxx (buf, irmp_data.command & 0xFF);\r
+ itoh (buf, 4, irmp_data.command);\r
uart_puts (buf);\r
\r
uart_puts_P (PSTR(" flags: 0x"));\r
- itoxx (buf, irmp_data.flags);\r
+ itoh (buf, 2, irmp_data.flags);\r
uart_puts (buf);\r
\r
uart_puts_P (PSTR("\r\n"));\r