Version 2.6.1: some GPIO changes changes for STM32F10x (in IRSND).

git-svn-id: svn://mikrocontroller.net/irmp@142 aeb2e35e-bfc4-4214-b83c-9e8de998ed28

diff --git a/README.txt b/README.txt
index 6ccebf3f24b431ca4c45bb9c15f8d589704e7ae4..58afd88a84e7df4e27f2e05e49ac3b68617979dd 100644 (file)
--- a/README.txt
+++ b/README.txt
@@ -2,7 +2,7 @@ IRMP - Infrared Multi Protocol Decoder
 --------------------------------------\r
 \r
 Version IRMP:  2.6.0 09.07.2014\r
-Version IRSND: 2.6.0 10.07.2014\r
+Version IRSND: 2.6.1 10.07.2014\r
 \r
 Dokumentation:\r
  \r

diff --git a/irsnd.c b/irsnd.c
index 2ba1e288ebd5b08e15dafe220f6d1abccba106f9..c5f7004d398454d1cca824067a532c31e5d1d0e9 100644 (file)
--- a/irsnd.c
+++ b/irsnd.c
@@ -13,7 +13,7 @@
  * ATmega164, ATmega324, ATmega644,  ATmega644P, ATmega1284, ATmega1284P\r
  * ATmega88,  ATmega88P, ATmega168,  ATmega168P, ATmega328P\r
  *\r
- * $Id: irsnd.c,v 1.78 2014/07/10 09:48:23 fm Exp $\r
+ * $Id: irsnd.c,v 1.79 2014/07/10 10:38:07 fm Exp $\r
  *\r
  * This program is free software; you can redistribute it and/or modify\r
  * it under the terms of the GNU General Public License as published by\r
@@ -593,6 +593,7 @@ irsnd_init (void)
         RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
 #    elif defined (ARM_STM32F10X)\r
         RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
+        // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
 #    elif defined (ARM_STM32F4XX)\r
         RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
 #    endif\r
@@ -610,7 +611,7 @@ irsnd_init (void)
         GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
         GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
         GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
-        GPIO_PinRemapConfig(, ENABLE);         // TODO: remapping required\r
+        // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
 #    endif\r
 \r
         /* TIMx clock enable */\r

diff --git a/irsndconfig.h b/irsndconfig.h
index f2374847eca1a888dfd48230976194d581071eb7..402f1256af8637661450637e8b49b6d6daa654ad 100644 (file)
--- a/irsndconfig.h
+++ b/irsndconfig.h
@@ -5,7 +5,7 @@
  *\r
  * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r
  *\r
- * $Id: irsndconfig.h,v 1.60 2014/07/10 09:49:24 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.61 2014/07/10 10:38:07 fm Exp $\r
  *\r
  * ATMEGA88 @ 8 MHz\r
  *\r
@@ -114,10 +114,10 @@
  * ARM STM32 section:\r
  *---------------------------------------------------------------------------------------------------------------------------------------------------\r
  */\r
-#elif defined (ARM_STM32)                                               // use A6 as IR output on STM32\r
-#  define IRSND_PORT_LETTER                     A\r
+#elif defined (ARM_STM32)                                               // use B6 as IR output on STM32\r
+#  define IRSND_PORT_LETTER                     B\r
 #  define IRSND_BIT_NUMBER                      6\r
-#  define IRSND_TIMER_NUMBER                    10\r
+#  define IRSND_TIMER_NUMBER                    4\r
 #  define IRSND_TIMER_CHANNEL_NUMBER            1                       // only channel 1 can be used at the moment, others won't work\r
 \r
 /*---------------------------------------------------------------------------------------------------------------------------------------------------\r