[z180-stamp-cpm3.git] / cbios / ascii.180

\r
; Interrupt drivers for ASCI0 and ASCI1\r
\r
	global	as0_dev,as1_dev\r
\r
	extrn	@ctbl,f_cpu\r
	extrn	ff_empty,ff_get,ff_full,ff_put\r
	extrn	ff_puth,ff_cnt,ff_gech\r
	extrn	bufinit\r
	extrn	isv_sw,ijphl,add_hla,div32_r\r
	extrn	b_st_a,b_ld_a\r
\r
\r
\r
	maclib z180reg.inc\r
	maclib config.inc\r
	maclib ioctl.inc\r
	maclib modebaud.inc\r
\r
\r
	m2b	mbxon_bit,mb$xon$xoff\r
\r
;-----------------------------------------------------\r
\r
	dseg\r
\r
	dw	asci0_out\r
	dw	asci0_osta\r
	dw	asci0_inp\r
	dw	asci0_ista\r
	dw	asci_ioctl\r
as0_dev:\r
	db	0			;absolute device #\r
	db	0			;relative device\r
	db	0			;iflags\r
	db	M_CREAD+M_CRTS_IFLOW+M_CCTS_OFLOW	;fflags\r
	db	M_CS8			;cflags\r
o.absdev	equ	0\r
o.reldev	equ	1\r
o.iflags	equ	2\r
o.fflags	equ	3\r
o.cflags	equ	4\r
\r
	db	0\r
	db	0\r
oint.iflags	equ	as0_dev+o.iflags-s0.inbuf\r
oint.fflags	equ	as0_dev+o.fflags-s0.inbuf\r
	mkbuf	s0.rx_id, s0.inbuf, s0.rx_len\r
	mkbuf	s0.tx_id, s0.outbuf,s0.tx_len\r
\r
\r
	dw	asci1_out\r
	dw	asci1_osta\r
	dw	asci1_inp\r
	dw	asci1_ista\r
	dw	asci_ioctl\r
as1_dev:\r
	db	0			;absolute device #\r
	db	1			;relative device\r
	db	0			;iflags\r
	db	M_CREAD+M_IXOFF		;fflags\r
	db	M_CS8			;cflags\r
\r
	db	0\r
	db	0\r
	mkbuf	s1.rx_id, s1.inbuf, s1.rx_len\r
	mkbuf	s1.tx_id, s1.outbuf,s1.tx_len\r
\r
\r
\r
	dseg\r
\r
\r
ioctl_ftab:\r
	dw	func_tcinit		;(00h) CP/M 3 DEVINI function\r
	dw	func_tcgeta		;(01h) Get the current serial port settings.\r
	dw	func_tcseta		;(02h) Set the current serial port settings.\r
	dw	func_tcsetaw		;(03h) Allow the output buffer to drain\r
	dw	func_tcsetaf		;(04h) Allow the output buffer to drain, discard pending input\r
	dw	func_tcsbrk		;(05h) Sending a break (250ms .. 500ms)\r
	dw	func_tcsbrkp		;(06h) arg is timeinterval in 0.1sec\r
	dw	func_tiocsbrk		;(07h) Turn break on\r
	dw	func_tioccbrk		;(08h) Turn break off\r
	dw	func_tcxonc		;(09h) Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
	dw	func_tcflsh		;(0Ah) Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
	dw	func_fionread		;(0Bh) Get the number of bytes in the input buffer.\r
	dw	func_tiocoutq		;(0Ch) Get the number of bytes in the output buffer.\r
	dw	func_tiocmget		;(0Dh) get the status of modem bits.\r
	dw	func_tiocmbis		;(0Eh) set the indicated modem bits.\r
	dw	func_tiocmbic		;(0Fh) clear the indicated modem bits.\r
	dw	func_tiocmset		;(10h) set the status of modem bits.\r
	dw	func_tiocgsoftcar	;(11h) Get the status of the CLOCAL flag in the c_cflag field\r
	dw	func_tiocssoftcar	;(12h) Set the CLOCAL flag when  *argp  is nonzero, and clear it otherwise.\r
\r
IOCTL_MAX equ	($-ioctl_ftab)/2\r
	dw	nofunc\r
\r
\r
;--------------------------------------------------------------\r
;\r
; b:  device number\r
; c:  command\r
; de: ioctl arg pointer\r
; hl: ptr to driver local data\r
;\r
\r
asci_ioctl:\r
	ld	a,b\r
	cp	1\r
	jr	nz,asioc_1\r
	ld	a,(inidone)\r
	cp	inidoneval\r
	ret	z\r
asioc_1:\r
	push	hl\r
	ex	(sp),ix\r
	ld	(ix+o.absdev),b\r
	ld	hl,ioctl_ftab\r
	ld	a,IOCTL_MAX\r
	cp	c\r
	jr	c,$+3\r
	 ld	a,c\r
	add	a,a\r
	call	add_hla\r
	ld	a,(hl)\r
	inc	hl\r
	ld	h,(hl)\r
	ld	l,a\r
	call	ijphl\r
	pop	ix\r
nofunc:\r
	or	a\r
	ret\r
\r
;--------------------------------------------------------------\r
; CP/M 3 DEVINI function\r
; Init Serial I/O for input and output (ASCI 0/1)\r
\r
func_tcinit:\r
	call	asci_stop\r
\r
init_st:\r
	ld	c,asext0		;Enable baud rate generator\r
	ld	a,M_BRGMOD+M_DCD0DIS 	; +M_CTS0DIS +M_BREAKEN\r
	bit	CCTS_OFLOW,(ix+o.fflags)\r
	jr	nz,$+4\r
	 or	M_CTS0DIS\r
	call	out_asci_reg\r
\r
	ld	b,(ix+o.absdev)\r
	ld	c,8			;\r
	mlt	bc			;\r
	ld	hl,@ctbl+7		;\r
	add	hl,bc			;\r
	ld	a,(hl)			;get baudrate index\r
	call	as_br_div\r
	ld	c,astc0l\r
	call	out_asci_reg_hl\r
\r
	ld	c,cntlb0\r
	ld	a,M_MPBT		;No MP Mode, X16\r
	bit	PARODD,(ix+o.iflags)\r
	jr	z,$+4\r
	 or	M_PEO\r
	call	out_asci_reg\r
\r
	ld	c,cntla0\r
	ld	a,(ix+o.cflags)\r
	srlan	CS8\r
	ld	hl,mod_tab\r
	call	add_hla\r
	ld	a,(hl)\r
	or	a,M_RE+M_TE+M_RTS0+M_EFR ;Rx/Tx enable\r
	call	out_asci_reg\r
\r
	bit	0,(ix+o.reldev)\r
	push	ix\r
	jr	nz,init_1\r
	ld	hl,rtxisvjmp0		;rx/tx int vector\r
	ld	(ivtab + IV$ASCI0),hl	;\r
	ld	ix,s0.outbuf\r
	call	bufinit\r
	ld	ix,s0.inbuf\r
	jr	init_2\r
init_1:\r
	ld	hl,rtxisvjmp1		;rx/tx int vector\r
	ld	(ivtab + IV$ASCI1),hl	;\r
	ld	ix,s1.outbuf\r
	call	bufinit\r
	ld	ix,s1.inbuf\r
init_2:\r
	call	bufinit\r
	pop	ix\r
	call	asci_start\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
mod_tab:\r
	db	000B			; 7N1\r
	db	100B			; 8N1\r
	db	001B			; 7N2\r
	db	101B			; 8N2\r
	db	010B			; 7P1\r
	db	110B			; 8P1\r
	db	011B			; 7P2\r
	db	111B			; 8P2\r
\r
\r
;--------------------------------------------------------------\r
; Get the current serial port settings.\r
\r
func_tcgeta:\r
	call	chk_ptr\r
\r
	ld	a,(ix+o.iflags)\r
	call	b_st_a\r
	inc	de\r
	ld	a,(ix+o.fflags)\r
	call	b_st_a\r
	inc	de\r
\r
	ld	b,(ix+o.absdev)\r
	ld	c,8			;\r
	mlt	bc			;\r
	ld	hl,@ctbl+7		;\r
	add	hl,bc			;\r
	ld	a,(hl)			;get baudrate index\r
	and	M_CBAUD\r
	ld	b,a\r
	ld	a,(ix+o.cflags)\r
	and	~M_CBAUD\r
	or	b\r
	call	b_st_a\r
	dec	de\r
	dec	de\r
	xor	a\r
	ret\r
\r
;--------------------------------------------------------------\r
; Set the current serial port settings.\r
\r
func_tcseta:\r
	call	chk_ptr\r
\r
	call	asci_stop\r
\r
	call	b_ld_a\r
	ld	(ix+o.iflags),a\r
	inc	de\r
	call	b_ld_a\r
	ld	(ix+o.fflags),a\r
	inc	de\r
\r
	ld	b,(ix+o.absdev)\r
	ld	c,8			;\r
	mlt	bc			;\r
	ld	hl,@ctbl+7		;\r
	add	hl,bc			;\r
	call	b_ld_a\r
	ld	(ix+o.cflags),a\r
	and	M_CBAUD\r
	ld	(hl),a			;set baudrate index\r
	dec	de\r
	dec	de\r
	push	de\r
	call	init_st\r
	pop	de\r
	xor	a\r
	ret\r
\r
;--------------------------------------------------------------\r
; Allow the output buffer to drain\r
\r
func_tcsetaw:\r
\r
;--------------------------------------------------------------\r
; Allow the output buffer to drain, discard pending input\r
\r
func_tcsetaf:\r
\r
;--------------------------------------------------------------\r
; Sending a break (250ms .. 500ms)\r
\r
func_tcsbrk:\r
\r
;--------------------------------------------------------------\r
; arg is timeinterval in 0.1sec\r
\r
func_tcsbrkp:\r
\r
;--------------------------------------------------------------\r
; Turn break on\r
\r
func_tiocsbrk:\r
\r
;--------------------------------------------------------------\r
; Turn break off\r
\r
func_tioccbrk:\r
\r
;--------------------------------------------------------------\r
; Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
\r
func_tcxonc:\r
\r
;--------------------------------------------------------------\r
; Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
\r
func_tcflsh:\r
\r
;--------------------------------------------------------------\r
; Get the number of bytes in the input buffer.\r
\r
func_fionread:\r
\r
;--------------------------------------------------------------\r
; Get the number of bytes in the output buffer.\r
\r
func_tiocoutq:\r
\r
;--------------------------------------------------------------\r
; get the status of modem bits.\r
\r
func_tiocmget:\r
\r
;--------------------------------------------------------------\r
; set the indicated modem bits.\r
\r
func_tiocmbis:\r
\r
;--------------------------------------------------------------\r
; clear the indicated modem bits.\r
\r
func_tiocmbic:\r
\r
;--------------------------------------------------------------\r
; set the status of modem bits.\r
\r
func_tiocmset:\r
\r
;--------------------------------------------------------------\r
; Get the status of the CLOCAL flag in the c_cflag field\r
\r
func_tiocgsoftcar:\r
\r
;--------------------------------------------------------------\r
; Set the CLOCAL flag when  *argp  is nonzero, and clear it otherwise.\r
\r
func_tiocssoftcar:\r
\r
	or	0ffh\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
chk_ptr:\r
	ld	a,e\r
	or	d\r
	ret	nz\r
	cpl\r
	pop	hl\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
asci_stop:\r
	ld	c,stat0			;Disable rx/tx interrupts\r
	xor	a			;\r
	call	out_asci_reg\r
\r
	ld	c,cntla0		;Disable receiver and transmitter\r
	ld	a,M_RTS0+M_EFR		;RTS/CKA1\r
	jr	out_asci_reg\r
\r
;--------------------------------------------------------------\r
\r
asci_start:\r
	bit	0,(ix+o.reldev)\r
	jr	nz,asci_st1\r
	in0	a,cntla0		;asci0\r
	and	~M_RTS0			;Activate RTS\r
	or	M_EFR\r
	out0	(cntla0),a\r
asci_st1:\r
	ld	c,stat0			;\r
	ld	a,M_RIE\r
	jr	out_asci_reg\r
\r
;--------------------------------------------------------------\r
; output to asci0/1 register\r
;\r
; c:  register address\r
; a:  value\r
;\r
\r
out_asci_reg:\r
	push	bc\r
	bit	0,(ix+o.reldev)\r
	jr	z,$+3\r
	 inc	c\r
	ld	b,0\r
	out	(c),a\r
	pop	bc\r
	ret\r
\r
;--------------------------------------------------------------\r
; output 16 bit value to asci0/1 register\r
;\r
; c:   register address\r
; hl:  value\r
; a destroyed\r
\r
out_asci_reg_hl:\r
	ld	a,b			;save b\r
	bit	0,(ix+o.reldev)\r
	jr	z,$+4\r
	 inc	c\r
	 inc	c\r
	ld	b,0\r
	out	(c),l\r
	inc	c\r
	out	(c),h\r
	ld	b,a\r
	ret\r
\r
;--------------------------------------------------------------\r
; baud rate divider\r
;\r
;   a: index\r
; return\r
;   hl: divider\r
\r
as_br_div:\r
	push	de\r
	push	bc\r
	and	0fh\r
	add	a,a			;get factor\r
	ld	hl,bd150_tab\r
	call	add_hla\r
	ld	c,(hl)\r
	inc	hl\r
	ld	b,(hl)\r
	ld	hl,(f_cpu)\r
	ld	de,(f_cpu+2)\r
	call	div32_r\r
	ld	bc,32*150\r
	call	div32_r\r
	ld	de,2\r
	or	a\r
	sbc	hl,de\r
	pop	bc\r
	pop	de\r
	ret	nc\r
	ld	hl,0\r
	ret\r
\r
bd150_tab:\r
;		factor		index   baudrate	orig. cp/m\r
	dw	19200/150	; 0	19200		-\r
	dw	28800/150	; 1	28800		50\r
	dw	38400/150	; 2	38400		75\r
	dw	57600/150	; 3	57600		110\r
	dw	11520/15	; 4	115200		134.5\r
	dw	150/150		; 5	150\r
	dw	300/150		; 6	300\r
	dw	600/150		; 7	600\r
	dw	1200/150	; 8	1200\r
	dw	1800/150	; 9	1800\r
	dw	2400/150	;10	2400\r
	dw	3600/150	;11	3600\r
	dw	4800/150	;12	4800\r
	dw	7200/150	;13	7200\r
	dw	9600/150	;14	9600\r
	dw	19200/150	;15	19200\r
\r
\r
;--------------------------------------------------------------\r
\r
   if 0\r
\r
initab0:\r
	db	1,stat0,0		;Disable rx/tx interrupts\r
					;Enable baud rate generator\r
	db	1,asext0,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS\r
	db	2,astc0l\r
init_br_off equ $ - initab0\r
	dw	28\r
	db	1,cntlb0,M_MPBT		;No MP Mode, X16\r
	db	1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
	db	0\r
\r
initab1:\r
	db	1,stat1,0		;Disable rx/tx ints, disable CTS1\r
	db	1,asext1,M_BRGMOD	;Enable baud rate generator\r
	db	2,astc1l,low 3, high 3\r
	db	1,cntlb1,M_MPBT		;No MP Mode, X16\r
	db	1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
	db	0\r
   endif\r
\r
;--------------------------------------------------------------\r
\r
	dseg\r
asci0_ista:\r
	push	ix\r
	ld	ix,s0.inbuf		;\r
	call	ff_empty\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
\r
asci1_ista:\r
	push	ix\r
	ld	ix,s1.inbuf		;\r
	call	ff_empty\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Get an input character\r
\r
if 0\r
asci0_inp:\r
	push	ix\r
	ld	ix,s0.inbuf		;\r
	call	ff_cnt\r
	cp	32\r
	jr	nc,a0i_1\r
	di\r
	in0	a,(cntla0)\r
	res	RTS0,a\r
	set	EFR,a\r
	out0	(cntla0),a\r
	ei\r
a0i_1:\r
	call	ff_get\r
	pop	ix\r
	ret\r
endif\r
\r
\r
asci0_inp:\r
	push	ix\r
	ld	ix,s0.inbuf		;\r
	call	ff_gech\r
	ld	a,b			;remaining chrs in buffer\r
	cp	s0.rx_len/4		; < 32?\r
	jr	nc,a0i_1			; no, just get char\r
	bit	CRTS_IFLOW,(ix+oint.fflags)	; yes, enable RTS if needed\r
	jr	z,a0i_1			; no needed\r
	di				; needed, enable\r
	in0	a,(cntla0)\r
	and	~M_RTS0			;assert RTS\r
	or	M_EFR			;don't reset error flags\r
	ei\r
	out0	(cntla0),a\r
a0i_1:\r
	ld	a,c\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Get an input character\r
\r
asci1_inp:\r
	push	ix\r
	ld	ix,s1.inbuf		;\r
	call	ff_gech\r
	ld	a,b			; remaining chars in buffer\r
	cp	s0.rx_len/4		; == 25% full?\r
	jr	nz,a1i_2		; no, just get char\r
	bit	IXOFF,(ix+oint.fflags)	; XON/XOFF on input?\r
	jr	z,a1i_2			; no\r
;	di\r
a1i_1:	in0	a,(stat1)		; status reg ASCI1\r
	bit	TDRE,a			; Transmitter Data Reg. empty?\r
	jr	z,a1i_1			; no, wait\r
	ld	a,11h			; DC1/XON\r
	out0	(tdr1),a		; send out\r
;	ei\r
a1i_2:\r
	ld	a,c			; get back the char\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Output status\r
\r
asci0_osta:\r
	push	ix\r
	ld	ix,s0.outbuf		;\r
	call	ff_full\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; Output status\r
\r
asci1_osta:\r
	push	ix\r
	ld	ix,s1.outbuf		;\r
	call	ff_full\r
	pop	ix\r
	ret\r
\r
;--------------------------------------------------------------\r
; put character in c in buffer\r
; destroys hl, bc\r
; returns output char in a\r
\r
asci0_out:\r
	push	ix			;\r
	ld	ix,s0.outbuf		;\r
	call	ff_puth\r
	pop	ix			;\r
	di				;\r
	in0	c,(stat0)		;\r
	set	TIE,c			;\r
	out0	(stat0),c		;\r
	ei				;\r
	ret\r
\r
;--------------------------------------------------------------\r
; put character in c in buffer\r
; destroys hl, bc\r
; returns output char in a\r
\r
asci1_out:\r
	push	ix			;\r
	ld	ix,s1.outbuf		;\r
	call	ff_puth\r
	pop	ix			;\r
	di				;\r
	in0	c,(stat1)		;\r
	set	TIE,c			;\r
	out0	(stat1),c		;\r
	ei				;\r
	ret\r
\r
\r
;--------------------------------------------------------------\r
\r
	cseg\r
rtxisvjmp0:\r
	call	isv_sw\r
	dw	asci0_int\r
\r
rtxisvjmp1:\r
	call	isv_sw\r
	dw	asci1_int\r
\r
;--------------------------------------------------------------\r
; ASCI 0/1 Transmit/Receive interupt routines\r
\r
	.lall\r
asci_int macro	dev\r
	local	rxi_2,rxi_3,rxi_4\r
\r
	push	ix\r
rxtxi&dev&_lp0:\r
	ld	ix,s&dev&.inbuf		;\r
rxtxi&dev&_lp1:\r
	in0	a,(stat&dev)		;receive flag set?\r
	jp	p,txi&dev		;RDRF == Bit 7\r
	and	M_OVRN+M_PERR+M_FE\r
	ld	e,a\r
\r
	in0	a,(asext&dev)\r
	and	M_BREAK\r
	or	e\r
	ld	e,a\r
\r
	in0	d,(cntla&dev)		;\r
	res	EFR,d			;\r
	out0	(cntla&dev),d\r
\r
	ld	c,(ix+o.in_idx)		;input buffer pointer\r
	ld	b,0\r
	ld	hl,s&dev&.inbuf		;\r
	add	hl,bc\r
\r
	in0	a,(rdr&dev)		;get char\r
	ld	(hl),a\r
					;todo: break detection\r
					;todo: parity, framing overrun error\r
\r
	ld	e,(ix+oint.fflags)\r
\r
rxi_2:\r
\r
	ld	a,c			;increment buffer in pointer\r
	inc	a			;\r
	ld	b,(ix+o.mask)		;\r
	and	b			;\r
	ld	c,a\r
\r
	sub	(ix+o.out_idx)		;\r
	jr	z,rxtxi&dev&_lp1	;skip if buffer is full\r
\r
	ld	(ix+o.in_idx),c		;input buffer pointer\r
\r
	jr	nc,$+3			;\r
	 adc	b			;\r
\r
	cp	s&dev&.tx_len*3/4\r
	jr	c,rxi&dev&_noflow\r
\r
   if dev=0\r
	bit	CRTS_IFLOW,e\r
	jr	z,rxi_4\r
\r
	set	EFR,d\r
	set	RTS0,d			;RTS inactive\r
	out0	(cntla&dev),d		;\r
   endif\r
   if dev=1\r
	bit	IXOFF,e\r
	jr	z,rxi_4\r
\r
;	di\r
rxi_3:	in0	a,(stat&dev)		; status reg ASCI1\r
	bit	TDRE,a			; Transmitter Data Reg. empty?\r
	jr	z,rxi_3			; no, wait\r
	ld	a,DC3			; DC3/XOFF\r
	out0	(tdr&dev),a		; send out\r
;	ei\r
   endif\r
\r
rxi_4:\r
;	bit	IXOFF,e\r
;	jr	z,rxtxi&dev&_lp1\r
					;todo: send XOFF\r
rxi&dev&_noflow:\r
	jr	rxtxi&dev&_lp1\r
\r
\r
txi&dev:\r
	ld	e,a\r
	bit	TDRE,e			;TX int?\r
	jr	z,rxtxi&dev&_exit\r
\r
					;todo: xon/xoff\r
\r
	ld	hl,s&dev&.outbuf+o.in_idx	;[in]\r
	ld	a,(hl)			;\r
	inc	hl			;[out]\r
	ld	c,(hl)			;\r
	cp	c			;\r
	jr	z,txi&dev&_empty	;\r
	inc	hl			;fifo base\r
	ld	b,0			;\r
	add	hl,bc			;\r
	ld	a,(hl)			;\r
	out0	(tdr&dev),a		;\r
	inc	c			;\r
	ld	a,(s&dev&.outbuf+o.mask)	;\r
	and	c			;\r
	ld	(s&dev&.outbuf+o.out_idx),a	;\r
\r
	jr	rxtxi&dev&_lp0\r
\r
txi&dev&_empty:\r
	res	TIE,e			;disable tx-int\r
	out0	(stat&dev),e		;			5\r
\r
rxtxi&dev&_exit:\r
	pop	ix\r
	ret\r
	endm\r
\r
	dseg\r
;--------------------------------------------------------------\r
; ASCI 0 Transmit/Receive interupt routines\r
\r
asci0_int:\r
	asci_int 0\r
\r
;--------------------------------------------------------------\r
; ASCI 1 Transmit/Receive interupt routines\r
\r
asci1_int:\r
	asci_int 1\r
\r
	end\r
Commit	Line	Data
d6829fd3 L	1	\r
	2	; Interrupt drivers for ASCI0 and ASCI1\r
	3	\r
6dd88c25	4	global as0_dev,as1_dev\r
d6829fd3	5	\r
1c7e3963	6	extrn @ctbl,f_cpu\r
81ba3c84 L	7	extrn ff_empty,ff_get,ff_full,ff_put\r
81ba3c84 L	8	extrn ff_puth,ff_cnt,ff_gech\r
d6829fd3	9	extrn bufinit\r
1c7e3963 L	10	extrn isv_sw,ijphl,add_hla,div32_r\r
1c7e3963 L	11	extrn b_st_a,b_ld_a\r
d6829fd3 L	12	\r
	13	\r
	14	\r
1c7e3963 L	15	maclib z180reg.inc\r
	16	maclib config.inc\r
	17	maclib ioctl.inc\r
	18	maclib modebaud.inc\r
d6829fd3 L	19	\r
d6829fd3 L	20	\r
1c7e3963	21	m2b mbxon_bit,mb$xon$xoff\r
d6829fd3 L	22	\r
	23	;-----------------------------------------------------\r
	24	\r
	25	dseg\r
	26	\r
6dd88c25 L	27	dw asci0_out\r
	28	dw asci0_osta\r
	29	dw asci0_inp\r
	30	dw asci0_ista\r
	31	dw asci_ioctl\r
	32	as0_dev:\r
1c7e3963 L	33	db 0 ;absolute device #\r
	34	db 0 ;relative device\r
	35	db 0 ;iflags\r
99b8d89e	36	db M_CREAD+M_CRTS_IFLOW+M_CCTS_OFLOW ;fflags\r
1c7e3963	37	db M_CS8 ;cflags\r
6dd88c25 L	38	o.absdev equ 0\r
6dd88c25 L	39	o.reldev equ 1\r
1c7e3963 L	40	o.iflags equ 2\r
	41	o.fflags equ 3\r
	42	o.cflags equ 4\r
	43	\r
	44	db 0\r
	45	db 0\r
	46	oint.iflags equ as0_dev+o.iflags-s0.inbuf\r
	47	oint.fflags equ as0_dev+o.fflags-s0.inbuf\r
	48	mkbuf s0.rx_id, s0.inbuf, s0.rx_len\r
	49	mkbuf s0.tx_id, s0.outbuf,s0.tx_len\r
	50	\r
6dd88c25 L	51	\r
	52	dw asci1_out\r
	53	dw asci1_osta\r
	54	dw asci1_inp\r
	55	dw asci1_ista\r
	56	dw asci_ioctl\r
	57	as1_dev:\r
1c7e3963 L	58	db 0 ;absolute device #\r
	59	db 1 ;relative device\r
	60	db 0 ;iflags\r
3134af6c	61	db M_CREAD+M_IXOFF ;fflags\r
1c7e3963	62	db M_CS8 ;cflags\r
6dd88c25	63	\r
6dd88c25	64	db 0\r
6dd88c25	65	db 0\r
d6829fd3	66	mkbuf s1.rx_id, s1.inbuf, s1.rx_len\r
81ba3c84	67	mkbuf s1.tx_id, s1.outbuf,s1.tx_len\r
d6829fd3 L	68	\r
	69	\r
	70	\r
	71	dseg\r
	72	\r
6dd88c25 L	73	\r
6dd88c25 L	74	ioctl_ftab:\r
1c7e3963 L	75	dw func_tcinit ;(00h) CP/M 3 DEVINI function\r
	76	dw func_tcgeta ;(01h) Get the current serial port settings.\r
	77	dw func_tcseta ;(02h) Set the current serial port settings.\r
	78	dw func_tcsetaw ;(03h) Allow the output buffer to drain\r
	79	dw func_tcsetaf ;(04h) Allow the output buffer to drain, discard pending input\r
	80	dw func_tcsbrk ;(05h) Sending a break (250ms .. 500ms)\r
	81	dw func_tcsbrkp ;(06h) arg is timeinterval in 0.1sec\r
	82	dw func_tiocsbrk ;(07h) Turn break on\r
	83	dw func_tioccbrk ;(08h) Turn break off\r
	84	dw func_tcxonc ;(09h) Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
	85	dw func_tcflsh ;(0Ah) Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
	86	dw func_fionread ;(0Bh) Get the number of bytes in the input buffer.\r
	87	dw func_tiocoutq ;(0Ch) Get the number of bytes in the output buffer.\r
	88	dw func_tiocmget ;(0Dh) get the status of modem bits.\r
	89	dw func_tiocmbis ;(0Eh) set the indicated modem bits.\r
	90	dw func_tiocmbic ;(0Fh) clear the indicated modem bits.\r
	91	dw func_tiocmset ;(10h) set the status of modem bits.\r
	92	dw func_tiocgsoftcar ;(11h) Get the status of the CLOCAL flag in the c_cflag field\r
	93	dw func_tiocssoftcar ;(12h) Set the CLOCAL flag when *argp is nonzero, and clear it otherwise.\r
	94	\r
6dd88c25 L	95	IOCTL_MAX equ ($-ioctl_ftab)/2\r
	96	dw nofunc\r
	97	\r
1c7e3963	98	\r
d6829fd3	99	;--------------------------------------------------------------\r
d6829fd3	100	;\r
6dd88c25 L	101	; b: device number\r
	102	; c: command\r
	103	; de: ioctl arg pointer\r
	104	; hl: ptr to driver local data\r
d6829fd3 L	105	;\r
d6829fd3 L	106	\r
6dd88c25	107	asci_ioctl:\r
72ba3737 L	108	ld a,b\r
	109	cp 1\r
	110	jr nz,asioc_1\r
3134af6c L	111	ld a,(inidone)\r
3134af6c L	112	cp inidoneval\r
72ba3737 L	113	ret z\r
72ba3737 L	114	asioc_1:\r
6dd88c25 L	115	push hl\r
	116	ex (sp),ix\r
	117	ld (ix+o.absdev),b\r
	118	ld hl,ioctl_ftab\r
	119	ld a,IOCTL_MAX\r
	120	cp c\r
	121	jr c,$+3\r
	122	ld a,c\r
	123	add a,a\r
	124	call add_hla\r
	125	ld a,(hl)\r
	126	inc hl\r
	127	ld h,(hl)\r
	128	ld l,a\r
	129	call ijphl\r
	130	pop ix\r
	131	nofunc:\r
1c7e3963	132	or a\r
6dd88c25 L	133	ret\r
6dd88c25 L	134	\r
6dd88c25	135	;--------------------------------------------------------------\r
1c7e3963	136	; CP/M 3 DEVINI function\r
6dd88c25	137	; Init Serial I/O for input and output (ASCI 0/1)\r
d6829fd3	138	\r
1c7e3963 L	139	func_tcinit:\r
	140	call asci_stop\r
	141	\r
	142	init_st:\r
	143	ld c,asext0 ;Enable baud rate generator\r
	144	ld a,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS +M_BREAKEN\r
	145	bit CCTS_OFLOW,(ix+o.fflags)\r
	146	jr nz,$+4\r
	147	or M_CTS0DIS\r
	148	call out_asci_reg\r
d6829fd3	149	\r
6dd88c25	150	ld b,(ix+o.absdev)\r
1c7e3963 L	151	ld c,8 ;\r
	152	mlt bc ;\r
	153	ld hl,@ctbl+7 ;\r
	154	add hl,bc ;\r
	155	ld a,(hl) ;get baudrate index\r
	156	call as_br_div\r
	157	ld c,astc0l\r
99b8d89e	158	call out_asci_reg_hl\r
1c7e3963 L	159	\r
	160	ld c,cntlb0\r
	161	ld a,M_MPBT ;No MP Mode, X16\r
	162	bit PARODD,(ix+o.iflags)\r
	163	jr z,$+4\r
	164	or M_PEO\r
	165	call out_asci_reg\r
	166	\r
	167	ld c,cntla0\r
	168	ld a,(ix+o.cflags)\r
	169	srlan CS8\r
	170	ld hl,mod_tab\r
	171	call add_hla\r
	172	ld a,(hl)\r
	173	or a,M_RE+M_TE+M_RTS0+M_EFR ;Rx/Tx enable\r
	174	call out_asci_reg\r
	175	\r
6dd88c25	176	bit 0,(ix+o.reldev)\r
2f8aa307	177	push ix\r
6dd88c25 L	178	jr nz,init_1\r
	179	ld hl,rtxisvjmp0 ;rx/tx int vector\r
	180	ld (ivtab + IV$ASCI0),hl ;\r
d6829fd3	181	ld ix,s0.outbuf\r
1c7e3963 L	182	call bufinit\r
1c7e3963 L	183	ld ix,s0.inbuf\r
6dd88c25 L	184	jr init_2\r
	185	init_1:\r
	186	ld hl,rtxisvjmp1 ;rx/tx int vector\r
	187	ld (ivtab + IV$ASCI1),hl ;\r
d6829fd3	188	ld ix,s1.outbuf\r
1c7e3963 L	189	call bufinit\r
1c7e3963 L	190	ld ix,s1.inbuf\r
6dd88c25	191	init_2:\r
d6829fd3	192	call bufinit\r
1c7e3963 L	193	pop ix\r
	194	call asci_start\r
	195	ret\r
	196	\r
	197	;--------------------------------------------------------------\r
	198	\r
	199	mod_tab:\r
	200	db 000B ; 7N1\r
	201	db 100B ; 8N1\r
	202	db 001B ; 7N2\r
	203	db 101B ; 8N2\r
	204	db 010B ; 7P1\r
	205	db 110B ; 8P1\r
	206	db 011B ; 7P2\r
	207	db 111B ; 8P2\r
	208	\r
	209	\r
	210	;--------------------------------------------------------------\r
	211	; Get the current serial port settings.\r
	212	\r
	213	func_tcgeta:\r
99b8d89e	214	call chk_ptr\r
1c7e3963 L	215	\r
	216	ld a,(ix+o.iflags)\r
	217	call b_st_a\r
	218	inc de\r
	219	ld a,(ix+o.fflags)\r
	220	call b_st_a\r
	221	inc de\r
	222	\r
	223	ld b,(ix+o.absdev)\r
	224	ld c,8 ;\r
	225	mlt bc ;\r
	226	ld hl,@ctbl+7 ;\r
	227	add hl,bc ;\r
	228	ld a,(hl) ;get baudrate index\r
	229	and M_CBAUD\r
	230	ld b,a\r
	231	ld a,(ix+o.cflags)\r
	232	and ~M_CBAUD\r
	233	or b\r
	234	call b_st_a\r
	235	dec de\r
	236	dec de\r
	237	xor a\r
1c7e3963 L	238	ret\r
1c7e3963 L	239	\r
1c7e3963 L	240	;--------------------------------------------------------------\r
	241	; Set the current serial port settings.\r
	242	\r
	243	func_tcseta:\r
99b8d89e	244	call chk_ptr\r
1c7e3963 L	245	\r
	246	call asci_stop\r
	247	\r
	248	call b_ld_a\r
	249	ld (ix+o.iflags),a\r
	250	inc de\r
	251	call b_ld_a\r
	252	ld (ix+o.fflags),a\r
	253	inc de\r
	254	\r
	255	ld b,(ix+o.absdev)\r
	256	ld c,8 ;\r
	257	mlt bc ;\r
	258	ld hl,@ctbl+7 ;\r
	259	add hl,bc ;\r
	260	call b_ld_a\r
	261	ld (ix+o.cflags),a\r
	262	and M_CBAUD\r
	263	ld (hl),a ;set baudrate index\r
	264	dec de\r
	265	dec de\r
	266	push de\r
	267	call init_st\r
	268	pop de\r
	269	xor a\r
1c7e3963 L	270	ret\r
1c7e3963 L	271	\r
1c7e3963 L	272	;--------------------------------------------------------------\r
	273	; Allow the output buffer to drain\r
	274	\r
	275	func_tcsetaw:\r
	276	\r
	277	;--------------------------------------------------------------\r
	278	; Allow the output buffer to drain, discard pending input\r
	279	\r
	280	func_tcsetaf:\r
	281	\r
	282	;--------------------------------------------------------------\r
	283	; Sending a break (250ms .. 500ms)\r
	284	\r
	285	func_tcsbrk:\r
	286	\r
	287	;--------------------------------------------------------------\r
	288	; arg is timeinterval in 0.1sec\r
	289	\r
	290	func_tcsbrkp:\r
	291	\r
	292	;--------------------------------------------------------------\r
	293	; Turn break on\r
	294	\r
	295	func_tiocsbrk:\r
	296	\r
	297	;--------------------------------------------------------------\r
	298	; Turn break off\r
	299	\r
	300	func_tioccbrk:\r
	301	\r
	302	;--------------------------------------------------------------\r
	303	; Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
	304	\r
	305	func_tcxonc:\r
	306	\r
	307	;--------------------------------------------------------------\r
	308	; Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
	309	\r
	310	func_tcflsh:\r
	311	\r
	312	;--------------------------------------------------------------\r
	313	; Get the number of bytes in the input buffer.\r
	314	\r
	315	func_fionread:\r
	316	\r
	317	;--------------------------------------------------------------\r
	318	; Get the number of bytes in the output buffer.\r
	319	\r
	320	func_tiocoutq:\r
	321	\r
	322	;--------------------------------------------------------------\r
	323	; get the status of modem bits.\r
	324	\r
	325	func_tiocmget:\r
	326	\r
	327	;--------------------------------------------------------------\r
	328	; set the indicated modem bits.\r
	329	\r
	330	func_tiocmbis:\r
	331	\r
	332	;--------------------------------------------------------------\r
	333	; clear the indicated modem bits.\r
	334	\r
	335	func_tiocmbic:\r
336	\r
337	;--------------------------------------------------------------\r
338	; set the status of modem bits.\r
339	\r
340	func_tiocmset:\r
341	\r
342	;--------------------------------------------------------------\r
343	; Get the status of the CLOCAL flag in the c_cflag field\r
344	\r
345	func_tiocgsoftcar:\r
346	\r
347	;--------------------------------------------------------------\r
348	; Set the CLOCAL flag when *argp is nonzero, and clear it otherwise.\r
349	\r
350	func_tiocssoftcar:\r
351	\r
352	or 0ffh\r
353	ret\r
354	\r
355	;--------------------------------------------------------------\r
356	\r
99b8d89e L	357	chk_ptr:\r
	358	ld a,e\r
	359	or d\r
	360	ret nz\r
	361	cpl\r
	362	pop hl\r
	363	ret\r
	364	\r
	365	;--------------------------------------------------------------\r
	366	\r
1c7e3963 L	367	asci_stop:\r
	368	ld c,stat0 ;Disable rx/tx interrupts\r
	369	xor a ;\r
	370	call out_asci_reg\r
	371	\r
	372	ld c,cntla0 ;Disable receiver and transmitter\r
	373	ld a,M_RTS0+M_EFR ;RTS/CKA1\r
	374	jr out_asci_reg\r
	375	\r
	376	;--------------------------------------------------------------\r
	377	\r
	378	asci_start:\r
2f8aa307 L	379	bit 0,(ix+o.reldev)\r
	380	jr nz,asci_st1\r
	381	in0 a,cntla0 ;asci0\r
	382	and ~M_RTS0 ;Activate RTS\r
	383	or M_EFR\r
	384	out0 (cntla0),a\r
	385	asci_st1:\r
1c7e3963	386	ld c,stat0 ;\r
d6829fd3	387	ld a,M_RIE\r
1c7e3963 L	388	jr out_asci_reg\r
	389	\r
	390	;--------------------------------------------------------------\r
	391	; output to asci0/1 register\r
	392	;\r
	393	; c: register address\r
	394	; a: value\r
	395	;\r
	396	\r
	397	out_asci_reg:\r
	398	push bc\r
99b8d89e L	399	bit 0,(ix+o.reldev)\r
	400	jr z,$+3\r
	401	inc c\r
1c7e3963 L	402	ld b,0\r
	403	out (c),a\r
	404	pop bc\r
d6829fd3 L	405	ret\r
d6829fd3 L	406	\r
99b8d89e L	407	;--------------------------------------------------------------\r
	408	; output 16 bit value to asci0/1 register\r
	409	;\r
	410	; c: register address\r
	411	; hl: value\r
	412	; a destroyed\r
	413	\r
	414	out_asci_reg_hl:\r
	415	ld a,b ;save b\r
	416	bit 0,(ix+o.reldev)\r
	417	jr z,$+4\r
	418	inc c\r
	419	inc c\r
	420	ld b,0\r
	421	out (c),l\r
	422	inc c\r
	423	out (c),h\r
	424	ld b,a\r
	425	ret\r
	426	\r
1c7e3963 L	427	;--------------------------------------------------------------\r
	428	; baud rate divider\r
	429	;\r
	430	; a: index\r
	431	; return\r
	432	; hl: divider\r
	433	\r
	434	as_br_div:\r
	435	push de\r
	436	push bc\r
	437	and 0fh\r
	438	add a,a ;get factor\r
	439	ld hl,bd150_tab\r
	440	call add_hla\r
	441	ld c,(hl)\r
	442	inc hl\r
	443	ld b,(hl)\r
	444	ld hl,(f_cpu)\r
	445	ld de,(f_cpu+2)\r
	446	call div32_r\r
	447	ld bc,32*150\r
	448	call div32_r\r
	449	ld de,2\r
	450	or a\r
	451	sbc hl,de\r
	452	pop bc\r
	453	pop de\r
	454	ret nc\r
	455	ld hl,0\r
	456	ret\r
	457	\r
	458	bd150_tab:\r
	459	; factor index baudrate orig. cp/m\r
	460	dw 19200/150 ; 0 19200 -\r
	461	dw 28800/150 ; 1 28800 50\r
	462	dw 38400/150 ; 2 38400 75\r
	463	dw 57600/150 ; 3 57600 110\r
	464	dw 11520/15 ; 4 115200 134.5\r
	465	dw 150/150 ; 5 150\r
	466	dw 300/150 ; 6 300\r
	467	dw 600/150 ; 7 600\r
	468	dw 1200/150 ; 8 1200\r
	469	dw 1800/150 ; 9 1800\r
	470	dw 2400/150 ;10 2400\r
	471	dw 3600/150 ;11 3600\r
	472	dw 4800/150 ;12 4800\r
	473	dw 7200/150 ;13 7200\r
	474	dw 9600/150 ;14 9600\r
	475	dw 19200/150 ;15 19200\r
	476	\r
	477	\r
	478	;--------------------------------------------------------------\r
	479	\r
	480	if 0\r
	481	\r
	482	initab0:\r
	483	db 1,stat0,0 ;Disable rx/tx interrupts\r
	484	;Enable baud rate generator\r
	485	db 1,asext0,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS\r
	486	db 2,astc0l\r
	487	init_br_off equ $ - initab0\r
	488	dw 28\r
	489	db 1,cntlb0,M_MPBT ;No MP Mode, X16\r
	490	db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
491	db 0\r
492	\r
493	initab1:\r
494	db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r
495	db 1,asext1,M_BRGMOD ;Enable baud rate generator\r
496	db 2,astc1l,low 3, high 3\r
497	db 1,cntlb1,M_MPBT ;No MP Mode, X16\r
498	db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
499	db 0\r
500	endif\r
d6829fd3	501	\r
d6829fd3 L	502	;--------------------------------------------------------------\r
	503	\r
	504	dseg\r
6dd88c25	505	asci0_ista:\r
d6829fd3 L	506	push ix\r
	507	ld ix,s0.inbuf ;\r
	508	call ff_empty\r
	509	pop ix\r
	510	ret\r
	511	\r
	512	;--------------------------------------------------------------\r
	513	\r
6dd88c25	514	asci1_ista:\r
d6829fd3 L	515	push ix\r
	516	ld ix,s1.inbuf ;\r
	517	call ff_empty\r
	518	pop ix\r
	519	ret\r
	520	\r
	521	;--------------------------------------------------------------\r
	522	; Get an input character\r
	523	\r
2f8aa307 L	524	if 0\r
	525	asci0_inp:\r
	526	push ix\r
	527	ld ix,s0.inbuf ;\r
	528	call ff_cnt\r
	529	cp 32\r
	530	jr nc,a0i_1\r
	531	di\r
	532	in0 a,(cntla0)\r
	533	res RTS0,a\r
	534	set EFR,a\r
	535	out0 (cntla0),a\r
	536	ei\r
	537	a0i_1:\r
	538	call ff_get\r
	539	pop ix\r
	540	ret\r
	541	endif\r
	542	\r
	543	\r
6dd88c25	544	asci0_inp:\r
d6829fd3 L	545	push ix\r
d6829fd3 L	546	ld ix,s0.inbuf ;\r
81ba3c84	547	call ff_gech\r
3134af6c L	548	ld a,b ;remaining chrs in buffer\r
	549	cp s0.rx_len/4 ; < 32?\r
	550	jr nc,a0i_1 ; no, just get char\r
	551	bit CRTS_IFLOW,(ix+oint.fflags) ; yes, enable RTS if needed\r
	552	jr z,a0i_1 ; no needed\r
	553	di ; needed, enable\r
b8ad769f	554	in0 a,(cntla0)\r
46c2044d L	555	and ~M_RTS0 ;assert RTS\r
46c2044d L	556	or M_EFR ;don't reset error flags\r
b8ad769f	557	ei\r
46c2044d	558	out0 (cntla0),a\r
b8ad769f	559	a0i_1:\r
81ba3c84	560	ld a,c\r
d6829fd3 L	561	pop ix\r
	562	ret\r
	563	\r
	564	;--------------------------------------------------------------\r
	565	; Get an input character\r
	566	\r
6dd88c25	567	asci1_inp:\r
d6829fd3 L	568	push ix\r
d6829fd3 L	569	ld ix,s1.inbuf ;\r
81ba3c84	570	call ff_gech\r
3134af6c L	571	ld a,b ; remaining chars in buffer\r
	572	cp s0.rx_len/4 ; == 25% full?\r
	573	jr nz,a1i_2 ; no, just get char\r
	574	bit IXOFF,(ix+oint.fflags) ; XON/XOFF on input?\r
	575	jr z,a1i_2 ; no\r
	576	; di\r
	577	a1i_1: in0 a,(stat1) ; status reg ASCI1\r
	578	bit TDRE,a ; Transmitter Data Reg. empty?\r
	579	jr z,a1i_1 ; no, wait\r
	580	ld a,11h ; DC1/XON\r
	581	out0 (tdr1),a ; send out\r
	582	; ei\r
	583	a1i_2:\r
	584	ld a,c ; get back the char\r
d6829fd3 L	585	pop ix\r
	586	ret\r
	587	\r
	588	;--------------------------------------------------------------\r
	589	; Output status\r
	590	\r
6dd88c25	591	asci0_osta:\r
d6829fd3 L	592	push ix\r
	593	ld ix,s0.outbuf ;\r
	594	call ff_full\r
	595	pop ix\r
	596	ret\r
	597	\r
	598	;--------------------------------------------------------------\r
	599	; Output status\r
	600	\r
6dd88c25	601	asci1_osta:\r
d6829fd3 L	602	push ix\r
	603	ld ix,s1.outbuf ;\r
	604	call ff_full\r
	605	pop ix\r
	606	ret\r
	607	\r
	608	;--------------------------------------------------------------\r
	609	; put character in c in buffer\r
	610	; destroys hl, bc\r
	611	; returns output char in a\r
	612	\r
6dd88c25	613	asci0_out:\r
d6829fd3 L	614	push ix ;\r
d6829fd3 L	615	ld ix,s0.outbuf ;\r
81ba3c84 L	616	call ff_puth\r
81ba3c84 L	617	pop ix ;\r
d6829fd3 L	618	di ;\r
	619	in0 c,(stat0) ;\r
	620	set TIE,c ;\r
	621	out0 (stat0),c ;\r
	622	ei ;\r
d6829fd3 L	623	ret\r
	624	\r
	625	;--------------------------------------------------------------\r
	626	; put character in c in buffer\r
	627	; destroys hl, bc\r
	628	; returns output char in a\r
	629	\r
6dd88c25	630	asci1_out:\r
d6829fd3 L	631	push ix ;\r
d6829fd3 L	632	ld ix,s1.outbuf ;\r
81ba3c84 L	633	call ff_puth\r
81ba3c84 L	634	pop ix ;\r
d6829fd3 L	635	di ;\r
	636	in0 c,(stat1) ;\r
	637	set TIE,c ;\r
	638	out0 (stat1),c ;\r
	639	ei ;\r
d6829fd3 L	640	ret\r
	641	\r
	642	\r
6dd88c25 L	643	;--------------------------------------------------------------\r
	644	\r
	645	cseg\r
	646	rtxisvjmp0:\r
	647	call isv_sw\r
5d7663e1 L	648	dw asci0_int\r
5d7663e1 L	649	\r
6dd88c25 L	650	rtxisvjmp1:\r
6dd88c25 L	651	call isv_sw\r
5d7663e1	652	dw asci1_int\r
6dd88c25 L	653	\r
6dd88c25 L	654	;--------------------------------------------------------------\r
5d7663e1 L	655	; ASCI 0/1 Transmit/Receive interupt routines\r
	656	\r
	657	.lall\r
	658	asci_int macro dev\r
3134af6c	659	local rxi_2,rxi_3,rxi_4\r
d6829fd3	660	\r
46c2044d	661	push ix\r
5d7663e1 L	662	rxtxi&dev&_lp0:\r
	663	ld ix,s&dev&.inbuf ;\r
	664	rxtxi&dev&_lp1:\r
	665	in0 a,(stat&dev) ;receive flag set?\r
	666	jp p,txi&dev ;RDRF == Bit 7\r
6dd88c25 L	667	and M_OVRN+M_PERR+M_FE\r
6dd88c25 L	668	ld e,a\r
81ba3c84	669	\r
5d7663e1	670	in0 a,(asext&dev)\r
46c2044d L	671	and M_BREAK\r
	672	or e\r
	673	ld e,a\r
d6829fd3	674	\r
5d7663e1	675	in0 d,(cntla&dev) ;\r
b8ad769f	676	res EFR,d ;\r
5d7663e1	677	out0 (cntla&dev),d\r
d6829fd3	678	\r
3134af6c	679	ld c,(ix+o.in_idx) ;input buffer pointer\r
d6829fd3	680	ld b,0\r
5d7663e1	681	ld hl,s&dev&.inbuf ;\r
d6829fd3	682	add hl,bc\r
6dd88c25	683	\r
3134af6c	684	in0 a,(rdr&dev) ;get char\r
b8ad769f	685	ld (hl),a\r
6dd88c25 L	686	;todo: break detection\r
	687	;todo: parity, framing overrun error\r
	688	\r
1c7e3963	689	ld e,(ix+oint.fflags)\r
6dd88c25	690	\r
5d7663e1	691	rxi_2:\r
46c2044d L	692	\r
	693	ld a,c ;increment buffer in pointer\r
	694	inc a ;\r
81ba3c84 L	695	ld b,(ix+o.mask) ;\r
81ba3c84 L	696	and b ;\r
b8ad769f	697	ld c,a\r
81ba3c84 L	698	\r
81ba3c84 L	699	sub (ix+o.out_idx) ;\r
5d7663e1	700	jr z,rxtxi&dev&_lp1 ;skip if buffer is full\r
6dd88c25	701	\r
3134af6c	702	ld (ix+o.in_idx),c ;input buffer pointer\r
6dd88c25	703	\r
81ba3c84 L	704	jr nc,$+3 ;\r
81ba3c84 L	705	adc b ;\r
6dd88c25	706	\r
5d7663e1 L	707	cp s&dev&.tx_len*3/4\r
5d7663e1 L	708	jr c,rxi&dev&_noflow\r
6dd88c25	709	\r
5d7663e1	710	if dev=0\r
6dd88c25	711	bit CRTS_IFLOW,e\r
5d7663e1	712	jr z,rxi_4\r
6dd88c25 L	713	\r
	714	set EFR,d\r
	715	set RTS0,d ;RTS inactive\r
5d7663e1 L	716	out0 (cntla&dev),d ;\r
5d7663e1 L	717	endif\r
3134af6c L	718	if dev=1\r
	719	bit IXOFF,e\r
	720	jr z,rxi_4\r
	721	\r
	722	; di\r
	723	rxi_3: in0 a,(stat&dev) ; status reg ASCI1\r
	724	bit TDRE,a ; Transmitter Data Reg. empty?\r
	725	jr z,rxi_3 ; no, wait\r
	726	ld a,DC3 ; DC3/XOFF\r
	727	out0 (tdr&dev),a ; send out\r
	728	; ei\r
	729	endif\r
6dd88c25	730	\r
5d7663e1	731	rxi_4:\r
3134af6c L	732	; bit IXOFF,e\r
3134af6c L	733	; jr z,rxtxi&dev&_lp1\r
6dd88c25	734	;todo: send XOFF\r
5d7663e1 L	735	rxi&dev&_noflow:\r
5d7663e1 L	736	jr rxtxi&dev&_lp1\r
81ba3c84	737	\r
d6829fd3	738	\r
5d7663e1	739	txi&dev:\r
6dd88c25	740	ld e,a\r
46c2044d	741	bit TDRE,e ;TX int?\r
5d7663e1 L	742	jr z,rxtxi&dev&_exit\r
	743	\r
	744	;todo: xon/xoff\r
	745	\r
	746	ld hl,s&dev&.outbuf+o.in_idx ;[in]\r
	747	ld a,(hl) ;\r
	748	inc hl ;[out]\r
	749	ld c,(hl) ;\r
	750	cp c ;\r
	751	jr z,txi&dev&_empty ;\r
	752	inc hl ;fifo base\r
	753	ld b,0 ;\r
	754	add hl,bc ;\r
	755	ld a,(hl) ;\r
	756	out0 (tdr&dev),a ;\r
	757	inc c ;\r
	758	ld a,(s&dev&.outbuf+o.mask) ;\r
	759	and c ;\r
	760	ld (s&dev&.outbuf+o.out_idx),a ;\r
d6829fd3	761	\r
5d7663e1	762	jr rxtxi&dev&_lp0\r
81ba3c84	763	\r
5d7663e1	764	txi&dev&_empty:\r
d6829fd3	765	res TIE,e ;disable tx-int\r
5d7663e1	766	out0 (stat&dev),e ; 5\r
46c2044d	767	\r
5d7663e1	768	rxtxi&dev&_exit:\r
d6829fd3 L	769	pop ix\r
d6829fd3 L	770	ret\r
5d7663e1	771	endm\r
d6829fd3 L	772	\r
d6829fd3 L	773	dseg\r
5d7663e1 L	774	;--------------------------------------------------------------\r
5d7663e1 L	775	; ASCI 0 Transmit/Receive interupt routines\r
d6829fd3	776	\r
5d7663e1 L	777	asci0_int:\r
5d7663e1 L	778	asci_int 0\r
d6829fd3	779	\r
5d7663e1 L	780	;--------------------------------------------------------------\r
5d7663e1 L	781	; ASCI 1 Transmit/Receive interupt routines\r
d6829fd3	782	\r
5d7663e1 L	783	asci1_int:\r
5d7663e1 L	784	asci_int 1\r
d6829fd3 L	785	\r
d6829fd3 L	786	end\r