Initial XON/XOFF input control (Holm. T)

diff --git a/cbios/ascii.180 b/cbios/ascii.180
index fbe193d768f6f0b6a9ea99006419045a9fd69c60..0a2fd6f170aad76de7ef19052ebb9d86e7da3d65 100644 (file)
--- a/cbios/ascii.180
+++ b/cbios/ascii.180
@@ -58,7 +58,7 @@ as1_dev:
        db      0                       ;absolute device #\r
        db      1                       ;relative device\r
        db      0                       ;iflags\r
-       db      M_CREAD                 ;fflags\r
+       db      M_CREAD+M_IXOFF         ;fflags\r
        db      M_CS8                   ;cflags\r
 \r
        db      0\r
@@ -108,9 +108,8 @@ asci_ioctl:
        ld      a,b\r
        cp      1\r
        jr      nz,asioc_1\r
-       ld      a,(INIDONE)\r
-       and     80h\r
-       cp      INIDONEVAL\r
+       ld      a,(inidone)\r
+       cp      inidoneval\r
        ret     z\r
 asioc_1:\r
        push    hl\r
@@ -546,12 +545,12 @@ asci0_inp:
        push    ix\r
        ld      ix,s0.inbuf             ;\r
        call    ff_gech\r
-       ld      a,b\r
-       cp      s0.rx_len/4\r
-       jr      nc,a0i_1\r
-       bit     CRTS_IFLOW,(ix+oint.fflags)\r
-       jr      z,a0i_1\r
-       di\r
+       ld      a,b                     ;remaining chrs in buffer\r
+       cp      s0.rx_len/4             ; < 32?\r
+       jr      nc,a0i_1                        ; no, just get char\r
+       bit     CRTS_IFLOW,(ix+oint.fflags)     ; yes, enable RTS if needed\r
+       jr      z,a0i_1                 ; no needed\r
+       di                              ; needed, enable\r
        in0     a,(cntla0)\r
        and     ~M_RTS0                 ;assert RTS\r
        or      M_EFR                   ;don't reset error flags\r
@@ -569,6 +568,20 @@ asci1_inp:
        push    ix\r
        ld      ix,s1.inbuf             ;\r
        call    ff_gech\r
+       ld      a,b                     ; remaining chars in buffer\r
+       cp      s0.rx_len/4             ; == 25% full?\r
+       jr      nz,a1i_2                ; no, just get char\r
+       bit     IXOFF,(ix+oint.fflags)  ; XON/XOFF on input?\r
+       jr      z,a1i_2                 ; no\r
+;      di\r
+a1i_1: in0     a,(stat1)               ; status reg ASCI1\r
+       bit     TDRE,a                  ; Transmitter Data Reg. empty?\r
+       jr      z,a1i_1                 ; no, wait\r
+       ld      a,11h                   ; DC1/XON\r
+       out0    (tdr1),a                ; send out\r
+;      ei\r
+a1i_2:\r
+       ld      a,c                     ; get back the char\r
        pop     ix\r
        ret\r
 \r
@@ -643,7 +656,7 @@ rtxisvjmp1:
 \r
        .lall\r
 asci_int macro dev\r
-       local   rxi_2,rxi_4\r
+       local   rxi_2,rxi_3,rxi_4\r
 \r
        push    ix\r
 rxtxi&dev&_lp0:\r
@@ -663,20 +676,17 @@ rxtxi&dev&_lp1:
        res     EFR,d                   ;\r
        out0    (cntla&dev),d\r
 \r
-       ld      c,(ix+o.in_idx)         ;\r
+       ld      c,(ix+o.in_idx)         ;input buffer pointer\r
        ld      b,0\r
        ld      hl,s&dev&.inbuf         ;\r
        add     hl,bc\r
 \r
-       in0     a,(rdr&dev)             ;\r
+       in0     a,(rdr&dev)             ;get char\r
        ld      (hl),a\r
                                        ;todo: break detection\r
                                        ;todo: parity, framing overrun error\r
 \r
        ld      e,(ix+oint.fflags)\r
-       bit     IXON,e\r
-       jr      z,rxi_2\r
-                                       ;todo: test XON/XOFF\r
 \r
 rxi_2:\r
 \r
@@ -689,7 +699,7 @@ rxi_2:
        sub     (ix+o.out_idx)          ;\r
        jr      z,rxtxi&dev&_lp1        ;skip if buffer is full\r
 \r
-       ld      (ix+o.in_idx),c         ;\r
+       ld      (ix+o.in_idx),c         ;input buffer pointer\r
 \r
        jr      nc,$+3                  ;\r
         adc    b                       ;\r
@@ -705,12 +715,23 @@ rxi_2:
        set     RTS0,d                  ;RTS inactive\r
        out0    (cntla&dev),d           ;\r
    endif\r
+   if dev=1\r
+       bit     IXOFF,e\r
+       jr      z,rxi_4\r
+\r
+;      di\r
+rxi_3: in0     a,(stat&dev)            ; status reg ASCI1\r
+       bit     TDRE,a                  ; Transmitter Data Reg. empty?\r
+       jr      z,rxi_3                 ; no, wait\r
+       ld      a,DC3                   ; DC3/XOFF\r
+       out0    (tdr&dev),a             ; send out\r
+;      ei\r
+   endif\r
 \r
 rxi_4:\r
-       bit     IXOFF,e\r
-       jr      z,rxtxi&dev&_lp1\r
+;      bit     IXOFF,e\r
+;      jr      z,rxtxi&dev&_lp1\r
                                        ;todo: send XOFF\r
-\r
 rxi&dev&_noflow:\r
        jr      rxtxi&dev&_lp1\r
 \r

diff --git a/cbios/ioctl.inc b/cbios/ioctl.inc
index 8d1f303b9db477770013caa9c87538a9227f1452..b2797f2690f2efdc08093f5626c5db27178752de 100644 (file)
--- a/cbios/ioctl.inc
+++ b/cbios/ioctl.inc
@@ -102,3 +102,6 @@ TIOCM_CD    equ     010h            ;DCD (data carrier detect)
 TIOCM_RI       equ     020h            ;RNG (ring)\r
 TIOCM_DSR      equ     040h            ;DSR (data set ready)\r
 TIOCM_OUT1     equ     080h            ;\r
+
+DC1            equ     011h            ; DC1/XON
+DC3            equ     013h            ; DC3/XOFF