z180/asci-p.180

   1         page    200
   2
   3         extrn   ioiniml
   4
   5         global  as0init
   6         global  as0ista,as0inp
   7         global  as0osta,as0out
   8         global  as1init
   9         global  as1ista,as1inp
  10         global  as1osta,as1out
  11
  12         include config.inc
  13         include z180reg.inc
  14
  15
  16 ;-----------------------------------------------------
  17 ;
  18 ;
  19 ; TC = (f PHI /(2*baudrate*Clock_mode)) - 2
  20 ;
  21 ; TC = (f PHI / (32 * baudrate)) - 2
  22 ;
  23
  24         cseg
  25 ;
  26 ; Init Serial I/O for console input and output (ASCI1)
  27 ;
  28
  29
  30
  31 as0init:
  32         ld      hl,initab0
  33         jp      ioiniml
  34
  35 as1init:
  36         ld      hl,initab1
  37         jp      ioiniml
  38
  39
  40         ld      a,M_MPBT
  41         out0    (cntlb1),a
  42         ld      a,M_RE + M_TE + M_MOD2  ;Rx/Tx enable
  43         out0    (cntla1),a
  44         ld      a,M_RIE
  45         out0    (stat1),a       ;Enable rx interrupts
  46
  47         ret                     ;
  48
  49
  50 initab0:
  51         db      1,stat0,0               ;Disable rx/tx interrupts
  52                                         ;Enable baud rate generator
  53         db      1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS
  54         db      2,astc0l,low 28, high 28
  55         db      1,cntlb0,M_MPBT         ;No MP Mode, X16
  56         db      1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1
  57         db      0
  58
  59 initab1:
  60         db      1,stat1,0               ;Disable rx/tx ints, disable CTS1
  61         db      1,asext1,M_BRGMOD       ;Enable baud rate generator
  62         db      2,astc1l,low 3, high 3
  63         db      1,cntlb1,M_MPBT         ;No MP Mode, X16
  64         db      1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1
  65         db      0
  66
  67
  68
  69 as0ista:
  70         in0     a,(stat0)
  71         and     M_RDRF
  72         ret     z
  73         or      0ffh
  74         ret
  75
  76 as1ista:
  77         in0     a,(stat1)
  78         and     M_RDRF
  79         ret     z
  80         or      0ffh
  81         ret
  82
  83
  84 as0inp:
  85         in0     a,(stat0)
  86         rlca
  87         jr      nc,as0inp
  88         in0     a,rdr0
  89         ret
  90
  91 as1inp:
  92         in0     a,(stat1)
  93         rlca
  94         jr      nc,as1inp
  95         in0     a,rdr1
  96         ret
  97
  98
  99
 100 as0osta:
 101         in0     a,(stat0)
 102         and     M_TDRE
 103         ret     z
 104         or      0ffh
 105         ret
 106
 107 as1osta:
 108         in0     a,(stat1)
 109         and     M_TDRE
 110         ret     z
 111         or      0ffh
 112         ret
 113
 114
 115 as0out:
 116         in0     a,(stat0)
 117         and     M_TDRE
 118         jr      z,as0out
 119         out0    (tdr0),c
 120         ld      a,c
 121         ret
 122
 123 as1out:
 124         in0     a,(stat1)
 125         and     M_TDRE
 126         jr      z,as1out
 127         out0    (tdr1),c
 128         ld      a,c
 129         ret
 130
 131         end
 132
 133