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Enable X2 Clock Multiplier, disable Clock Divider
[z180-stamp.git] / z180 / r3init.180
1 page 255
2 .z80
3
4 extrn ddtz,bpent
5 extrn $stack
6 extrn $coninit,$cists,$ci
7
8 extrn romend
9
10
11 global isv_sw
12
13 include config.inc
14 include z180reg.inc
15 include z180.lib
16
17 ;CR equ 0dh
18
19
20
21 ;----------------------------------------------------------------------
22
23 cseg
24
25 jp start
26
27 ; restart vectors
28
29 rsti defl 1
30 rept 7
31 db 0, 0, 0, 0, 0
32 jp bpent
33 rsti defl rsti+1
34 endm
35
36 ;----------------------------------------------------------------------
37
38 if ROMSYS
39 $crom: defb c$rom ;
40 else
41 db 0 ;
42 endif
43
44 dmclrt: ;clear ram per dma
45 db dmct_e-dmclrt-2 ;
46 db sar0l ;first port
47 dw nullbyte ;src (fixed)
48 nullbyte:
49 db 000h ;src
50 dw romend ;dst (inc), start after "rom" code
51 db 00h ;dst
52 dw 0-romend ;count (64k)
53 dmct_e:
54
55 INIWAITS defl CWAITIO
56 if ROMSYS
57 INIWAITS defl INIWAITS+CWAITROM
58 endif
59
60 hwini0:
61 db 3 ;count
62 db rcr,CREFSH ;configure DRAM refresh
63 db dcntl,INIWAITS ;wait states
64 db cbar,SYS$CBAR
65
66 ;----------------------------------------------------------------------
67
68 start:
69 push af ;003c
70 in0 a,(itc) ;003d Illegal opcode trap?
71 jp p,??st01 ;0040
72 pop af ;0043
73 jp bpent ;0044 yes, handle
74
75 ??st01:
76 ld a,i ;0047 I register == 0 ?
77 jr z,??st02 ;004b yes, harware reset
78 pop af ;004d
79 jp bpent ;004e no, allready set up
80
81 ??st02:
82 di ;0058
83 ld a,CREFSH
84 out0 (rcr),a ; configure DRAM refresh
85 ld a,CWAITIO
86 out0 (dcntl),a ; wait states
87
88 ld a,M_NCD ;No Clock Divide
89 out0 (ccr),a
90 ld a,M_X2CM ;X2 Clock Multiplier
91 out0 (cmr),a
92
93 ; search warm start mark
94
95 ld ix,mark_55AA ;00b8 ; top of common area
96 ld a,SYS$CBAR ;
97 out0 (cbar),a ;
98 ld a,071h ;00bc
99 ex af,af' ;00be ;for cbr = 0x70 downto 0x40
100 swsm_l:
101 ex af,af' ;00bf
102 dec a ;00c0
103 cp 03fh ;00c1
104 jr z,kstart ;00c3 ; break (mark not found)
105 out0 (cbr),a ;00c5
106 ex af,af' ;00c8
107 ld a,0aah ;00c9
108 cp (ix+000h) ;00cb
109 jr nz,swsm_l ;00ce
110 cp (ix+002h) ;00d0
111 jr nz,swsm_l ;00d3
112 cpl ;00d5
113 cp (ix+001h) ;00d6
114 jr nz,swsm_l ;00d9
115 cp (ix+003h) ;00db
116 jr nz,swsm_l ;00de
117 ld sp,$stack ;00e0 mark found, check
118 call checkcrc_alv ;00e3
119 jp z,wstart ;00e6 check ok,
120
121 ;
122 ; ram not ok, initialize -- kstart --
123
124 kstart:
125
126 ld a,088h ;00e9 0000-7fff: common 0
127 out0 (cbar),a ;00eb 8000-ffff: common 1
128 ld ix,08000h ;00f3
129 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)
130 ??f_0:
131 out0 (cbr),a ;00f9
132
133 ld (ix+0),a ;0103
134 cpl
135 ld (ix+1),a ;0103
136 cpl
137 add a,8 ;010a next 'bank'
138 cp 078h ;010c stop at 078000
139 jr nz,??f_0 ;010e
140
141 ld de,8000h ;0114 first block not tested, but mark as ok
142 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)
143 ??cp_0:
144 out0 (cbr),a ;011c
145 ld c,a
146 xor (ix+0)
147 ld b,a
148 ld a,c
149 cpl
150 xor (ix+1)
151 or b
152 jr nz,??cp_1
153 scf
154 ??cp_1:
155 rr d
156 rr e
157 ld a,c
158 add a,8
159 cp 078h ; stop at 078000
160 jr nz,??cp_0
161
162 ;
163 ; ram test found 1 or more error free blocks (32k)
164 ;
165
166 ramok:
167 ld a,SYS$CBAR ;01c8
168 out0 (cbar),a ;01ca
169 ld h,d
170 ld l,e
171 ld c,070h ;01ce highest block
172 ld b,15 ;01d0
173 ??sr_1:
174 add hl,hl
175 jr c,alloc ;01d4 highest "error free" block
176 ld a,c ;01d6
177 sub 008h ;01d7
178 ld c,a ;01d9
179 djnz ??sr_1 ;01da
180
181 slp ;01dc should never be reached
182
183 alloc:
184 out0 (cbr),c ;01de
185 ld sp,$stack ;01e1
186
187 ; Clear RAM using DMA0
188
189 ld hl,dmclrt ;load DMA registers
190 call io.ini.m
191 ld a,0cbh ;01ef dst +1, src fixed, burst
192 out0 (dmode),a ;01f1
193
194 ld b,512/64
195 ld a,062h ;01f4 enable dma0,
196 ??cl_1:
197 out0 (dstat),a ;01f9 clear (up to) 64k
198 djnz ??cl_1 ; end of RAM?
199
200 ; Init bank manager
201
202 ld hl,banktabsys ;020f
203 ld (hl),c ; Common area
204 inc hl ;0213
205 ld (hl),c ; System work area
206 inc hl ;0215 Point to bank 0 entry
207 ld b,BANKS ;0216
208 l0218h:
209 ld (hl),0ffh ;0218 Mark all banks as unassigned
210 inc hl ;021a
211 djnz l0218h ;021b
212
213 ld hl,memalv ;
214 ld b,8 ; 8*4k ie. first 32k
215 ??a_0:
216 ld (hl),0e0h ; mark as sys ("rom"/monitor)
217 inc hl
218 djnz ??a_0
219
220 rr d ; shift out bit for block 0
221 rr e ;
222 ld c,15 ;022c 15*32k remaining blocks
223 l022eh:
224 ld a,0feh ; 0xfe == block with error(s)
225 rr d ;
226 rr e
227 adc a,0 ; ==> 0xff : block ok
228 ld b,32/4 ; 32k == 8 * 4k
229 l0236h:
230 ld (hl),a ;
231 inc hl ;
232 djnz l0236h ;
233 dec c ;
234 jr nz,l022eh ;next 32k block
235
236 ld hl,memalv+0ch ;memalv+0ch
237 ld a,(banktabsys) ;
238 call add_hl_a
239 ld b,3 ;
240 l024ah:
241 ld (hl),0ech ;alloc system ram
242 inc hl ;
243 djnz l024ah ;
244 ld (hl),0efh ;alloc common
245 call gencrc_alv
246
247 ld hl,0000h ;bank #
248 ld bc,0f0fh ; size (?) (4k blocks)
249 xor a ;
250 call sub_0420h ;alloc mem for bank 0
251 ld c,l ;
252 or a ;
253 call z,sub_04b5h ;
254
255 ld hl,0101h ;
256 ld bc,0f0fh ;
257 xor a ;
258 call sub_0420h ;
259 ld c,l ;
260 or a ;
261 call z,sub_04b5h ;
262
263 ld hl,055AAh ;set warm start mark
264 ld (mark_55AA),hl ;
265 ld (mark_55AA+2),hl;
266
267 ;
268 ; crc ok -- wstart --
269 ;
270 wstart:
271 call sysram_init ;027f
272 call ivtab_init
273
274 call prt0_init
275
276
277 ;;; call bufferinit
278
279
280 call $coninit
281
282
283
284
285 im 2 ;?030e
286 ei ;0282
287
288 call $cists ;0284
289 call $cists ;0287
290 or a ;028a
291 call nz,$ci ;028d
292
293 ld a,(banktab) ;
294 ld e,a ;
295 jp ddtz ;0290
296
297
298 ;
299 ;----------------------------------------------------------------------
300 ;
301
302 ;TODO: Make a ringbuffer module.
303
304 global buf.init
305
306 buf.init:
307 ld (ix+o.in_idx),0
308 ld (ix+o.out_idx),0
309 ld (ix+o.mask),a
310 ret
311
312 ;----------------------------------------------------------------------
313
314 .comment *
315
316 extrn msginit,msg.sout,msg_fifo
317 extrn tx.buf,rx.buf
318
319
320 bufferinit:
321 call msginit
322
323 ld hl,buffers
324 ld bc,0300h
325 bfi_1:
326 ld e,(hl)
327 inc hl
328 ld d,(hl)
329 inc hl
330 push hl
331 in0 a,cbr
332 call log2phys
333 ld (bufdat+1),hl
334 ld (bufdat+3),a
335 ld a,c
336 ld (bufdat+0),a
337 ld hl,inimsg
338 call msg.sout
339 pop hl
340 inc c
341 djnz bfi_1
342 ret
343
344 rept 20
345 db 0
346 endm
347
348 buffers:
349 dw msg_fifo
350 dw tx.buf
351 dw rx.buf
352
353 inimsg:
354 db inimsg_e - $ -2
355 db PMSG
356 db 81h
357 db inimsg_e - $ -1
358 db 0
359 bufdat:
360 db 0
361 dw 0
362 db 0
363 inimsg_e:
364
365 *
366
367 ;
368 ;----------------------------------------------------------------------
369 ;
370
371 sysram_init:
372 ld hl,sysramw
373 ld de,topcodsys
374 ld bc,sysrame-sysramw
375 ldir
376
377 ret
378
379 ;----------------------------------------------------------------------
380
381 ivtab_init:
382 ld hl,ivtab ;
383 ld a,h ;
384 ld i,a ;
385 out0 (il),l ;
386
387 ; Let all vectors point to spurious int routines.
388
389 ld d,high sp.int0
390 ld a,low sp.int0
391 ld b,9
392 ivt_i1:
393 ld (hl),a
394 inc l
395 ld (hl),d
396 inc l
397 add a,sp.int.len
398 djnz ivt_i1
399 ret
400
401 ;----------------------------------------------------------------------
402
403 prt0_init:
404 ld a,i
405 ld h,a
406 in0 a,(il)
407 and 0E0h
408 or IV$PRT0
409 ld l,a
410 ld (hl),low iprt0
411 inc hl
412 ld (hl),high iprt0
413 ld hl,prt0itab
414 call io.ini.m
415 ret
416
417 prt0itab:
418 db prt0it_e-prt0itab-2
419 db tmdr0l
420 dw PRT_TC10MS
421 dw PRT_TC10MS
422 db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.
423 prt0it_e:
424
425
426 ;
427 ;----------------------------------------------------------------------
428 ;
429
430 io.ini:
431 push bc
432 ld b,0 ;high byte port adress
433 ld a,(hl) ;count
434 inc hl
435 ioi_1:
436 ld c,(hl) ;port address
437 inc hl
438 outi
439 inc b ;outi decrements b
440 dec a
441 jr nz,ioi_1
442 pop bc
443 ret
444
445 io.ini.m:
446 push bc
447 ld b,(hl)
448 inc hl
449 ld c,(hl)
450 inc hl
451 otimr
452 pop bc
453 ret
454
455 io.ini.l:
456 ;
457
458 ;----------------------------------------------------------------------
459 ;
460
461 ; compute crc
462 ; hl: start adr
463 ; bc: len
464 ; bc returns crc val
465
466 do_crc16:
467 ld de,0FFFFh
468 crc1:
469 ld a,(hl)
470 xor e
471 ld e,a
472 rrca
473 rrca
474 rrca
475 rrca
476 and 0Fh
477 xor e
478 ld e,a
479 rrca
480 rrca
481 rrca
482 push af
483 and 1Fh
484 xor d
485 ld d,a
486 pop af
487 push af
488 rrca
489 and 0F0h
490 xor d
491 ld d,a
492 pop af
493 and 0E0h
494 xor e
495 ld e,d
496 ld d,a
497 cpi
498 jp pe,crc1
499 or e ;z-flag
500 ret
501
502
503 gencrc_alv:
504 push hl ;03f6
505 push de ;03f7
506 push bc
507 push af ;03f8
508 ld hl,banktabsys ;03f9
509 ld bc,crc_len ;03fc
510 call do_crc16 ;03ff
511 ld (hl),e
512 inc hl
513 ld (hl),d
514 pop af ;0406
515 pop bc
516 pop de ;0407
517 pop hl ;0408
518 ret ;0409
519
520 checkcrc_alv:
521 push hl ;040a
522 push de
523 push bc ;040b
524 ld hl,banktabsys ;040d
525 ld bc,crc_len+2 ;0410
526 call do_crc16 ;0413
527 pop bc ;041d
528 pop de
529 pop hl ;041e
530 ret ;041f
531
532 ;----------------------------------------------------------------------
533
534 ;
535 ; alloc
536 ;
537 ; h: max bank #
538 ; l: min bank #
539 ; b: max size
540 ; c: min size
541 ;
542 ; ret:
543 ; a: 0 == ok
544 ; 1 ==
545 ; 2 == no bank # in requested range
546 ; ff == crc error
547 ;
548
549 sub_0420h:
550 call checkcrc_alv ;0420
551 jr nz,l049ch ;0424 crc error, tables corrupt
552
553 call sub_049dh ;0427 bank # in req. range available?
554 jr c,l0499h ;042a
555 push ix ;042c
556 push iy ;042e
557 push de ;0430
558 push hl ;0431
559 push bc ;0432
560 ld c,b ;0433
561 ld b,alv_len+1 ;0434
562 ld d,0 ;0436
563 ld hl,memalv-1 ;0438
564 jr l0441h ;043b
565
566 ; find free blocks
567
568 l043dh:
569 ld a,(hl) ;043d
570 inc a ;043e free blocks are marked 0ffh
571 jr z,l0446h ;043f
572 l0441h:
573 inc hl ;0441
574 djnz l043dh ;0442
575 jr l0464h ;0444
576 l0446h:
577 push hl ;0446
578 pop ix ;0447 free blocks start here
579 ld e,000h ;0449
580 jr l0451h ;044b
581 l044dh: ; count free blocks
582 ld a,(hl) ;044d
583 inc a ;044e
584 jr nz,l0457h ;044f
585 l0451h:
586 inc e ;0451
587 inc hl ;0452
588 djnz l044dh ;0453
589 jr l0464h ;0455
590
591 ; end of free blocks run.
592
593 l0457h:
594 ld a,d ;0457
595 cp e ;0458 nr of blocks >= requested ?
596 jr nc,l0441h ;0459
597
598 ld d,e ;045b
599 push ix ;045c
600 pop iy ;045e
601 ld a,d ;0460
602 cp c ;0461
603 jr c,l0441h ;0462
604 l0464h:
605 pop bc ;0464
606 ld a,d ;0465
607 cp b ;0466
608 jr c,l046ch ;0467
609 ld d,b ;0469
610 jr l0471h ;046a
611 l046ch:
612 cp c ;046c
613 jr nc,l0471h ;046d
614 ld d,000h ;046f
615 l0471h:
616 ld a,d ;0471
617 push iy ;0472
618 pop hl ;0474
619 ld de,memalv ;0475
620 or a ;0478
621 sbc hl,de ;0479
622 ld b,l ;047b
623 ld c,a ;047c
624 pop hl ;047d
625 l047eh:
626 or a ;047e
627 jr z,l0489h ;047f
628 ld (iy+0),l ;0481
629 inc iy ;0484
630 dec a ;0486
631 jr l047eh ;0487
632 l0489h:
633 pop de ;0489
634 pop iy ;048a
635 pop ix ;048c
636 call gencrc_alv ;048e
637 ld a,c ;0491
638 or a ;0492
639 ld a,000h ;0493
640 ret nz ;0495
641 or 001h ;0496
642 ret ;0498
643
644 l0499h:
645 ld a,2 ;0499
646 l049ch:
647 or a
648 ret ;049c
649
650
651 ; search a free bank number in range
652 ; h: max #
653 ; l: min #
654 ; ret:
655 ; l: bank number available
656 ; nc, if found, bank nr. in l
657 ; cy, if none found
658
659 sub_049dh:
660 push de ;049d
661 push bc ;049e
662 ex de,hl ;049f
663 dec e ;04a0
664 l04a1h:
665 inc e ;04a1 test next #
666 ld a,d ;04a2
667 cp e ;04a3
668 jr c,l04b1h ;04a4
669 ld a,e ;04a6
670 ld hl,memalv ;04a7
671 ld bc,alv_len ;04aa
672 cpir ;04ad bank# allready allocated?
673 jr z,l04a1h ;04af if yes, search for next
674 l04b1h:
675 ex de,hl ;04b1
676 pop bc ;04b2
677 pop de ;04b3
678 ret ;04b4
679
680
681 sub_04b5h:
682 ld a,l ;04b5
683 cp 012h ;04b6
684 ccf ;04b8
685 ret c ;04b9
686 push hl ;04ba
687 ld hl,banktab ;04bb
688 call add_hl_a
689 ld (hl),b ;04c3
690 call gencrc_alv ;04c4
691 pop hl ;04c7
692 or a ;04c8 clear carry
693 ret ;04c9
694
695
696 ;--------------------------------------------------------------
697 ;
698 ; de: Log. Address
699 ; a: Bank number
700 ;
701 ;out ahl: Phys. (linear) Address
702
703
704 bnk2phys:
705 push hl
706 ld hl,banktab
707 call add_hl_a
708 ld a,(hl)
709 pop hl
710
711 ; fall thru
712 ;--------------------------------------------------------------
713 ;
714 ; de: Log. Address
715 ; a: Bank (bbr)
716 ;
717 ; OP: ahl = (a<<12) + (d<<8) + e
718 ;
719 ;out ahl: Phys. (linear) Address
720
721
722 log2phys:
723 push bc ;
724 ld c,a ;
725 ld b,16 ;
726 mlt bc ;bc = a<<4
727 ld l,d ;
728 ld h,0 ;
729 add hl,bc ;bc + d == a<<4 + d
730 ld a,h ;
731 ld h,l ;
732 ld l,e ;
733 pop bc ;
734 ret ;
735
736
737 ;--------------------------------------------------------------
738 ;
739 ;return:
740 ; hl = hl + a
741 ; Flags undefined
742 ;
743
744 add_hl_a:
745 add a,l
746 ld l,a
747 ret nc
748 inc h
749 ret
750
751 ; ---------------------------------------------------------
752
753 sysramw:
754
755 .phase isvsw_loc
756 topcodsys:
757
758 ; Trampoline for interrupt routines in banked ram.
759 ; Switch stack pointer to "system" stack in top ram
760 ; Save cbar
761
762 isv_sw: ;
763 ex (sp),hl ; save hl, return adr in hl
764 push de ;
765 push af ;
766 ex de,hl ;
767 ld hl,0 ;
768 add hl,sp ;
769 ld a,h ;
770 cp 0f8h ;
771 jr nc,isw_1 ;
772 ld sp,$stack ;
773 isw_1:
774 push hl ;
775 in0 h,(cbar) ;
776 push hl ;
777 ld a,SYS$CBAR ;
778 out0 (cbar),a ;
779 ex de,hl ;
780 ld e,(hl) ;
781 inc hl ;
782 ld d,(hl) ;
783 ex de,hl ;
784 push bc ;
785 call jphl ;
786
787 pop bc ;
788 pop hl ;
789 out0 (cbar),h ;
790 pop hl ;
791 ld sp,hl ;
792 pop af ;
793 pop de ;
794 pop hl ;
795 ei ;
796 ret ;
797 jphl:
798 jp (hl) ;
799
800 ; ---------------------------------------------------------
801
802
803 iprt0:
804 push af
805 push hl
806 in0 a,(tcr)
807 in0 a,(tmdr0l)
808 in0 a,(tmdr0h)
809 ld a,(tim_ms)
810 inc a
811 cp 100
812 jr nz,iprt_1
813 xor a
814 ld hl,(tim_s)
815 inc hl
816 ld (tim_s),hl
817 iprt_1:
818 ld (tim_ms),a
819 pop hl
820 pop af
821 ei
822 ret
823
824 ; ---------------------------------------------------------
825
826 sp.int0:
827 ld a,0d0h
828 jr sp.i.1
829 sp.int.len equ $-sp.int0
830 ld a,0d1h
831 jr sp.i.1
832 ld a,0d2h
833 jr sp.i.1
834 ld a,0d3h
835 jr sp.i.1
836 ld a,0d4h
837 jr sp.i.1
838 ld a,0d5h
839 jr sp.i.1
840 ld a,0d6h
841 jr sp.i.1
842 ld a,0d7h
843 jr sp.i.1
844 ld a,0d8h
845 sp.i.1:
846 ; out (80h),a
847 halt
848
849 curph defl $
850 .dephase
851 sysrame:
852 .phase curph
853 tim_ms: db 0
854 tim_s: dw 0
855 .dephase
856
857 ;-----------------------------------------------------
858
859 dseg
860
861 ds 1
862 banktabsys:
863 ds 1 ;0c001h
864 ds 1 ;0c002h
865 banktab:
866 ds BANKS ;0c003h
867 memalv:
868 ds 512/4 ;Number of 4k blocks
869 alv_len equ $-memalv
870 crc_len equ $-banktabsys
871
872 crc_memalv:
873 ds 2 ;
874
875 cseg
876
877 ;.phase 0ffc0h
878 ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table
879 ;.dephase
880
881 ;.phase 0fffch
882 mark_55AA equ 0fffch
883 ;ds 4 ; 0fffch
884 ;.dephase
885
886
887 end
888
Z180 Stamp Monitor