avr/z180-serv.c

   1 /*
   2  * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include "common.h"
   8 #include <stdlib.h>
   9 #include <string.h>
  10 #include <stdbool.h>
  11 #include <util/atomic.h>
  12
  13 #include "background.h"
  14 #include "env.h"
  15 #include "ff.h"
  16 #include "serial.h"
  17 #include "z80-if.h"
  18 #include "debug.h"
  19 #include "print-utils.h"
  20 #include "z180-serv.h"
  21 #include "timer.h"
  22
  23
  24 #define DEBUG_CPM_SDIO  0       /* set to 1 to debug */
  25
  26 #define debug_cpmsd(fmt, args...)                                                           \
  27         debug_cond(DEBUG_CPM_SDIO, fmt, ##args)
  28
  29
  30
  31 /*--------------------------------------------------------------------------*/
  32
  33
  34 uint8_t z80_get_byte(uint32_t adr)
  35 {
  36         uint8_t data;
  37
  38         z80_bus_cmd(Request);
  39         data = z80_read(adr);
  40         z80_bus_cmd(Release);
  41
  42         return data;
  43 }
  44
  45
  46 /*--------------------------------------------------------------------------*/
  47
  48 struct msg_item {
  49         uint8_t fct;
  50         uint8_t sub_min, sub_max;
  51         void (*func)(uint8_t, int, uint8_t *);
  52 };
  53
  54 uint32_t msg_to_addr(uint8_t *msg)
  55 {
  56         union {
  57                 uint32_t as32;
  58                 uint8_t as8[4];
  59         } addr;
  60
  61         addr.as8[0] = msg[0];
  62         addr.as8[1] = msg[1];
  63         addr.as8[2] = msg[2];
  64         addr.as8[3] = 0;
  65
  66         return addr.as32;
  67 }
  68
  69
  70 static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
  71 {
  72         z80_memfifo_putc(fifo_msgout, 0xAE);
  73         z80_memfifo_putc(fifo_msgout, len+2);
  74         z80_memfifo_putc(fifo_msgout, func);
  75         z80_memfifo_putc(fifo_msgout, subf);
  76
  77         return 0;
  78 }
  79
  80 int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
  81 {
  82         msg_xmit_header(func, subf, len);
  83         while (len--)
  84                 z80_memfifo_putc(fifo_msgout, *msg++);
  85
  86         return 0;
  87 }
  88
  89 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
  90 {
  91         (void)len;
  92
  93         z80_memfifo_init(subf, msg_to_addr(msg));
  94 }
  95
  96
  97 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
  98 {
  99         (void)subf;
 100
 101         while (len--)
 102                 putchar(*msg++);
 103 }
 104
 105 /* echo message */
 106 void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
 107 {
 108         (void)subf;
 109
 110         /* send re-echo */
 111         msg_xmit(1, 3, len, msg);
 112 }
 113
 114 /* get timer */
 115 void do_msg_get_timer(uint8_t subf, int len, uint8_t * msg)
 116 {
 117         uint32_t time_ms = (len >= 4) ? *(uint32_t *) msg : 0;
 118
 119         time_ms = get_timer(time_ms);
 120         msg_xmit(3, subf, sizeof(time_ms), (uint8_t *) &time_ms);
 121 }
 122
 123 /* ---------------------------------------------------------------------------*/
 124
 125 #define MAX_DRIVE       4
 126 #define BLOCK_SIZE      512
 127 #define TPA_BASE        0x10000
 128 #define COMMON_BASE     0xC000
 129
 130 struct cpm_drive_s {
 131         uint8_t drv;
 132         uint8_t device;
 133         char *img_name;
 134         bool dirty;
 135         FIL fd;
 136 };
 137
 138 static uint8_t disk_buffer[BLOCK_SIZE];
 139 static struct cpm_drive_s drv_table[MAX_DRIVE];
 140 static int handle_cpm_drv_to;
 141
 142 #define f_dirty(fp) ((fp)->fs->wflag != 0)
 143
 144
 145 int cpm_drv_to(int state)
 146 {
 147         static uint32_t ts;
 148
 149         switch(state) {
 150         case 0:
 151                 break;
 152
 153         case 1:
 154                 ts = get_timer(0);
 155                 state = 2;
 156                 break;
 157
 158         case 2:
 159                 if (get_timer(ts) > 1000) {
 160                         for (uint_fast8_t i=0; i < MAX_DRIVE; i++) {
 161 //                              if (&drv_table[i].fd && f_dirty(&drv_table[i].fd)) {
 162                                 if (drv_table[i].dirty) {
 163                                         f_sync(&drv_table[i].fd);
 164                                         drv_table[i].dirty = false;
 165                                         debug_cpmsd("## %7lu f_sync: %c:\n", get_timer(0), i+'A');
 166                                 }
 167                         }
 168                         state = 0;
 169                 }
 170         }
 171         return state;
 172 }
 173
 174
 175 void msg_cpm_result(uint8_t subf, uint8_t rc, int res)
 176 {
 177         uint8_t result_msg[3];
 178
 179         if (res)
 180                 rc |= 0x80;
 181
 182         result_msg[0] = rc;
 183         result_msg[1] = res;
 184         result_msg[2] = res >> 8;
 185
 186         if (rc) {
 187                 debug_cpmsd("###%7lu  error rc: %.02x, res: %d\n", get_timer(0), rc, res);
 188         }
 189
 190         msg_xmit(2, subf, sizeof(result_msg), result_msg);
 191 }
 192
 193 /*
 194         db      2       ; disk command
 195         ds      1       ; subcommand (login/read/write)
 196         ds      1       ; @adrv (8 bits)        +0
 197         ds      1       ; @rdrv (8 bits)        +1
 198         ds      3       ; @xdph (24 bits)       +2
 199 */
 200
 201 void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg)
 202 {
 203
 204         FRESULT res = 0;
 205         uint8_t drv;
 206         char *np;
 207
 208         (void)subf;
 209
 210         if (len != 5) {     /* TODO: check adrv, rdrv */
 211                 return msg_cpm_result(subf, 0x01, res);
 212         }
 213
 214         debug_cpmsd("\n## %7lu  login: %c:\n", get_timer(0), msg[0]+'A');
 215
 216
 217         drv = msg[0];
 218         if ( drv>= MAX_DRIVE) {
 219                 return msg_cpm_result(subf, 0x02, res);
 220         }
 221
 222 /*
 223         uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
 224 */
 225
 226         if (drv_table[drv].img_name != NULL) {
 227                 debug_cpmsd("## %7lu  close: '%s'\n", get_timer(0), drv_table[drv].img_name);
 228                 f_close(&drv_table[drv].fd);
 229                 drv_table[drv].dirty = false;
 230                 free(drv_table[drv].img_name);
 231                 drv_table[drv].img_name = NULL;
 232         }
 233
 234         strcpy_P((char *)disk_buffer, PSTR("dsk0"));
 235         disk_buffer[3] = msg[0] + '0';
 236         if (((np = getenv((char*)disk_buffer)) == NULL) ||
 237                         ((drv_table[drv].img_name = strdup(np)) == NULL)) {
 238                 return msg_cpm_result(subf, 0x03, res);
 239         }
 240
 241
 242         res = f_open(&drv_table[drv].fd, drv_table[drv].img_name,
 243                         FA_WRITE | FA_READ);
 244
 245     debug_cpmsd("## %7lu   open: '%s', (env: '%s'), res: %d\n", get_timer(0),
 246                         drv_table[drv].img_name, disk_buffer, res);
 247
 248         /* send  result*/
 249         msg_cpm_result(subf, 0x00, res);
 250 }
 251
 252
 253 /*
 254         db      2       ; disk command
 255         ds      1       ; subcommand (login/read/write)
 256         ds      1       ; @adrv (8 bits)                +0
 257         ds      1       ; @rdrv (8 bits)                +1
 258         ds      2       ; @trk (16 bits)                +2
 259         ds      2       ; @sect(16 bits)                +4
 260         ds      1       ; @cnt  (8 bits)                +6
 261         ds      3       ; phys. transfer addr   +7
 262 */
 263
 264 #define ADRV    0
 265 #define RDRV    1
 266 #define TRK             2
 267 #define SEC             4
 268 #define CNT             6
 269 #define ADDR    7
 270
 271 void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg)
 272 {
 273         uint8_t drv;
 274         uint32_t addr;
 275         uint32_t pos;
 276         uint8_t secs;
 277         bool dowrite = (subf == 2);
 278         FRESULT res = 0;
 279         uint8_t rc = 0;
 280         bool buserr = 0;
 281
 282         if (len != 10) {     /* TODO: check adrv, rdrv */
 283                 return msg_cpm_result(subf, 0x01, res);
 284         }
 285
 286         drv = msg[ADRV];
 287         if ( drv>= MAX_DRIVE) {
 288                 return msg_cpm_result(subf, 0x02, res);
 289         }
 290
 291         secs = msg[CNT];
 292         addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR];
 293
 294
 295         /* TODO: tracks per sector from dpb */
 296         pos = (((uint16_t)(msg[TRK+1] << 8) + msg[TRK]) * 8
 297                         + ((uint32_t)(msg[SEC+1] << 8) + msg[SEC])) * BLOCK_SIZE;
 298
 299         debug_cpmsd("## %7lu cpm_rw: %s %c: trk:%4d, sec: %d, pos: %.8lx, secs: %2d, "
 300                         "addr: %.5lx\n", get_timer(0), dowrite ? "write" : " read",
 301                         msg[ADRV]+'A', ((uint16_t)(msg[TRK+1] << 8) + msg[TRK]), msg[SEC],
 302                         pos, msg[CNT], addr);
 303
 304         res = f_lseek(&drv_table[drv].fd, pos);
 305         while (!res && secs--) {
 306                 unsigned int cnt, br;
 307
 308                 /* check bank boundary crossing */
 309                 cnt = 0;
 310                 if (addr < (TPA_BASE + COMMON_BASE) &&
 311                                         (addr + BLOCK_SIZE) > (TPA_BASE + COMMON_BASE)) {
 312                         cnt = (TPA_BASE + COMMON_BASE) - addr;
 313                 }
 314
 315                 if (cnt) {
 316                         debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr, cnt);
 317                         debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr+cnt-TPA_BASE, BLOCK_SIZE-cnt);
 318                 }
 319
 320                 if (dowrite) {
 321                         if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
 322                                 buserr = 1;
 323                                 break;
 324                         } else {
 325                                 if (cnt) {
 326                                         z80_read_block(disk_buffer, addr, cnt);
 327                                         addr = addr + cnt - TPA_BASE;
 328                                 }
 329                                 z80_read_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt);
 330                                 z80_bus_cmd(Release);
 331                         }
 332                         res = f_write(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br);
 333                 } else {
 334                         res = f_read(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br);
 335                         if (res == FR_OK && br == BLOCK_SIZE) {
 336                                 if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
 337                                         buserr = 1;
 338                                         break;
 339                                 } else {
 340                                         if (cnt) {
 341                                                 z80_write_block(disk_buffer, addr, cnt);
 342                                                 addr = addr + cnt - TPA_BASE;
 343                                         }
 344                                         z80_write_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt);
 345                                         z80_bus_cmd(Release);
 346                                 }
 347                         }
 348                 }
 349
 350                 if (br != BLOCK_SIZE) {
 351                         debug_cpmsd("## %7lu f_read res: %d, bytes rd/wr: %u\n", get_timer(0), res, br);
 352                         dump_ram(disk_buffer, 0, 64, "Read Data");
 353                         res = -1;
 354                 }
 355
 356                 addr += BLOCK_SIZE;
 357         }
 358
 359         if (dowrite && !res) {
 360 //              res = f_sync(&drv_table[drv].fd);
 361                 drv_table[drv].dirty = true;
 362                 bg_setstat(handle_cpm_drv_to, 1);
 363         }
 364
 365
 366         if (buserr) {
 367                 debug_cpmsd("Bus timeout\n");
 368                 rc = 0x03;
 369         }
 370
 371         /* send  result*/
 372         msg_cpm_result(subf, rc, res);
 373 }
 374
 375
 376 const FLASH struct msg_item z80_messages[] =
 377 {
 378         { 0,                    /* fct nr. */
 379           1, 3,                 /* sub fct nr. from, to */
 380           do_msg_ini_memfifo},
 381         { 1,
 382           1, 1,
 383           do_msg_char_out},
 384         { 1,
 385           2, 2,
 386           do_msg_echo},
 387         { 2,
 388           0, 0,
 389           do_msg_cpm_login},
 390         { 2,
 391           1, 2,
 392           do_msg_cpm_rw},
 393         { 3,
 394           1, 1,
 395           do_msg_get_timer},
 396         { 0xff,                         /* end mark */
 397           0, 0,
 398           0},
 399
 400 };
 401
 402
 403
 404
 405 void do_message(int len, uint8_t *msg)
 406 {
 407         uint8_t fct, sub_fct;
 408         int_fast8_t i = 0;
 409
 410         if (len >= 2) {
 411                 fct = *msg++;
 412                 sub_fct = *msg++;
 413                 len -= 2;
 414
 415                 while (fct != z80_messages[i].fct) {
 416                         if (z80_messages[i].fct == 0xff) {
 417                                 DBG_P(1, "do_message: Unknown function: %i, %i\n",
 418                                                 fct, sub_fct);
 419                                 return; /* TODO: unknown message # */
 420                         }
 421
 422                         ++i;
 423                 }
 424
 425                 while (fct == z80_messages[i].fct) {
 426                         if (sub_fct >= z80_messages[i].sub_min &&
 427                                         sub_fct <= z80_messages[i].sub_max )
 428                                 break;
 429                         ++i;
 430                 }
 431
 432                 if (z80_messages[i].fct != fct) {
 433                         DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
 434                                         fct, sub_fct);
 435                         return; /* TODO: unknown message sub# */
 436                 }
 437
 438                 (z80_messages[i].func)(sub_fct, len, msg);
 439
 440
 441         } else {
 442                 /* TODO: error */
 443                 DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
 444         }
 445 }
 446
 447
 448
 449 #define CTRBUF_LEN 256
 450
 451 void check_msg_fifo(void)
 452 {
 453         int ch;
 454         static int_fast8_t state;
 455         static int msglen,idx;
 456         static uint8_t buffer[CTRBUF_LEN];
 457
 458         while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
 459                 switch (state) {
 460                 case 0:         /* wait for start of message */
 461                         if (ch == 0xAE) { /* TODO: magic number */
 462                                 msglen = 0;
 463                                 idx = 0;
 464                                 state = 1;
 465                         }
 466                         break;
 467                 case 1:         /* get msg len */
 468                         if (ch > 0 && ch <= CTRBUF_LEN) {
 469                                 msglen = ch;
 470                                 state = 2;
 471                         } else
 472                                 state = 0;
 473                         break;
 474                 case 2:         /* get message */
 475                         buffer[idx++] = ch;
 476                         if (idx == msglen) {
 477                                 do_message(msglen, buffer);
 478                                 state = 0;
 479                         }
 480                         break;
 481                 }
 482         }
 483 }
 484
 485
 486 int msg_handling(int state)
 487 {
 488         uint8_t pending;
 489
 490         ATOMIC_BLOCK(ATOMIC_FORCEON) {
 491                 pending = (Stat & S_MSG_PENDING) != 0;
 492                 Stat &= ~S_MSG_PENDING;
 493         }
 494 /*
 495  * TODO: if pending but no message chr --> special condition. ie init,...
 496  */
 497
 498         if (pending) {
 499                 switch (state) {
 500                 case 0:                 /* need init */
 501                         /* Get address of fifo_list */
 502                         z80_bus_cmd(Request);
 503                         uint32_t fifo_list = z80_read(0x40) +
 504                                 ((uint16_t) z80_read(0x41) << 8) +
 505                                 ((uint32_t) z80_read(0x42) << 16);
 506                         z80_bus_cmd(Release);
 507                         if (fifo_list != 0) {
 508                                 /* Get address of fifo 0 */
 509                                 z80_bus_cmd(Request);
 510                                 uint32_t fifo_addr = z80_read(fifo_list) +
 511                                         ((uint16_t) z80_read(fifo_list+1) << 8) +
 512                                         ((uint32_t) z80_read(fifo_list+2) << 16);
 513                                 z80_bus_cmd(Release);
 514                                 if (fifo_addr != 0) {
 515                                         z80_memfifo_init(fifo_msgin, fifo_addr);
 516                                         state = 1;
 517                                 }
 518                         }
 519                         break;
 520                 case 1:                 /* awaiting messages */
 521                         check_msg_fifo();
 522                         break;
 523                 }
 524         }
 525
 526         return state;
 527 }
 528
 529
 530 static int handle_msg_handling;
 531
 532 void setup_z180_serv(void)
 533 {
 534
 535         handle_msg_handling = bg_register(msg_handling, 0);
 536         handle_cpm_drv_to = bg_register(cpm_drv_to, 0);
 537 }
 538
 539 void restart_z180_serv(void)
 540 {
 541         z80_bus_cmd(Request);
 542         z80_write(0x40, 0);
 543         z80_write(0x41, 0);
 544         z80_write(0x42, 0);
 545         z80_bus_cmd(Release);
 546
 547         for (int i = 0; i < NUM_FIFOS; i++)
 548                 z80_memfifo_init(i, 0);
 549         bg_setstat(handle_msg_handling, 0);
 550
 551 }
 552
 553 /*--------------------------------------------------------------------------*/
 554
 555 const FLASH uint8_t iniprog[] = {
 556         0xAF,                   // xor     a
 557         0xED, 0x39, 0x36,       // out0    (rcr),a         ;disable  DRAM refresh
 558         0x3E, 0x30,             // ld      a,030h
 559         0xED, 0x39, 0x32        //out0    (dcntl),a       ;0 mem, max i/0 wait states
 560 };
 561
 562 const FLASH uint8_t sertest[] = {
 563         0xAF,              //   xor     a
 564         0xED, 0x39, 0x36,  //   out0    (rcr),a         ;disable  DRAM refresh
 565         0x3E, 0x30,        //   ld      a,030h
 566         0xED, 0x39, 0x32,  //   out0    (dcntl),a       ;0 mem, max i/0 wait states
 567         0x3E, 0x80,        //   ld      a,M_MPBT                ;no MP, PS=10, DR=16, SS=0
 568         0xED, 0x39, 0x03,  //   out0    (cntlb1),a
 569         0x3E, 0x64,        //   ld      a,M_RE + M_TE + M_MOD2  ;
 570         0xED, 0x39, 0x01,  //   out0    (cntla1),a
 571         0x3E, 0x00,        //   ld      a,0
 572         0xED, 0x39, 0x05,  //   out0    (stat1),a       ;Enable rx interrupts
 573         0xED, 0x38, 0x05,  //l0:in0     a,(stat1)
 574         0xE6, 0x80,        //   and     80h
 575         0x28, 0xF9,        //   jr      z,l0
 576         0xED, 0x00, 0x09,  //   in0     b,(rdr1)
 577         0xED, 0x38, 0x05,  //l1:in0     a,(stat1)
 578         0xE6, 0x02,        //   and     02h
 579         0x28, 0xF9,        //   jr      z,l1
 580         0xED, 0x01, 0x07,  //   out0    (tdr1),b
 581         0x18, 0xEA,        //   jr      l0
 582 };
 583
 584 const FLASH uint8_t test1[] = {
 585         0xAF,              //   xor     a
 586         0xED, 0x39, 0x36,  //   out0    (rcr),a         ;disable  DRAM refresh
 587         0x3E, 0x30,        //   ld      a,030h
 588         0xED, 0x39, 0x32,  //   out0    (dcntl),a       ;0 mem, max i/0 wait states
 589         0x21, 0x1E, 0x00,  //   ld      hl,dmclrt       ;load DMA registers
 590         0x06, 0x08,        //   ld      b,dmct_e-dmclrt
 591         0x0E, 0x20,        //   ld      c,sar0l
 592         0xED, 0x93,        //   otimr
 593         0x3E, 0xC3,        //   ld      a,0c3h          ;dst +1, src +1, burst
 594         0xED, 0x39, 0x31,  //   out0    (dmode),a       ;
 595         0x3E, 0x62,        //   ld      a,062h          ;enable dma0,
 596         0xED, 0x39, 0x30,  //cl_1:      out0    (dstat),a       ;copy 64k
 597         0x18, 0xFB,        //   jr      cl_1            ;
 598         0x00, 0x00,        //dmclrt:    dw      0               ;src (inc)
 599         0x00,              //   db      0               ;src
 600         0x00, 0x00,        //   dw      0               ;dst (inc),
 601         0x00,              //   db      0               ;dst
 602         0x00, 0x00,        //   dw      0               ;count (64k)
 603 };