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[z180-stamp.git] / z180 / init.180
1 page 255
2 .z80
3
4 extrn ddtz,bpent
5 extrn $stack
6 extrn charini,?const,?conin
7 extrn ?cono,?conos
8 extrn romend
9
10
11 global iobyte
12 global isv_sw
13
14 include config.inc
15 if CPU_Z180
16 include z180reg.inc
17 include z180.lib
18 endif
19
20
21
22
23 ;----------------------------------------------------------------------
24
25 cseg
26 romstart equ $
27
28 org romstart+0
29 jp start
30
31 iobyte: db 2
32
33 ; restart vectors
34
35 rsti defl 1
36 rept 7
37 org 8*rsti + romstart
38 jp bpent
39 rsti defl rsti+1
40 endm
41
42 ;----------------------------------------------------------------------
43 ; Config space
44 ;
45
46 org romstart+40h
47
48 dw 0
49 db 0
50
51
52 if ROMSYS
53 $crom: defb c$rom ;
54 else
55 db 0 ;
56 endif
57
58 INIWAITS defl CWAITIO
59 if ROMSYS
60 INIWAITS defl INIWAITS+CWAITROM
61 endif
62
63 ;----------------------------------------------------------------------
64
65 org romstart+50h
66 start:
67 jp cstart
68 jp wstart
69 jp ?const
70 jp ?conin
71 jp ?cono
72 jp ?conos
73 jp charini
74
75 ;----------------------------------------------------------------------
76
77 hwini0:
78 if CPU_Z180
79 db 3 ;count
80 db rcr,CREFSH ;configure DRAM refresh
81 db dcntl,INIWAITS ;wait states
82 db cbr,SYS$CBR
83 db cbar,SYS$CBAR
84 endif
85 db 0
86
87 if CPU_Z180
88 dmclrt: ;clear ram per dma
89 db dmct_e-dmclrt-2 ;
90 db sar0l ;first port
91 dw nullbyte ;src (fixed)
92 nullbyte:
93 db 000h ;src
94 dw romend ;dst (inc), start after "rom" code
95 db 00h ;dst
96 dw 0-romend ;count (64k)
97 dmct_e:
98 db 0
99 endif
100
101
102 cstart:
103 if CPU_Z180
104
105 push af
106 in0 a,(itc) ;Illegal opcode trap?
107 jp m,??st01
108 ld a,i ;I register == 0 ?
109 jr z,hw_reset ; yes, harware reset
110
111 ??st01:
112 ; TODO: SYS$CBR
113 ld a,(syscbr)
114 out0 (cbr),a
115 pop af ;restore registers
116 jp bpent ;
117
118 hw_reset:
119 di ;0058
120 ld a,CREFSH
121 out0 (rcr),a ; configure DRAM refresh
122 ld a,CWAITIO
123 out0 (dcntl),a ; wait states
124
125 ld a,M_NCD ;No Clock Divide
126 out0 (ccr),a
127 ; ld a,M_X2CM ;X2 Clock Multiplier
128 ; out0 (cmr),a
129 else
130 di
131 xor a
132 ld (@cbnk),a
133 endif
134
135 ; check warm start mark
136
137 ld ix,mark_55AA ; top of common area
138 ld a,0aah ;
139 cp (ix+000h) ;
140 jr nz,kstart ;
141 cp (ix+002h) ;
142 jr nz,kstart ;
143 cpl ;
144 cp (ix+001h) ;
145 jr nz,kstart ;
146 cp (ix+003h) ;
147 jr nz,kstart ;
148 ld sp,$stack ; mark found, check
149 jp z,wstart ; check ok,
150
151 ; ram not ok, initialize -- kstart --
152
153 kstart:
154 if CPU_Z180
155 ld a,SYS$CBR
156 out0 (cbr),a
157 ld a,SYS$CBAR
158 out0 (cbar),a
159 endif
160
161 ld sp,$stack ;01e1
162
163 ; Clear RAM using DMA0
164
165 if CPU_Z180
166 if 0
167
168 ld hl,dmclrt ;load DMA registers
169 call ioiniml
170 ld a,0cbh ;01ef dst +1, src fixed, burst
171 out0 (dmode),a ;01f1
172
173 ld b,512/64
174 ld a,062h ;01f4 enable dma0,
175 ??cl_1:
176 out0 (dstat),a ;01f9 clear (up to) 64k
177 djnz ??cl_1 ; end of RAM?
178
179 endif
180 endif
181
182 ld hl,055AAh ;set warm start mark
183 ld (mark_55AA),hl
184 ld (mark_55AA+2),hl
185
186 ; -- wstart --
187
188 wstart:
189 call sysram_init
190 call ivtab_init
191 if CPU_Z180
192 ; call prt0_init
193 endif
194
195 call charini
196 call bufferinit
197
198 if CPU_Z80
199 ld a,0
200 call selbnk
201 endif
202
203 ld a,INIDONEVAL ;tell others (CP/M) that hardware and fifos
204 ld (INIDONE),a ; are allready initialized
205
206 im 2
207 ei
208
209 call ?const
210 call ?const
211 or a
212 call nz,?conin
213
214 if CPU_Z180
215 ld e,0 ;Sys$Bank
216 else
217 ; TODO:
218 endif
219 jp ddtz
220
221
222 if CPU_Z180
223 ; TODO: SYS$CBR
224 syscbr: db 0
225 endif
226
227 ;
228 ;----------------------------------------------------------------------
229 ;
230
231 global buf.init
232
233 buf.init:
234 ld (ix+o.in_idx),0
235 ld (ix+o.out_idx),0
236 ld (ix+o.mask),a
237
238 ld a,(ix+o.id)
239 cp 4
240 ret nc
241
242 push de
243 push hl
244 ld hl,fifo_list
245 push hl ;save fifo_list
246 ld e,a
247 ld d,0
248 add hl,de
249 add hl,de
250 add hl,de
251 push ix
252 pop de
253 ; TODO: address translation
254 ld (hl),e
255 inc hl
256 ld (hl),d
257 pop hl ;get fifo_list back
258 or a
259 jr nz,bufi_ex
260
261 ld (040h),hl
262 ld (040h+2),a
263 bufi_ex:
264 pop hl
265 pop de
266
267 ret
268
269
270 fifo_list:
271 rept 4
272 dw 0
273 db 0
274 endm
275
276 ;----------------------------------------------------------------------
277
278 extrn msginit,msg.sout
279 extrn mtx.fifo,mrx.fifo
280 extrn co.fifo,ci.fifo
281
282
283 bufferinit:
284 if CPU_Z180
285 call msginit
286
287 ld hl,buffers
288 ld b,buftablen
289 bfi_1:
290 ld a,(hl)
291 inc hl
292 ld (bufdat+0),a
293 ld e,(hl)
294 inc hl
295 ld d,(hl)
296 inc hl
297 ex de,hl
298
299 or a
300 jr nz,bfi_2
301 ; call hwl2phy
302 ; ld (40h+0),hl
303 ; ld (40h+2),a
304 out (AVRINT5),a
305 jr bfi_3
306 bfi_2:
307 call hwl2phy
308 ld (bufdat+1),hl
309 ld (bufdat+3),a
310 ld hl,inimsg
311 call msg.sout
312 bfi_3:
313 ex de,hl
314 djnz bfi_1
315 ret
316
317 else ;CPU_Z180
318
319 call msginit
320
321 ld hl,buffers
322 ld b,buftablen
323 bfi_1:
324 ld a,(hl)
325 inc hl
326 ld (bufdat+0),a
327 ld e,(hl)
328 inc hl
329 ld d,(hl)
330 inc hl
331 ex de,hl
332
333 or a
334 jr nz,bfi_2
335
336 ld a,(@cbnk)
337 call bnk2phy
338
339 ld (40h+0),hl
340 ld (40h+2),a
341 out (AVRINT5),a
342 jr bfi_3
343 bfi_2:
344
345 ld a,(@cbnk)
346 call bnk2phy
347
348 ld (bufdat+1),hl
349 ld (bufdat+3),a
350 ld hl,inimsg
351 call msg.sout
352 bfi_3:
353 ex de,hl
354 djnz bfi_1
355 ret
356 endif
357
358 buffers:
359 db 0
360 dw mtx.fifo
361 db 1
362 dw mrx.fifo
363 db 2
364 dw ci.fifo
365 db 3
366 dw co.fifo
367 buftablen equ ($ - buffers)/3
368
369 inimsg:
370 db inimsg_e - $ -1
371 db 0AEh
372 db inimsg_e - $ -1
373 db 0
374 bufdat:
375 db 0
376 dw 0
377 db 0
378 inimsg_e:
379
380
381 ;
382 ;----------------------------------------------------------------------
383 ;
384
385 sysram_init:
386 ld hl,sysramw
387 ld de,topcodsys
388 ld bc,sysrame-sysramw
389 ldir
390
391 ret
392
393 ;----------------------------------------------------------------------
394
395 ivtab_init:
396 ld hl,ivtab ;
397 ld a,h ;
398 ld i,a ;
399 if CPU_Z180
400 out0 (il),l ;
401 endif
402
403 ; Let all vectors point to spurious int routines.
404
405 ld d,high sp.int0
406 ld a,low sp.int0
407 ld b,9
408 ivt_i1:
409 ld (hl),a
410 inc l
411 ld (hl),d
412 inc l
413 add a,sp.int.len
414 djnz ivt_i1
415 ret
416
417 ;----------------------------------------------------------------------
418
419 if CPU_Z180
420 prt0_init:
421 ld a,i
422 ld h,a
423 in0 a,(il)
424 and 0E0h
425 or IV$PRT0
426 ld l,a
427 ld (hl),low iprt0
428 inc hl
429 ld (hl),high iprt0
430 ld hl,prt0itab
431 call ioiniml
432 ret
433
434 prt0itab:
435 db prt0it_e-prt0itab-2
436 db tmdr0l
437 dw PRT_TC10MS
438 dw PRT_TC10MS
439 db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.
440 prt0it_e:
441 db 0
442 endif
443
444
445 ;
446 ;----------------------------------------------------------------------
447 ;
448
449 if CPU_Z180
450 io.ini:
451 if 0
452 push bc
453 ld b,0 ;high byte port adress
454 ioi_nxt:
455 ld a,(hl) ;count
456 inc hl
457 or a
458 jr z,ioi_e
459
460 ld c,(hl) ;port address
461 inc hl
462 ioi_r:
463 outi
464 inc b ;outi decrements b
465 dec a
466 jr nz,ioi_r
467 jr ioi_nxt
468 ioi_e:
469 pop bc
470 ret
471
472 else ;(if 1/0)
473
474 push bc
475 jr ioi_nxt
476 ioi_l:
477 ld c,(hl) ;port address
478 inc hl
479 inc c
480 ioi_r:
481 dec c ;otim increments c
482 otim
483 jr z,ioi_r
484 ioi_nxt:
485 ld b,(hl) ;count
486 inc hl
487 inc b ;stop if count == 0
488 djnz ioi_l
489 pop bc
490 ret
491
492 endif ;(1/0)
493
494 else
495
496 io.ini:
497 push bc
498 jr ioi_nxt
499 ioi_l:
500 ld c,(hl) ;port address
501 inc hl
502 otir
503 ioi_nxt:
504 ld b,(hl) ;count
505 inc hl
506 inc b
507 djnz ioi_l
508 endif
509 pop bc
510 ret
511
512 ;----------------------------------------------------------------------
513
514 if CPU_Z180
515
516 global ioiniml
517
518 ioiniml:
519 push bc
520 xor a
521 ioml_lp:
522 ld b,(hl)
523 inc hl
524 cp b
525 jr z,ioml_e
526
527 ld c,(hl)
528 inc hl
529 otimr
530 jr ioml_lp
531 ioml_e:
532 pop bc
533 ret z
534 endif
535
536 io.ini.l:
537 ;
538
539
540
541 ;----------------------------------------------------------------------
542 ;
543 if CPU_Z180
544
545 ;--------------------------------------------------------------------
546 ; Return the BBR value for the given bank number
547 ;
548 ; in a: Bank number
549 ; out a: bbr value
550
551 bnk2log:
552 or a ;
553 ret z ; Bank 0 is at physical address 0
554
555 push bc ;
556 ld b,a ;
557 ld c,CA ;
558 mlt bc ;
559 ld a,c ;
560 add a,10h ;
561 pop bc ;
562 ret ;
563
564 ;--------------------------------------------------------------
565
566 ;in hl: Log. Address
567 ; a: Bank number
568 ;
569 ;out ahl: Phys. (linear) Address
570
571
572 bnk2phy:
573 call bnk2log
574 ; fall thru
575
576 ;--------------------------------------------------------------
577 ;
578 ; hl: Log. Address
579 ; a: Bank base (bbr)
580 ;
581 ; 2 0 0
582 ; 0 6 8 0
583 ; hl hhhhhhhhllllllll
584 ; a + bbbbbbbb
585 ;
586 ; OP: ahl = (a<<12) + (h<<8) + l
587 ;
588 ;out ahl: Phys. (linear) Address
589
590 log2phy:
591 push bc ;
592 l2p_i:
593 ld c,a ;
594 ld b,16 ;
595 mlt bc ; bc = a<<4
596 ld a,c ;
597 add a,h ;
598 ld h,a ;
599 ld a,b ;
600 adc a,0 ;
601 pop bc ;
602 ret ;
603
604 ;--------------------------------------------------------------
605 ;
606 ; hl: Log. Address
607 ;
608 ;
609 ; OP: ahl = (bankbase<<12) + (d<<8) + e
610 ;
611 ;out ahl: Phys. (linear) Address
612
613
614 hwl2phy:
615 push bc ;
616 in0 c,(cbar) ;
617 ld a,h ;
618 or 00fh ; log. addr in common1?
619 cp c
620 jr c,hlp_1
621
622 in0 a,(cbr) ; yes, cbr is address base
623 jr hl2p_x
624 hlp_1:
625 ld b,16 ; log. address in baked area?
626 mlt bc
627 ld a,h
628 cp c
629 jr c,hlp_2
630 in0 a,(bbr) ; yes, bbr is address base
631 jr hl2p_x
632 hlp_2:
633 xor a ; common1
634 hl2p_x:
635 jr nz,l2p_i
636
637 pop bc ; bank part is 0, no translation
638 ret ;
639
640
641
642 else ;CPU_Z180
643
644 ;----------------------------------------------------------------------
645 ;
646
647 bnk2phy:
648 sla h
649 jr nc,b2p_1 ;A15=1 --> common
650 ld a,3
651 b2p_1:
652 srl a
653 rr h
654 ret
655
656 endif
657
658 ;--------------------------------------------------------------
659 ;
660 ;return:
661 ; hl = hl + a
662 ; Flags undefined
663 ;
664
665 add_hl_a:
666 add a,l
667 ld l,a
668 ret nc
669 inc h
670 ret
671
672 ; ---------------------------------------------------------
673
674 sysramw:
675
676 .phase isvsw_loc
677 topcodsys:
678
679 ; Trampoline for interrupt routines in banked ram.
680 ; Switch stack pointer to "system" stack in top ram
681 ; Save cbar
682
683 isv_sw: ;
684 ex (sp),hl ;save hl, 'return adr' in hl
685 push de ;
686 push af ;
687 ex de,hl ;'return address' in de
688 ld hl,0 ;
689 add hl,sp ;
690 ld a,h ;
691 cp 0f8h ;
692 jr nc,isw_1 ;stack allready in top ram
693 ld sp,$stack ;
694 isw_1:
695 push hl ;save user stack pointer
696 in0 h,(cbar) ;
697 push hl ;
698 ld a,SYS$CBAR ;
699 out0 (cbar),a ;
700 ex de,hl ;
701 ld e,(hl) ;
702 inc hl ;
703 ld d,(hl) ;
704 ex de,hl ;
705 push bc ;
706 call jphl ;
707
708 pop bc ;
709 pop hl ;
710 out0 (cbar),h ;
711 pop hl ;
712 ld sp,hl ;
713 pop af ;
714 pop de ;
715 pop hl ;
716 ei ;
717 ret ;
718 jphl:
719 jp (hl) ;
720
721 ; ---------------------------------------------------------
722
723 if CPU_Z180
724
725 iprt0:
726 push af
727 push hl
728 in0 a,(tcr)
729 in0 a,(tmdr0l)
730 in0 a,(tmdr0h)
731 ld a,(tim_ms)
732 inc a
733 cp 100
734 jr nz,iprt_1
735 xor a
736 ld hl,(tim_s)
737 inc hl
738 ld (tim_s),hl
739 iprt_1:
740 ld (tim_ms),a
741 pop hl
742 pop af
743 ei
744 ret
745
746 endif
747
748 ; ---------------------------------------------------------
749
750 sp.int0:
751 ld a,0d0h
752 jr sp.i.1
753 sp.int.len equ $-sp.int0
754 ld a,0d1h
755 jr sp.i.1
756 ld a,0d2h
757 jr sp.i.1
758 ld a,0d3h
759 jr sp.i.1
760 ld a,0d4h
761 jr sp.i.1
762 ld a,0d5h
763 jr sp.i.1
764 ld a,0d6h
765 jr sp.i.1
766 ld a,0d7h
767 jr sp.i.1
768 ld a,0d8h
769 sp.i.1:
770 ; out (80h),a
771 halt
772
773 ; ---------------------------------------------------------
774
775 if CPU_Z80
776
777 ; Get IFF2
778 ; This routine may not be loaded in page zero
779 ;
780 ; return Carry clear, if INTs are enabled.
781 ;
782 global getiff
783 getiff:
784 xor a ;clear accu and carry
785 push af ;stack bottom := 00xxh
786 pop af
787 ld a,i ;P flag := IFF2
788 ret pe ;exit carry clear, if enabled
789 dec sp
790 dec sp ;has stack bottom been overwritten?
791 pop af
792 and a ;if not 00xxh, INTs were
793 ret nz ;actually enabled
794 scf ;Otherwise, they really are disabled
795 ret
796
797 ;----------------------------------------------------------------------
798
799 global selbnk
800
801 ; a: bank (0..2)
802
803 selbnk:
804 push bc
805 ld c,a
806 call getiff
807 push af
808
809 ld a,c
810 di
811 ld (@cbnk),a
812 ld a,5
813 out (SIOAC),a
814 ld a,(mm_sio0)
815 rla
816 srl c
817 rra
818 out (SIOAC),a
819 ld (mm_sio0),a
820
821 ld a,5
822 out (SIOBC),a
823 ld a,(mm_sio1)
824 rla
825 srl c
826 rra
827 out (SIOBC),a
828 ld (mm_sio1),a
829 pop af
830 pop bc
831 ret c ;INTs were disabled
832 ei
833 ret
834
835 ;----------------------------------------------------------------------
836
837 ; c: bank (0..2)
838
839 if 0
840
841 selbnk:
842 ld a,(@cbnk)
843 xor c
844 and 3
845 ret z ;no change
846
847 call getiff
848 push af
849 ld a,c
850 di
851 ld (@cbnk),a
852 ld a,5
853 out (SIOAC),a
854 ld a,(mm_sio0)
855 rla
856 srl c
857 rra
858 out (SIOAC),a
859 ld (mm_sio0),a
860
861 ld a,5
862 out (SIOBC),a
863 ld a,(mm_sio1)
864 rla
865 srl c
866 rra
867 out (SIOBC),a
868 ld (mm_sio1),a
869 pop af
870 ret nc ;INTs were disabled
871 ei
872 ret
873
874 endif
875
876 ;----------------------------------------------------------------------
877
878 if 0
879 ex af,af'
880 push af
881 ex af,af'
882
883 rra
884 jr nc,stbk1
885 ex af,af'
886 ld a,5
887 out (SIOAC),a
888 ld a,(mm_sio0)
889 rla
890 srl c
891 rra
892 out (SIOAC),a
893 ld (mm_sio1),a
894 ex af,af'
895
896 stbk1:
897 rra
898 jr nc,stbk2
899 ex af,af'
900 ld a,5
901 out (SIOBC),a
902 ld a,(mm_sio1)
903 rla
904 srl c
905 rra
906 out (SIOBC),a
907 ld (mm_sio1),a
908 ex af,af'
909
910 stbk2:
911 endif
912
913 global @cbnk
914 global mm_sio0, mm_sio1
915
916 @cbnk: db 0 ; current bank (0..2)
917 mm_sio0:
918 ds 1
919 mm_sio1:
920 ds 1
921
922
923 endif
924
925 ;----------------------------------------------------------------------
926
927 curph defl $
928 .dephase
929 sysrame:
930 .phase curph
931 tim_ms: db 0
932 tim_s: dw 0
933 .dephase
934
935 ;-----------------------------------------------------
936
937
938 cseg
939
940 ;.phase 0ffc0h
941 ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table
942 ;.dephase
943
944 ;.phase 0fffah
945 mark_55AA equ 0 - 2 - 4 ;2 byte for trap stack
946 ;ds 4
947 ;.dephase
948
949
950 end
Z180 Stamp Monitor