1 .z80 ; for M80, ignored by SLR assembler
6 UUNKNOWN equ 0 ;Unknown CPU
10 UX180 equ 4 ;HD64180 or higher
11 UHD64180 equ 5 ;HD64180
13 UZ8S180 equ 7 ;Z8S180, Z8L180
16 ;-------------------------------------------------------------------------------
33 ;-------------------------------------------------------------------------------
34 ; Read internal register at address in L and IOBASE in H.
45 ;-------------------------------------------------------------------------------
46 ; Write internal register at address in L and IOBASE in H.
59 ;-------------------------------------------------------------------------------
60 ; Check if register C exists. D holds mask of bit to test.
61 ; return nz, if register exists
68 ; check, if register is changeable
70 xor d ; set bit(s) in register to 0
72 call reg_in ; get it back
74 ld a,0ffh ; set to register original state
81 ;-------------------------------------------------------------------------------
90 ; E = 4 HD64180 or higher
93 ; E = 7 Z8S180, Z8L180
95 ;-------------------------------------------------------------------------------
96 ; Registers only in Z180+, not in HD64180
99 ; Registers only in Z8S180/Z8L180
118 ld e,U8080 ; Init return val, assume 8080
120 dec a ; 00 --> 0FFH 8080/8085: even parity; Z80+: No overflow
121 jp po,chk_z80 ; Z80+ if P/V flag reset
123 ; The 8085 logical AND instructions always set the auxiliary flag ON.
124 ; The 8080 logical AND instructions set the flag to reflect the
125 ; logical OR of bit 3 of the values involved in the AND operation.
126 ; (8080/8085 ASSEMBLY LANGUAGE PROGRAMMING MANUAL, 1977, 1978)
129 and a ; 8085 sets, 8080 resets half carry.
130 daa ; A=06 (8085) or A=00 (8080)
136 ld e,UZ80 ; Assume Z80
137 daa ; Z80: 099H, x180+: 0F9H
138 cp 99h ; Result on 180 type cpus is F9 here. Thanks Hitachi
142 ; At least Hitachi HD64180
143 ; Test differences in certain internal registers
144 ; to determine the 180 variant.
145 ; First, search the internal register bank.
151 and 11011111b ; mask I/O Stop bit
156 ;TODO: additional plausibility checks
164 ret ;I/O registers not found
166 ; Register (base) found.
170 ld l,RCR ; Disable Refresh Controller
173 ld l,omcr ; Check, if CPU has OMCR register
176 ret z ; Register does not exist. It's a HD64180
179 ld l,cmr ; Check, if CPU has CMR register
182 ret z ; register does not exist. It's a Z80180
184 inc e ; S180/L180 (class) detected.
188 ;-------------------------------------------------------------------------------
202 ;Z80 Z180(0W) Z180(MaxW)
203 loop: ;--------------------------
204 in a,(050h) ;11 10 +3*3 19
205 jp loop ;10 9 +3*3 18
206 ;--------------------------
209 ; jr loop ;12 8 +2*3 14
217 ; vim:set ts=8 noet nowrap