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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * irmp.h\r | |
3 | *\r | |
f50e01e7 | 4 | * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de\r |
4225a882 | 5 | *\r |
7644ac04 | 6 | * $Id: irmp.h,v 1.65 2011/09/08 13:22:16 fm Exp $\r |
cb8474cc | 7 | *\r |
4225a882 | 8 | * ATMEGA88 @ 8 MHz\r |
9 | *\r | |
10 | * This program is free software; you can redistribute it and/or modify\r | |
11 | * it under the terms of the GNU General Public License as published by\r | |
12 | * the Free Software Foundation; either version 2 of the License, or\r | |
13 | * (at your option) any later version.\r | |
14 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
15 | */\r | |
16 | \r | |
17 | #ifndef _WC_IRMP_H_\r | |
18 | #define _WC_IRMP_H_\r | |
19 | \r | |
c7a47e89 | 20 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
21 | * timing constants:\r | |
22 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
23 | */\r | |
24 | #define IRMP_TIMEOUT_TIME 16500.0e-6 // timeout after 16.5 ms darkness\r | |
25 | #define IRMP_TIMEOUT_TIME_MS 16500L // timeout after 16.5 ms darkness\r | |
26 | \r | |
9405f84a | 27 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
28 | #define IRMP_TIMEOUT_NIKON_TIME 29500.0e-6 // 2nd timeout after 29.5 ms darkness (only for NIKON!)\r | |
29 | #define IRMP_TIMEOUT_NIKON_TIME_MS 29500L // 2nd timeout after 29.5 ms darkness\r | |
30 | typedef uint16_t PAUSE_LEN;\r | |
31 | #define IRMP_TIMEOUT_NIKON_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_NIKON_TIME + 0.5)\r | |
32 | #else\r | |
c7a47e89 | 33 | #if (F_INTERRUPTS * IRMP_TIMEOUT_TIME_MS) / 1000000 >= 254\r |
34 | typedef uint16_t PAUSE_LEN;\r | |
35 | #else\r | |
36 | typedef uint8_t PAUSE_LEN;\r | |
37 | #endif\r | |
9405f84a | 38 | #endif\r |
c7a47e89 | 39 | \r |
40 | #define IRMP_TIMEOUT_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_TIME + 0.5)\r | |
41 | \r | |
4225a882 | 42 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
cb8474cc | 43 | * IR protocols\r |
4225a882 | 44 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
45 | */\r | |
f613f7dc | 46 | #define IRMP_SIRCS_PROTOCOL 1 // Sony\r |
47 | #define IRMP_NEC_PROTOCOL 2 // NEC, Pioneer, JVC, Toshiba, NoName etc.\r | |
48 | #define IRMP_SAMSUNG_PROTOCOL 3 // Samsung\r | |
49 | #define IRMP_MATSUSHITA_PROTOCOL 4 // Matsushita\r | |
50 | #define IRMP_KASEIKYO_PROTOCOL 5 // Kaseikyo (Panasonic etc)\r | |
51 | #define IRMP_RECS80_PROTOCOL 6 // Philips, Thomson, Nordmende, Telefunken, Saba\r | |
52 | #define IRMP_RC5_PROTOCOL 7 // Philips etc\r | |
779fbc81 | 53 | #define IRMP_DENON_PROTOCOL 8 // Denon, Sharp\r |
f613f7dc | 54 | #define IRMP_RC6_PROTOCOL 9 // Philips etc\r |
55 | #define IRMP_SAMSUNG32_PROTOCOL 10 // Samsung32: no sync pulse at bit 16, length 32 instead of 37\r | |
56 | #define IRMP_APPLE_PROTOCOL 11 // Apple, very similar to NEC\r | |
57 | #define IRMP_RECS80EXT_PROTOCOL 12 // Philips, Technisat, Thomson, Nordmende, Telefunken, Saba\r | |
58 | #define IRMP_NUBERT_PROTOCOL 13 // Nubert\r | |
59 | #define IRMP_BANG_OLUFSEN_PROTOCOL 14 // Bang & Olufsen\r | |
60 | #define IRMP_GRUNDIG_PROTOCOL 15 // Grundig\r | |
61 | #define IRMP_NOKIA_PROTOCOL 16 // Nokia\r | |
62 | #define IRMP_SIEMENS_PROTOCOL 17 // Siemens, e.g. Gigaset\r | |
63 | #define IRMP_FDC_PROTOCOL 18 // FDC keyboard\r | |
64 | #define IRMP_RCCAR_PROTOCOL 19 // RC Car\r | |
35213800 | 65 | #define IRMP_JVC_PROTOCOL 20 // JVC (NEC with 16 bits)\r |
c7a47e89 | 66 | #define IRMP_RC6A_PROTOCOL 21 // RC6A, e.g. Kathrein, XBOX\r |
9405f84a | 67 | #define IRMP_NIKON_PROTOCOL 22 // Nikon\r |
1aee56bc | 68 | #define IRMP_RUWIDO_PROTOCOL 23 // Ruwido, e.g. T-Home Mediareceiver\r |
89e8cafb | 69 | #define IRMP_IR60_PROTOCOL 24 // IR60 (SAB2008)\r |
111d6191 | 70 | #define IRMP_KATHREIN_PROTOCOL 25 // Kathrein\r |
deba2a0a | 71 | #define IRMP_NETBOX_PROTOCOL 26 // Netbox keyboard (bitserial)\r |
35213800 | 72 | #define IRMP_NEC16_PROTOCOL 27 // NEC with 16 bits (incl. sync)\r |
73 | #define IRMP_NEC42_PROTOCOL 28 // NEC with 42 bits\r | |
f50e01e7 | 74 | #define IRMP_LEGO_PROTOCOL 29 // LEGO Power Functions RC\r |
beda975f | 75 | #define IRMP_THOMSON_PROTOCOL 30 // Thomson\r |
76 | #define IRMP_MERLIN_PROTOCOL 31 // Pollin Merlin keyboard (bitserial)\r | |
1f54e86c | 77 | \r |
78 | #define IRMP_N_PROTOCOLS 31 // number of supported protocols\r | |
79 | \r | |
fc80d688 | 80 | #define IRMP_IMON_PROTOCOL 99 // Imon (bitserial) PROTOTYPE!\r |
4225a882 | 81 | \r |
77f488bb | 82 | // some flags of struct IRMP_PARAMETER:\r |
83 | #define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01\r | |
84 | #define IRMP_PARAM_FLAG_1ST_PULSE_IS_1 0x02\r | |
deba2a0a | 85 | #define IRMP_PARAM_FLAG_IS_SERIAL 0x04\r |
77f488bb | 86 | \r |
a7054daf | 87 | #define SIRCS_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r |
88 | #define SIRCS_START_BIT_PAUSE_TIME 600.0e-6 // 600 usec pause\r | |
89 | #define SIRCS_1_PULSE_TIME 1200.0e-6 // 1200 usec pulse\r | |
90 | #define SIRCS_0_PULSE_TIME 600.0e-6 // 600 usec pulse\r | |
91 | #define SIRCS_PAUSE_TIME 600.0e-6 // 600 usec pause\r | |
92 | #define SIRCS_FRAMES 3 // SIRCS sends each frame 3 times\r | |
93 | #define SIRCS_AUTO_REPETITION_PAUSE_TIME 25.0e-3 // auto repetition after 25ms\r | |
94 | #define SIRCS_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms\r | |
95 | #define SIRCS_ADDRESS_OFFSET 15 // skip 15 bits\r | |
96 | #define SIRCS_ADDRESS_LEN 5 // read up to 5 address bits\r | |
97 | #define SIRCS_COMMAND_OFFSET 0 // skip 0 bits\r | |
98 | #define SIRCS_COMMAND_LEN 15 // read 12-15 command bits\r | |
99 | #define SIRCS_MINIMUM_DATA_LEN 12 // minimum data length\r | |
100 | #define SIRCS_COMPLETE_DATA_LEN 20 // complete length - may be up to 20\r | |
101 | #define SIRCS_STOP_BIT 0 // has no stop bit\r | |
102 | #define SIRCS_LSB 1 // LSB...MSB\r | |
77f488bb | 103 | #define SIRCS_FLAGS 0 // flags\r |
4225a882 | 104 | \r |
a7054daf | 105 | #define NEC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r |
106 | #define NEC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r | |
107 | #define NEC_REPEAT_START_BIT_PAUSE_TIME 2250.0e-6 // 2250 usec pause\r | |
108 | #define NEC_PULSE_TIME 560.0e-6 // 560 usec pulse\r | |
109 | #define NEC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r | |
110 | #define NEC_0_PAUSE_TIME 560.0e-6 // 560 usec pause\r | |
111 | #define NEC_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r | |
112 | #define NEC_ADDRESS_OFFSET 0 // skip 0 bits\r | |
113 | #define NEC_ADDRESS_LEN 16 // read 16 address bits\r | |
114 | #define NEC_COMMAND_OFFSET 16 // skip 16 bits (8 address + 8 /address)\r | |
115 | #define NEC_COMMAND_LEN 16 // read 16 bits (8 command + 8 /command)\r | |
116 | #define NEC_COMPLETE_DATA_LEN 32 // complete length\r | |
117 | #define NEC_STOP_BIT 1 // has stop bit\r | |
118 | #define NEC_LSB 1 // LSB...MSB\r | |
77f488bb | 119 | #define NEC_FLAGS 0 // flags\r |
4225a882 | 120 | \r |
35213800 | 121 | #define NEC42_ADDRESS_OFFSET 0 // skip 0 bits\r |
122 | #define NEC42_ADDRESS_LEN 13 // read 13 address bits\r | |
123 | #define NEC42_COMMAND_OFFSET 26 // skip 26 bits (2 x 13 address bits)\r | |
124 | #define NEC42_COMMAND_LEN 8 // read 8 command bits\r | |
125 | #define NEC42_COMPLETE_DATA_LEN 42 // complete length (2 x 13 + 2 x 8)\r | |
126 | \r | |
fc80d688 | 127 | #define NEC16_ADDRESS_OFFSET 0 // skip 0 bits\r |
128 | #define NEC16_ADDRESS_LEN 8 // read 8 address bits\r | |
129 | #define NEC16_COMMAND_OFFSET 8 // skip 8 bits (8 address)\r | |
130 | #define NEC16_COMMAND_LEN 8 // read 8 bits (8 command)\r | |
131 | #define NEC16_COMPLETE_DATA_LEN 16 // complete length\r | |
fc80d688 | 132 | \r |
a7054daf | 133 | #define SAMSUNG_START_BIT_PULSE_TIME 4500.0e-6 // 4500 usec pulse\r |
134 | #define SAMSUNG_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r | |
135 | #define SAMSUNG_PULSE_TIME 550.0e-6 // 550 usec pulse\r | |
136 | #define SAMSUNG_1_PAUSE_TIME 1450.0e-6 // 1450 usec pause\r | |
137 | #define SAMSUNG_0_PAUSE_TIME 450.0e-6 // 450 usec pause\r | |
35213800 | 138 | #define SAMSUNG_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms\r |
a7054daf | 139 | #define SAMSUNG_ADDRESS_OFFSET 0 // skip 0 bits\r |
140 | #define SAMSUNG_ADDRESS_LEN 16 // read 16 address bits\r | |
141 | #define SAMSUNG_ID_OFFSET 17 // skip 16 + 1 sync bit\r | |
142 | #define SAMSUNG_ID_LEN 4 // read 4 id bits\r | |
143 | #define SAMSUNG_COMMAND_OFFSET 21 // skip 16 + 1 sync + 4 data bits\r | |
144 | #define SAMSUNG_COMMAND_LEN 16 // read 16 command bits\r | |
145 | #define SAMSUNG_COMPLETE_DATA_LEN 37 // complete length\r | |
146 | #define SAMSUNG_STOP_BIT 1 // has stop bit\r | |
147 | #define SAMSUNG_LSB 1 // LSB...MSB?\r | |
77f488bb | 148 | #define SAMSUNG_FLAGS 0 // flags\r |
4225a882 | 149 | \r |
a7054daf | 150 | #define SAMSUNG32_COMMAND_OFFSET 16 // skip 16 bits\r |
151 | #define SAMSUNG32_COMMAND_LEN 16 // read 16 command bits\r | |
152 | #define SAMSUNG32_COMPLETE_DATA_LEN 32 // complete length\r | |
153 | #define SAMSUNG32_FRAMES 2 // SAMSUNG32 sends each frame 2 times\r | |
154 | #define SAMSUNG32_AUTO_REPETITION_PAUSE_TIME 47.0e-3 // repetition after 47 ms\r | |
155 | #define SAMSUNG32_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 40ms\r | |
4225a882 | 156 | \r |
a7054daf | 157 | #define MATSUSHITA_START_BIT_PULSE_TIME 3488.0e-6 // 3488 usec pulse\r |
158 | #define MATSUSHITA_START_BIT_PAUSE_TIME 3488.0e-6 // 3488 usec pause\r | |
159 | #define MATSUSHITA_PULSE_TIME 872.0e-6 // 872 usec pulse\r | |
160 | #define MATSUSHITA_1_PAUSE_TIME 2616.0e-6 // 2616 usec pause\r | |
161 | #define MATSUSHITA_0_PAUSE_TIME 872.0e-6 // 872 usec pause\r | |
162 | #define MATSUSHITA_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r | |
163 | #define MATSUSHITA_ADDRESS_OFFSET 12 // skip 12 bits\r | |
164 | #define MATSUSHITA_ADDRESS_LEN 12 // read 12 address bits\r | |
165 | #define MATSUSHITA_COMMAND_OFFSET 0 // skip 0 bits\r | |
166 | #define MATSUSHITA_COMMAND_LEN 12 // read 12 bits (6 custom + 6 command)\r | |
167 | #define MATSUSHITA_COMPLETE_DATA_LEN 24 // complete length\r | |
168 | #define MATSUSHITA_STOP_BIT 1 // has stop bit\r | |
169 | #define MATSUSHITA_LSB 1 // LSB...MSB?\r | |
77f488bb | 170 | #define MATSUSHITA_FLAGS 0 // flags\r |
4225a882 | 171 | \r |
a7054daf | 172 | #define KASEIKYO_START_BIT_PULSE_TIME 3380.0e-6 // 3380 usec pulse\r |
173 | #define KASEIKYO_START_BIT_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r | |
174 | #define KASEIKYO_PULSE_TIME 423.0e-6 // 525 usec pulse\r | |
175 | #define KASEIKYO_1_PAUSE_TIME 1269.0e-6 // 525 usec pause\r | |
176 | #define KASEIKYO_0_PAUSE_TIME 423.0e-6 // 1690 usec pause\r | |
770a1a9d | 177 | #define KASEIKYO_AUTO_REPETITION_PAUSE_TIME 74.0e-3 // repetition after 74 ms\r |
178 | #define KASEIKYO_FRAME_REPEAT_PAUSE_TIME 74.0e-3 // frame repeat after 74 ms\r | |
a7054daf | 179 | #define KASEIKYO_ADDRESS_OFFSET 0 // skip 0 bits\r |
180 | #define KASEIKYO_ADDRESS_LEN 16 // read 16 address bits\r | |
181 | #define KASEIKYO_COMMAND_OFFSET 28 // skip 28 bits (16 manufacturer & 4 parity & 8 genre)\r | |
182 | #define KASEIKYO_COMMAND_LEN 12 // read 12 command bits (10 real command & 2 id)\r | |
183 | #define KASEIKYO_COMPLETE_DATA_LEN 48 // complete length\r | |
184 | #define KASEIKYO_STOP_BIT 1 // has stop bit\r | |
185 | #define KASEIKYO_LSB 1 // LSB...MSB?\r | |
770a1a9d | 186 | #define KASEIKYO_FRAMES 2 // KASEIKYO sends 1st frame 2 times\r |
77f488bb | 187 | #define KASEIKYO_FLAGS 0 // flags\r |
4225a882 | 188 | \r |
a7054daf | 189 | #define RECS80_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r |
190 | #define RECS80_START_BIT_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r | |
191 | #define RECS80_PULSE_TIME 158.0e-6 // 158 usec pulse\r | |
192 | #define RECS80_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r | |
193 | #define RECS80_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r | |
194 | #define RECS80_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r | |
a42d1ee6 | 195 | #define RECS80_ADDRESS_OFFSET 1 // skip 1 bit (toggle bit)\r |
a7054daf | 196 | #define RECS80_ADDRESS_LEN 3 // read 3 address bits\r |
cc4e8ef2 | 197 | #define RECS80_COMMAND_OFFSET 4 // skip 4 bits (1 toggle + 3 address)\r |
a7054daf | 198 | #define RECS80_COMMAND_LEN 6 // read 6 command bits\r |
a42d1ee6 | 199 | #define RECS80_COMPLETE_DATA_LEN 10 // complete length\r |
a7054daf | 200 | #define RECS80_STOP_BIT 1 // has stop bit\r |
ef6af95c | 201 | #define RECS80_LSB 0 // MSB...LSB\r |
77f488bb | 202 | #define RECS80_FLAGS 0 // flags\r |
4225a882 | 203 | \r |
a7054daf | 204 | #define RC5_BIT_TIME 889.0e-6 // 889 usec pulse/pause\r |
205 | #define RC5_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r | |
1aee56bc | 206 | \r |
03780b34 | 207 | #define RC5_ADDRESS_OFFSET 1 // skip 1 bit (2nd start)\r |
208 | #define RC5_ADDRESS_LEN 6 // read 1 toggle bit (for key repetition detection) + 5 address bits\r | |
a7054daf | 209 | #define RC5_COMMAND_OFFSET 7 // skip 5 bits (2nd start + 1 toggle + 5 address)\r |
210 | #define RC5_COMMAND_LEN 6 // read 6 command bits\r | |
211 | #define RC5_COMPLETE_DATA_LEN 13 // complete length\r | |
212 | #define RC5_STOP_BIT 0 // has no stop bit\r | |
213 | #define RC5_LSB 0 // MSB...LSB\r | |
77f488bb | 214 | #define RC5_FLAGS IRMP_PARAM_FLAG_IS_MANCHESTER // flags\r |
4225a882 | 215 | \r |
53c11f07 | 216 | #define DENON_PULSE_TIME 310.0e-6 // 310 usec pulse in practice, 275 in theory\r |
217 | #define DENON_1_PAUSE_TIME 1780.0e-6 // 1780 usec pause in practice, 1900 in theory\r | |
218 | #define DENON_0_PAUSE_TIME 745.0e-6 // 745 usec pause in practice, 775 in theory\r | |
a7054daf | 219 | #define DENON_FRAMES 2 // DENON sends each frame 2 times\r |
220 | #define DENON_AUTO_REPETITION_PAUSE_TIME 65.0e-3 // inverted repetition after 65ms\r | |
221 | #define DENON_FRAME_REPEAT_PAUSE_TIME 65.0e-3 // frame repeat after 65ms\r | |
222 | #define DENON_ADDRESS_OFFSET 0 // skip 0 bits\r | |
223 | #define DENON_ADDRESS_LEN 5 // read 5 address bits\r | |
224 | #define DENON_COMMAND_OFFSET 5 // skip 5\r | |
225 | #define DENON_COMMAND_LEN 10 // read 10 command bits\r | |
226 | #define DENON_COMPLETE_DATA_LEN 15 // complete length\r | |
227 | #define DENON_STOP_BIT 1 // has stop bit\r | |
228 | #define DENON_LSB 0 // MSB...LSB\r | |
77f488bb | 229 | #define DENON_FLAGS 0 // flags\r |
4225a882 | 230 | \r |
a7054daf | 231 | #define RC6_START_BIT_PULSE_TIME 2666.0e-6 // 2.666 msec pulse\r |
232 | #define RC6_START_BIT_PAUSE_TIME 889.0e-6 // 889 usec pause\r | |
233 | #define RC6_TOGGLE_BIT_TIME 889.0e-6 // 889 msec pulse/pause\r | |
234 | #define RC6_BIT_TIME 444.0e-6 // 889 usec pulse/pause\r | |
235 | #define RC6_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r | |
236 | #define RC6_ADDRESS_OFFSET 5 // skip "1" + 3 mode bits + 1 toggle bit\r | |
237 | #define RC6_ADDRESS_LEN 8 // read 8 address bits\r | |
238 | #define RC6_COMMAND_OFFSET 13 // skip 12 bits ("1" + 3 mode + 1 toggle + 8 address)\r | |
239 | #define RC6_COMMAND_LEN 8 // read 8 command bits\r | |
240 | #define RC6_COMPLETE_DATA_LEN_SHORT 21 // complete length\r | |
241 | #define RC6_COMPLETE_DATA_LEN_LONG 36 // complete length\r | |
242 | #define RC6_STOP_BIT 0 // has no stop bit\r | |
243 | #define RC6_LSB 0 // MSB...LSB\r | |
77f488bb | 244 | #define RC6_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r |
4225a882 | 245 | \r |
a7054daf | 246 | #define RECS80EXT_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r |
247 | #define RECS80EXT_START_BIT_PAUSE_TIME 3637.0e-6 // 3637 usec pause\r | |
248 | #define RECS80EXT_PULSE_TIME 158.0e-6 // 158 usec pulse\r | |
249 | #define RECS80EXT_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r | |
250 | #define RECS80EXT_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r | |
251 | #define RECS80EXT_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r | |
252 | #define RECS80EXT_ADDRESS_OFFSET 2 // skip 2 bits (2nd start + 1 toggle)\r | |
cc4e8ef2 | 253 | #define RECS80EXT_ADDRESS_LEN 4 // read 4 address bits\r |
a7054daf | 254 | #define RECS80EXT_COMMAND_OFFSET 6 // skip 6 bits (2nd start + 1 toggle + 4 address)\r |
255 | #define RECS80EXT_COMMAND_LEN 6 // read 6 command bits\r | |
256 | #define RECS80EXT_COMPLETE_DATA_LEN 12 // complete length\r | |
257 | #define RECS80EXT_STOP_BIT 1 // has stop bit\r | |
ef6af95c | 258 | #define RECS80EXT_LSB 0 // MSB...LSB\r |
77f488bb | 259 | #define RECS80EXT_FLAGS 0 // flags\r |
4225a882 | 260 | \r |
a7054daf | 261 | #define NUBERT_START_BIT_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r |
262 | #define NUBERT_START_BIT_PAUSE_TIME 340.0e-6 // 340 usec pause\r | |
263 | #define NUBERT_1_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r | |
264 | #define NUBERT_1_PAUSE_TIME 340.0e-6 // 340 usec pause\r | |
265 | #define NUBERT_0_PULSE_TIME 500.0e-6 // 500 usec pulse\r | |
266 | #define NUBERT_0_PAUSE_TIME 1300.0e-6 // 1300 usec pause\r | |
267 | #define NUBERT_FRAMES 2 // Nubert sends 2 frames\r | |
268 | #define NUBERT_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r | |
269 | #define NUBERT_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 45ms\r | |
270 | #define NUBERT_ADDRESS_OFFSET 0 // skip 0 bits\r | |
271 | #define NUBERT_ADDRESS_LEN 0 // read 0 address bits\r | |
272 | #define NUBERT_COMMAND_OFFSET 0 // skip 0 bits\r | |
273 | #define NUBERT_COMMAND_LEN 10 // read 10 bits\r | |
274 | #define NUBERT_COMPLETE_DATA_LEN 10 // complete length\r | |
275 | #define NUBERT_STOP_BIT 1 // has stop bit\r | |
276 | #define NUBERT_LSB 0 // MSB?\r | |
77f488bb | 277 | #define NUBERT_FLAGS 0 // flags\r |
4225a882 | 278 | \r |
a7054daf | 279 | #define BANG_OLUFSEN_START_BIT1_PULSE_TIME 200.0e-6 // 200 usec pulse\r |
280 | #define BANG_OLUFSEN_START_BIT1_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r | |
281 | #define BANG_OLUFSEN_START_BIT2_PULSE_TIME 200.0e-6 // 200 usec pulse\r | |
282 | #define BANG_OLUFSEN_START_BIT2_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r | |
283 | #define BANG_OLUFSEN_START_BIT3_PULSE_TIME 200.0e-6 // 200 usec pulse\r | |
284 | #define BANG_OLUFSEN_START_BIT3_PAUSE_TIME 15625.0e-6 // 15625 usec pause\r | |
285 | #define BANG_OLUFSEN_START_BIT4_PULSE_TIME 200.0e-6 // 200 usec pulse\r | |
286 | #define BANG_OLUFSEN_START_BIT4_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r | |
287 | #define BANG_OLUFSEN_PULSE_TIME 200.0e-6 // 200 usec pulse\r | |
288 | #define BANG_OLUFSEN_1_PAUSE_TIME 9375.0e-6 // 9375 usec pause\r | |
289 | #define BANG_OLUFSEN_0_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r | |
290 | #define BANG_OLUFSEN_R_PAUSE_TIME 6250.0e-6 // 6250 usec pause (repeat last bit)\r | |
291 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME 12500.0e-6 // 12500 usec pause (trailer bit)\r | |
292 | #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r | |
293 | #define BANG_OLUFSEN_ADDRESS_OFFSET 0 // no address bits\r | |
294 | #define BANG_OLUFSEN_ADDRESS_LEN 0 // no address bits\r | |
295 | #define BANG_OLUFSEN_COMMAND_OFFSET 3 // skip startbits 2, 3, 4\r | |
296 | #define BANG_OLUFSEN_COMMAND_LEN 16 // read 16 command bits\r | |
297 | #define BANG_OLUFSEN_COMPLETE_DATA_LEN 20 // complete length: startbits 2, 3, 4 + 16 data bits + trailer bit\r | |
298 | #define BANG_OLUFSEN_STOP_BIT 1 // has stop bit\r | |
299 | #define BANG_OLUFSEN_LSB 0 // MSB...LSB\r | |
77f488bb | 300 | #define BANG_OLUFSEN_FLAGS 0 // flags\r |
504d9df9 | 301 | \r |
89e8cafb | 302 | #define GRUNDIG_NOKIA_IR60_BIT_TIME 528.0e-6 // 528 usec pulse/pause\r |
303 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME 2639.0e-6 // 2639 usec pause after pre bit\r | |
304 | #define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME 117.76e-3 // info frame repeat after 117.76 ms\r | |
305 | #define GRUNDIG_NOKIA_IR60_STOP_BIT 0 // has no stop bit\r | |
306 | #define GRUNDIG_NOKIA_IR60_LSB 1 // MSB...LSB\r | |
307 | #define GRUNDIG_NOKIA_IR60_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r | |
d155e9ab | 308 | \r |
a7054daf | 309 | #define GRUNDIG_FRAMES 2 // GRUNDIG sends each frame 1+1 times\r |
310 | #define GRUNDIG_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r | |
311 | #define GRUNDIG_ADDRESS_OFFSET 0 // no address\r | |
312 | #define GRUNDIG_ADDRESS_LEN 0 // no address\r | |
313 | #define GRUNDIG_COMMAND_OFFSET 1 // skip 1 start bit\r | |
314 | #define GRUNDIG_COMMAND_LEN 9 // read 9 command bits\r | |
315 | #define GRUNDIG_COMPLETE_DATA_LEN 10 // complete length: 1 start bit + 9 data bits\r | |
592411d1 | 316 | \r |
a7054daf | 317 | #define NOKIA_FRAMES 3 // NOKIA sends each frame 1 + 1 + 1 times\r |
318 | #define NOKIA_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r | |
319 | #define NOKIA_ADDRESS_OFFSET 9 // skip 9 bits (1 start bit + 8 data bits)\r | |
320 | #define NOKIA_ADDRESS_LEN 8 // 7 address bits\r | |
321 | #define NOKIA_COMMAND_OFFSET 1 // skip 1 bit (1 start bit)\r | |
322 | #define NOKIA_COMMAND_LEN 8 // read 8 command bits\r | |
323 | #define NOKIA_COMPLETE_DATA_LEN 17 // complete length: 1 start bit + 8 address bits + 8 command bits\r | |
d155e9ab | 324 | \r |
89e8cafb | 325 | #define IR60_TIMEOUT_TIME 5000.0e-6 // timeout grundig frame, switch to IR60\r |
326 | #define IR60_ADDRESS_OFFSET 0 // skip 1 bits\r | |
327 | #define IR60_ADDRESS_LEN 0 // read 0 address bits\r | |
328 | #define IR60_COMMAND_OFFSET 0 // skip 1 bit (start bit after pre bit, always 1)\r | |
329 | #define IR60_COMMAND_LEN 7 // read 6 command bits\r | |
330 | #define IR60_COMPLETE_DATA_LEN 7 // complete length\r | |
331 | \r | |
12948cf3 | 332 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME 275.0e-6 // 275 usec pulse\r |
333 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME 550.0e-6 // 550 usec pause\r | |
334 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME 275.0e-6 // 275 usec short pulse\r | |
335 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME_2 550.0e-6 // 550 usec long pulse\r | |
336 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME 275.0e-6 // 275 usec short pause\r | |
337 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME_2 550.0e-6 // 550 usec long pause\r | |
338 | #define SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r | |
339 | #define SIEMENS_OR_RUWIDO_STOP_BIT 0 // has no stop bit\r | |
340 | #define SIEMENS_OR_RUWIDO_LSB 0 // MSB...LSB\r | |
341 | #define SIEMENS_OR_RUWIDO_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r | |
342 | \r | |
343 | #define RUWIDO_ADDRESS_OFFSET 0 // skip 0 bits\r | |
344 | #define RUWIDO_ADDRESS_LEN 9 // read 9 address bits\r | |
345 | #define RUWIDO_COMMAND_OFFSET 9 // skip 9 bits\r | |
346 | #define RUWIDO_COMMAND_LEN 8 // read 7 + 1 command bits, last bit is only check bit\r | |
347 | #define RUWIDO_COMPLETE_DATA_LEN 17 // complete length\r | |
348 | \r | |
349 | #define SIEMENS_ADDRESS_OFFSET 0 // skip 0 bits\r | |
350 | #define SIEMENS_ADDRESS_LEN 11 // read 11 bits\r | |
351 | #define SIEMENS_COMMAND_OFFSET 11 // skip 11 bits\r | |
352 | #define SIEMENS_COMMAND_LEN 11 // read 10 + 1 command bits, last bit is only check bit\r | |
353 | #define SIEMENS_COMPLETE_DATA_LEN 22 // complete length\r | |
a7054daf | 354 | \r |
6f750020 | 355 | #define FDC_START_BIT_PULSE_TIME 2085.0e-6 // 2085 usec pulse\r |
356 | #define FDC_START_BIT_PAUSE_TIME 966.0e-6 // 966 usec pause\r | |
357 | #define FDC_PULSE_TIME 300.0e-6 // 300 usec pulse\r | |
358 | #define FDC_1_PAUSE_TIME 715.0e-6 // 715 usec pause\r | |
359 | #define FDC_0_PAUSE_TIME 220.0e-6 // 220 usec pause\r | |
c7c9a4a1 | 360 | #define FDC_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms\r |
48664931 | 361 | #define FDC_ADDRESS_OFFSET 0 // skip 0 bits\r |
d823e852 | 362 | #define FDC_ADDRESS_LEN 14 // read 14 address bits, but use only 6, shift 8 into command\r |
363 | #define FDC_COMMAND_OFFSET 20 // skip 20 bits\r | |
364 | #define FDC_COMMAND_LEN 12 // read 12 bits\r | |
48664931 | 365 | #define FDC_COMPLETE_DATA_LEN 40 // complete length\r |
366 | #define FDC_STOP_BIT 1 // has stop bit\r | |
367 | #define FDC_LSB 1 // LSB...MSB\r | |
368 | #define FDC_FLAGS 0 // flags\r | |
b5ea7869 | 369 | \r |
9e16d699 | 370 | #define RCCAR_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse\r |
371 | #define RCCAR_START_BIT_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r | |
372 | #define RCCAR_PULSE_TIME 600.0e-6 // 360 usec pulse\r | |
373 | #define RCCAR_1_PAUSE_TIME 450.0e-6 // 650 usec pause\r | |
374 | #define RCCAR_0_PAUSE_TIME 900.0e-6 // 180 usec pause\r | |
375 | #define RCCAR_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r | |
376 | #define RCCAR_ADDRESS_OFFSET 0 // skip 0 bits\r | |
c7c9a4a1 | 377 | #define RCCAR_ADDRESS_LEN 0 // read 0 address bits\r |
378 | #define RCCAR_COMMAND_OFFSET 0 // skip 0 bits\r | |
379 | #define RCCAR_COMMAND_LEN 13 // read 13 bits\r | |
9e16d699 | 380 | #define RCCAR_COMPLETE_DATA_LEN 13 // complete length\r |
381 | #define RCCAR_STOP_BIT 1 // has stop bit\r | |
48664931 | 382 | #define RCCAR_LSB 1 // LSB...MSB\r |
9e16d699 | 383 | #define RCCAR_FLAGS 0 // flags\r |
384 | \r | |
770a1a9d | 385 | #define JVC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r |
386 | #define JVC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r | |
387 | #define JVC_PULSE_TIME 560.0e-6 // 560 usec pulse\r | |
388 | #define JVC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r | |
389 | #define JVC_0_PAUSE_TIME 560.0e-6 // 560 usec pause\r | |
c7a47e89 | 390 | #define JVC_FRAME_REPEAT_PAUSE_TIME 22.0e-3 // frame repeat after 22ms\r |
770a1a9d | 391 | #define JVC_ADDRESS_OFFSET 0 // skip 0 bits\r |
392 | #define JVC_ADDRESS_LEN 4 // read 4 address bits\r | |
393 | #define JVC_COMMAND_OFFSET 4 // skip 4 bits\r | |
394 | #define JVC_COMMAND_LEN 12 // read 12 bits\r | |
395 | #define JVC_COMPLETE_DATA_LEN 16 // complete length\r | |
396 | #define JVC_STOP_BIT 1 // has stop bit\r | |
397 | #define JVC_LSB 1 // LSB...MSB\r | |
398 | #define JVC_FLAGS 0 // flags\r | |
399 | \r | |
9405f84a | 400 | #define NIKON_START_BIT_PULSE_TIME 2200.0e-6 // 2200 usec pulse\r |
401 | #define NIKON_START_BIT_PAUSE_TIME 27100.0e-6 // 27100 usec pause\r | |
03780b34 | 402 | #define NIKON_PULSE_TIME 500.0e-6 // 500 usec pulse\r |
9405f84a | 403 | #define NIKON_1_PAUSE_TIME 3500.0e-6 // 3500 usec pause\r |
404 | #define NIKON_0_PAUSE_TIME 1500.0e-6 // 1500 usec pause\r | |
405 | #define NIKON_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms\r | |
406 | #define NIKON_ADDRESS_OFFSET 0 // skip 0 bits\r | |
407 | #define NIKON_ADDRESS_LEN 0 // read 0 address bits\r | |
408 | #define NIKON_COMMAND_OFFSET 0 // skip 0 bits\r | |
409 | #define NIKON_COMMAND_LEN 2 // read 2 bits\r | |
410 | #define NIKON_COMPLETE_DATA_LEN 2 // complete length\r | |
411 | #define NIKON_STOP_BIT 1 // has stop bit\r | |
412 | #define NIKON_LSB 0 // LSB...MSB\r | |
413 | #define NIKON_FLAGS 0 // flags\r | |
414 | \r | |
111d6191 | 415 | #define KATHREIN_START_BIT_PULSE_TIME 210.0e-6 // 1340 usec pulse\r |
416 | #define KATHREIN_START_BIT_PAUSE_TIME 6218.0e-6 // 340 usec pause\r | |
417 | #define KATHREIN_1_PULSE_TIME 210.0e-6 // 1340 usec pulse\r | |
418 | #define KATHREIN_1_PAUSE_TIME 3000.0e-6 // 340 usec pause\r | |
419 | #define KATHREIN_0_PULSE_TIME 210.0e-6 // 500 usec pulse\r | |
420 | #define KATHREIN_0_PAUSE_TIME 1400.0e-6 // 1300 usec pause\r | |
421 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_TIME 4600.0e-6 // 4600 usec sync (on 6th and/or 8th bit)\r | |
422 | #define KATHREIN_FRAMES 1 // Kathrein sends 1 frame\r | |
423 | #define KATHREIN_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r | |
424 | #define KATHREIN_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r | |
2cfc146d | 425 | #define KATHREIN_ADDRESS_OFFSET 1 // skip 1 bits\r |
426 | #define KATHREIN_ADDRESS_LEN 4 // read 4 address bits\r | |
427 | #define KATHREIN_COMMAND_OFFSET 5 // skip 5 bits\r | |
428 | #define KATHREIN_COMMAND_LEN 7 // read 7 bits\r | |
111d6191 | 429 | #define KATHREIN_COMPLETE_DATA_LEN 13 // complete length\r |
430 | #define KATHREIN_STOP_BIT 1 // has stop bit\r | |
431 | #define KATHREIN_LSB 0 // MSB\r | |
432 | #define KATHREIN_FLAGS 0 // flags\r | |
433 | \r | |
a42d1ee6 | 434 | #define NETBOX_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r |
435 | #define NETBOX_START_BIT_PAUSE_TIME 800.0e-6 // 800 usec pause\r | |
436 | #define NETBOX_PULSE_TIME 800.0e-6 // 800 usec pulse\r | |
437 | #define NETBOX_PAUSE_TIME 800.0e-6 // 800 usec pause\r | |
deba2a0a | 438 | #define NETBOX_FRAMES 1 // Netbox sends 1 frame\r |
439 | #define NETBOX_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r | |
440 | #define NETBOX_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r | |
441 | #define NETBOX_ADDRESS_OFFSET 0 // skip 0 bits\r | |
442 | #define NETBOX_ADDRESS_LEN 3 // read 3 address bits\r | |
443 | #define NETBOX_COMMAND_OFFSET 3 // skip 3 bits\r | |
444 | #define NETBOX_COMMAND_LEN 13 // read 13 bits\r | |
a42d1ee6 | 445 | #define NETBOX_COMPLETE_DATA_LEN 16 // complete length\r |
deba2a0a | 446 | #define NETBOX_STOP_BIT 0 // has no stop bit\r |
447 | #define NETBOX_LSB 1 // LSB\r | |
448 | #define NETBOX_FLAGS IRMP_PARAM_FLAG_IS_SERIAL // flags\r | |
449 | \r | |
beda975f | 450 | #define MERLIN_START_BIT_PULSE_TIME 340.0e-6 // 340 usec pulse\r |
451 | #define MERLIN_START_BIT_PAUSE_TIME 300.0e-6 // 300 usec pause\r | |
452 | #define MERLIN_PULSE_TIME 380.0e-6 // 380 usec pulse\r | |
453 | #define MERLIN_PAUSE_TIME 310.0e-6 // 310 usec pause\r | |
454 | #define MERLIN_FRAMES 1 // Merlin sends 1 frame\r | |
455 | #define MERLIN_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r | |
456 | #define MERLIN_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r | |
457 | #define MERLIN_ADDRESS_OFFSET 0 // skip 0 bits\r | |
458 | #define MERLIN_ADDRESS_LEN 9 // read 16 address bits\r | |
459 | #define MERLIN_COMMAND_OFFSET 9 // skip 16 bits\r | |
460 | #define MERLIN_COMMAND_LEN 16 // read 9 bits\r | |
461 | #define MERLIN_COMPLETE_DATA_LEN 25 // complete length\r | |
462 | #define MERLIN_STOP_BIT 0 // has no stop bit\r | |
463 | #define MERLIN_LSB 1 // LSB\r | |
464 | #define MERLIN_FLAGS IRMP_PARAM_FLAG_IS_SERIAL // flags\r | |
465 | \r | |
f50e01e7 | 466 | #define LEGO_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz)\r |
467 | #define LEGO_START_BIT_PAUSE_TIME 1026.0e-6 // 1026 usec pause (39 x 1/38kHz)\r | |
468 | #define LEGO_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz)\r | |
469 | #define LEGO_1_PAUSE_TIME 553.0e-6 // 553 usec pause (21 x 1/38kHz)\r | |
470 | #define LEGO_0_PAUSE_TIME 263.0e-6 // 263 usec pause (10 x 1/38kHz)\r | |
471 | #define LEGO_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r | |
472 | #define LEGO_ADDRESS_OFFSET 0 // skip 0 bits\r | |
473 | #define LEGO_ADDRESS_LEN 0 // read 0 address bits\r | |
474 | #define LEGO_COMMAND_OFFSET 0 // skip 0 bits\r | |
475 | #define LEGO_COMMAND_LEN 16 // read 16 bits (12 command + 4 CRC)\r | |
476 | #define LEGO_COMPLETE_DATA_LEN 16 // complete length\r | |
477 | #define LEGO_STOP_BIT 1 // has stop bit\r | |
478 | #define LEGO_LSB 0 // MSB...LSB\r | |
479 | #define LEGO_FLAGS 0 // flags\r | |
480 | \r | |
beda975f | 481 | #define THOMSON_PULSE_TIME 550.0e-6 // 550 usec pulse\r |
482 | #define THOMSON_1_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r | |
483 | #define THOMSON_0_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r | |
484 | #define THOMSON_FRAMES 1 // THOMSON sends 1 frame\r | |
485 | #define THOMSON_AUTO_REPETITION_PAUSE_TIME 65.0e-3 // repetition after 65ms\r | |
486 | #define THOMSON_FRAME_REPEAT_PAUSE_TIME 65.0e-3 // frame repeat after 65ms\r | |
487 | #define THOMSON_ADDRESS_OFFSET 0 // skip 0 bits\r | |
488 | #define THOMSON_ADDRESS_LEN 4 // read 4 address bits\r | |
489 | #define THOMSON_COMMAND_OFFSET 5 // skip 4 address bits + 1 toggle bit\r | |
490 | #define THOMSON_COMMAND_LEN 7 // read 7 command bits\r | |
491 | #define THOMSON_COMPLETE_DATA_LEN 12 // complete length\r | |
492 | #define THOMSON_STOP_BIT 1 // has stop bit\r | |
493 | #define THOMSON_LSB 0 // MSB...LSB\r | |
494 | #define THOMSON_FLAGS 0 // flags\r | |
495 | \r | |
deba2a0a | 496 | #define IMON_START_BIT_PULSE_TIME 1333.0e-6 // 1333 usec pulse\r |
497 | #define IMON_START_BIT_PAUSE_TIME 1172.0e-6 // 1333 usec pause\r | |
498 | #define IMON_PULSE_TIME 500.0e-6 // 500 usec pulse\r | |
499 | #define IMON_PAUSE_TIME 500.0e-6 // 500 usec pause\r | |
500 | #define IMON_FRAMES 1 // Imon sends 1 frame\r | |
501 | #define IMON_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r | |
502 | #define IMON_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r | |
503 | #define IMON_ADDRESS_OFFSET 0 // skip 0 bits\r | |
504 | #define IMON_ADDRESS_LEN 0 // read 0 address bits\r | |
505 | #define IMON_COMMAND_OFFSET 26 // skip 26 bits\r | |
506 | #define IMON_COMMAND_LEN 16 // read last 16 bits, ignore rest\r | |
507 | #define IMON_COMPLETE_DATA_LEN 42 // complete length, last is stop bit\r | |
508 | #define IMON_STOP_BIT 1 // has stop bit\r | |
509 | #define IMON_LSB 1 // LSB\r | |
510 | #define IMON_FLAGS IRMP_PARAM_FLAG_IS_SERIAL // flags\r | |
511 | \r | |
770a1a9d | 512 | #define AUTO_FRAME_REPETITION_TIME 80.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms\r |
513 | // KASEIKYO: automatic repetition after 75ms\r | |
4225a882 | 514 | \r |
515 | #define TRUE 1\r | |
516 | #define FALSE 0\r | |
517 | \r | |
518 | #define IRMP_FLAG_REPETITION 0x01\r | |
519 | \r | |
520 | typedef struct\r | |
521 | {\r | |
a7054daf | 522 | uint8_t protocol; // protocol, i.e. NEC_PROTOCOL\r |
523 | uint16_t address; // address\r | |
524 | uint16_t command; // command\r | |
525 | uint8_t flags; // flags, e.g. repetition\r | |
4225a882 | 526 | } IRMP_DATA;\r |
527 | \r | |
1f54e86c | 528 | extern void irmp_init (void);\r |
529 | extern uint8_t irmp_get_data (IRMP_DATA *);\r | |
530 | extern uint8_t irmp_is_busy (void);\r | |
531 | extern uint8_t irmp_ISR (void);\r | |
4225a882 | 532 | \r |
1f54e86c | 533 | #if IRMP_PROTOCOL_NAMES == 1\r |
534 | extern char * irmp_protocol_names[IRMP_N_PROTOCOLS + 1];\r | |
4225a882 | 535 | #endif\r |
536 | \r | |
7644ac04 | 537 | #if IRMP_USE_CALLBACK == 1\r |
538 | extern void irmp_set_callback_ptr (void (*cb)(uint8_t));\r | |
539 | #endif // IRSND_USE_CALLBACK == 1\r | |
540 | \r | |
4225a882 | 541 | #endif /* _WC_IRMP_H_ */\r |