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Version 2.3.9: added ORTEK and TELEFUNKEN protocol
[irmp.git] / irsnd.c
CommitLineData
4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
2ac088b2 4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
7644ac04 6 * Supported mikrocontrollers:\r
7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
2ac088b2 10 * ATtiny44 ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
e664a9f3 13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
7644ac04 14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
e664a9f3 16 * $Id: irsnd.c,v 1.68 2013/03/12 12:49:59 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
2ac088b2 36#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
08f2dd9d 37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
46#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
47# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 48# define IRSND_PORT_LETTER B\r
49# define IRSND_BIT_NUMBER 0\r
08f2dd9d 50# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 51# define IRSND_PORT_LETTER B\r
52# define IRSND_BIT_NUMBER 1\r
08f2dd9d 53# else\r
54# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
55# endif // IRSND_OCx\r
21a4e0ee 56#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 57# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 58# define IRSND_PORT_LETTER A\r
59# define IRSND_BIT_NUMBER 2\r
90387f65 60# else\r
61# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
62# endif // IRSND_OCx\r
08f2dd9d 63#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
64# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 65# define IRSND_PORT_LETTER B\r
66# define IRSND_BIT_NUMBER 3\r
08f2dd9d 67# else\r
68# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
69# endif // IRSND_OCx\r
70#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
71# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 72# define IRSND_PORT_LETTER D\r
73# define IRSND_BIT_NUMBER 7\r
08f2dd9d 74# else\r
75# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
76# endif // IRSND_OCx\r
77#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
78# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 79# define IRSND_PORT_LETTER B\r
80# define IRSND_BIT_NUMBER 1\r
08f2dd9d 81# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 82# define IRSND_PORT_LETTER B\r
83# define IRSND_BIT_NUMBER 0\r
08f2dd9d 84# else\r
85# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
86# endif // IRSND_OCx\r
f50e01e7 87#elif defined (__AVR_ATmega164__) \\r
88 || defined (__AVR_ATmega324__) \\r
89 || defined (__AVR_ATmega644__) \\r
90 || defined (__AVR_ATmega644P__) \\r
0f700c8e 91 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
93# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 94# define IRSND_PORT_LETTER D\r
95# define IRSND_BIT_NUMBER 7\r
08f2dd9d 96# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 97# define IRSND_PORT_LETTER D\r
98# define IRSND_BIT_NUMBER 6\r
08f2dd9d 99# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 100# define IRSND_PORT_LETTER B\r
101# define IRSND_BIT_NUMBER 3\r
08f2dd9d 102# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 103# define IRSND_PORT_LETTER B\r
104# define IRSND_BIT_NUMBER 4\r
08f2dd9d 105# else\r
106# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
107# endif // IRSND_OCx\r
f50e01e7 108#elif defined (__AVR_ATmega48__) \\r
109 || defined (__AVR_ATmega88__) \\r
7644ac04 110 || defined (__AVR_ATmega88P__) \\r
f50e01e7 111 || defined (__AVR_ATmega168__) \\r
1f54e86c 112 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
114# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 115# define IRSND_PORT_LETTER B\r
116# define IRSND_BIT_NUMBER 3\r
08f2dd9d 117# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 118# define IRSND_PORT_LETTER D\r
119# define IRSND_BIT_NUMBER 3\r
08f2dd9d 120# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 121# define IRSND_PORT_LETTER D\r
122# define IRSND_BIT_NUMBER 6\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 5\r
08f2dd9d 126# else\r
127# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
128# endif // IRSND_OCx\r
f874da09 129#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 130# if IRSND_OCx == IRSND_OC0 \r
f874da09 131# define IRSND_PORT_LETTER B\r
132# define IRSND_BIT_NUMBER 0\r
08f2dd9d 133# elif IRSND_OCx == IRSND_OC1A \r
f874da09 134# define IRSND_PORT_LETTER D\r
135# define IRSND_BIT_NUMBER 5\r
08f2dd9d 136# elif IRSND_OCx == IRSND_OC1B \r
f874da09 137# define IRSND_PORT_LETTER E\r
138# define IRSND_BIT_NUMBER 2\r
08f2dd9d 139# else\r
140# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
141# endif // IRSND_OCx\r
9c86ff1a 142#elif defined (PIC_C18) //Microchip C18 compiler\r
143 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 144#elif defined (ARM_STM32) //STM32\r
145 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 146#else\r
08f2dd9d 147# if !defined (unix) && !defined (WIN32)\r
148# error mikrocontroller not defined, please fill in definitions here.\r
149# endif // unix, WIN32\r
f50e01e7 150#endif // __AVR...\r
151\r
f874da09 152#if defined(ATMEL_AVR)\r
153# define _CONCAT(a,b) a##b\r
154# define CONCAT(a,b) _CONCAT(a,b)\r
155# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
156# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
157# define IRSND_BIT IRSND_BIT_NUMBER\r
158#endif\r
159\r
9405f84a 160#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 161 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 162#else\r
9c86ff1a 163 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 164#endif\r
165\r
f50e01e7 166/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
167 * IR timings\r
168 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
169 */\r
4225a882 170#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
171#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
172#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
173#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
174#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
a7054daf 175#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
176#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 177\r
178#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
179#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 180#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 181#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
182#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
183#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
a7054daf 184#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 185\r
186#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
187#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
188#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
189#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
190#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
a7054daf 191#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 192\r
a7054daf 193#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
194#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 195\r
4225a882 196#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
197#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
198#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
199#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
200#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
a7054daf 201#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 202\r
770a1a9d 203#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
204#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
205#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
206#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
207#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
208#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
209#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
210\r
4225a882 211#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
212#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
213#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
214#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
215#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
a7054daf 216#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 217\r
218#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
219#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
a7054daf 220#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 221\r
222#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
223#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
224#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
225#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
a7054daf 226#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 227\r
228#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
229#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
230#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
a7054daf 231#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
232#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 233\r
beda975f 234#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
235#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
236#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
237#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
238#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
239\r
4225a882 240#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
241#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
242#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
243#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
244#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
a7054daf 245#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 246\r
247#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
248#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
249#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
250#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
251#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
252#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
a7054daf 253#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
254#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 255\r
5481e9cd 256#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
257#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
258#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
259#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
260#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
261#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
262#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
263#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
264#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
265#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
266#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
a7054daf 267#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 268\r
9c86ff1a 269#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
270#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
a7054daf 271#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
272#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 273#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 274\r
a48187fa 275#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
276\r
02ccdb69 277#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
278#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
279#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 280\r
08f2dd9d 281#ifdef PIC_C18 // PIC C18\r
282# define IRSND_FREQ_TYPE uint8_t\r
283# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
284# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
285# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
286# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
287# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
288# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
289# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
290#elif defined (ARM_STM32) // STM32\r
291# define IRSND_FREQ_TYPE uint32_t\r
292# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
293# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
294# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
295# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
296# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
297# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
298# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
299#else // AVR\r
a03ad359 300# if F_CPU >= 16000000L\r
301# define AVR_PRESCALER 8\r
302# else\r
303# define AVR_PRESCALER 1\r
304# endif\r
08f2dd9d 305# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 306# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
307# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
308# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
309# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
310# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
311# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
312# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 313#endif\r
4225a882 314\r
48664931 315#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
316#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
317#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
318#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
319#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
320#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 321\r
c7c9a4a1 322#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
323#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
324#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
325#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
326#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
327#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
328\r
c7a47e89 329#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
330#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
331#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
332#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
333#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
334#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
335#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
336\r
9405f84a 337#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
338#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
339#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
340#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
341#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
342#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 343#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
344\r
345#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
346#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
347#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
348#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
349#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
350#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
351#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 352\r
fa09ce10 353#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r
354#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r
355#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r
356#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r
357#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
358#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
359\r
9c86ff1a 360static volatile uint8_t irsnd_busy = 0;\r
361static volatile uint8_t irsnd_protocol = 0;\r
362static volatile uint8_t irsnd_buffer[6] = {0};\r
363static volatile uint8_t irsnd_repeat = 0;\r
4225a882 364static volatile uint8_t irsnd_is_on = FALSE;\r
365\r
f50e01e7 366#if IRSND_USE_CALLBACK == 1\r
367static void (*irsnd_callback_ptr) (uint8_t);\r
368#endif // IRSND_USE_CALLBACK == 1\r
369\r
4225a882 370/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
371 * Switch PWM on\r
4225a882 372 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
373 */\r
374static void\r
375irsnd_on (void)\r
376{\r
377 if (! irsnd_is_on)\r
378 {\r
379#ifndef DEBUG\r
08f2dd9d 380# if defined(PIC_C18) // PIC C18\r
e664a9f3 381 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
08f2dd9d 382# elif defined (ARM_STM32) // STM32\r
e664a9f3 383 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
384 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
385 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
08f2dd9d 386# else // AVR\r
387# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 388 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 389# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 390 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 391# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 392 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 393# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 394 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 395# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 396 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 397# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 398 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 399# else\r
400# error wrong value of IRSND_OCx\r
401# endif // IRSND_OCx\r
402# endif // C18\r
4225a882 403#endif // DEBUG\r
f50e01e7 404\r
405#if IRSND_USE_CALLBACK == 1\r
e664a9f3 406 if (irsnd_callback_ptr)\r
407 {\r
408 (*irsnd_callback_ptr) (TRUE);\r
409 }\r
f50e01e7 410#endif // IRSND_USE_CALLBACK == 1\r
411\r
e664a9f3 412 irsnd_is_on = TRUE;\r
4225a882 413 }\r
414}\r
415\r
416/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
417 * Switch PWM off\r
418 * @details Switches PWM off\r
419 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
420 */\r
421static void\r
422irsnd_off (void)\r
423{\r
424 if (irsnd_is_on)\r
425 {\r
426#ifndef DEBUG\r
9c86ff1a 427 \r
08f2dd9d 428# if defined(PIC_C18) // PIC C18\r
e664a9f3 429 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
08f2dd9d 430# elif defined (ARM_STM32) // STM32\r
e664a9f3 431 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
432 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
433 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
434 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
08f2dd9d 435# else //AVR\r
9c86ff1a 436\r
08f2dd9d 437# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 438 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 439# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 440 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 441# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 442 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 443# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 444 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 445# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 446 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 447# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 448 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 449# else\r
450# error wrong value of IRSND_OCx\r
451# endif // IRSND_OCx\r
e664a9f3 452 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 453# endif //C18\r
4225a882 454#endif // DEBUG\r
f50e01e7 455\r
456#if IRSND_USE_CALLBACK == 1\r
e664a9f3 457 if (irsnd_callback_ptr)\r
458 {\r
459 (*irsnd_callback_ptr) (FALSE);\r
460 }\r
f50e01e7 461#endif // IRSND_USE_CALLBACK == 1\r
462\r
e664a9f3 463 irsnd_is_on = FALSE;\r
4225a882 464 }\r
465}\r
466\r
467/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
468 * Set PWM frequency\r
469 * @details sets pwm frequency\r
470 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
471 */\r
472static void\r
08f2dd9d 473irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 474{\r
475#ifndef DEBUG\r
08f2dd9d 476# if defined(PIC_C18) // PIC C18\r
e664a9f3 477 OpenPWM(freq); \r
478 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
08f2dd9d 479# elif defined (ARM_STM32) // STM32\r
e664a9f3 480 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 481\r
e664a9f3 482 if (TimeBaseFreq == 0)\r
483 {\r
484 RCC_ClocksTypeDef RCC_ClocksStructure;\r
485 /* Get system clocks and store timer clock in variable */\r
486 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
08f2dd9d 487# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 488 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
489 {\r
490 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
491 }\r
492 else\r
493 {\r
494 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
495 }\r
08f2dd9d 496# else\r
e664a9f3 497 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
498 {\r
499 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
500 }\r
501 else\r
502 {\r
503 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
504 }\r
08f2dd9d 505# endif\r
e664a9f3 506 }\r
08f2dd9d 507\r
e664a9f3 508 freq = TimeBaseFreq/freq;\r
08f2dd9d 509\r
e664a9f3 510 /* Set frequency */\r
511 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
512 /* Set duty cycle */\r
513 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
08f2dd9d 514# else // AVR\r
515\r
516# if IRSND_OCx == IRSND_OC2\r
e664a9f3 517 OCR2 = freq; // use register OCR2 for OC2\r
08f2dd9d 518# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 519 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 520# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 521 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 522# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 523 OCR0 = freq; // use register OCR2 for OC2\r
08f2dd9d 524# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 525 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 526# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 527 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 528# else\r
529# error wrong value of IRSND_OCx\r
530# endif\r
531# endif //PIC_C18\r
4225a882 532#endif // DEBUG\r
533}\r
534\r
535/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
536 * Initialize the PWM\r
537 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
538 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
539 */\r
540void\r
541irsnd_init (void)\r
542{\r
543#ifndef DEBUG\r
08f2dd9d 544# if defined(PIC_C18) // PIC C18\r
e664a9f3 545 OpenTimer;\r
546 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
547 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
08f2dd9d 548# elif defined (ARM_STM32) // STM32\r
e664a9f3 549 GPIO_InitTypeDef GPIO_InitStructure;\r
550 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
551 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 552\r
553 /* GPIOx clock enable */\r
554# if defined (ARM_STM32L1XX)\r
e664a9f3 555 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 556# elif defined (ARM_STM32F10X)\r
e664a9f3 557 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 558# elif defined (ARM_STM32F4XX)\r
e664a9f3 559 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 560# endif\r
561\r
e664a9f3 562 /* GPIO Configuration */\r
563 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
08f2dd9d 564# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
e664a9f3 565 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
566 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
567 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
568 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
569 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
570 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
08f2dd9d 571# elif defined (ARM_STM32F10X)\r
e664a9f3 572 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
573 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
574 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
575 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
08f2dd9d 576# endif\r
577\r
e664a9f3 578 /* TIMx clock enable */\r
08f2dd9d 579# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 580 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 581# else\r
e664a9f3 582 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 583# endif\r
08f2dd9d 584\r
e664a9f3 585 /* Time base configuration */\r
586 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
587 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
588 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
589 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
590 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
591\r
592 /* PWM1 Mode configuration */\r
593 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
594 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
595 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
596 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
597 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
598\r
599 /* Preload configuration */\r
600 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
601 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
602\r
603 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
08f2dd9d 604# else // AVR\r
e664a9f3 605 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
606 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
08f2dd9d 607\r
608# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 609 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 610# if AVR_PRESCALER == 8\r
e664a9f3 611 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 612# else\r
e664a9f3 613 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 614# endif\r
08f2dd9d 615# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
e664a9f3 616 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 617# if AVR_PRESCALER == 8\r
e664a9f3 618 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 619# else\r
e664a9f3 620 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 621# endif\r
08f2dd9d 622# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 623 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 624# if AVR_PRESCALER == 8\r
e664a9f3 625 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 626# else\r
e664a9f3 627 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 628# endif\r
08f2dd9d 629# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
e664a9f3 630 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 631# if AVR_PRESCALER == 8\r
e664a9f3 632 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 633# else\r
e664a9f3 634 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 635# endif\r
08f2dd9d 636# else\r
637# error wrong value of IRSND_OCx\r
638# endif\r
e664a9f3 639 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
08f2dd9d 640# endif //PIC_C18\r
4225a882 641#endif // DEBUG\r
642}\r
643\r
f50e01e7 644#if IRSND_USE_CALLBACK == 1\r
645void\r
646irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
647{\r
648 irsnd_callback_ptr = cb;\r
649}\r
650#endif // IRSND_USE_CALLBACK == 1\r
651\r
4225a882 652uint8_t\r
653irsnd_is_busy (void)\r
654{\r
655 return irsnd_busy;\r
656}\r
657\r
658static uint16_t\r
659bitsrevervse (uint16_t x, uint8_t len)\r
660{\r
661 uint16_t xx = 0;\r
662\r
663 while(len)\r
664 {\r
e664a9f3 665 xx <<= 1;\r
666 if (x & 1)\r
667 {\r
668 xx |= 1;\r
669 }\r
670 x >>= 1;\r
671 len--;\r
4225a882 672 }\r
673 return xx;\r
674}\r
675\r
676\r
9547ee89 677#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
678static uint8_t sircs_additional_bitlen;\r
679#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
680\r
4225a882 681uint8_t\r
879b06c2 682irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 683{\r
684#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
685 static uint8_t toggle_bit_recs80;\r
686#endif\r
687#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
688 static uint8_t toggle_bit_recs80ext;\r
689#endif\r
690#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
691 static uint8_t toggle_bit_rc5;\r
9547ee89 692#endif\r
779fbc81 693#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 694 static uint8_t toggle_bit_rc6;\r
beda975f 695#endif\r
696#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
697 static uint8_t toggle_bit_thomson;\r
4225a882 698#endif\r
699 uint16_t address;\r
700 uint16_t command;\r
701\r
879b06c2 702 if (do_wait)\r
4225a882 703 {\r
e664a9f3 704 while (irsnd_busy)\r
705 {\r
706 // do nothing;\r
707 }\r
879b06c2 708 }\r
709 else if (irsnd_busy)\r
710 {\r
e664a9f3 711 return (FALSE);\r
4225a882 712 }\r
713\r
714 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 715 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 716\r
717 switch (irsnd_protocol)\r
718 {\r
719#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 720 case IRMP_SIRCS_PROTOCOL:\r
721 {\r
722 // uint8_t sircs_additional_command_len;\r
723 uint8_t sircs_additional_address_len;\r
724\r
725 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
726\r
727 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
728 {\r
729 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
730 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
731 }\r
732 else\r
733 {\r
734 // sircs_additional_command_len = sircs_additional_bitlen;\r
735 sircs_additional_address_len = 0;\r
736 }\r
737\r
738 command = bitsrevervse (irmp_data_p->command, 15);\r
739\r
740 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
741 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
742\r
743 if (sircs_additional_address_len > 0)\r
744 {\r
745 address = bitsrevervse (irmp_data_p->address, 5);\r
746 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
747 irsnd_buffer[2] = (address & 0x000F) << 4;\r
748 }\r
749 irsnd_busy = TRUE;\r
750 break;\r
751 }\r
4225a882 752#endif\r
753#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 754 case IRMP_APPLE_PROTOCOL:\r
755 {\r
756 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
757 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
758\r
759 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
760 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
761\r
762 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
763\r
764 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
765 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
766 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
767 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
768 irsnd_busy = TRUE;\r
769 break;\r
770 }\r
771 case IRMP_NEC_PROTOCOL:\r
772 {\r
773 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
774 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
775\r
776 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
777 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
778 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
779 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
780 irsnd_busy = TRUE;\r
781 break;\r
782 }\r
7644ac04 783#endif\r
784#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 785 case IRMP_NEC16_PROTOCOL:\r
786 {\r
787 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
788 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 789\r
e664a9f3 790 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
791 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
792 irsnd_busy = TRUE;\r
793 break;\r
794 }\r
7644ac04 795#endif\r
796#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 797 case IRMP_NEC42_PROTOCOL:\r
798 {\r
799 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
800 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
801\r
802 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
803 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
804 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
805 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
806 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
807 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
808 irsnd_busy = TRUE;\r
809 break;\r
810 }\r
4225a882 811#endif\r
812#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 813 case IRMP_SAMSUNG_PROTOCOL:\r
814 {\r
815 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
816 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
817\r
818 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
819 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
820 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
821 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
822 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
823 irsnd_busy = TRUE;\r
824 break;\r
825 }\r
826 case IRMP_SAMSUNG32_PROTOCOL:\r
827 {\r
828 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
829 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
830\r
831 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
832 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
833 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
834 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
835 irsnd_busy = TRUE;\r
836 break;\r
837 }\r
4225a882 838#endif\r
839#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 840 case IRMP_MATSUSHITA_PROTOCOL:\r
841 {\r
842 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
843 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
844\r
845 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
846 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
847 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
848 irsnd_busy = TRUE;\r
849 break;\r
850 }\r
4225a882 851#endif\r
770a1a9d 852#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 853 case IRMP_KASEIKYO_PROTOCOL:\r
854 {\r
855 uint8_t xor_value;\r
856 uint16_t genre2;\r
770a1a9d 857\r
e664a9f3 858 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
859 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
860 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 861\r
e664a9f3 862 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 863\r
e664a9f3 864 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
865 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
866 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
867 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
868 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
770a1a9d 869\r
e664a9f3 870 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 871\r
e664a9f3 872 irsnd_buffer[5] = xor_value;\r
873 irsnd_busy = TRUE;\r
874 break;\r
875 }\r
770a1a9d 876#endif\r
4225a882 877#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 878 case IRMP_RECS80_PROTOCOL:\r
879 {\r
880 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
4225a882 881\r
e664a9f3 882 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
883 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
884 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
885 irsnd_busy = TRUE;\r
886 break;\r
887 }\r
4225a882 888#endif\r
889#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 890 case IRMP_RECS80EXT_PROTOCOL:\r
891 {\r
892 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
4225a882 893\r
e664a9f3 894 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
895 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
896 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
897 irsnd_busy = TRUE;\r
898 break;\r
899 }\r
4225a882 900#endif\r
901#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 902 case IRMP_RC5_PROTOCOL:\r
903 {\r
904 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
4225a882 905\r
e664a9f3 906 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
907 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
908 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
909 irsnd_busy = TRUE;\r
910 break;\r
911 }\r
4225a882 912#endif\r
9547ee89 913#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 914 case IRMP_RC6_PROTOCOL:\r
915 {\r
916 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
9547ee89 917\r
e664a9f3 918 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
919 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
920 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
921 irsnd_busy = TRUE;\r
922 break;\r
923 }\r
9547ee89 924#endif\r
925#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 926 case IRMP_RC6A_PROTOCOL:\r
927 {\r
928 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
929\r
930 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
931 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
932 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
933 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
934 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
935 irsnd_busy = TRUE;\r
936 break;\r
937 }\r
9547ee89 938#endif\r
4225a882 939#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 940 case IRMP_DENON_PROTOCOL:\r
941 {\r
942 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
943 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
944 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
945 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
946 irsnd_busy = TRUE;\r
947 break;\r
948 }\r
4225a882 949#endif\r
beda975f 950#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 951 case IRMP_THOMSON_PROTOCOL:\r
952 {\r
953 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
beda975f 954\r
e664a9f3 955 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
956 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
957 irsnd_busy = TRUE;\r
958 break;\r
959 }\r
beda975f 960#endif\r
4225a882 961#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 962 case IRMP_NUBERT_PROTOCOL:\r
963 {\r
964 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
965 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
966 irsnd_busy = TRUE;\r
967 break;\r
968 }\r
5481e9cd 969#endif\r
970#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 971 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
972 {\r
973 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
974 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
975 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
976 irsnd_busy = TRUE;\r
977 break;\r
978 }\r
4225a882 979#endif\r
5b437ff6 980#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 981 case IRMP_GRUNDIG_PROTOCOL:\r
982 {\r
983 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r
5b437ff6 984\r
e664a9f3 985 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
986 irsnd_buffer[1] = 0xC0; // 11\r
987 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
988 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
d155e9ab 989\r
e664a9f3 990 irsnd_busy = TRUE;\r
991 break;\r
992 }\r
d155e9ab 993#endif\r
a48187fa 994#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 995 case IRMP_IR60_PROTOCOL:\r
996 {\r
997 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 998#if 0\r
e664a9f3 999 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
1000 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 1001#else\r
e664a9f3 1002 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
1003 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
08f2dd9d 1004#endif\r
a48187fa 1005\r
e664a9f3 1006 irsnd_busy = TRUE;\r
1007 break;\r
1008 }\r
a48187fa 1009#endif\r
d155e9ab 1010#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1011 case IRMP_NOKIA_PROTOCOL:\r
1012 {\r
1013 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1014 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1015\r
1016 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1017 irsnd_buffer[1] = 0xFF; // 11111111\r
1018 irsnd_buffer[2] = 0x80; // 1\r
1019 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1020 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1021 irsnd_buffer[5] = (address << 7); // A\r
1022\r
1023 irsnd_busy = TRUE;\r
1024 break;\r
1025 }\r
5b437ff6 1026#endif\r
a7054daf 1027#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1028 case IRMP_SIEMENS_PROTOCOL:\r
1029 {\r
1030 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r
1031 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r
1032 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
9405f84a 1033\r
e664a9f3 1034 irsnd_busy = TRUE;\r
1035 break;\r
1036 }\r
b5ea7869 1037#endif\r
48664931 1038#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1039 case IRMP_FDC_PROTOCOL:\r
1040 {\r
1041 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1042 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
1043\r
1044 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1045 irsnd_buffer[1] = 0; // 00000000\r
1046 irsnd_buffer[2] = 0; // 0000RRRR\r
1047 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1048 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1049 irsnd_busy = TRUE;\r
1050 break;\r
1051 }\r
c7c9a4a1 1052#endif\r
1053#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1054 case IRMP_RCCAR_PROTOCOL:\r
1055 {\r
1056 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1057 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1058\r
1059 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1060 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1061 \r
1062 irsnd_busy = TRUE;\r
1063 break;\r
1064 }\r
a7054daf 1065#endif\r
c7a47e89 1066#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1067 case IRMP_JVC_PROTOCOL:\r
1068 {\r
1069 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1070 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
c7a47e89 1071\r
e664a9f3 1072 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1073 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
c7a47e89 1074\r
e664a9f3 1075 irsnd_busy = TRUE;\r
1076 break;\r
1077 }\r
c7a47e89 1078#endif\r
9405f84a 1079#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1080 case IRMP_NIKON_PROTOCOL:\r
1081 {\r
1082 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1083 irsnd_busy = TRUE;\r
1084 break;\r
1085 }\r
f50e01e7 1086#endif\r
1087#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1088 case IRMP_LEGO_PROTOCOL:\r
1089 {\r
1090 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
fa09ce10 1091\r
e664a9f3 1092 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1093 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1094 irsnd_busy = TRUE;\r
1095 break;\r
1096 }\r
fa09ce10 1097#endif\r
1098#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1099 case IRMP_A1TVBOX_PROTOCOL:\r
1100 {\r
1101 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r
1102 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r
1103 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r
1104\r
1105 irsnd_busy = TRUE;\r
1106 break;\r
1107 }\r
1108#endif\r
1109 default:\r
1110 {\r
1111 break;\r
1112 }\r
4225a882 1113 }\r
1114\r
1115 return irsnd_busy;\r
1116}\r
1117\r
beda975f 1118void\r
1119irsnd_stop (void)\r
1120{\r
acf7fb44 1121 irsnd_repeat = 0;\r
beda975f 1122}\r
1123\r
4225a882 1124/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1125 * ISR routine\r
1126 * @details ISR routine, called 10000 times per second\r
1127 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1128 */\r
1129uint8_t\r
1130irsnd_ISR (void)\r
1131{\r
a48187fa 1132 static uint8_t send_trailer = FALSE;\r
1133 static uint8_t current_bit = 0xFF;\r
1134 static uint8_t pulse_counter = 0;\r
1135 static IRSND_PAUSE_LEN pause_counter = 0;\r
1136 static uint8_t startbit_pulse_len = 0;\r
1137 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1138 static uint8_t pulse_1_len = 0;\r
1139 static uint8_t pause_1_len = 0;\r
1140 static uint8_t pulse_0_len = 0;\r
1141 static uint8_t pause_0_len = 0;\r
1142 static uint8_t has_stop_bit = 0;\r
1143 static uint8_t new_frame = TRUE;\r
1144 static uint8_t complete_data_len = 0;\r
1145 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1146 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1147 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1148 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1149 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1150 static uint8_t repeat_counter = 0; // repeat counter\r
1151 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1152 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1153#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1154 static uint8_t last_bit_value;\r
5481e9cd 1155#endif\r
a48187fa 1156 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1157 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1158\r
1159 if (irsnd_busy)\r
1160 {\r
e664a9f3 1161 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1162 {\r
1163 if (auto_repetition_counter > 0)\r
1164 {\r
1165 auto_repetition_pause_counter++;\r
4225a882 1166\r
08f2dd9d 1167#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1168 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1169 {\r
1170 repeat_frame_pause_len--;\r
1171 }\r
08f2dd9d 1172#endif\r
1173\r
e664a9f3 1174 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
1175 {\r
1176 auto_repetition_pause_counter = 0;\r
4225a882 1177\r
08f2dd9d 1178#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1179 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
1180 {\r
1181 current_bit = 16;\r
1182 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1183 }\r
1184 else\r
08f2dd9d 1185#endif\r
1186#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1187 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
1188 {\r
1189 current_bit = 15;\r
1190 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1191 }\r
1192 else\r
08f2dd9d 1193#endif\r
1194#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1195 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1196 {\r
1197 current_bit = 7;\r
1198 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1199 }\r
1200 else\r
08f2dd9d 1201#endif\r
1202#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1203 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
1204 {\r
1205 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
1206 {\r
1207 current_bit = 23;\r
1208 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1209 }\r
1210 else // nokia stop frame\r
1211 {\r
1212 current_bit = 0xFF;\r
1213 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1214 }\r
1215 }\r
1216 else\r
1217#endif\r
1218 {\r
1219 ;\r
1220 }\r
1221 }\r
1222 else\r
1223 {\r
4225a882 1224#ifdef DEBUG\r
e664a9f3 1225 if (irsnd_is_on)\r
1226 {\r
1227 putchar ('0');\r
1228 }\r
1229 else\r
1230 {\r
1231 putchar ('1');\r
1232 }\r
1233#endif\r
1234 return irsnd_busy;\r
1235 }\r
1236 }\r
beda975f 1237#if 0\r
e664a9f3 1238 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1239#else\r
e664a9f3 1240 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1241#endif\r
e664a9f3 1242 {\r
1243 packet_repeat_pause_counter++;\r
a7054daf 1244\r
1245#ifdef DEBUG\r
e664a9f3 1246 if (irsnd_is_on)\r
1247 {\r
1248 putchar ('0');\r
1249 }\r
1250 else\r
1251 {\r
1252 putchar ('1');\r
1253 }\r
1254#endif\r
1255 return irsnd_busy;\r
1256 }\r
1257 else\r
1258 {\r
1259 if (send_trailer)\r
1260 {\r
1261 irsnd_busy = FALSE;\r
1262 send_trailer = FALSE;\r
1263 return irsnd_busy;\r
1264 }\r
1265 \r
1266 n_repeat_frames = irsnd_repeat;\r
1267\r
1268 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1269 {\r
1270 n_repeat_frames = 255;\r
1271 }\r
1272\r
1273 packet_repeat_pause_counter = 0;\r
1274 pulse_counter = 0;\r
1275 pause_counter = 0;\r
1276\r
1277 switch (irsnd_protocol)\r
1278 {\r
4225a882 1279#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1280 case IRMP_SIRCS_PROTOCOL:\r
1281 {\r
1282 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
1283 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
1284 pulse_1_len = SIRCS_1_PULSE_LEN;\r
1285 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
1286 pulse_0_len = SIRCS_0_PULSE_LEN;\r
1287 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
1288 has_stop_bit = SIRCS_STOP_BIT;\r
1289 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
1290 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1291 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1292 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
1293 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1294 break;\r
1295 }\r
4225a882 1296#endif\r
1297#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1298 case IRMP_NEC_PROTOCOL:\r
1299 {\r
1300 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1301\r
1302 if (repeat_counter > 0)\r
1303 {\r
1304 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
1305 complete_data_len = 0;\r
1306 }\r
1307 else\r
1308 {\r
1309 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1310 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1311 }\r
1312\r
1313 pulse_1_len = NEC_PULSE_LEN;\r
1314 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1315 pulse_0_len = NEC_PULSE_LEN;\r
1316 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1317 has_stop_bit = NEC_STOP_BIT;\r
1318 n_auto_repetitions = 1; // 1 frame\r
1319 auto_repetition_pause_len = 0;\r
1320 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1321 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1322 break;\r
1323 }\r
4225a882 1324#endif\r
7644ac04 1325#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1326 case IRMP_NEC16_PROTOCOL:\r
1327 {\r
1328 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1329 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1330 pulse_1_len = NEC_PULSE_LEN;\r
1331 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1332 pulse_0_len = NEC_PULSE_LEN;\r
1333 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1334 has_stop_bit = NEC_STOP_BIT;\r
1335 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1336 n_auto_repetitions = 1; // 1 frame\r
1337 auto_repetition_pause_len = 0;\r
1338 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1339 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1340 break;\r
1341 }\r
7644ac04 1342#endif\r
1343#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1344 case IRMP_NEC42_PROTOCOL:\r
1345 {\r
1346 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1347 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1348 pulse_1_len = NEC_PULSE_LEN;\r
1349 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1350 pulse_0_len = NEC_PULSE_LEN;\r
1351 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1352 has_stop_bit = NEC_STOP_BIT;\r
1353 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1354 n_auto_repetitions = 1; // 1 frame\r
1355 auto_repetition_pause_len = 0;\r
1356 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1357 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1358 break;\r
1359 }\r
7644ac04 1360#endif\r
4225a882 1361#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1362 case IRMP_SAMSUNG_PROTOCOL:\r
1363 {\r
1364 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1365 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1366 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1367 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1368 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1369 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1370 has_stop_bit = SAMSUNG_STOP_BIT;\r
1371 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1372 n_auto_repetitions = 1; // 1 frame\r
1373 auto_repetition_pause_len = 0;\r
1374 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
1375 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1376 break;\r
1377 }\r
1378\r
1379 case IRMP_SAMSUNG32_PROTOCOL:\r
1380 {\r
1381 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1382 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1383 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1384 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1385 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1386 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1387 has_stop_bit = SAMSUNG_STOP_BIT;\r
1388 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
1389 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r
1390 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1391 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
1392 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1393 break;\r
1394 }\r
4225a882 1395#endif\r
1396#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1397 case IRMP_MATSUSHITA_PROTOCOL:\r
1398 {\r
1399 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1400 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1401 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1402 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1403 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1404 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1405 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1406 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1407 n_auto_repetitions = 1; // 1 frame\r
1408 auto_repetition_pause_len = 0;\r
1409 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1410 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1411 break;\r
1412 }\r
4225a882 1413#endif\r
770a1a9d 1414#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1415 case IRMP_KASEIKYO_PROTOCOL:\r
1416 {\r
1417 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
1418 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
1419 pulse_1_len = KASEIKYO_PULSE_LEN;\r
1420 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
1421 pulse_0_len = KASEIKYO_PULSE_LEN;\r
1422 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
1423 has_stop_bit = KASEIKYO_STOP_BIT;\r
1424 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1425 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1426 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1427 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1428 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1429 break;\r
1430 }\r
770a1a9d 1431#endif\r
4225a882 1432#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1433 case IRMP_RECS80_PROTOCOL:\r
1434 {\r
1435 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
1436 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
1437 pulse_1_len = RECS80_PULSE_LEN;\r
1438 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
1439 pulse_0_len = RECS80_PULSE_LEN;\r
1440 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
1441 has_stop_bit = RECS80_STOP_BIT;\r
1442 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1443 n_auto_repetitions = 1; // 1 frame\r
1444 auto_repetition_pause_len = 0;\r
1445 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
1446 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1447 break;\r
1448 }\r
4225a882 1449#endif\r
1450#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1451 case IRMP_RECS80EXT_PROTOCOL:\r
1452 {\r
1453 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
1454 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
1455 pulse_1_len = RECS80EXT_PULSE_LEN;\r
1456 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
1457 pulse_0_len = RECS80EXT_PULSE_LEN;\r
1458 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
1459 has_stop_bit = RECS80EXT_STOP_BIT;\r
1460 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1461 n_auto_repetitions = 1; // 1 frame\r
1462 auto_repetition_pause_len = 0;\r
1463 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
1464 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1465 break;\r
1466 }\r
4225a882 1467#endif\r
1468#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1469 case IRMP_RC5_PROTOCOL:\r
1470 {\r
1471 startbit_pulse_len = RC5_BIT_LEN;\r
1472 startbit_pause_len = RC5_BIT_LEN;\r
1473 pulse_len = RC5_BIT_LEN;\r
1474 pause_len = RC5_BIT_LEN;\r
1475 has_stop_bit = RC5_STOP_BIT;\r
1476 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1477 n_auto_repetitions = 1; // 1 frame\r
1478 auto_repetition_pause_len = 0;\r
1479 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
1480 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1481 break;\r
1482 }\r
4225a882 1483#endif\r
9547ee89 1484#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1485 case IRMP_RC6_PROTOCOL:\r
1486 {\r
1487 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1488 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1489 pulse_len = RC6_BIT_LEN;\r
1490 pause_len = RC6_BIT_LEN;\r
1491 has_stop_bit = RC6_STOP_BIT;\r
1492 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1493 n_auto_repetitions = 1; // 1 frame\r
1494 auto_repetition_pause_len = 0;\r
1495 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1496 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1497 break;\r
1498 }\r
9547ee89 1499#endif\r
1500#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1501 case IRMP_RC6A_PROTOCOL:\r
1502 {\r
1503 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1504 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1505 pulse_len = RC6_BIT_LEN;\r
1506 pause_len = RC6_BIT_LEN;\r
1507 has_stop_bit = RC6_STOP_BIT;\r
1508 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1509 n_auto_repetitions = 1; // 1 frame\r
1510 auto_repetition_pause_len = 0;\r
1511 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1512 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1513 break;\r
1514 }\r
9547ee89 1515#endif\r
4225a882 1516#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1517 case IRMP_DENON_PROTOCOL:\r
1518 {\r
1519 startbit_pulse_len = 0x00;\r
1520 startbit_pause_len = 0x00;\r
1521 pulse_1_len = DENON_PULSE_LEN;\r
1522 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
1523 pulse_0_len = DENON_PULSE_LEN;\r
1524 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
1525 has_stop_bit = DENON_STOP_BIT;\r
1526 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1527 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1528 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1529 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1530 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
1531 break;\r
1532 }\r
4225a882 1533#endif\r
beda975f 1534#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1535 case IRMP_THOMSON_PROTOCOL:\r
1536 {\r
1537 startbit_pulse_len = 0x00;\r
1538 startbit_pause_len = 0x00;\r
1539 pulse_1_len = THOMSON_PULSE_LEN;\r
1540 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1541 pulse_0_len = THOMSON_PULSE_LEN;\r
1542 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1543 has_stop_bit = THOMSON_STOP_BIT;\r
1544 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1545 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1546 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1547 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1548 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1549 break;\r
1550 }\r
beda975f 1551#endif\r
4225a882 1552#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1553 case IRMP_NUBERT_PROTOCOL:\r
1554 {\r
1555 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
1556 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
1557 pulse_1_len = NUBERT_1_PULSE_LEN;\r
1558 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
1559 pulse_0_len = NUBERT_0_PULSE_LEN;\r
1560 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
1561 has_stop_bit = NUBERT_STOP_BIT;\r
1562 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1563 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1564 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1565 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
1566 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1567 break;\r
1568 }\r
5481e9cd 1569#endif\r
1570#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1571 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1572 {\r
1573 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
1574 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
1575 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
1576 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
1577 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
1578 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
1579 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1580 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1581 n_auto_repetitions = 1; // 1 frame\r
1582 auto_repetition_pause_len = 0;\r
1583 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1584 last_bit_value = 0;\r
1585 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1586 break;\r
1587 }\r
5b437ff6 1588#endif\r
1589#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1590 case IRMP_GRUNDIG_PROTOCOL:\r
1591 {\r
1592 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1593 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1594 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1595 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1596 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1597 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1598 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1599 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1600 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1601 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1602 break;\r
1603 }\r
a48187fa 1604#endif\r
1605#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1606 case IRMP_IR60_PROTOCOL:\r
1607 {\r
1608 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1609 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1610 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1611 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1612 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1613 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1614 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1615 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1616 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1617 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
1618 break;\r
1619 }\r
d155e9ab 1620#endif\r
1621#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1622 case IRMP_NOKIA_PROTOCOL:\r
1623 {\r
1624 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1625 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1626 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1627 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1628 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1629 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1630 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1631 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1632 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1633 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1634 break;\r
1635 }\r
a7054daf 1636#endif\r
1637#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1638 case IRMP_SIEMENS_PROTOCOL:\r
1639 {\r
1640 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1641 startbit_pause_len = SIEMENS_BIT_LEN;\r
1642 pulse_len = SIEMENS_BIT_LEN;\r
1643 pause_len = SIEMENS_BIT_LEN;\r
1644 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
1645 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r
1646 n_auto_repetitions = 1; // 1 frame\r
1647 auto_repetition_pause_len = 0;\r
1648 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1649 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1650 break;\r
1651 }\r
b5ea7869 1652#endif\r
48664931 1653#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1654 case IRMP_FDC_PROTOCOL:\r
1655 {\r
1656 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
1657 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
1658 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
1659 pulse_1_len = FDC_PULSE_LEN;\r
1660 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
1661 pulse_0_len = FDC_PULSE_LEN;\r
1662 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
1663 has_stop_bit = FDC_STOP_BIT;\r
1664 n_auto_repetitions = 1; // 1 frame\r
1665 auto_repetition_pause_len = 0;\r
1666 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
1667 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1668 break;\r
1669 }\r
c7c9a4a1 1670#endif\r
1671#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1672 case IRMP_RCCAR_PROTOCOL:\r
1673 {\r
1674 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
1675 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
1676 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
1677 pulse_1_len = RCCAR_PULSE_LEN;\r
1678 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
1679 pulse_0_len = RCCAR_PULSE_LEN;\r
1680 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
1681 has_stop_bit = RCCAR_STOP_BIT;\r
1682 n_auto_repetitions = 1; // 1 frame\r
1683 auto_repetition_pause_len = 0;\r
1684 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
1685 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1686 break;\r
1687 }\r
4225a882 1688#endif\r
c7a47e89 1689#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1690 case IRMP_JVC_PROTOCOL:\r
1691 {\r
1692 if (repeat_counter != 0) // skip start bit if repetition frame\r
1693 {\r
1694 current_bit = 0;\r
1695 }\r
1696\r
1697 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
1698 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
1699 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
1700 pulse_1_len = JVC_PULSE_LEN;\r
1701 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
1702 pulse_0_len = JVC_PULSE_LEN;\r
1703 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
1704 has_stop_bit = JVC_STOP_BIT;\r
1705 n_auto_repetitions = 1; // 1 frame\r
1706 auto_repetition_pause_len = 0;\r
1707 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
1708 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1709 break;\r
1710 }\r
c7a47e89 1711#endif\r
9405f84a 1712#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1713 case IRMP_NIKON_PROTOCOL:\r
1714 {\r
1715 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
1716 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
1717 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
1718 pulse_1_len = NIKON_PULSE_LEN;\r
1719 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
1720 pulse_0_len = NIKON_PULSE_LEN;\r
1721 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
1722 has_stop_bit = NIKON_STOP_BIT;\r
1723 n_auto_repetitions = 1; // 1 frame\r
1724 auto_repetition_pause_len = 0;\r
1725 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
1726 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1727 break;\r
1728 }\r
9405f84a 1729#endif\r
f50e01e7 1730#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1731 case IRMP_LEGO_PROTOCOL:\r
1732 {\r
1733 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
1734 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
1735 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
1736 pulse_1_len = LEGO_PULSE_LEN;\r
1737 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
1738 pulse_0_len = LEGO_PULSE_LEN;\r
1739 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
1740 has_stop_bit = LEGO_STOP_BIT;\r
1741 n_auto_repetitions = 1; // 1 frame\r
1742 auto_repetition_pause_len = 0;\r
1743 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
1744 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1745 break;\r
1746 }\r
fa09ce10 1747#endif\r
1748#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1749 case IRMP_A1TVBOX_PROTOCOL:\r
1750 {\r
1751 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r
1752 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r
1753 pulse_len = A1TVBOX_BIT_PULSE_LEN;\r
1754 pause_len = A1TVBOX_BIT_PAUSE_LEN;\r
1755 has_stop_bit = A1TVBOX_STOP_BIT;\r
1756 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r
1757 n_auto_repetitions = 1; // 1 frame\r
1758 auto_repetition_pause_len = 0;\r
1759 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r
1760 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1761 break;\r
1762 }\r
1763#endif\r
1764 default:\r
1765 {\r
1766 irsnd_busy = FALSE;\r
1767 break;\r
1768 }\r
1769 }\r
1770 }\r
1771 }\r
1772\r
1773 if (irsnd_busy)\r
1774 {\r
1775 new_frame = FALSE;\r
1776\r
1777 switch (irsnd_protocol)\r
1778 {\r
4225a882 1779#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1780 case IRMP_SIRCS_PROTOCOL:\r
4225a882 1781#endif\r
1782#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1783 case IRMP_NEC_PROTOCOL:\r
4225a882 1784#endif\r
7644ac04 1785#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1786 case IRMP_NEC16_PROTOCOL:\r
7644ac04 1787#endif\r
1788#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1789 case IRMP_NEC42_PROTOCOL:\r
7644ac04 1790#endif\r
4225a882 1791#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1792 case IRMP_SAMSUNG_PROTOCOL:\r
1793 case IRMP_SAMSUNG32_PROTOCOL:\r
4225a882 1794#endif\r
1795#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1796 case IRMP_MATSUSHITA_PROTOCOL:\r
4225a882 1797#endif\r
770a1a9d 1798#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1799 case IRMP_KASEIKYO_PROTOCOL:\r
770a1a9d 1800#endif\r
4225a882 1801#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1802 case IRMP_RECS80_PROTOCOL:\r
4225a882 1803#endif\r
1804#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1805 case IRMP_RECS80EXT_PROTOCOL:\r
4225a882 1806#endif\r
1807#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1808 case IRMP_DENON_PROTOCOL:\r
4225a882 1809#endif\r
beda975f 1810#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1811 case IRMP_THOMSON_PROTOCOL:\r
beda975f 1812#endif\r
4225a882 1813#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1814 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 1815#endif\r
1816#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1817 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 1818#endif\r
c7c9a4a1 1819#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1820 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1821#endif\r
c7c9a4a1 1822#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1823 case IRMP_RCCAR_PROTOCOL:\r
c7c9a4a1 1824#endif\r
c7a47e89 1825#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1826 case IRMP_JVC_PROTOCOL:\r
c7a47e89 1827#endif\r
9405f84a 1828#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1829 case IRMP_NIKON_PROTOCOL:\r
9405f84a 1830#endif\r
f50e01e7 1831#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1832 case IRMP_LEGO_PROTOCOL:\r
f50e01e7 1833#endif\r
a7054daf 1834\r
7644ac04 1835#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
1836 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 1837 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
c7a47e89 1838 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
beda975f 1839 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r
e664a9f3 1840 {\r
08f2dd9d 1841#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1842 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
1843 {\r
1844 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
1845 {\r
1846 auto_repetition_pause_len--;\r
1847 }\r
1848\r
1849 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1850 {\r
1851 repeat_frame_pause_len--;\r
1852 }\r
1853 }\r
1854#endif\r
1855\r
1856 if (pulse_counter == 0)\r
1857 {\r
1858 if (current_bit == 0xFF) // send start bit\r
1859 {\r
1860 pulse_len = startbit_pulse_len;\r
1861 pause_len = startbit_pause_len;\r
1862 }\r
1863 else if (current_bit < complete_data_len) // send n'th bit\r
1864 {\r
5481e9cd 1865#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1866 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
1867 {\r
1868 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
1869 {\r
1870 pulse_len = SAMSUNG_PULSE_LEN;\r
1871 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1872 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
1873 }\r
1874 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
1875 {\r
1876 pulse_len = SAMSUNG_PULSE_LEN;\r
1877 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1878 }\r
1879 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
1880 {\r
1881 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1882\r
1883 pulse_len = SAMSUNG_PULSE_LEN;\r
1884 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1885 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
1886 }\r
1887 }\r
1888 else\r
5481e9cd 1889#endif\r
1890\r
7644ac04 1891#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1892 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
1893 {\r
1894 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
1895 {\r
1896 pulse_len = NEC_PULSE_LEN;\r
1897 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1898 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1899 }\r
1900 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
1901 {\r
1902 pulse_len = NEC_PULSE_LEN;\r
1903 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1904 }\r
1905 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
1906 {\r
1907 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1908\r
1909 pulse_len = NEC_PULSE_LEN;\r
1910 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1911 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1912 }\r
1913 }\r
1914 else\r
7644ac04 1915#endif\r
1916\r
5481e9cd 1917#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1918 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
1919 {\r
1920 if (current_bit == 0) // send 2nd start bit\r
1921 {\r
1922 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
1923 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
1924 }\r
1925 else if (current_bit == 1) // send 3rd start bit\r
1926 {\r
1927 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
1928 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
1929 }\r
1930 else if (current_bit == 2) // send 4th start bit\r
1931 {\r
1932 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
1933 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
1934 }\r
1935 else if (current_bit == 19) // send trailer bit\r
1936 {\r
1937 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
1938 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
1939 }\r
1940 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
1941 {\r
1942 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r
1943 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
1944\r
1945 if (cur_bit_value == last_bit_value)\r
1946 {\r
1947 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
1948 }\r
1949 else\r
1950 {\r
1951 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
1952 last_bit_value = cur_bit_value;\r
1953 }\r
1954 }\r
1955 }\r
1956 else\r
1957#endif\r
1958 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r
1959 {\r
1960 pulse_len = pulse_1_len;\r
1961 pause_len = pause_1_len;\r
1962 }\r
1963 else\r
1964 {\r
1965 pulse_len = pulse_0_len;\r
1966 pause_len = pause_0_len;\r
1967 }\r
1968 }\r
1969 else if (has_stop_bit) // send stop bit\r
1970 {\r
1971 pulse_len = pulse_0_len;\r
1972\r
1973 if (auto_repetition_counter < n_auto_repetitions)\r
1974 {\r
1975 pause_len = pause_0_len;\r
1976 }\r
1977 else\r
1978 {\r
1979 pause_len = 255; // last frame: pause of 255\r
1980 }\r
1981 }\r
1982 }\r
1983\r
1984 if (pulse_counter < pulse_len)\r
1985 {\r
1986 if (pulse_counter == 0)\r
1987 {\r
1988 irsnd_on ();\r
1989 }\r
1990 pulse_counter++;\r
1991 }\r
1992 else if (pause_counter < pause_len)\r
1993 {\r
1994 if (pause_counter == 0)\r
1995 {\r
1996 irsnd_off ();\r
1997 }\r
1998 pause_counter++;\r
1999 }\r
2000 else\r
2001 {\r
2002 current_bit++;\r
2003\r
2004 if (current_bit >= complete_data_len + has_stop_bit)\r
2005 {\r
2006 current_bit = 0xFF;\r
2007 auto_repetition_counter++;\r
2008\r
2009 if (auto_repetition_counter == n_auto_repetitions)\r
2010 {\r
2011 irsnd_busy = FALSE;\r
2012 auto_repetition_counter = 0;\r
2013 }\r
2014 new_frame = TRUE;\r
2015 }\r
2016\r
2017 pulse_counter = 0;\r
2018 pause_counter = 0;\r
2019 }\r
2020 break;\r
2021 }\r
a7054daf 2022#endif\r
2023\r
4225a882 2024#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 2025 case IRMP_RC5_PROTOCOL:\r
a7054daf 2026#endif\r
9547ee89 2027#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 2028 case IRMP_RC6_PROTOCOL:\r
9547ee89 2029#endif\r
2030#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2031 case IRMP_RC6A_PROTOCOL:\r
9547ee89 2032#endif\r
a7054daf 2033#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2034 case IRMP_SIEMENS_PROTOCOL:\r
a7054daf 2035#endif\r
2036#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2037 case IRMP_GRUNDIG_PROTOCOL:\r
a7054daf 2038#endif\r
a48187fa 2039#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2040 case IRMP_IR60_PROTOCOL:\r
a48187fa 2041#endif\r
a7054daf 2042#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2043 case IRMP_NOKIA_PROTOCOL:\r
fa09ce10 2044#endif\r
2045#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2046 case IRMP_A1TVBOX_PROTOCOL:\r
a7054daf 2047#endif\r
4225a882 2048\r
9547ee89 2049#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
fa09ce10 2050 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2051 {\r
2052 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
2053 {\r
2054 current_bit++;\r
4225a882 2055\r
e664a9f3 2056 if (current_bit >= complete_data_len)\r
2057 {\r
2058 current_bit = 0xFF;\r
a7054daf 2059\r
a48187fa 2060#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2061 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2062 {\r
2063 auto_repetition_counter++;\r
2064\r
2065 if (repeat_counter > 0)\r
2066 { // set 117 msec pause time\r
2067 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
2068 }\r
2069\r
2070 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2071 {\r
2072 n_auto_repetitions++; // increment number of auto repetitions\r
2073 repeat_counter++;\r
2074 }\r
2075 else if (auto_repetition_counter == n_auto_repetitions)\r
2076 {\r
2077 irsnd_busy = FALSE;\r
2078 auto_repetition_counter = 0;\r
2079 }\r
2080 }\r
2081 else\r
2082#endif\r
2083 {\r
2084 irsnd_busy = FALSE;\r
2085 }\r
2086\r
2087 new_frame = TRUE;\r
2088 irsnd_off ();\r
2089 }\r
2090\r
2091 pulse_counter = 0;\r
2092 pause_counter = 0;\r
2093 }\r
2094\r
2095 if (! new_frame)\r
2096 {\r
2097 uint8_t first_pulse;\r
5b437ff6 2098\r
a48187fa 2099#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2100 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2101 {\r
2102 if (current_bit == 0xFF || // start bit of start-frame\r
2103 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
2104 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
2105 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
2106 {\r
2107 pulse_len = startbit_pulse_len;\r
2108 pause_len = startbit_pause_len;\r
2109 first_pulse = TRUE;\r
2110 }\r
2111 else // send n'th bit\r
2112 {\r
2113 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2114 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2115 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2116 }\r
2117 }\r
2118 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
2119 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r
2120#endif\r
2121 {\r
2122 if (current_bit == 0xFF) // 1 start bit\r
2123 {\r
9547ee89 2124#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2125 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2126 {\r
2127 pulse_len = startbit_pulse_len;\r
2128 pause_len = startbit_pause_len;\r
2129 }\r
2130 else\r
fa09ce10 2131#endif\r
2132#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2133 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r
2134 {\r
2135 current_bit = 0;\r
2136 }\r
2137 else\r
2138#endif\r
2139 {\r
2140 ;\r
2141 }\r
2142\r
2143 first_pulse = TRUE;\r
2144 }\r
2145 else // send n'th bit\r
2146 {\r
9547ee89 2147#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2148 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2149 {\r
2150 pulse_len = RC6_BIT_LEN;\r
2151 pause_len = RC6_BIT_LEN;\r
2152\r
2153 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2154 {\r
2155 if (current_bit == 4) // toggle bit (double len)\r
2156 {\r
2157 pulse_len = 2 * RC6_BIT_LEN;\r
2158 pause_len = 2 * RC6_BIT_LEN;\r
2159 }\r
2160 }\r
2161 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2162 {\r
2163 if (current_bit == 4) // toggle bit (double len)\r
2164 {\r
2165 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2166 pause_len = 2 * RC6_BIT_LEN;\r
2167 }\r
2168 else if (current_bit == 5) // toggle bit (double len)\r
2169 {\r
2170 pause_len = 2 * RC6_BIT_LEN;\r
2171 }\r
2172 }\r
2173 }\r
2174#endif\r
2175 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2176 }\r
2177\r
2178 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2179 {\r
2180 first_pulse = first_pulse ? FALSE : TRUE;\r
2181 }\r
2182 }\r
2183\r
2184 if (first_pulse)\r
2185 {\r
2186 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2187\r
2188 if (pulse_counter < pulse_len)\r
2189 {\r
2190 if (pulse_counter == 0)\r
2191 {\r
2192 irsnd_on ();\r
2193 }\r
2194 pulse_counter++;\r
2195 }\r
2196 else // if (pause_counter < pause_len)\r
2197 {\r
2198 if (pause_counter == 0)\r
2199 {\r
2200 irsnd_off ();\r
2201 }\r
2202 pause_counter++;\r
2203 }\r
2204 }\r
2205 else\r
2206 {\r
2207 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2208\r
2209 if (pause_counter < pause_len)\r
2210 {\r
2211 if (pause_counter == 0)\r
2212 {\r
2213 irsnd_off ();\r
2214 }\r
2215 pause_counter++;\r
2216 }\r
2217 else // if (pulse_counter < pulse_len)\r
2218 {\r
2219 if (pulse_counter == 0)\r
2220 {\r
2221 irsnd_on ();\r
2222 }\r
2223 pulse_counter++;\r
2224 }\r
2225 }\r
2226 }\r
2227 break;\r
2228 }\r
9547ee89 2229#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
a48187fa 2230 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2231\r
e664a9f3 2232 default:\r
2233 {\r
2234 irsnd_busy = FALSE;\r
2235 break;\r
2236 }\r
2237 }\r
2238 }\r
2239\r
2240 if (! irsnd_busy)\r
2241 {\r
2242 if (repeat_counter < n_repeat_frames)\r
2243 {\r
c7c9a4a1 2244#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2245 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2246 {\r
2247 irsnd_buffer[2] |= 0x0F;\r
2248 }\r
2249#endif\r
2250 repeat_counter++;\r
2251 irsnd_busy = TRUE;\r
2252 }\r
2253 else\r
2254 {\r
2255 irsnd_busy = TRUE; //Rainer\r
2256 send_trailer = TRUE;\r
2257 n_repeat_frames = 0;\r
2258 repeat_counter = 0;\r
2259 }\r
2260 }\r
4225a882 2261 }\r
2262\r
2263#ifdef DEBUG\r
2264 if (irsnd_is_on)\r
2265 {\r
e664a9f3 2266 putchar ('0');\r
4225a882 2267 }\r
2268 else\r
2269 {\r
e664a9f3 2270 putchar ('1');\r
4225a882 2271 }\r
2272#endif\r
2273\r
2274 return irsnd_busy;\r
2275}\r
2276\r
2277#ifdef DEBUG\r
2278\r
2279// main function - for unix/linux + windows only!\r
2280// AVR: see main.c!\r
2281// Compile it under linux with:\r
2282// cc irsnd.c -o irsnd\r
2283//\r
2284// usage: ./irsnd protocol hex-address hex-command >filename\r
2285\r
2286int\r
2287main (int argc, char ** argv)\r
2288{\r
4225a882 2289 int protocol;\r
2290 int address;\r
2291 int command;\r
4225a882 2292 IRMP_DATA irmp_data;\r
2293\r
a7054daf 2294 if (argc != 4 && argc != 5)\r
4225a882 2295 {\r
e664a9f3 2296 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
2297 return 1;\r
4225a882 2298 }\r
2299\r
2300 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
e664a9f3 2301 sscanf (argv[2], "%x", &address) == 1 &&\r
2302 sscanf (argv[3], "%x", &command) == 1)\r
4225a882 2303 {\r
e664a9f3 2304 irmp_data.protocol = protocol;\r
2305 irmp_data.address = address;\r
2306 irmp_data.command = command;\r
4225a882 2307\r
e664a9f3 2308 if (argc == 5)\r
2309 {\r
2310 irmp_data.flags = atoi (argv[4]);\r
2311 }\r
2312 else\r
2313 {\r
2314 irmp_data.flags = 0;\r
2315 }\r
a7054daf 2316\r
e664a9f3 2317 irsnd_init ();\r
4225a882 2318\r
e664a9f3 2319 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2320\r
e664a9f3 2321 while (irsnd_busy)\r
2322 {\r
2323 irsnd_ISR ();\r
2324 }\r
beda975f 2325\r
e664a9f3 2326 putchar ('\n');\r
a03ad359 2327\r
f874da09 2328#if 1 // enable here to send twice\r
e664a9f3 2329 (void) irsnd_send_data (&irmp_data, TRUE);\r
a03ad359 2330\r
e664a9f3 2331 while (irsnd_busy)\r
2332 {\r
2333 irsnd_ISR ();\r
2334 }\r
a03ad359 2335\r
e664a9f3 2336 putchar ('\n');\r
f874da09 2337#endif\r
4225a882 2338 }\r
2339 else\r
2340 {\r
e664a9f3 2341 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2342 return 1;\r
4225a882 2343 }\r
2344 return 0;\r
2345}\r
2346\r
2347#endif // DEBUG\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)