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Remove 'inidone' initialisation bypassing.
[z180-stamp-cpm3.git] / cbios / ascii.180
CommitLineData
d6829fd3
L		 1\r
2; Interrupt drivers for ASCI0 and ASCI1\r
3\r
6dd88c25 4 global as0_dev,as1_dev\r
d6829fd3 5\r
1c7e3963 6 extrn @ctbl,f_cpu\r
81ba3c84
L		 7 extrn ff_empty,ff_get,ff_full,ff_put\r
8 extrn ff_puth,ff_cnt,ff_gech\r
d6829fd3 9 extrn bufinit\r
1c7e3963
L		 10 extrn isv_sw,ijphl,add_hla,div32_r\r
11 extrn b_st_a,b_ld_a\r
d6829fd3
L		 12\r
13\r
14\r
1c7e3963
L		 15 maclib z180reg.inc\r
16 maclib config.inc\r
17 maclib ioctl.inc\r
18 maclib modebaud.inc\r
d6829fd3
L		 19\r
20\r
1c7e3963 21 m2b mbxon_bit,mb$xon$xoff\r
d6829fd3
L		 22\r
23;-----------------------------------------------------\r
24\r
25 dseg\r
26\r
6dd88c25
L		 27 dw asci0_out\r
28 dw asci0_osta\r
29 dw asci0_inp\r
30 dw asci0_ista\r
31 dw asci_ioctl\r
32as0_dev:\r
1c7e3963
L		 33 db 0 ;absolute device #\r
34 db 0 ;relative device\r
35 db 0 ;iflags\r
99b8d89e 36 db M_CREAD+M_CRTS_IFLOW+M_CCTS_OFLOW ;fflags\r
1c7e3963 37 db M_CS8 ;cflags\r
6dd88c25
L		 38o.absdev equ 0\r
39o.reldev equ 1\r
1c7e3963
L		 40o.iflags equ 2\r
41o.fflags equ 3\r
42o.cflags equ 4\r
43\r
44 db 0\r
6d39b0ff
L		 45o.stat equ 5\r
46 b2m SXOFF,0\r
47 b2m TDC1,1\r
48 b2m TDC3,2\r
4d8aefb1 49 b2m TOFF,7\r
1c7e3963
L		 50 db 0\r
51oint.iflags equ as0_dev+o.iflags-s0.inbuf\r
52oint.fflags equ as0_dev+o.fflags-s0.inbuf\r
6d39b0ff 53oint.stat equ as0_dev+o.stat-s0.inbuf\r
1c7e3963
L		 54 mkbuf s0.rx_id, s0.inbuf, s0.rx_len\r
55 mkbuf s0.tx_id, s0.outbuf,s0.tx_len\r
56\r
6dd88c25
L		 57\r
58 dw asci1_out\r
59 dw asci1_osta\r
60 dw asci1_inp\r
61 dw asci1_ista\r
62 dw asci_ioctl\r
63as1_dev:\r
1c7e3963
L		 64 db 0 ;absolute device #\r
65 db 1 ;relative device\r
66 db 0 ;iflags\r
3134af6c 67 db M_CREAD+M_IXOFF ;fflags\r
1c7e3963 68 db M_CS8 ;cflags\r
6dd88c25 69\r
6dd88c25 70 db 0\r
6dd88c25 71 db 0\r
d6829fd3 72 mkbuf s1.rx_id, s1.inbuf, s1.rx_len\r
81ba3c84 73 mkbuf s1.tx_id, s1.outbuf,s1.tx_len\r
d6829fd3
L		 74\r
75\r
76\r
77 dseg\r
78\r
6dd88c25
L		 79\r
80ioctl_ftab:\r
1c7e3963
L		 81 dw func_tcinit ;(00h) CP/M 3 DEVINI function\r
82 dw func_tcgeta ;(01h) Get the current serial port settings.\r
83 dw func_tcseta ;(02h) Set the current serial port settings.\r
84 dw func_tcsetaw ;(03h) Allow the output buffer to drain\r
85 dw func_tcsetaf ;(04h) Allow the output buffer to drain, discard pending input\r
86 dw func_tcsbrk ;(05h) Sending a break (250ms .. 500ms)\r
87 dw func_tcsbrkp ;(06h) arg is timeinterval in 0.1sec\r
88 dw func_tiocsbrk ;(07h) Turn break on\r
89 dw func_tioccbrk ;(08h) Turn break off\r
90 dw func_tcxonc ;(09h) Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
91 dw func_tcflsh ;(0Ah) Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
92 dw func_fionread ;(0Bh) Get the number of bytes in the input buffer.\r
93 dw func_tiocoutq ;(0Ch) Get the number of bytes in the output buffer.\r
94 dw func_tiocmget ;(0Dh) get the status of modem bits.\r
95 dw func_tiocmbis ;(0Eh) set the indicated modem bits.\r
96 dw func_tiocmbic ;(0Fh) clear the indicated modem bits.\r
97 dw func_tiocmset ;(10h) set the status of modem bits.\r
98 dw func_tiocgsoftcar ;(11h) Get the status of the CLOCAL flag in the c_cflag field\r
99 dw func_tiocssoftcar ;(12h) Set the CLOCAL flag when *argp is nonzero, and clear it otherwise.\r
100\r
6dd88c25
L		 101IOCTL_MAX equ ($-ioctl_ftab)/2\r
102 dw nofunc\r
103\r
1c7e3963 104\r
d6829fd3 105;--------------------------------------------------------------\r
d6829fd3 106;\r
6dd88c25
L		 107; b: device number\r
108; c: command\r
109; de: ioctl arg pointer\r
110; hl: ptr to driver local data\r
d6829fd3
L		 111;\r
112\r
6dd88c25
L		 113asci_ioctl:\r
114 push hl\r
115 ex (sp),ix\r
116 ld (ix+o.absdev),b\r
117 ld hl,ioctl_ftab\r
118 ld a,IOCTL_MAX\r
119 cp c\r
120 jr c,$+3\r
121 ld a,c\r
122 add a,a\r
123 call add_hla\r
124 ld a,(hl)\r
125 inc hl\r
126 ld h,(hl)\r
127 ld l,a\r
128 call ijphl\r
129 pop ix\r
130nofunc:\r
1c7e3963 131 or a\r
6dd88c25
L		 132 ret\r
133\r
6dd88c25 134;--------------------------------------------------------------\r
1c7e3963 135; CP/M 3 DEVINI function\r
6dd88c25 136; Init Serial I/O for input and output (ASCI 0/1)\r
d6829fd3 137\r
1c7e3963
L		 138func_tcinit:\r
139 call asci_stop\r
140\r
141init_st:\r
142 ld c,asext0 ;Enable baud rate generator\r
143 ld a,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS +M_BREAKEN\r
144 bit CCTS_OFLOW,(ix+o.fflags)\r
145 jr nz,$+4\r
146 or M_CTS0DIS\r
147 call out_asci_reg\r
d6829fd3 148\r
6dd88c25 149 ld b,(ix+o.absdev)\r
1c7e3963
L		 150 ld c,8 ;\r
151 mlt bc ;\r
65abc3dc 152 ld hl,@ctbl+6 ;\r
1c7e3963 153 add hl,bc ;\r
65abc3dc
L		 154 res IXON,(ix+o.fflags)\r
155 bit mbxon_bit,(hl) ;get cpm3 xon flag\r
156 jr z,$+6\r
157 set IXON,(ix+o.fflags)\r
158 inc hl\r
1c7e3963
L		 159 ld a,(hl) ;get baudrate index\r
160 call as_br_div\r
161 ld c,astc0l\r
99b8d89e 162 call out_asci_reg_hl\r
1c7e3963
L		 163\r
164 ld c,cntlb0\r
165 ld a,M_MPBT ;No MP Mode, X16\r
166 bit PARODD,(ix+o.iflags)\r
167 jr z,$+4\r
168 or M_PEO\r
169 call out_asci_reg\r
170\r
171 ld c,cntla0\r
172 ld a,(ix+o.cflags)\r
173 srlan CS8\r
174 ld hl,mod_tab\r
175 call add_hla\r
176 ld a,(hl)\r
177 or a,M_RE+M_TE+M_RTS0+M_EFR ;Rx/Tx enable\r
178 call out_asci_reg\r
179\r
6dd88c25 180 bit 0,(ix+o.reldev)\r
2f8aa307 181 push ix\r
6dd88c25
L		 182 jr nz,init_1\r
183 ld hl,rtxisvjmp0 ;rx/tx int vector\r
184 ld (ivtab + IV$ASCI0),hl ;\r
d6829fd3 185 ld ix,s0.outbuf\r
1c7e3963
L		 186 call bufinit\r
187 ld ix,s0.inbuf\r
6dd88c25
L		 188 jr init_2\r
189init_1:\r
190 ld hl,rtxisvjmp1 ;rx/tx int vector\r
191 ld (ivtab + IV$ASCI1),hl ;\r
d6829fd3 192 ld ix,s1.outbuf\r
1c7e3963
L		 193 call bufinit\r
194 ld ix,s1.inbuf\r
6dd88c25 195init_2:\r
d6829fd3 196 call bufinit\r
1c7e3963
L		 197 pop ix\r
198 call asci_start\r
199 ret\r
200\r
201;--------------------------------------------------------------\r
202\r
203mod_tab:\r
204 db 000B ; 7N1\r
205 db 100B ; 8N1\r
206 db 001B ; 7N2\r
207 db 101B ; 8N2\r
208 db 010B ; 7P1\r
209 db 110B ; 8P1\r
210 db 011B ; 7P2\r
211 db 111B ; 8P2\r
212\r
213\r
214;--------------------------------------------------------------\r
215; Get the current serial port settings.\r
216\r
217func_tcgeta:\r
99b8d89e 218 call chk_ptr\r
1c7e3963 219\r
65abc3dc
L		 220 ld b,(ix+o.absdev)\r
221 ld c,8 ;\r
222 mlt bc ;\r
223 ld hl,@ctbl+6 ;\r
224 add hl,bc ;\r
225 res IXON,(ix+o.fflags)\r
226 bit mbxon_bit,(hl) ;get cpm3 xon flag\r
227 jr z,$+6\r
228 set IXON,(ix+o.fflags)\r
229 inc hl\r
1c7e3963
L		 230 ld a,(ix+o.iflags)\r
231 call b_st_a\r
232 inc de\r
233 ld a,(ix+o.fflags)\r
234 call b_st_a\r
235 inc de\r
1c7e3963
L		 236 ld a,(hl) ;get baudrate index\r
237 and M_CBAUD\r
238 ld b,a\r
239 ld a,(ix+o.cflags)\r
240 and ~M_CBAUD\r
241 or b\r
242 call b_st_a\r
243 dec de\r
244 dec de\r
245 xor a\r
1c7e3963
L		 246 ret\r
247\r
1c7e3963
L		 248;--------------------------------------------------------------\r
249; Set the current serial port settings.\r
250\r
251func_tcseta:\r
99b8d89e 252 call chk_ptr\r
1c7e3963
L		 253\r
254 call asci_stop\r
255\r
256 call b_ld_a\r
257 ld (ix+o.iflags),a\r
258 inc de\r
259 call b_ld_a\r
260 ld (ix+o.fflags),a\r
261 inc de\r
262\r
263 ld b,(ix+o.absdev)\r
264 ld c,8 ;\r
265 mlt bc ;\r
65abc3dc 266 ld hl,@ctbl+6 ;\r
1c7e3963 267 add hl,bc ;\r
65abc3dc
L		 268 res mbxon_bit,(hl)\r
269 bit IXON,a\r
270 jr z,$+4\r
271 set mbxon_bit,(hl)\r
272 inc hl\r
1c7e3963
L		 273 call b_ld_a\r
274 ld (ix+o.cflags),a\r
275 and M_CBAUD\r
276 ld (hl),a ;set baudrate index\r
277 dec de\r
278 dec de\r
279 push de\r
280 call init_st\r
281 pop de\r
282 xor a\r
1c7e3963
L		 283 ret\r
284\r
1c7e3963
L		 285;--------------------------------------------------------------\r
286; Allow the output buffer to drain\r
287\r
288func_tcsetaw:\r
289\r
290;--------------------------------------------------------------\r
291; Allow the output buffer to drain, discard pending input\r
292\r
293func_tcsetaf:\r
294\r
295;--------------------------------------------------------------\r
296; Sending a break (250ms .. 500ms)\r
297\r
298func_tcsbrk:\r
299\r
300;--------------------------------------------------------------\r
301; arg is timeinterval in 0.1sec\r
302\r
303func_tcsbrkp:\r
304\r
305;--------------------------------------------------------------\r
306; Turn break on\r
307\r
308func_tiocsbrk:\r
309\r
310;--------------------------------------------------------------\r
311; Turn break off\r
312\r
313func_tioccbrk:\r
314\r
315;--------------------------------------------------------------\r
316; Software flow control (TCOOFF, TCOON, TCIOFF, TCION)\r
317\r
318func_tcxonc:\r
319\r
320;--------------------------------------------------------------\r
321; Flush input/output buffer (TCIFLUSH, TCOFLUSH, TCIOFLUSH)\r
322\r
323func_tcflsh:\r
324\r
325;--------------------------------------------------------------\r
326; Get the number of bytes in the input buffer.\r
327\r
328func_fionread:\r
329\r
330;--------------------------------------------------------------\r
331; Get the number of bytes in the output buffer.\r
332\r
333func_tiocoutq:\r
334\r
335;--------------------------------------------------------------\r
336; get the status of modem bits.\r
337\r
338func_tiocmget:\r
339\r
340;--------------------------------------------------------------\r
341; set the indicated modem bits.\r
342\r
343func_tiocmbis:\r
344\r
345;--------------------------------------------------------------\r
346; clear the indicated modem bits.\r
347\r
348func_tiocmbic:\r
349\r
350;--------------------------------------------------------------\r
351; set the status of modem bits.\r
352\r
353func_tiocmset:\r
354\r
355;--------------------------------------------------------------\r
356; Get the status of the CLOCAL flag in the c_cflag field\r
357\r
358func_tiocgsoftcar:\r
359\r
360;--------------------------------------------------------------\r
361; Set the CLOCAL flag when *argp is nonzero, and clear it otherwise.\r
362\r
363func_tiocssoftcar:\r
364\r
365 or 0ffh\r
366 ret\r
367\r
368;--------------------------------------------------------------\r
369\r
99b8d89e
L		 370chk_ptr:\r
371 ld a,e\r
372 or d\r
373 ret nz\r
374 cpl\r
375 pop hl\r
376 ret\r
377\r
378;--------------------------------------------------------------\r
379\r
1c7e3963
L		 380asci_stop:\r
381 ld c,stat0 ;Disable rx/tx interrupts\r
382 xor a ;\r
383 call out_asci_reg\r
384\r
385 ld c,cntla0 ;Disable receiver and transmitter\r
386 ld a,M_RTS0+M_EFR ;RTS/CKA1\r
387 jr out_asci_reg\r
388\r
389;--------------------------------------------------------------\r
390\r
391asci_start:\r
2f8aa307
L		 392 bit 0,(ix+o.reldev)\r
393 jr nz,asci_st1\r
394 in0 a,cntla0 ;asci0\r
395 and ~M_RTS0 ;Activate RTS\r
396 or M_EFR\r
397 out0 (cntla0),a\r
398asci_st1:\r
1c7e3963 399 ld c,stat0 ;\r
d6829fd3 400 ld a,M_RIE\r
1c7e3963
L		 401 jr out_asci_reg\r
402\r
403;--------------------------------------------------------------\r
404; output to asci0/1 register\r
405;\r
406; c: register address\r
407; a: value\r
408;\r
409\r
410out_asci_reg:\r
411 push bc\r
99b8d89e
L		 412 bit 0,(ix+o.reldev)\r
413 jr z,$+3\r
414 inc c\r
1c7e3963
L		 415 ld b,0\r
416 out (c),a\r
417 pop bc\r
d6829fd3
L		 418 ret\r
419\r
99b8d89e
L		 420;--------------------------------------------------------------\r
421; output 16 bit value to asci0/1 register\r
422;\r
423; c: register address\r
424; hl: value\r
425; a destroyed\r
426\r
427out_asci_reg_hl:\r
428 ld a,b ;save b\r
429 bit 0,(ix+o.reldev)\r
430 jr z,$+4\r
431 inc c\r
432 inc c\r
433 ld b,0\r
434 out (c),l\r
435 inc c\r
436 out (c),h\r
437 ld b,a\r
438 ret\r
439\r
1c7e3963
L		 440;--------------------------------------------------------------\r
441; baud rate divider\r
442;\r
443; a: index\r
444; return\r
445; hl: divider\r
446\r
447as_br_div:\r
448 push de\r
449 push bc\r
450 and 0fh\r
451 add a,a ;get factor\r
452 ld hl,bd150_tab\r
453 call add_hla\r
454 ld c,(hl)\r
455 inc hl\r
456 ld b,(hl)\r
457 ld hl,(f_cpu)\r
458 ld de,(f_cpu+2)\r
459 call div32_r\r
460 ld bc,32*150\r
461 call div32_r\r
462 ld de,2\r
463 or a\r
464 sbc hl,de\r
465 pop bc\r
466 pop de\r
467 ret nc\r
468 ld hl,0\r
469 ret\r
470\r
471bd150_tab:\r
472; factor index baudrate orig. cp/m\r
473 dw 19200/150 ; 0 19200 -\r
474 dw 28800/150 ; 1 28800 50\r
475 dw 38400/150 ; 2 38400 75\r
476 dw 57600/150 ; 3 57600 110\r
477 dw 11520/15 ; 4 115200 134.5\r
478 dw 150/150 ; 5 150\r
479 dw 300/150 ; 6 300\r
480 dw 600/150 ; 7 600\r
481 dw 1200/150 ; 8 1200\r
482 dw 1800/150 ; 9 1800\r
483 dw 2400/150 ;10 2400\r
484 dw 3600/150 ;11 3600\r
485 dw 4800/150 ;12 4800\r
486 dw 7200/150 ;13 7200\r
487 dw 9600/150 ;14 9600\r
488 dw 19200/150 ;15 19200\r
489\r
490\r
491;--------------------------------------------------------------\r
492\r
493 if 0\r
494\r
495initab0:\r
496 db 1,stat0,0 ;Disable rx/tx interrupts\r
497 ;Enable baud rate generator\r
498 db 1,asext0,M_BRGMOD+M_DCD0DIS ; +M_CTS0DIS\r
499 db 2,astc0l\r
500init_br_off equ $ - initab0\r
501 dw 28\r
502 db 1,cntlb0,M_MPBT ;No MP Mode, X16\r
503 db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
504 db 0\r
505\r
506initab1:\r
507 db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r
508 db 1,asext1,M_BRGMOD ;Enable baud rate generator\r
509 db 2,astc1l,low 3, high 3\r
510 db 1,cntlb1,M_MPBT ;No MP Mode, X16\r
511 db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
512 db 0\r
513 endif\r
d6829fd3 514\r
d6829fd3
L		 515;--------------------------------------------------------------\r
516\r
517 dseg\r
6dd88c25 518asci0_ista:\r
d6829fd3
L		 519 push ix\r
520 ld ix,s0.inbuf ;\r
521 call ff_empty\r
522 pop ix\r
523 ret\r
524\r
525;--------------------------------------------------------------\r
526\r
6dd88c25 527asci1_ista:\r
d6829fd3
L		 528 push ix\r
529 ld ix,s1.inbuf ;\r
530 call ff_empty\r
531 pop ix\r
532 ret\r
533\r
534;--------------------------------------------------------------\r
535; Get an input character\r
536\r
2f8aa307
L		 537if 0\r
538asci0_inp:\r
539 push ix\r
540 ld ix,s0.inbuf ;\r
541 call ff_cnt\r
542 cp 32\r
543 jr nc,a0i_1\r
544 di\r
545 in0 a,(cntla0)\r
546 res RTS0,a\r
547 set EFR,a\r
548 out0 (cntla0),a\r
549 ei\r
550a0i_1:\r
551 call ff_get\r
552 pop ix\r
553 ret\r
554endif\r
555\r
556\r
6dd88c25 557asci0_inp:\r
d6829fd3
L		 558 push ix\r
559 ld ix,s0.inbuf ;\r
81ba3c84 560 call ff_gech\r
3134af6c
L		 561 ld a,b ;remaining chrs in buffer\r
562 cp s0.rx_len/4 ; < 32?\r
59a12b33
L		 563 jr nc,a0i_2 ; no, just get char\r
564 ld b,(ix+oint.fflags) ; yes, enable RTS if needed\r
565 bit CRTS_IFLOW,b ; yes, enable RTS if needed\r
3134af6c
L		 566 jr z,a0i_1 ; no needed\r
567 di ; needed, enable\r
b8ad769f 568 in0 a,(cntla0)\r
46c2044d
L		 569 and ~M_RTS0 ;assert RTS\r
570 or M_EFR ;don't reset error flags\r
b8ad769f 571 ei\r
46c2044d 572 out0 (cntla0),a\r
b8ad769f 573a0i_1:\r
59a12b33
L		 574 bit IXOFF,b ; XON/XOFF on input?\r
575 jr z,a0i_2 ; no\r
576 di\r
577 set TDC1,(ix+oint.stat) ;\r
578 in0 a,(stat0) ;\r
579 or M_TIE ;\r
580 ei\r
581 out0 (stat0),a ;\r
582a0i_2:\r
81ba3c84 583 ld a,c\r
d6829fd3
L		 584 pop ix\r
585 ret\r
586\r
587;--------------------------------------------------------------\r
588; Get an input character\r
589\r
6dd88c25 590asci1_inp:\r
d6829fd3
L		 591 push ix\r
592 ld ix,s1.inbuf ;\r
81ba3c84 593 call ff_gech\r
3134af6c
L		 594 ld a,b ; remaining chars in buffer\r
595 cp s0.rx_len/4 ; == 25% full?\r
596 jr nz,a1i_2 ; no, just get char\r
597 bit IXOFF,(ix+oint.fflags) ; XON/XOFF on input?\r
598 jr z,a1i_2 ; no\r
6d39b0ff
L		 599 di\r
600 set TDC1,(ix+oint.stat) ;\r
601 in0 a,(stat1) ;\r
99394318 602 or M_TIE ;\r
6d39b0ff
L		 603 out0 (stat1),a ;\r
604 ei\r
3134af6c
L		 605a1i_2:\r
606 ld a,c ; get back the char\r
d6829fd3
L		 607 pop ix\r
608 ret\r
609\r
610;--------------------------------------------------------------\r
611; Output status\r
612\r
6dd88c25 613asci0_osta:\r
d6829fd3
L		 614 push ix\r
615 ld ix,s0.outbuf ;\r
616 call ff_full\r
617 pop ix\r
618 ret\r
619\r
620;--------------------------------------------------------------\r
621; Output status\r
622\r
6dd88c25 623asci1_osta:\r
d6829fd3
L		 624 push ix\r
625 ld ix,s1.outbuf ;\r
626 call ff_full\r
627 pop ix\r
628 ret\r
629\r
630;--------------------------------------------------------------\r
631; put character in c in buffer\r
632; destroys hl, bc\r
d6829fd3 633\r
6dd88c25 634asci0_out:\r
d6829fd3
L		 635 push ix ;\r
636 ld ix,s0.outbuf ;\r
81ba3c84
L		 637 call ff_puth\r
638 pop ix ;\r
4d8aefb1
L		 639 ld a,(as0_dev+o.stat) ;Transmitter stopped?\r
640 bit TOFF,a ;\r
641 ret nz ; yes\r
d6829fd3 642 di ;\r
830b73bf
L		 643 in0 a,(stat0) ;\r
644 or M_TIE ;\r
645 out0 (stat0),a ;\r
d6829fd3 646 ei ;\r
d6829fd3
L		 647 ret\r
648\r
649;--------------------------------------------------------------\r
650; put character in c in buffer\r
651; destroys hl, bc\r
d6829fd3 652\r
6dd88c25 653asci1_out:\r
d6829fd3
L		 654 push ix ;\r
655 ld ix,s1.outbuf ;\r
81ba3c84
L		 656 call ff_puth\r
657 pop ix ;\r
4d8aefb1
L		 658 ld a,(as1_dev+o.stat) ;Transmitter stopped?\r
659 bit TOFF,a ;\r
660 ret nz ; yes\r
d6829fd3 661 di ;\r
830b73bf
L		 662 in0 a,(stat1) ;\r
663 or M_TIE ;\r
664 out0 (stat1),a ;\r
d6829fd3 665 ei ;\r
d6829fd3
L		 666 ret\r
667\r
668\r
6dd88c25
L		 669;--------------------------------------------------------------\r
670\r
671 cseg\r
672rtxisvjmp0:\r
673 call isv_sw\r
5d7663e1
L		 674 dw asci0_int\r
675\r
6dd88c25
L		 676rtxisvjmp1:\r
677 call isv_sw\r
5d7663e1 678 dw asci1_int\r
6dd88c25
L		 679\r
680;--------------------------------------------------------------\r
5d7663e1
L		 681; ASCI 0/1 Transmit/Receive interupt routines\r
682\r
683 .lall\r
684asci_int macro dev\r
46c2044d 685 push ix\r
5d7663e1 686 ld ix,s&dev&.inbuf ;\r
99394318 687 ld d,(ix+oint.fflags)\r
5d7663e1 688rxtxi&dev&_lp1:\r
99394318 689 in0 e,(stat&dev) ;get asci status\r
5d7663e1 690 jp p,txi&dev ;RDRF == Bit 7\r
81ba3c84 691\r
99394318
L		 692 ; RX Interrupt\r
693\r
694 res BREAK,e\r
695 in0 a,(asext&dev) ;get break status\r
46c2044d 696 and M_BREAK\r
99394318 697 or e ;merge to other error flags\r
46c2044d 698 ld e,a\r
d6829fd3 699\r
99394318
L		 700 in0 a,(cntla&dev) ;reset all error flags\r
701 and ~M_EFR ;\r
702 out0 (cntla&dev),a ;\r
d6829fd3 703\r
4d8aefb1
L		 704 ld c,(ix+o.in_idx) ;get input index\r
705 ld b,0 ;\r
706 ld hl,s&dev&.inbuf ; + base = input buffer pointer\r
707 add hl,bc ;\r
6dd88c25 708\r
99394318 709 in0 b,(rdr&dev) ;get char\r
6dd88c25 710 ;todo: break detection\r
99394318
L		 711 ;todo: parity, framing, overrun error\r
712 ld (hl),b\r
4d8aefb1
L		 713 bit IXON,d\r
714 jr z,rxi&dev&_x3\r
715 ;test XON/XOFF\r
716 ld a,DC3\r
717 cp b\r
718 jr nz,rxi&dev&_x1\r
719 set TOFF,(ix+oint.stat) ;Stop transmitter\r
720 jr rxtxi&dev&_lp1\r
721rxi&dev&_x1:\r
722 ld a,DC1\r
723 cp b\r
724 jr nz,rxi&dev&_x2\r
725 res TOFF,(ix+oint.stat) ;Enable transmitter\r
726 jr rxi&dev&_txen\r
727rxi&dev&_x2:\r
728 bit IXANY,d\r
729 jr z,rxi&dev&_x3\r
730 res TOFF,(ix+oint.stat) ;Enable transmitter\r
731rxi&dev&_x3:\r
732\r
733 ld a,c ;increment input index\r
46c2044d 734 inc a ;\r
81ba3c84
L		 735 ld b,(ix+o.mask) ;\r
736 and b ;\r
b8ad769f 737 ld c,a\r
81ba3c84 738\r
80873aa2
L		 739 sub (ix+o.out_idx) ;number of free places in buffer\r
740 jr z,rxtxi&dev&_lp1 ;buffer full?\r
741 and b ;\r
742 ld (ix+o.in_idx),c ; no, update input index\r
6dd88c25 743\r
80873aa2 744 cp s&dev&.tx_len*3/4 ;buffer now 75% full?\r
fd06cceb 745 jr nz,rxtxi&dev&_lp1\r
6dd88c25 746\r
4d8aefb1 747 if dev=0 ;only channel 0 has rts line\r
99394318 748 bit CRTS_IFLOW,d\r
fd06cceb 749 jr z,rxi0_nocrts\r
4d8aefb1
L		 750 in0 a,(cntla&dev) ;\r
751 or M_RTS0+M_EFR ;RTS inactive\r
99394318 752 out0 (cntla0),a ;\r
fd06cceb 753rxi0_nocrts:\r
5d7663e1 754 endif\r
fd06cceb 755\r
99394318 756 bit IXOFF,d\r
fd06cceb 757 jr z,rxtxi&dev&_lp1\r
6d39b0ff
L		 758 ;send XOFF\r
759 set TDC3,(ix+oint.stat)\r
4d8aefb1 760rxi&dev&_txen:\r
99394318
L		 761 set TIE,e ;\r
762 out0 (stat&dev),e ;\r
5d7663e1 763 jr rxtxi&dev&_lp1\r
81ba3c84 764\r
5d7663e1 765txi&dev:\r
46c2044d 766 bit TDRE,e ;TX int?\r
5d7663e1 767 jr z,rxtxi&dev&_exit\r
99394318
L		 768\r
769 ; TX Interrupt\r
770\r
4d8aefb1 771 ld a,(ix+oint.stat) ;check whether xon/xoff should be sent\r
99394318
L		 772 tst M_TDC1+M_TDC3 ;\r
773 jr z,txi&dev&_char ; no\r
774\r
775 ld l,DC3 ;prepare for xoff\r
776 bit TDC1,a ;request for xon (also) set?\r
777 jr z,txi&dev&_cch ;\r
778 ld l,DC1 ;\r
779txi&dev&_cch:\r
780 out0 (tdr&dev),l ;\r
781 and ~(M_TDC1+M_TDC3) ;reset request flags\r
782 ld (ix+oint.stat),a ;\r
783 jp rxtxi&dev&_lp1 ;\r
5d7663e1 784\r
6d39b0ff 785txi&dev&_char:\r
4d8aefb1
L		 786 bit TOFF,(ix+oint.stat)\r
787 jr nz,txi&dev&_empty ;\r
788\r
789 ld hl,s&dev&.outbuf+o.in_idx ;[in]\r
5d7663e1
L		 790 ld a,(hl) ;\r
791 inc hl ;[out]\r
792 ld c,(hl) ;\r
793 cp c ;\r
794 jr z,txi&dev&_empty ;\r
795 inc hl ;fifo base\r
796 ld b,0 ;\r
797 add hl,bc ;\r
798 ld a,(hl) ;\r
799 out0 (tdr&dev),a ;\r
800 inc c ;\r
4d8aefb1 801 ld a,(s&dev&.outbuf+o.mask);\r
5d7663e1 802 and c ;\r
4d8aefb1 803 ld (s&dev&.outbuf+o.out_idx),a ;\r
d6829fd3 804\r
99394318 805 jp rxtxi&dev&_lp1\r
81ba3c84 806\r
5d7663e1 807txi&dev&_empty:\r
d6829fd3 808 res TIE,e ;disable tx-int\r
4d8aefb1 809 out0 (stat&dev),e ;\r
46c2044d 810\r
5d7663e1 811rxtxi&dev&_exit:\r
d6829fd3
L		 812 pop ix\r
813 ret\r
5d7663e1 814 endm\r
d6829fd3
L		 815\r
816 dseg\r
5d7663e1
L		 817;--------------------------------------------------------------\r
818; ASCI 0 Transmit/Receive interupt routines\r
d6829fd3 819\r
5d7663e1
L		 820asci0_int:\r
821 asci_int 0\r
d6829fd3 822\r
5d7663e1
L		 823;--------------------------------------------------------------\r
824; ASCI 1 Transmit/Receive interupt routines\r
d6829fd3 825\r
5d7663e1
L		 826asci1_int:\r
827 asci_int 1\r
d6829fd3
L		 828\r
829 end\r
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