[z180-stamp.git] / z180 / init.180

	page	255\r
	.z80\r
\r
	extrn ddtz,bpent\r
	extrn $stack\r
	extrn charini,?const,?conin\r
\r
	extrn romend\r
\r
\r
	global	isv_sw\r
\r
	include config.inc\r
	include	z180reg.inc\r
	include z180.lib\r
\r
;CR	equ	0dh\r
\r
\r
\r
;----------------------------------------------------------------------\r
\r
	cseg\r
\r
	jp start\r
\r
; restart vectors\r
\r
rsti	defl	1\r
	rept	7\r
	 db 0, 0, 0, 0, 0\r
	 jp bpent\r
rsti	 defl rsti+1\r
	endm\r
	 db 0, 0, 0, 0, 0\r
\r
;----------------------------------------------------------------------\r
	\r
	;org	40h\r
\r
	dw	0\r
	db	0\r
\r
\r
	if ROMSYS\r
$crom:	 defb c$rom		;\r
	else\r
	 db	0		;\r
	endif\r
\r
dmclrt:				;clear ram per dma\r
	db	dmct_e-dmclrt-2 ;\r
	db	sar0l		;first port\r
	dw	nullbyte	;src (fixed)\r
nullbyte:\r
	db 	000h		;src\r
	dw	romend		;dst (inc), start after "rom" code\r
	db	00h		;dst\r
	dw 	0-romend	;count (64k)\r
dmct_e:\r
\r
INIWAITS defl	CWAITIO\r
	if	ROMSYS\r
INIWAITS defl	INIWAITS+CWAITROM\r
	endif\r
\r
hwini0:\r
	db	3		;count\r
	db	rcr,CREFSH	;configure DRAM refresh\r
	db	dcntl,INIWAITS	;wait states\r
	db	cbar,SYS$CBAR\r
\r
;----------------------------------------------------------------------\r
\r
start:\r
	ld	(tmpstack),sp\r
	ld	sp,tmpstack\r
	push af\r
	in0 a,(itc)		;Illegal opcode trap?\r
	jp m,??st01\r
	ld a,i			;I register == 0 ?\r
	jr z,??st02		;    yes, harware reset\r
\r
??st01:\r
	ld	a,(syscbr)\r
	out0	(cbr),a\r
	pop af			;restore registers\r
	ld	sp,(tmpstack)	;\r
	jp bpent		;\r
\r
??st02:\r
	di			;0058\r
	ld	a,CREFSH\r
	out0	(rcr),a		;	configure DRAM refresh\r
	ld	a,CWAITIO\r
	out0	(dcntl),a	;	wait states\r
\r
	ld	a,M_NCD		;No Clock Divide\r
	out0	(ccr),a\r
;	ld	a,M_X2CM	;X2 Clock Multiplier\r
;	out0	(cmr),a\r
\r
; search warm start mark\r
\r
	ld ix,mark_55AA		;00b8	; top of common area\r
	ld a,SYS$CBAR		;\r
	out0 (cbar),a		;\r
	ld a,071h		;00bc\r
	ex af,af'		;00be	;for cbr = 0x70 downto 0x40\r
swsm_l:\r
	ex af,af'		;00bf\r
	dec a			;00c0\r
	cp 03fh			;00c1\r
	jr z,kstart		;00c3	;  break (mark not found)\r
	out0 (cbr),a		;00c5\r
	ex af,af'		;00c8\r
	ld a,0aah		;00c9\r
	cp (ix+000h)		;00cb\r
	jr nz,swsm_l		;00ce\r
	cp (ix+002h)		;00d0\r
	jr nz,swsm_l		;00d3\r
	cpl			;00d5\r
	cp (ix+001h)		;00d6\r
	jr nz,swsm_l		;00d9\r
	cp (ix+003h)		;00db\r
	jr nz,swsm_l		;00de\r
	ld sp,$stack		;00e0	mark found, check\r
	call checkcrc_alv	;00e3\r
	jp z,wstart		;00e6	check ok,\r
\r
;\r
; ram not ok, initialize    --  kstart --\r
\r
kstart:\r
\r
	ld	a,088h		;00e9	0000-7fff: common 0\r
	out0	(cbar),a	;00eb   8000-ffff: common 1\r
	ld	ix,08000h	;00f3\r
	ld	a,0		;00f1	start at 008000 (2. phys. 32k block)\r
??f_0:\r
	out0	(cbr),a		;00f9\r
\r
	ld	(ix+0),a	;0103\r
	cpl\r
	ld	(ix+1),a	;0103\r
	cpl\r
	add	a,8		;010a	next 'bank'\r
	cp	078h		;010c	stop at 078000\r
	jr	nz,??f_0	;010e\r
\r
	ld	de,8000h	;0114   first block not tested, but mark as ok\r
	ld	a,0		;00f1	start at 008000 (2. phys. 32k block)\r
??cp_0:\r
	out0	(cbr),a		;011c\r
	ld	c,a\r
	xor	(ix+0)\r
	ld	b,a\r
	ld	a,c\r
	cpl\r
	xor	(ix+1)\r
	or	b\r
	jr	nz,??cp_1\r
	scf\r
??cp_1:\r
	rr	d\r
	rr	e\r
	ld	a,c\r
	add	a,8\r
	cp	078h		;	stop at 078000\r
	jr	nz,??cp_0\r
\r
;\r
;  ram test found 1 or more error free blocks (32k)\r
;\r
\r
ramok:\r
	ld	a,SYS$CBAR	;01c8\r
	out0	(cbar),a	;01ca\r
	ld	h,d\r
	ld	l,e\r
	ld 	c,070h		;01ce	highest block\r
	ld 	b,15		;01d0\r
??sr_1:\r
	add	hl,hl\r
	jr	c,alloc		;01d4	highest "error free" block\r
	ld	a,c		;01d6\r
	sub	008h		;01d7\r
	ld	c,a		;01d9\r
	djnz	??sr_1		;01da\r
\r
	slp			;01dc	should never be reached\r
\r
alloc:\r
	out0	(cbr),c		;01de\r
	ld	a,c\r
	ld	(syscbr),a\r
	ld	sp,$stack	;01e1\r
\r
; Clear RAM using DMA0\r
\r
	ld	hl,dmclrt	;load DMA registers\r
	call	io.ini.m\r
	ld	a,0cbh		;01ef	dst +1, src fixed, burst\r
	out0	(dmode),a	;01f1\r
\r
	ld	b,512/64\r
	ld	a,062h		;01f4	enable dma0,\r
??cl_1:\r
	out0	(dstat),a	;01f9	clear (up to) 64k\r
	djnz	??cl_1		;	end of RAM?\r
\r
; Init bank manager\r
\r
	ld	hl,banktabsys	;020f\r
	ld	(hl),c		;	Common area\r
	inc	hl		;0213\r
	ld	(hl),c		;	System work area\r
	inc	hl		;0215	Point to bank 0 entry\r
	ld	b,BANKS		;0216\r
l0218h:\r
	ld	(hl),0ffh	;0218	Mark all banks as unassigned\r
	inc	hl		;021a\r
	djnz	l0218h		;021b\r
\r
	ld	hl,memalv	;\r
	ld	b,8		;	8*4k ie. first 32k\r
??a_0:\r
	ld	(hl),0e0h	;	mark as sys ("rom"/monitor)\r
	inc	hl\r
	djnz	??a_0\r
\r
	rr	d		;	shift out bit for block 0\r
	rr	e		;\r
	ld	c,15		;022c	15*32k remaining blocks\r
l022eh:\r
	ld	a,0feh		;	0xfe == block with error(s)\r
	rr	d		;\r
	rr	e\r
	adc	a,0		;	==> 0xff : block ok\r
	ld	b,32/4		;	32k == 8 * 4k\r
l0236h:\r
	ld	(hl),a		;\r
	inc	hl		;\r
	djnz	l0236h		;\r
	dec	c		;\r
	jr	nz,l022eh	;next 32k block\r
\r
	ld	hl,memalv+0ch	;memalv+0ch\r
	ld	a,(banktabsys)	;\r
	call	add_hl_a\r
	ld	b,3		;\r
l024ah:\r
	ld	(hl),0ech	;alloc system ram\r
	inc	hl		;\r
	djnz	l024ah		;\r
	ld	(hl),0efh	;alloc common\r
	call	gencrc_alv\r
\r
	ld	hl,0000h	;bank #\r
	ld	bc,0f0fh	;  size (?) (4k blocks)\r
	xor	a		;\r
	call	sub_0420h	;alloc mem for bank 0\r
	ld	c,l		;\r
	or	a		;\r
	call	z,sub_04b5h	;\r
\r
	ld	hl,0101h	;\r
	ld	bc,0f0fh	;\r
	xor	a		;\r
	call	sub_0420h	;\r
	ld	c,l		;\r
	or	a		;\r
	call	z,sub_04b5h	;\r
\r
	ld	hl,055AAh	;set warm start mark\r
	ld	(mark_55AA),hl	;\r
	ld	(mark_55AA+2),hl;\r
\r
;\r
; crc ok       --  wstart  --\r
;\r
wstart:\r
	call	sysram_init	;027f\r
	call	ivtab_init\r
\r
	call	prt0_init\r
\r
	call	charini\r
\r
	call	bufferinit\r
\r
\r
\r
	im 2			;?030e\r
	ei			;0282\r
\r
	call ?const		;0284\r
	call ?const		;0287\r
	or a			;028a\r
	call nz,?conin		;028d\r
\r
	ld a,(banktab)		;\r
	ld e,a			;\r
	jp ddtz			;0290\r
\r
\r
	ds	8\r
tmpstack:\r
	dw	2\r
syscbr:	db	1\r
\r
;\r
;----------------------------------------------------------------------\r
;\r
\r
;TODO: Make a ringbuffer module.\r
\r
	global	buf.init\r
\r
buf.init:\r
	ld	(ix+o.in_idx),0\r
	ld	(ix+o.out_idx),0\r
	ld	(ix+o.mask),a\r
	ret\r
\r
;----------------------------------------------------------------------\r
if 0\r
	extrn	msginit,msg_tx_fifo,msg_rx_fifo\r
	extrn	msg.sout\r
\r
bufferinit:\r
\r
	ld	de,msg_tx_fifo\r
	in0	a,cbr\r
	call	log2phys\r
	ld	(40h+0),hl\r
	ld	(40h+2),a\r
\r
;	ld	(bufdat+1),hl\r
;	ld	(bufdat+3),a\r
;	ld	a,1\r
;	ld	(bufdat+0),a\r
;	ld	hl,inimsg\r
;	call	msg.sout\r
\r
	ld	de,msg_rx_fifo\r
	in0	a,cbr\r
	call	log2phys\r
	ld	(bufdat+1),hl\r
	ld	(bufdat+3),a\r
	ld	a,2\r
	ld	(bufdat+0),a\r
	ld	hl,inimsg\r
	call	msg.sout\r
\r
	ret\r
\r
inimsg:\r
	db	inimsg_e - $ - 1\r
	db	0AEh\r
	db	inimsg_e - $ - 1\r
	db	0\r
bufdat:\r
	db	0\r
	dw	0\r
	db	0\r
inimsg_e:\r
\r
endif\r
;----------------------------------------------------------------------\r
;\r
\r
	extrn	msginit,msg.sout\r
	extrn	mtx.fifo,mrx.fifo\r
	extrn	co.fifo,ci.fifo\r
\r
\r
bufferinit:\r
	call	 msginit\r
\r
	ld	hl,buffers\r
	ld	b,buftablen\r
bfi_1:\r
	ld	a,(hl)\r
	inc	hl\r
	ld	(bufdat+0),a\r
	ld	e,(hl)\r
	inc	hl\r
	ld	d,(hl)\r
	inc	hl\r
	push	hl\r
\r
	or	a\r
	jr	nz,bfi_2\r
	in0	a,cbr\r
	call	log2phys\r
	ld	(40h+0),hl\r
	ld	(40h+2),a\r
	out0	(AVRINT5),a\r
	jr	bfi_3	\r
bfi_2:\r
	in0	a,cbr\r
	call	log2phys\r
	ld	(bufdat+1),hl\r
	ld	(bufdat+3),a\r
	ld	hl,inimsg\r
	call	msg.sout\r
bfi_3:\r
	pop	hl\r
	djnz	bfi_1\r
	ret\r
\r
buffers:\r
	db	0\r
	dw	mtx.fifo\r
	db	1\r
	dw	mrx.fifo\r
	db	2\r
	dw	co.fifo\r
	db	3\r
	dw	ci.fifo\r
buftablen equ	($ - buffers)/3\r
\r
inimsg:\r
	db	inimsg_e - $ -1\r
	db	0AEh\r
	db	inimsg_e - $ -1\r
	db	0\r
bufdat:\r
	db	0\r
	dw	0\r
	db	0\r
inimsg_e:\r
\r
\r
;\r
;----------------------------------------------------------------------\r
;\r
\r
sysram_init:\r
	ld hl,sysramw\r
	ld de,topcodsys\r
	ld bc,sysrame-sysramw\r
	ldir\r
\r
	ret\r
\r
;----------------------------------------------------------------------\r
\r
ivtab_init:\r
	ld	hl,ivtab	;\r
	ld	a,h		;\r
	ld	i,a		;\r
	out0	(il),l		;\r
\r
; Let all vectors point to spurious int routines.\r
\r
	ld	d,high sp.int0\r
	ld	a,low  sp.int0\r
	ld	b,9\r
ivt_i1:\r
	ld	(hl),a\r
	inc	l\r
	ld	(hl),d\r
	inc	l\r
	add	a,sp.int.len\r
	djnz	ivt_i1\r
	ret\r
\r
;----------------------------------------------------------------------\r
\r
prt0_init:\r
	ld	a,i\r
	ld	h,a\r
	in0	a,(il)\r
	and	0E0h\r
	or	IV$PRT0\r
	ld	l,a\r
	ld	(hl),low  iprt0\r
	inc	hl\r
	ld	(hl),high iprt0\r
	ld	hl,prt0itab\r
	call	io.ini.m\r
	ret\r
\r
prt0itab:\r
	db	prt0it_e-prt0itab-2\r
	db	tmdr0l\r
	dw	PRT_TC10MS\r
	dw	PRT_TC10MS\r
	db	M_TIE0+M_TDE0	;enable timer 0 interrupt and down count.\r
prt0it_e:\r
\r
\r
;\r
;----------------------------------------------------------------------\r
;\r
\r
io.ini:\r
	push	bc\r
	ld	b,0		;high byte port adress\r
	ld	a,(hl)		;count\r
	inc	hl\r
ioi_1:\r
	ld	c,(hl)		;port address\r
	inc	hl\r
	outi\r
	inc	b		;outi decrements b\r
	dec	a\r
	jr	nz,ioi_1\r
	pop	bc\r
	ret\r
\r
io.ini.m:\r
	push	bc\r
	ld	b,(hl)\r
	inc	hl\r
	ld	c,(hl)\r
	inc	hl\r
	otimr\r
	pop	bc\r
	ret\r
\r
io.ini.l:\r
;\r
\r
;----------------------------------------------------------------------\r
;\r
\r
; compute crc\r
; hl: start adr\r
; bc: len\r
; bc returns crc val\r
\r
do_crc16:\r
	ld	de,0FFFFh\r
crc1:\r
	ld	a,(hl)\r
	xor	e\r
	ld	e,a\r
	rrca\r
	rrca\r
	rrca\r
	rrca\r
	and	0Fh\r
	xor	e\r
	ld	e,a\r
	rrca\r
	rrca\r
	rrca\r
	push	af\r
	and	1Fh\r
	xor	d\r
	ld	d,a\r
	pop	af\r
	push	af\r
	rrca\r
	and	0F0h\r
	xor	d\r
	ld	d,a\r
	pop	af\r
	and	0E0h\r
	xor	e\r
	ld	e,d\r
	ld	d,a\r
	cpi\r
	jp	pe,crc1\r
	or	e		;z-flag\r
	ret\r
\r
\r
gencrc_alv:\r
	push hl			;03f6\r
	push de			;03f7\r
	push bc\r
	push af			;03f8\r
	ld hl,banktabsys	;03f9\r
	ld bc,crc_len		;03fc\r
	call do_crc16		;03ff\r
	ld (hl),e\r
	inc hl\r
	ld (hl),d\r
	pop af			;0406\r
	pop bc\r
	pop de			;0407\r
	pop hl			;0408\r
	ret			;0409\r
\r
checkcrc_alv:\r
	push hl			;040a\r
	push de\r
	push bc			;040b\r
	ld hl,banktabsys	;040d\r
	ld bc,crc_len+2		;0410\r
	call do_crc16		;0413\r
	pop bc			;041d\r
	pop de\r
	pop hl			;041e\r
	ret			;041f\r
\r
;----------------------------------------------------------------------\r
\r
;\r
;  alloc\r
;\r
;	h:	max bank #\r
;	l:	min bank #\r
;	b:	max size\r
;	c:	min size\r
;\r
;    ret:\r
;	a: 	0  == ok\r
;		1  ==\r
;		2  == no bank # in requested range\r
;		ff == crc error\r
;\r
\r
sub_0420h:\r
	call checkcrc_alv	;0420\r
	jr nz,l049ch		;0424	crc error, tables corrupt\r
\r
	call sub_049dh		;0427	bank # in req. range available?\r
	jr c,l0499h		;042a\r
	push ix			;042c\r
	push iy			;042e\r
	push de			;0430\r
	push hl			;0431\r
	push bc			;0432\r
	ld c,b			;0433\r
	ld b,alv_len+1		;0434\r
	ld d,0			;0436\r
	ld hl,memalv-1		;0438\r
	jr l0441h		;043b\r
\r
; find free blocks\r
\r
l043dh:\r
	ld a,(hl)		;043d\r
	inc a			;043e	free blocks are marked 0ffh\r
	jr z,l0446h		;043f\r
l0441h:\r
	inc hl			;0441\r
	djnz l043dh		;0442\r
	jr l0464h		;0444\r
l0446h:\r
	push hl			;0446\r
	pop ix			;0447	free blocks start here\r
	ld e,000h		;0449\r
	jr l0451h		;044b\r
l044dh:				;	count free blocks\r
	ld a,(hl)		;044d\r
	inc a			;044e\r
	jr nz,l0457h		;044f\r
l0451h:\r
	inc e			;0451\r
	inc hl			;0452\r
	djnz l044dh		;0453\r
	jr l0464h		;0455\r
\r
; end of free blocks run.\r
\r
l0457h:\r
	ld a,d			;0457\r
	cp e			;0458	nr of blocks >= requested ?\r
	jr nc,l0441h		;0459\r
\r
	ld d,e			;045b\r
	push ix			;045c\r
	pop iy			;045e\r
	ld a,d			;0460\r
	cp c			;0461\r
	jr c,l0441h		;0462\r
l0464h:\r
	pop bc			;0464\r
	ld a,d			;0465\r
	cp b			;0466\r
	jr c,l046ch		;0467\r
	ld d,b			;0469\r
	jr l0471h		;046a\r
l046ch:\r
	cp c			;046c\r
	jr nc,l0471h		;046d\r
	ld d,000h		;046f\r
l0471h:\r
	ld a,d			;0471\r
	push iy			;0472\r
	pop hl			;0474\r
	ld de,memalv		;0475\r
	or a			;0478\r
	sbc hl,de		;0479\r
	ld b,l			;047b\r
	ld c,a			;047c\r
	pop hl			;047d\r
l047eh:\r
	or a			;047e\r
	jr z,l0489h		;047f\r
	ld (iy+0),l		;0481\r
	inc iy			;0484\r
	dec a			;0486\r
	jr l047eh		;0487\r
l0489h:\r
	pop de			;0489\r
	pop iy			;048a\r
	pop ix			;048c\r
	call gencrc_alv		;048e\r
	ld a,c			;0491\r
	or a			;0492\r
	ld a,000h		;0493\r
	ret nz			;0495\r
	or 001h			;0496\r
	ret			;0498\r
\r
l0499h:\r
	ld a,2			;0499\r
l049ch:\r
	or a\r
	ret			;049c\r
\r
\r
; search a free bank number in range\r
;	h: max #\r
;	l: min #\r
;    ret:\r
;	l: bank number available\r
;	nc, if found, bank nr. in l\r
;	cy, if none found\r
\r
sub_049dh:\r
	push de			;049d\r
	push bc			;049e\r
	ex de,hl		;049f\r
	dec e			;04a0\r
l04a1h:\r
	inc e			;04a1	test next #\r
	ld a,d			;04a2\r
	cp e			;04a3\r
	jr c,l04b1h		;04a4\r
	ld a,e			;04a6\r
	ld hl,memalv		;04a7\r
	ld bc,alv_len		;04aa\r
	cpir			;04ad	bank# allready allocated?\r
	jr z,l04a1h		;04af	if yes, search for next\r
l04b1h:\r
	ex de,hl		;04b1\r
	pop bc			;04b2\r
	pop de			;04b3\r
	ret			;04b4\r
\r
\r
sub_04b5h:\r
	ld a,l			;04b5\r
	cp 012h			;04b6\r
	ccf			;04b8\r
	ret c			;04b9\r
	push hl			;04ba\r
	ld hl,banktab		;04bb\r
	call add_hl_a\r
	ld (hl),b		;04c3\r
	call gencrc_alv		;04c4\r
	pop hl			;04c7\r
	or a			;04c8	clear carry\r
	ret			;04c9\r
\r
\r
;--------------------------------------------------------------\r
;\r
; de: Log. Address\r
;  a: Bank number\r
;\r
;out ahl: Phys. (linear) Address\r
\r
\r
bnk2phys:\r
	push	hl\r
	ld	hl,banktab\r
	call	add_hl_a\r
	ld	a,(hl)\r
	pop	hl\r
\r
	; fall thru\r
;--------------------------------------------------------------\r
;\r
; de: Log. Address\r
;  a: Bank (bbr)\r
;\r
; OP: ahl = (a<<12) + (d<<8) + e\r
;\r
;out ahl: Phys. (linear) Address\r
\r
\r
log2phys:\r
	push	bc		;\r
	ld	c,a		;\r
	ld	b,16		;\r
	mlt	bc		;bc = a<<4\r
	ld	l,d		;\r
	ld	h,0		;\r
	add	hl,bc		;bc + d == a<<4 + d\r
	ld	a,h		;\r
	ld	h,l		;\r
	ld	l,e		;\r
	pop	bc		;\r
	ret			;\r
\r
\r
;--------------------------------------------------------------\r
;\r
;return:\r
; hl = hl + a\r
; Flags undefined\r
;\r
\r
add_hl_a:\r
	add a,l\r
	ld l,a\r
	ret nc\r
	inc h\r
	ret\r
\r
; ---------------------------------------------------------\r
\r
sysramw:\r
\r
	.phase isvsw_loc\r
topcodsys:\r
\r
; Trampoline for interrupt routines in banked ram.\r
; Switch stack pointer to "system" stack in top ram\r
; Save cbar\r
\r
isv_sw:				;\r
	ex (sp),hl		;	save hl, return adr in hl\r
	push de			;\r
	push af			;\r
	ex de,hl		;\r
	ld hl,0			;\r
	add hl,sp		;\r
	ld a,h			;\r
	cp 0f8h			;\r
	jr nc,isw_1		;\r
	ld sp,$stack		;\r
isw_1:\r
	push hl			;\r
	in0 h,(cbar)		;\r
	push hl			;\r
	ld a,SYS$CBAR		;\r
	out0 (cbar),a		;\r
	ex de,hl		;\r
	ld e,(hl)		;\r
	inc hl			;\r
	ld d,(hl)		;\r
	ex de,hl		;\r
	push bc			;\r
	call jphl		;\r
\r
	pop bc			;\r
	pop hl			;\r
	out0 (cbar),h		;\r
	pop hl			;\r
	ld sp,hl		;\r
	pop af			;\r
	pop de			;\r
	pop hl			;\r
	ei			;\r
	ret			;\r
jphl:\r
	jp (hl)			;\r
\r
; ---------------------------------------------------------\r
\r
\r
iprt0:\r
	push	af\r
	push	hl\r
	in0	a,(tcr)\r
	in0	a,(tmdr0l)\r
	in0	a,(tmdr0h)\r
	ld	a,(tim_ms)\r
	inc	a\r
	cp	100\r
	jr	nz,iprt_1\r
	xor	a\r
	ld	hl,(tim_s)\r
	inc	hl\r
	ld	(tim_s),hl\r
iprt_1:\r
	ld	(tim_ms),a\r
	pop	hl\r
	pop	af\r
	ei\r
	ret\r
\r
; ---------------------------------------------------------\r
\r
sp.int0:\r
	ld	a,0d0h\r
	jr	sp.i.1\r
sp.int.len equ	$-sp.int0\r
	ld	a,0d1h\r
	jr	sp.i.1\r
	ld	a,0d2h\r
	jr	sp.i.1\r
	ld	a,0d3h\r
	jr	sp.i.1\r
	ld	a,0d4h\r
	jr	sp.i.1\r
	ld	a,0d5h\r
	jr	sp.i.1\r
	ld	a,0d6h\r
	jr	sp.i.1\r
	ld	a,0d7h\r
	jr	sp.i.1\r
	ld	a,0d8h\r
sp.i.1:\r
;	out	(80h),a\r
	halt\r
\r
curph	defl	$\r
	.dephase\r
sysrame:\r
	.phase curph\r
tim_ms:	db	0\r
tim_s:	dw	0\r
	.dephase\r
\r
;-----------------------------------------------------\r
\r
	dseg\r
\r
	ds	1\r
banktabsys:\r
	ds	1	;0c001h\r
	ds	1	;0c002h\r
banktab:\r
	ds	BANKS	;0c003h\r
memalv:\r
	ds	512/4		;Number of 4k blocks\r
alv_len	equ	$-memalv\r
crc_len	equ	$-banktabsys\r
\r
crc_memalv:\r
	ds	2	;\r
\r
	cseg\r
\r
	;.phase	0ffc0h\r
;ivtab	equ	0ffc0h		; 0ffc0h	;int vector table\r
	;.dephase\r
\r
	;.phase	0fffch\r
mark_55AA equ 0fffch\r
	;ds	4		; 0fffch\r
	;.dephase\r
\r
\r
	end\r
\r
Commit	Line	Data
a16ba2b0 L	1	page 255\r
	2	.z80\r
	3	\r
	4	extrn ddtz,bpent\r
	5	extrn $stack\r
30d1329e	6	extrn charini,?const,?conin\r
a16ba2b0 L	7	\r
	8	extrn romend\r
	9	\r
	10	\r
	11	global isv_sw\r
	12	\r
	13	include config.inc\r
	14	include z180reg.inc\r
	15	include z180.lib\r
815c1735	16	\r
f4d5b4fe	17	;CR equ 0dh\r
a16ba2b0 L	18	\r
	19	\r
	20	\r
	21	;----------------------------------------------------------------------\r
	22	\r
	23	cseg\r
	24	\r
815c1735	25	jp start\r
a16ba2b0 L	26	\r
	27	; restart vectors\r
	28	\r
	29	rsti defl 1\r
	30	rept 7\r
	31	db 0, 0, 0, 0, 0\r
	32	jp bpent\r
	33	rsti defl rsti+1\r
	34	endm\r
349c01b1	35	db 0, 0, 0, 0, 0\r
a16ba2b0 L	36	\r
a16ba2b0 L	37	;----------------------------------------------------------------------\r
349c01b1 L	38	\r
	39	;org 40h\r
	40	\r
	41	dw 0\r
	42	db 0\r
	43	\r
a16ba2b0 L	44	\r
	45	if ROMSYS\r
	46	$crom: defb c$rom ;\r
	47	else\r
	48	db 0 ;\r
	49	endif\r
	50	\r
	51	dmclrt: ;clear ram per dma\r
	52	db dmct_e-dmclrt-2 ;\r
	53	db sar0l ;first port\r
815c1735	54	dw nullbyte ;src (fixed)\r
a16ba2b0 L	55	nullbyte:\r
	56	db 000h ;src\r
	57	dw romend ;dst (inc), start after "rom" code\r
	58	db 00h ;dst\r
	59	dw 0-romend ;count (64k)\r
	60	dmct_e:\r
	61	\r
a16ba2b0 L	62	INIWAITS defl CWAITIO\r
	63	if ROMSYS\r
	64	INIWAITS defl INIWAITS+CWAITROM\r
	65	endif\r
	66	\r
	67	hwini0:\r
	68	db 3 ;count\r
	69	db rcr,CREFSH ;configure DRAM refresh\r
	70	db dcntl,INIWAITS ;wait states\r
	71	db cbar,SYS$CBAR\r
	72	\r
	73	;----------------------------------------------------------------------\r
	74	\r
	75	start:\r
30d1329e L	76	ld (tmpstack),sp\r
	77	ld sp,tmpstack\r
	78	push af\r
	79	in0 a,(itc) ;Illegal opcode trap?\r
	80	jp m,??st01\r
	81	ld a,i ;I register == 0 ?\r
	82	jr z,??st02 ; yes, harware reset\r
a16ba2b0 L	83	\r
a16ba2b0 L	84	??st01:\r
30d1329e L	85	ld a,(syscbr)\r
	86	out0 (cbr),a\r
	87	pop af ;restore registers\r
	88	ld sp,(tmpstack) ;\r
	89	jp bpent ;\r
a16ba2b0 L	90	\r
	91	??st02:\r
	92	di ;0058\r
	93	ld a,CREFSH\r
	94	out0 (rcr),a ; configure DRAM refresh\r
	95	ld a,CWAITIO\r
	96	out0 (dcntl),a ; wait states\r
	97	\r
815c1735 L	98	ld a,M_NCD ;No Clock Divide\r
815c1735 L	99	out0 (ccr),a\r
bad2d92d L	100	; ld a,M_X2CM ;X2 Clock Multiplier\r
bad2d92d L	101	; out0 (cmr),a\r
815c1735	102	\r
a16ba2b0 L	103	; search warm start mark\r
	104	\r
	105	ld ix,mark_55AA ;00b8 ; top of common area\r
	106	ld a,SYS$CBAR ;\r
	107	out0 (cbar),a ;\r
	108	ld a,071h ;00bc\r
	109	ex af,af' ;00be ;for cbr = 0x70 downto 0x40\r
	110	swsm_l:\r
815c1735	111	ex af,af' ;00bf\r
a16ba2b0 L	112	dec a ;00c0\r
	113	cp 03fh ;00c1\r
	114	jr z,kstart ;00c3 ; break (mark not found)\r
	115	out0 (cbr),a ;00c5\r
	116	ex af,af' ;00c8\r
	117	ld a,0aah ;00c9\r
	118	cp (ix+000h) ;00cb\r
	119	jr nz,swsm_l ;00ce\r
	120	cp (ix+002h) ;00d0\r
	121	jr nz,swsm_l ;00d3\r
	122	cpl ;00d5\r
	123	cp (ix+001h) ;00d6\r
	124	jr nz,swsm_l ;00d9\r
	125	cp (ix+003h) ;00db\r
	126	jr nz,swsm_l ;00de\r
	127	ld sp,$stack ;00e0 mark found, check\r
	128	call checkcrc_alv ;00e3\r
	129	jp z,wstart ;00e6 check ok,\r
	130	\r
	131	;\r
	132	; ram not ok, initialize -- kstart --\r
	133	\r
	134	kstart:\r
	135	\r
	136	ld a,088h ;00e9 0000-7fff: common 0\r
	137	out0 (cbar),a ;00eb 8000-ffff: common 1\r
	138	ld ix,08000h ;00f3\r
	139	ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
	140	??f_0:\r
	141	out0 (cbr),a ;00f9\r
	142	\r
815c1735	143	ld (ix+0),a ;0103\r
a16ba2b0	144	cpl\r
815c1735	145	ld (ix+1),a ;0103\r
a16ba2b0 L	146	cpl\r
	147	add a,8 ;010a next 'bank'\r
	148	cp 078h ;010c stop at 078000\r
	149	jr nz,??f_0 ;010e\r
	150	\r
	151	ld de,8000h ;0114 first block not tested, but mark as ok\r
	152	ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
	153	??cp_0:\r
	154	out0 (cbr),a ;011c\r
	155	ld c,a\r
	156	xor (ix+0)\r
	157	ld b,a\r
	158	ld a,c\r
	159	cpl\r
	160	xor (ix+1)\r
	161	or b\r
	162	jr nz,??cp_1\r
	163	scf\r
	164	??cp_1:\r
	165	rr d\r
	166	rr e\r
	167	ld a,c\r
	168	add a,8\r
	169	cp 078h ; stop at 078000\r
	170	jr nz,??cp_0\r
815c1735	171	\r
a16ba2b0 L	172	;\r
	173	; ram test found 1 or more error free blocks (32k)\r
	174	;\r
	175	\r
	176	ramok:\r
	177	ld a,SYS$CBAR ;01c8\r
	178	out0 (cbar),a ;01ca\r
	179	ld h,d\r
	180	ld l,e\r
	181	ld c,070h ;01ce highest block\r
	182	ld b,15 ;01d0\r
	183	??sr_1:\r
	184	add hl,hl\r
	185	jr c,alloc ;01d4 highest "error free" block\r
	186	ld a,c ;01d6\r
	187	sub 008h ;01d7\r
	188	ld c,a ;01d9\r
	189	djnz ??sr_1 ;01da\r
	190	\r
	191	slp ;01dc should never be reached\r
	192	\r
	193	alloc:\r
	194	out0 (cbr),c ;01de\r
30d1329e L	195	ld a,c\r
30d1329e L	196	ld (syscbr),a\r
a16ba2b0	197	ld sp,$stack ;01e1\r
815c1735	198	\r
a16ba2b0 L	199	; Clear RAM using DMA0\r
	200	\r
	201	ld hl,dmclrt ;load DMA registers\r
	202	call io.ini.m\r
	203	ld a,0cbh ;01ef dst +1, src fixed, burst\r
	204	out0 (dmode),a ;01f1\r
	205	\r
	206	ld b,512/64\r
815c1735	207	ld a,062h ;01f4 enable dma0,\r
a16ba2b0 L	208	??cl_1:\r
	209	out0 (dstat),a ;01f9 clear (up to) 64k\r
	210	djnz ??cl_1 ; end of RAM?\r
815c1735	211	\r
a16ba2b0	212	; Init bank manager\r
815c1735	213	\r
a16ba2b0 L	214	ld hl,banktabsys ;020f\r
	215	ld (hl),c ; Common area\r
	216	inc hl ;0213\r
	217	ld (hl),c ; System work area\r
	218	inc hl ;0215 Point to bank 0 entry\r
	219	ld b,BANKS ;0216\r
	220	l0218h:\r
	221	ld (hl),0ffh ;0218 Mark all banks as unassigned\r
	222	inc hl ;021a\r
	223	djnz l0218h ;021b\r
	224	\r
	225	ld hl,memalv ;\r
	226	ld b,8 ; 8*4k ie. first 32k\r
	227	??a_0:\r
	228	ld (hl),0e0h ; mark as sys ("rom"/monitor)\r
	229	inc hl\r
	230	djnz ??a_0\r
815c1735	231	\r
a16ba2b0 L	232	rr d ; shift out bit for block 0\r
	233	rr e ;\r
	234	ld c,15 ;022c 15*32k remaining blocks\r
	235	l022eh:\r
	236	ld a,0feh ; 0xfe == block with error(s)\r
	237	rr d ;\r
	238	rr e\r
	239	adc a,0 ; ==> 0xff : block ok\r
815c1735	240	ld b,32/4 ; 32k == 8 * 4k\r
a16ba2b0 L	241	l0236h:\r
	242	ld (hl),a ;\r
	243	inc hl ;\r
	244	djnz l0236h ;\r
	245	dec c ;\r
	246	jr nz,l022eh ;next 32k block\r
815c1735	247	\r
a16ba2b0 L	248	ld hl,memalv+0ch ;memalv+0ch\r
	249	ld a,(banktabsys) ;\r
	250	call add_hl_a\r
	251	ld b,3 ;\r
	252	l024ah:\r
	253	ld (hl),0ech ;alloc system ram\r
	254	inc hl ;\r
	255	djnz l024ah ;\r
	256	ld (hl),0efh ;alloc common\r
	257	call gencrc_alv\r
	258	\r
815c1735	259	ld hl,0000h ;bank #\r
a16ba2b0 L	260	ld bc,0f0fh ; size (?) (4k blocks)\r
	261	xor a ;\r
	262	call sub_0420h ;alloc mem for bank 0\r
	263	ld c,l ;\r
	264	or a ;\r
	265	call z,sub_04b5h ;\r
	266	\r
	267	ld hl,0101h ;\r
	268	ld bc,0f0fh ;\r
	269	xor a ;\r
	270	call sub_0420h ;\r
	271	ld c,l ;\r
	272	or a ;\r
	273	call z,sub_04b5h ;\r
	274	\r
	275	ld hl,055AAh ;set warm start mark\r
	276	ld (mark_55AA),hl ;\r
	277	ld (mark_55AA+2),hl;\r
	278	\r
	279	;\r
	280	; crc ok -- wstart --\r
	281	;\r
	282	wstart:\r
	283	call sysram_init ;027f\r
	284	call ivtab_init\r
	285	\r
	286	call prt0_init\r
	287	\r
30d1329e	288	call charini\r
a16ba2b0	289	\r
bad2d92d	290	call bufferinit\r
a16ba2b0 L	291	\r
	292	\r
	293	\r
	294	im 2 ;?030e\r
	295	ei ;0282\r
	296	\r
30d1329e L	297	call ?const ;0284\r
30d1329e L	298	call ?const ;0287\r
a16ba2b0	299	or a ;028a\r
30d1329e	300	call nz,?conin ;028d\r
815c1735 L	301	\r
	302	ld a,(banktab) ;\r
	303	ld e,a ;\r
a16ba2b0	304	jp ddtz ;0290\r
815c1735	305	\r
30d1329e L	306	\r
	307	ds 8\r
	308	tmpstack:\r
	309	dw 2\r
	310	syscbr: db 1\r
	311	\r
a16ba2b0 L	312	;\r
	313	;----------------------------------------------------------------------\r
	314	;\r
	315	\r
a16ba2b0 L	316	;TODO: Make a ringbuffer module.\r
	317	\r
	318	global buf.init\r
815c1735	319	\r
a16ba2b0 L	320	buf.init:\r
	321	ld (ix+o.in_idx),0\r
	322	ld (ix+o.out_idx),0\r
	323	ld (ix+o.mask),a\r
	324	ret\r
	325	\r
	326	;----------------------------------------------------------------------\r
6a4e9540	327	if 0\r
bad2d92d L	328	extrn msginit,msg_tx_fifo,msg_rx_fifo\r
bad2d92d L	329	extrn msg.sout\r
349c01b1 L	330	\r
349c01b1 L	331	bufferinit:\r
349c01b1	332	\r
bad2d92d	333	ld de,msg_tx_fifo\r
349c01b1 L	334	in0 a,cbr\r
	335	call log2phys\r
	336	ld (40h+0),hl\r
	337	ld (40h+2),a\r
bad2d92d	338	\r
6a4e9540 L	339	; ld (bufdat+1),hl\r
	340	; ld (bufdat+3),a\r
	341	; ld a,1\r
	342	; ld (bufdat+0),a\r
	343	; ld hl,inimsg\r
	344	; call msg.sout\r
349c01b1	345	\r
bad2d92d L	346	ld de,msg_rx_fifo\r
	347	in0 a,cbr\r
	348	call log2phys\r
	349	ld (bufdat+1),hl\r
	350	ld (bufdat+3),a\r
6a4e9540	351	ld a,2\r
bad2d92d L	352	ld (bufdat+0),a\r
	353	ld hl,inimsg\r
	354	call msg.sout\r
349c01b1	355	\r
bad2d92d	356	ret\r
a16ba2b0	357	\r
349c01b1	358	inimsg:\r
bad2d92d	359	db inimsg_e - $ - 1\r
3531528e	360	db 0AEh\r
bad2d92d	361	db inimsg_e - $ - 1\r
349c01b1 L	362	db 0\r
	363	bufdat:\r
	364	db 0\r
	365	dw 0\r
	366	db 0\r
	367	inimsg_e:\r
bad2d92d	368	\r
6a4e9540	369	endif\r
349c01b1 L	370	;----------------------------------------------------------------------\r
349c01b1 L	371	;\r
4caee1ec	372	\r
6a4e9540 L	373	extrn msginit,msg.sout\r
	374	extrn mtx.fifo,mrx.fifo\r
	375	extrn co.fifo,ci.fifo\r
4caee1ec L	376	\r
4caee1ec L	377	\r
a16ba2b0 L	378	bufferinit:\r
a16ba2b0 L	379	call msginit\r
815c1735	380	\r
a16ba2b0	381	ld hl,buffers\r
6a4e9540	382	ld b,buftablen\r
a16ba2b0	383	bfi_1:\r
6a4e9540 L	384	ld a,(hl)\r
	385	inc hl\r
	386	ld (bufdat+0),a\r
a16ba2b0 L	387	ld e,(hl)\r
	388	inc hl\r
	389	ld d,(hl)\r
	390	inc hl\r
	391	push hl\r
6a4e9540 L	392	\r
	393	or a\r
	394	jr nz,bfi_2\r
	395	in0 a,cbr\r
	396	call log2phys\r
	397	ld (40h+0),hl\r
	398	ld (40h+2),a\r
	399	out0 (AVRINT5),a\r
	400	jr bfi_3 \r
	401	bfi_2:\r
a16ba2b0 L	402	in0 a,cbr\r
	403	call log2phys\r
	404	ld (bufdat+1),hl\r
	405	ld (bufdat+3),a\r
a16ba2b0 L	406	ld hl,inimsg\r
a16ba2b0 L	407	call msg.sout\r
6a4e9540	408	bfi_3:\r
a16ba2b0	409	pop hl\r
a16ba2b0 L	410	djnz bfi_1\r
	411	ret\r
	412	\r
a16ba2b0	413	buffers:\r
6a4e9540 L	414	db 0\r
	415	dw mtx.fifo\r
	416	db 1\r
	417	dw mrx.fifo\r
	418	db 2\r
	419	dw co.fifo\r
	420	db 3\r
	421	dw ci.fifo\r
	422	buftablen equ ($ - buffers)/3\r
815c1735 L	423	\r
815c1735 L	424	inimsg:\r
6a4e9540	425	db inimsg_e - $ -1\r
3531528e	426	db 0AEh\r
a16ba2b0 L	427	db inimsg_e - $ -1\r
	428	db 0\r
	429	bufdat:\r
	430	db 0\r
	431	dw 0\r
	432	db 0\r
e598b357	433	inimsg_e:\r
a16ba2b0	434	\r
4caee1ec	435	\r
a16ba2b0 L	436	;\r
	437	;----------------------------------------------------------------------\r
	438	;\r
	439	\r
	440	sysram_init:\r
	441	ld hl,sysramw\r
	442	ld de,topcodsys\r
	443	ld bc,sysrame-sysramw\r
	444	ldir\r
	445	\r
	446	ret\r
	447	\r
	448	;----------------------------------------------------------------------\r
	449	\r
	450	ivtab_init:\r
	451	ld hl,ivtab ;\r
	452	ld a,h ;\r
	453	ld i,a ;\r
	454	out0 (il),l ;\r
	455	\r
	456	; Let all vectors point to spurious int routines.\r
	457	\r
	458	ld d,high sp.int0\r
	459	ld a,low sp.int0\r
	460	ld b,9\r
815c1735	461	ivt_i1:\r
a16ba2b0 L	462	ld (hl),a\r
	463	inc l\r
	464	ld (hl),d\r
	465	inc l\r
	466	add a,sp.int.len\r
	467	djnz ivt_i1\r
	468	ret\r
	469	\r
4caee1ec	470	;----------------------------------------------------------------------\r
a16ba2b0 L	471	\r
	472	prt0_init:\r
	473	ld a,i\r
	474	ld h,a\r
	475	in0 a,(il)\r
	476	and 0E0h\r
	477	or IV$PRT0\r
	478	ld l,a\r
	479	ld (hl),low iprt0\r
	480	inc hl\r
	481	ld (hl),high iprt0\r
	482	ld hl,prt0itab\r
	483	call io.ini.m\r
	484	ret\r
815c1735	485	\r
a16ba2b0 L	486	prt0itab:\r
	487	db prt0it_e-prt0itab-2\r
	488	db tmdr0l\r
	489	dw PRT_TC10MS\r
	490	dw PRT_TC10MS\r
	491	db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r
	492	prt0it_e:\r
	493	\r
4caee1ec	494	\r
a16ba2b0 L	495	;\r
	496	;----------------------------------------------------------------------\r
	497	;\r
	498	\r
	499	io.ini:\r
	500	push bc\r
	501	ld b,0 ;high byte port adress\r
	502	ld a,(hl) ;count\r
	503	inc hl\r
	504	ioi_1:\r
	505	ld c,(hl) ;port address\r
	506	inc hl\r
	507	outi\r
	508	inc b ;outi decrements b\r
	509	dec a\r
	510	jr nz,ioi_1\r
	511	pop bc\r
	512	ret\r
	513	\r
	514	io.ini.m:\r
	515	push bc\r
	516	ld b,(hl)\r
	517	inc hl\r
	518	ld c,(hl)\r
	519	inc hl\r
815c1735 L	520	otimr\r
815c1735 L	521	pop bc\r
a16ba2b0	522	ret\r
815c1735	523	\r
a16ba2b0 L	524	io.ini.l:\r
	525	;\r
	526	\r
	527	;----------------------------------------------------------------------\r
	528	;\r
	529	\r
	530	; compute crc\r
	531	; hl: start adr\r
	532	; bc: len\r
	533	; bc returns crc val\r
	534	\r
	535	do_crc16:\r
	536	ld de,0FFFFh\r
	537	crc1:\r
	538	ld a,(hl)\r
	539	xor e\r
	540	ld e,a\r
	541	rrca\r
	542	rrca\r
	543	rrca\r
	544	rrca\r
	545	and 0Fh\r
	546	xor e\r
	547	ld e,a\r
	548	rrca\r
	549	rrca\r
	550	rrca\r
	551	push af\r
	552	and 1Fh\r
	553	xor d\r
	554	ld d,a\r
	555	pop af\r
	556	push af\r
	557	rrca\r
	558	and 0F0h\r
	559	xor d\r
	560	ld d,a\r
	561	pop af\r
	562	and 0E0h\r
	563	xor e\r
	564	ld e,d\r
	565	ld d,a\r
	566	cpi\r
	567	jp pe,crc1\r
	568	or e ;z-flag\r
	569	ret\r
	570	\r
	571	\r
	572	gencrc_alv:\r
	573	push hl ;03f6\r
	574	push de ;03f7\r
	575	push bc\r
	576	push af ;03f8\r
	577	ld hl,banktabsys ;03f9\r
	578	ld bc,crc_len ;03fc\r
	579	call do_crc16 ;03ff\r
	580	ld (hl),e\r
	581	inc hl\r
	582	ld (hl),d\r
	583	pop af ;0406\r
	584	pop bc\r
	585	pop de ;0407\r
	586	pop hl ;0408\r
	587	ret ;0409\r
588	\r
589	checkcrc_alv:\r
590	push hl ;040a\r
591	push de\r
592	push bc ;040b\r
593	ld hl,banktabsys ;040d\r
594	ld bc,crc_len+2 ;0410\r
595	call do_crc16 ;0413\r
596	pop bc ;041d\r
597	pop de\r
598	pop hl ;041e\r
599	ret ;041f\r
600	\r
4caee1ec L	601	;----------------------------------------------------------------------\r
4caee1ec L	602	\r
a16ba2b0 L	603	;\r
	604	; alloc\r
	605	;\r
	606	; h: max bank #\r
	607	; l: min bank #\r
	608	; b: max size\r
	609	; c: min size\r
	610	;\r
	611	; ret:\r
	612	; a: 0 == ok\r
815c1735	613	; 1 ==\r
a16ba2b0 L	614	; 2 == no bank # in requested range\r
	615	; ff == crc error\r
	616	;\r
	617	\r
	618	sub_0420h:\r
	619	call checkcrc_alv ;0420\r
	620	jr nz,l049ch ;0424 crc error, tables corrupt\r
815c1735	621	\r
a16ba2b0 L	622	call sub_049dh ;0427 bank # in req. range available?\r
	623	jr c,l0499h ;042a\r
	624	push ix ;042c\r
	625	push iy ;042e\r
	626	push de ;0430\r
	627	push hl ;0431\r
	628	push bc ;0432\r
	629	ld c,b ;0433\r
	630	ld b,alv_len+1 ;0434\r
	631	ld d,0 ;0436\r
	632	ld hl,memalv-1 ;0438\r
	633	jr l0441h ;043b\r
	634	\r
	635	; find free blocks\r
	636	\r
	637	l043dh:\r
	638	ld a,(hl) ;043d\r
	639	inc a ;043e free blocks are marked 0ffh\r
	640	jr z,l0446h ;043f\r
	641	l0441h:\r
	642	inc hl ;0441\r
	643	djnz l043dh ;0442\r
	644	jr l0464h ;0444\r
	645	l0446h:\r
815c1735	646	push hl ;0446\r
a16ba2b0 L	647	pop ix ;0447 free blocks start here\r
	648	ld e,000h ;0449\r
	649	jr l0451h ;044b\r
	650	l044dh: ; count free blocks\r
	651	ld a,(hl) ;044d\r
	652	inc a ;044e\r
	653	jr nz,l0457h ;044f\r
	654	l0451h:\r
	655	inc e ;0451\r
	656	inc hl ;0452\r
	657	djnz l044dh ;0453\r
	658	jr l0464h ;0455\r
	659	\r
815c1735	660	; end of free blocks run.\r
a16ba2b0 L	661	\r
	662	l0457h:\r
	663	ld a,d ;0457\r
	664	cp e ;0458 nr of blocks >= requested ?\r
815c1735	665	jr nc,l0441h ;0459\r
a16ba2b0 L	666	\r
	667	ld d,e ;045b\r
	668	push ix ;045c\r
	669	pop iy ;045e\r
	670	ld a,d ;0460\r
	671	cp c ;0461\r
	672	jr c,l0441h ;0462\r
	673	l0464h:\r
	674	pop bc ;0464\r
	675	ld a,d ;0465\r
	676	cp b ;0466\r
	677	jr c,l046ch ;0467\r
	678	ld d,b ;0469\r
	679	jr l0471h ;046a\r
	680	l046ch:\r
	681	cp c ;046c\r
	682	jr nc,l0471h ;046d\r
	683	ld d,000h ;046f\r
	684	l0471h:\r
	685	ld a,d ;0471\r
	686	push iy ;0472\r
	687	pop hl ;0474\r
	688	ld de,memalv ;0475\r
	689	or a ;0478\r
	690	sbc hl,de ;0479\r
	691	ld b,l ;047b\r
	692	ld c,a ;047c\r
	693	pop hl ;047d\r
	694	l047eh:\r
	695	or a ;047e\r
	696	jr z,l0489h ;047f\r
	697	ld (iy+0),l ;0481\r
	698	inc iy ;0484\r
	699	dec a ;0486\r
	700	jr l047eh ;0487\r
	701	l0489h:\r
	702	pop de ;0489\r
	703	pop iy ;048a\r
	704	pop ix ;048c\r
	705	call gencrc_alv ;048e\r
	706	ld a,c ;0491\r
	707	or a ;0492\r
	708	ld a,000h ;0493\r
	709	ret nz ;0495\r
	710	or 001h ;0496\r
	711	ret ;0498\r
	712	\r
	713	l0499h:\r
	714	ld a,2 ;0499\r
	715	l049ch:\r
	716	or a\r
	717	ret ;049c\r
	718	\r
	719	\r
	720	; search a free bank number in range\r
	721	; h: max #\r
	722	; l: min #\r
	723	; ret:\r
	724	; l: bank number available\r
	725	; nc, if found, bank nr. in l\r
	726	; cy, if none found\r
	727	\r
	728	sub_049dh:\r
	729	push de ;049d\r
730	push bc ;049e\r
731	ex de,hl ;049f\r
732	dec e ;04a0\r
733	l04a1h:\r
734	inc e ;04a1 test next #\r
735	ld a,d ;04a2\r
736	cp e ;04a3\r
815c1735	737	jr c,l04b1h ;04a4\r
a16ba2b0 L	738	ld a,e ;04a6\r
	739	ld hl,memalv ;04a7\r
	740	ld bc,alv_len ;04aa\r
	741	cpir ;04ad bank# allready allocated?\r
	742	jr z,l04a1h ;04af if yes, search for next\r
	743	l04b1h:\r
	744	ex de,hl ;04b1\r
	745	pop bc ;04b2\r
	746	pop de ;04b3\r
	747	ret ;04b4\r
	748	\r
	749	\r
	750	sub_04b5h:\r
	751	ld a,l ;04b5\r
	752	cp 012h ;04b6\r
	753	ccf ;04b8\r
	754	ret c ;04b9\r
	755	push hl ;04ba\r
	756	ld hl,banktab ;04bb\r
	757	call add_hl_a\r
	758	ld (hl),b ;04c3\r
	759	call gencrc_alv ;04c4\r
	760	pop hl ;04c7\r
	761	or a ;04c8 clear carry\r
	762	ret ;04c9\r
	763	\r
	764	\r
	765	;--------------------------------------------------------------\r
	766	;\r
	767	; de: Log. Address\r
	768	; a: Bank number\r
	769	;\r
	770	;out ahl: Phys. (linear) Address\r
	771	\r
	772	\r
	773	bnk2phys:\r
	774	push hl\r
	775	ld hl,banktab\r
	776	call add_hl_a\r
	777	ld a,(hl)\r
	778	pop hl\r
	779	\r
	780	; fall thru\r
	781	;--------------------------------------------------------------\r
	782	;\r
	783	; de: Log. Address\r
	784	; a: Bank (bbr)\r
	785	;\r
	786	; OP: ahl = (a<<12) + (d<<8) + e\r
	787	;\r
4caee1ec	788	;out ahl: Phys. (linear) Address\r
a16ba2b0 L	789	\r
	790	\r
	791	log2phys:\r
	792	push bc ;\r
	793	ld c,a ;\r
	794	ld b,16 ;\r
	795	mlt bc ;bc = a<<4\r
	796	ld l,d ;\r
	797	ld h,0 ;\r
815c1735	798	add hl,bc ;bc + d == a<<4 + d\r
a16ba2b0 L	799	ld a,h ;\r
	800	ld h,l ;\r
	801	ld l,e ;\r
	802	pop bc ;\r
	803	ret ;\r
	804	\r
	805	\r
	806	;--------------------------------------------------------------\r
	807	;\r
	808	;return:\r
	809	; hl = hl + a\r
	810	; Flags undefined\r
	811	;\r
	812	\r
	813	add_hl_a:\r
815c1735 L	814	add a,l\r
	815	ld l,a\r
	816	ret nc\r
	817	inc h\r
	818	ret\r
a16ba2b0 L	819	\r
	820	; ---------------------------------------------------------\r
	821	\r
	822	sysramw:\r
	823	\r
	824	.phase isvsw_loc\r
	825	topcodsys:\r
	826	\r
	827	; Trampoline for interrupt routines in banked ram.\r
	828	; Switch stack pointer to "system" stack in top ram\r
	829	; Save cbar\r
815c1735	830	\r
a16ba2b0 L	831	isv_sw: ;\r
	832	ex (sp),hl ; save hl, return adr in hl\r
	833	push de ;\r
	834	push af ;\r
	835	ex de,hl ;\r
	836	ld hl,0 ;\r
	837	add hl,sp ;\r
	838	ld a,h ;\r
	839	cp 0f8h ;\r
	840	jr nc,isw_1 ;\r
	841	ld sp,$stack ;\r
	842	isw_1:\r
	843	push hl ;\r
	844	in0 h,(cbar) ;\r
	845	push hl ;\r
	846	ld a,SYS$CBAR ;\r
	847	out0 (cbar),a ;\r
	848	ex de,hl ;\r
	849	ld e,(hl) ;\r
	850	inc hl ;\r
	851	ld d,(hl) ;\r
	852	ex de,hl ;\r
	853	push bc ;\r
	854	call jphl ;\r
	855	\r
	856	pop bc ;\r
	857	pop hl ;\r
	858	out0 (cbar),h ;\r
	859	pop hl ;\r
	860	ld sp,hl ;\r
	861	pop af ;\r
	862	pop de ;\r
	863	pop hl ;\r
	864	ei ;\r
	865	ret ;\r
	866	jphl:\r
	867	jp (hl) ;\r
	868	\r
	869	; ---------------------------------------------------------\r
	870	\r
4caee1ec	871	\r
a16ba2b0 L	872	iprt0:\r
	873	push af\r
	874	push hl\r
	875	in0 a,(tcr)\r
	876	in0 a,(tmdr0l)\r
	877	in0 a,(tmdr0h)\r
	878	ld a,(tim_ms)\r
	879	inc a\r
	880	cp 100\r
	881	jr nz,iprt_1\r
	882	xor a\r
	883	ld hl,(tim_s)\r
	884	inc hl\r
	885	ld (tim_s),hl\r
	886	iprt_1:\r
	887	ld (tim_ms),a\r
	888	pop hl\r
	889	pop af\r
	890	ei\r
	891	ret\r
	892	\r
	893	; ---------------------------------------------------------\r
	894	\r
	895	sp.int0:\r
	896	ld a,0d0h\r
	897	jr sp.i.1\r
	898	sp.int.len equ $-sp.int0\r
	899	ld a,0d1h\r
	900	jr sp.i.1\r
	901	ld a,0d2h\r
	902	jr sp.i.1\r
	903	ld a,0d3h\r
	904	jr sp.i.1\r
	905	ld a,0d4h\r
	906	jr sp.i.1\r
	907	ld a,0d5h\r
	908	jr sp.i.1\r
	909	ld a,0d6h\r
	910	jr sp.i.1\r
	911	ld a,0d7h\r
	912	jr sp.i.1\r
	913	ld a,0d8h\r
	914	sp.i.1:\r
	915	; out (80h),a\r
	916	halt\r
	917	\r
	918	curph defl $\r
	919	.dephase\r
	920	sysrame:\r
	921	.phase curph\r
	922	tim_ms: db 0\r
	923	tim_s: dw 0\r
	924	.dephase\r
815c1735	925	\r
a16ba2b0 L	926	;-----------------------------------------------------\r
	927	\r
	928	dseg\r
	929	\r
	930	ds 1\r
	931	banktabsys:\r
	932	ds 1 ;0c001h\r
	933	ds 1 ;0c002h\r
	934	banktab:\r
	935	ds BANKS ;0c003h\r
	936	memalv:\r
	937	ds 512/4 ;Number of 4k blocks\r
	938	alv_len equ $-memalv\r
	939	crc_len equ $-banktabsys\r
	940	\r
815c1735	941	crc_memalv:\r
a16ba2b0 L	942	ds 2 ;\r
	943	\r
	944	cseg\r
	945	\r
	946	;.phase 0ffc0h\r
	947	;ivtab equ 0ffc0h ; 0ffc0h ;int vector table\r
	948	;.dephase\r
	949	\r
	950	;.phase 0fffch\r
	951	mark_55AA equ 0fffch\r
	952	;ds 4 ; 0fffch\r
	953	;.dephase\r
	954	\r
	955	\r
	956	end\r
	957	\r