[z180-stamp.git] / avr / z180-serv.c

/*
 * (C) Copyright 2014-2016 Leo C. <erbl259-lmu@yahoo.de>
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

#include "common.h"
#include <stdlib.h>
#include <string.h>
#include <stdbool.h>
#include <util/atomic.h>

#include "config.h"
#include "background.h"
#include "env.h"
#include "ff.h"
#include "serial.h"
#include "z80-if.h"
#include "debug.h"
#include "print-utils.h"
#include "z180-serv.h"
#include "timer.h"
#include "time.h"
#include "bcd.h"
#include "rtc.h"

#define DEBUG_CPM_SDIO	0	/* set to 1 to debug */

#define debug_cpmsd(fmt, args...)		                                            \
	debug_cond(DEBUG_CPM_SDIO, fmt, ##args)


/*--------------------------------------------------------------------------*/

struct msg_item {
	uint8_t fct;
	uint8_t sub_min, sub_max;
	void (*func)(uint8_t, int, uint8_t *);
};

uint32_t msg_to_addr(uint8_t *msg)
{
	union {
		uint32_t as32;
		uint8_t as8[4];
	} addr;

	addr.as8[0] = msg[0];
	addr.as8[1] = msg[1];
	addr.as8[2] = msg[2];
	addr.as8[3] = 0;

	return addr.as32;
}


static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
{
	z80_memfifo_putc(fifo_msgout, 0xAE);
	z80_memfifo_putc(fifo_msgout, len+2);
	z80_memfifo_putc(fifo_msgout, func);
	z80_memfifo_putc(fifo_msgout, subf);

	return 0;
}

int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
{
	msg_xmit_header(func, subf, len);
	while (len--)
		z80_memfifo_putc(fifo_msgout, *msg++);

	return 0;
}

void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
{
	(void)len;

	z80_memfifo_init(subf, msg_to_addr(msg));
}


void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
{
	(void)subf;

	while (len--)
		putchar(*msg++);
}

/* echo message */
void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
{
	(void)subf;

	/* send re-echo */
	msg_xmit(1, 3, len, msg);
}

/* get timer */
void do_msg_get_timer(uint8_t subf, int len, uint8_t * msg)
{
	uint32_t time_ms = (len >= 4) ? *(uint32_t *) msg : 0;

	time_ms = get_timer(time_ms);
	msg_xmit(3, subf, sizeof(time_ms), (uint8_t *) &time_ms);
}

/* ---------------------------------------------------------------------------*/

#define CPM_DAY_OFFSET ((1978-1900) * 365 + 19)		/* 19 leap years */

/*
 * Convert CP/M time stamp to a broken-down time structure
 *
 */
int mk_date_time (int len, uint8_t *msg, struct tm *tmp)
{
	time_t stamp;

	if (len != 5)
		return -1;

	/* days since 2000-01-01 */
	long days = msg[3] + (msg[4] << 8) - 8036;

	if (days < 0)
		return -1;

	stamp = days * ONE_DAY;
	stamp += bcd2bin(msg[0]);
	stamp += bcd2bin(msg[1]) * 60 ;
	stamp += bcd2bin(msg[2]) * 3600L;
	gmtime_r(&stamp, tmp);
	return 0;
}

void mk_cpm_time(struct tm *tmp, uint8_t cpm_time[5])
{
	uint16_t days = 1;
	uint_fast8_t leap=2;

	for (int year=78; year < tmp->tm_year; year++) {
		days = days + 365 + (leap == 0);
		leap = (leap+1)%4;
	}
	days += tmp->tm_yday;

	cpm_time[0] = bin2bcd(tmp->tm_sec);
	cpm_time[1] = bin2bcd(tmp->tm_min);
	cpm_time[2] = bin2bcd(tmp->tm_hour);
	cpm_time[3] = days;
	cpm_time[4] = days >> 8;
}

/* get/set cp/m time */
void do_msg_get_set_time(uint8_t subf, int len, uint8_t * msg)
{
	struct tm t;
	uint8_t cpm_time[5];
	int rc;

	memset(cpm_time, 0, ARRAY_SIZE(cpm_time));

	switch (subf) {
	case 3:			/* set date & time */
		/* initialize t with current time */
		rc = rtc_get (&t);

		if (rc >= 0) {
			/* insert new date & time */
			if (mk_date_time (len, msg, &t) != 0) {
				my_puts_P(PSTR("## set_time: Bad date format\n"));
				break;
			}

			time_t time;
			time = mk_gmtime(&t);
			gmtime_r(&time, &t);

			/* and write to RTC */
			rc = rtc_set (&t);
			if(rc)
				my_puts_P(PSTR("## set_time: Set date failed\n"));
		} else {
			my_puts_P(PSTR("## set_time: Get date failed\n"));
		}
		/* FALL TROUGH */
	case 2:			/* get date & time */
		rc = rtc_get (&t);
		if (rc >= 0) {
			time_t time;
			time = mk_gmtime(&t);
			//mktime(&t);
			gmtime_r(&time, &t);

			mk_cpm_time(&t, cpm_time);
		} else {
			my_puts_P(PSTR("## get_time: Get date failed\n"));
		}
		break;
	}

	msg_xmit(3, subf, sizeof(cpm_time), cpm_time);
}

/* ---------------------------------------------------------------------------*/

/* TODO: Variable Disk Format */
#define CONFIG_CPM_DISKSIZE		(8*1024*1024L)

struct cpm_drive_s {
	uint8_t drv;
	uint8_t device;
	char *img_name;
	bool dirty;
	FIL fd;
};

static uint8_t disk_buffer[CONFIG_CPM_BLOCK_SIZE];
static struct cpm_drive_s drv_table[CONFIG_CPM_MAX_DRIVE];
static int handle_cpm_drv_to;


int cpm_drv_to(int state)
{
	static uint32_t ts;

	switch(state) {
	case 0:
		break;

	case 1:
		ts = get_timer(0);
		state = 2;
		break;

	case 2:
		if (get_timer(ts) > 1000) {
			for (uint_fast8_t i=0; i < CONFIG_CPM_MAX_DRIVE; i++) {
				if (drv_table[i].dirty) {
					f_sync(&drv_table[i].fd);
					drv_table[i].dirty = false;
					debug_cpmsd("## %7lu f_sync: %c:\n", get_timer(0), i + CONFIG_CPM_BASE_DRIVE);
				}
			}
			state = 0;
		}
	}
	return state;
}


void msg_cpm_result(uint8_t subf, uint8_t rc, int res)
{
	uint8_t result_msg[3];

	if (res)
		rc |= 0x80;

	result_msg[0] = rc;
	result_msg[1] = res;
	result_msg[2] = res >> 8;

	if (rc) {
		debug_cpmsd("###%7lu  error rc: %.02x, res: %d\n", get_timer(0), rc, res);
	}

	msg_xmit(2, subf, sizeof(result_msg), result_msg);
}

/*
 	db	2	; disk command
	ds	1	; subcommand (login/read/write)
	ds	1	; @adrv (8 bits)	+0
	ds	1	; @rdrv (8 bits)	+1
	ds	3	; @xdph (24 bits)	+2
*/

void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg)
{
	FRESULT res = 0;
	uint8_t drv;
	char *np;

	(void)subf;

	if (len != 5) {
		return msg_cpm_result(subf, 0x01, res);
	}

	debug_cpmsd("\n## %7lu  login: %c:\n", get_timer(0), msg[1]+CONFIG_CPM_BASE_DRIVE);

	/* Get relative drive number */
	drv = msg[1];
	if ( drv>= CONFIG_CPM_MAX_DRIVE) {
		return msg_cpm_result(subf, 0x02, res);
	}

/*
	uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
*/

	if (drv_table[drv].img_name != NULL) {
		debug_cpmsd("## %7lu  close: '%s'\n", get_timer(0), drv_table[drv].img_name);
		f_close(&drv_table[drv].fd);
		drv_table[drv].dirty = false;
		free(drv_table[drv].img_name);
		drv_table[drv].img_name = NULL;
	}

	strcpy_P((char *)disk_buffer, PSTR("dsk0"));
	disk_buffer[3] = msg[0] + '0';
	if (((np = getenv_char((char*)disk_buffer)) == NULL) ||
			((drv_table[drv].img_name = strdup(np)) == NULL)) {
		return msg_cpm_result(subf, 0x03, res);
	}


	res = f_open(&drv_table[drv].fd, drv_table[drv].img_name,
			FA_WRITE | FA_READ);

    debug_cpmsd("## %7lu   open: '%s', (env: '%s'), res: %d\n", get_timer(0),
			drv_table[drv].img_name, disk_buffer, res);

	if (!res && f_size(&drv_table[drv].fd) < CONFIG_CPM_DISKSIZE) {
		unsigned int bw;

		debug_cpmsd("            expanding image file from %ld to %ld\n",
				f_size(&drv_table[drv].fd), CONFIG_CPM_DISKSIZE);

		res = f_lseek(&drv_table[drv].fd, CONFIG_CPM_DISKSIZE-CONFIG_CPM_BLOCK_SIZE);
		if (!res) {
			memset(disk_buffer, 0xe5, CONFIG_CPM_BLOCK_SIZE);
			res = f_write(&drv_table[drv].fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &bw);
			if (res || bw < CONFIG_CPM_BLOCK_SIZE) {
				debug_cpmsd("               failed! res: %d, bytes written: %u\n",	res, bw);
			}
			drv_table[drv].dirty = true;
			bg_setstat(handle_cpm_drv_to, 1);
		}
	}

	/* send  result*/
	msg_cpm_result(subf, 0x00, res);
}


/*
 	db	2	; disk command
	ds	1	; subcommand (login/read/write)
	ds	1	; @adrv (8 bits)		+0
	ds	1	; @rdrv (8 bits)		+1
	ds	2	; @trk (16 bits)		+2
	ds	2	; @sect(16 bits)		+4
	ds	1	; @cnt  (8 bits)		+6
	ds	3	; phys. transfer addr	+7
*/

#define ADRV	0
#define RDRV	1
#define TRK		2
#define SEC		4
#define CNT		6
#define ADDR	7

void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg)
{
	uint8_t drv;
	uint32_t addr;
	uint32_t pos;
	uint8_t secs;
	bool dowrite = (subf == 2);
	FRESULT res = 0;
	uint8_t rc = 0;
	bool buserr = 0;

	if (len != 10) {
		return msg_cpm_result(subf, 0x01, res);
	}

	drv = msg[RDRV];
	if ( drv>= CONFIG_CPM_MAX_DRIVE) {
		return msg_cpm_result(subf, 0x02, res);
	}

	secs = msg[CNT];
	addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR];


	/* TODO: tracks per sector from dpb */
	pos = (((uint16_t)(msg[TRK+1] << 8) + msg[TRK]) * 8
			+ ((uint32_t)(msg[SEC+1] << 8) + msg[SEC])) * CONFIG_CPM_BLOCK_SIZE;

	debug_cpmsd("## %7lu cpm_rw: %s %c: trk:%4d, sec: %d, pos: %.8lx, secs: %2d, "
			"addr: %.5lx\n", get_timer(0), dowrite ? "write" : " read",
			msg[RDRV]+CONFIG_CPM_BASE_DRIVE,
			((uint16_t)(msg[TRK+1] << 8) + msg[TRK]), msg[SEC],	pos, msg[CNT], addr);

	if (pos + secs * CONFIG_CPM_BLOCK_SIZE > CONFIG_CPM_DISKSIZE) {
		debug_cpmsd("                   access > DISKSIZE (%.8lx > %.8lx) aborted!\n",
						pos + secs * CONFIG_CPM_BLOCK_SIZE, CONFIG_CPM_DISKSIZE);
		return msg_cpm_result(subf, 0x04, res);
	}

	res = f_lseek(&drv_table[drv].fd, pos);

	while (!res && secs--) {
		unsigned int brw;
		if (dowrite) {
			if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
				buserr = 1;
				break;
			} else {
				z80_read_block(disk_buffer, addr, CONFIG_CPM_BLOCK_SIZE);
				z80_bus_cmd(Release);
			}
			res = f_write(&drv_table[drv].fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &brw);
		} else {
			res = f_read(&drv_table[drv].fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &brw);
			if (res == FR_OK) {
				if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
					buserr = 1;
					break;
				} else {
					z80_write_block(disk_buffer, addr, CONFIG_CPM_BLOCK_SIZE);
					z80_bus_cmd(Release);
				}
			}
		}
		if (brw != CONFIG_CPM_BLOCK_SIZE) {
			debug_cpmsd("           short read or write: res: %d, bytes rd/wr: %u\n", res, brw);
			res = 64;
		}
		addr += CONFIG_CPM_BLOCK_SIZE;
	}

	if (dowrite && !res) {
		drv_table[drv].dirty = true;
		bg_setstat(handle_cpm_drv_to, 1);
	}

	if (buserr) {
		debug_cpmsd("Bus timeout\n");
		rc = 0x03;
	}

	/* send  result*/
	msg_cpm_result(subf, rc, res);
}


const FLASH struct msg_item z80_messages[] =
{
	{ 0,			/* fct nr. */
	  1, 3,			/* sub fct nr. from, to */
	  do_msg_ini_memfifo},
	{ 1,
	  1, 1,
	  do_msg_char_out},
	{ 1,
	  2, 2,
	  do_msg_echo},
	{ 2,
	  0, 0,
	  do_msg_cpm_login},
	{ 2,
	  1, 2,
	  do_msg_cpm_rw},
	{ 3,
	  1, 1,
	  do_msg_get_timer},
	{ 3,
	  2, 3,				/* 2: get, 3: set time and date */
	  do_msg_get_set_time},
	{ 0xff,				/* end mark */
	  0, 0,
	  0},

};


void do_message(int len, uint8_t *msg)
{
	uint8_t fct, sub_fct;
	int_fast8_t i = 0;

	if (len >= 2) {
		fct = *msg++;
		sub_fct = *msg++;
		len -= 2;

		while (fct != z80_messages[i].fct) {
			if (z80_messages[i].fct == 0xff) {
				DBG_P(1, "do_message: Unknown function: %i, %i\n",
						fct, sub_fct);
				return; /* TODO: unknown message # */
			}

			++i;
		}

		while (fct == z80_messages[i].fct) {
			if (sub_fct >= z80_messages[i].sub_min &&
					sub_fct <= z80_messages[i].sub_max )
				break;
			++i;
		}

		if (z80_messages[i].fct != fct) {
			DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
					fct, sub_fct);
			return; /* TODO: unknown message sub# */
		}

		(z80_messages[i].func)(sub_fct, len, msg);


	} else {
		/* TODO: error */
		DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
	}
}


#define CTRBUF_LEN 256

void check_msg_fifo(void)
{
	int ch;
	static int_fast8_t state;
	static int msglen,idx;
	static uint8_t buffer[CTRBUF_LEN];

	while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
		switch (state) {
		case 0:		/* wait for start of message */
			if (ch == 0xAE)	{ /* TODO: magic number */
				msglen = 0;
				idx = 0;
				state = 1;
			}
			break;
		case 1:		/* get msg len */
			if (ch > 0 && ch <= CTRBUF_LEN) {
				msglen = ch;
				state = 2;
			} else
				state = 0;
			break;
		case 2: 	/* get message */
			buffer[idx++] = ch;
			if (idx == msglen) {
				do_message(msglen, buffer);
				state = 0;
			}
			break;
		}
	}
}


int msg_handling(int state)
{
	bool pending;

	ATOMIC_BLOCK(ATOMIC_FORCEON) {
		pending = (Stat & S_MSG_PENDING) != 0;
		Stat &= ~S_MSG_PENDING;
	}

	if (pending) {
		uint8_t init_request;
		z80_bus_cmd(Request);
		init_request = z80_read(0x43);
		z80_bus_cmd(Release);
		if ( init_request != 0) {
			/* Get address of fifo 0 */
			z80_bus_cmd(Request);
			uint32_t fifo_addr = z80_read(0x40) +
						((uint16_t) z80_read(0x40+1) << 8) +
						((uint32_t) z80_read(0x40+2) << 16);
			z80_write(0x43, 0);
			z80_bus_cmd(Release);

			if (fifo_addr != 0) {
				z80_memfifo_init(fifo_msgin, fifo_addr);
				state = 1;
			} else
				state = 0;

		} else {
			check_msg_fifo();
		}
	}

	return state;
}


static int handle_msg_handling;

void setup_z180_serv(void)
{

	handle_msg_handling = bg_register(msg_handling, 0);
	handle_cpm_drv_to = bg_register(cpm_drv_to, 0);
}

void restart_z180_serv(void)
{
	z80_bus_cmd(Request);
	z80_memset(0x40, 0, 4);
	z80_bus_cmd(Release);

	for (int i = 0; i < NUM_FIFOS; i++)
		z80_memfifo_init(i, 0);
	bg_setstat(handle_msg_handling, 0);

}

#if 0
/*--------------------------------------------------------------------------*/

const FLASH uint8_t iniprog[] = {
	0xAF,			// xor     a
	0xED, 0x39, 0x36,	// out0    (rcr),a         ;disable  DRAM refresh
	0x3E, 0x30,		// ld      a,030h
	0xED, 0x39, 0x32	//out0    (dcntl),a       ;0 mem, max i/0 wait states
};

const FLASH uint8_t sertest[] = {
	0xAF,              //  	xor	a
	0xED, 0x39, 0x36,  //  	out0	(rcr),a		;disable  DRAM refresh
	0x3E, 0x30,        //  	ld	a,030h
	0xED, 0x39, 0x32,  //  	out0	(dcntl),a	;0 mem, max i/0 wait states
	0x3E, 0x80,        //  	ld	a,M_MPBT		;no MP, PS=10, DR=16, SS=0
	0xED, 0x39, 0x03,  //  	out0	(cntlb1),a
	0x3E, 0x64,        //  	ld	a,M_RE + M_TE + M_MOD2	;
	0xED, 0x39, 0x01,  //  	out0	(cntla1),a
	0x3E, 0x00,        //  	ld	a,0
	0xED, 0x39, 0x05,  //  	out0	(stat1),a	;Enable rx interrupts
	0xED, 0x38, 0x05,  //l0:in0	a,(stat1)
	0xE6, 0x80,        //  	and	80h
	0x28, 0xF9,        //  	jr	z,l0
	0xED, 0x00, 0x09,  //  	in0	b,(rdr1)
	0xED, 0x38, 0x05,  //l1:in0	a,(stat1)
	0xE6, 0x02,        //  	and	02h
	0x28, 0xF9,        //  	jr	z,l1
	0xED, 0x01, 0x07,  //  	out0	(tdr1),b
	0x18, 0xEA,        //  	jr	l0
};

const FLASH uint8_t test1[] = {
	0xAF,              //	xor	a
	0xED, 0x39, 0x36,  //	out0	(rcr),a		;disable  DRAM refresh
	0x3E, 0x30,        //	ld	a,030h
	0xED, 0x39, 0x32,  //	out0	(dcntl),a	;0 mem, max i/0 wait states
	0x21, 0x1E, 0x00,  // 	ld	hl,dmclrt	;load DMA registers
	0x06, 0x08,        //	ld	b,dmct_e-dmclrt
	0x0E, 0x20,        //	ld	c,sar0l
	0xED, 0x93,        //	otimr
	0x3E, 0xC3,        //	ld	a,0c3h		;dst +1, src +1, burst
	0xED, 0x39, 0x31,  //	out0	(dmode),a	;
	0x3E, 0x62,        //	ld	a,062h		;enable dma0,
	0xED, 0x39, 0x30,  //cl_1:	out0	(dstat),a	;copy 64k
	0x18, 0xFB,        //	jr	cl_1		;
	0x00, 0x00,        //dmclrt:	dw	0		;src (inc)
	0x00,              //	db 	0		;src
	0x00, 0x00,        //	dw	0		;dst (inc),
	0x00,              //	db	0		;dst
	0x00, 0x00,        //	dw 	0		;count (64k)
};
#endif
Commit	Line	Data
35edb766	1	/*
1aed7fd5	2	* (C) Copyright 2014-2016 Leo C. <erbl259-lmu@yahoo.de>
35edb766	3	*
ad12f284	4	* SPDX-License-Identifier: GPL-2.0
35edb766 L	5	*/
35edb766 L	6
72f58822	7	#include "common.h"
5f7f3586 L	8	#include <stdlib.h>
	9	#include <string.h>
	10	#include <stdbool.h>
89adce76	11	#include <util/atomic.h>
72f58822	12
1aed7fd5	13	#include "config.h"
89adce76	14	#include "background.h"
5f7f3586 L	15	#include "env.h"
5f7f3586 L	16	#include "ff.h"
72f58822 L	17	#include "serial.h"
72f58822 L	18	#include "z80-if.h"
889202c4	19	#include "debug.h"
5f7f3586	20	#include "print-utils.h"
89adce76	21	#include "z180-serv.h"
daacc6f9	22	#include "timer.h"
845cbdbd L	23	#include "time.h"
	24	#include "bcd.h"
	25	#include "rtc.h"
7d60b20b	26
afc7c4b4	27	#define DEBUG_CPM_SDIO 0 /* set to 1 to debug */
7d60b20b L	28
	29	#define debug_cpmsd(fmt, args...) \
	30	debug_cond(DEBUG_CPM_SDIO, fmt, ##args)
	31
	32
72f58822 L	33	/--------------------------------------------------------------------------/
	34
	35	struct msg_item {
	36	uint8_t fct;
	37	uint8_t sub_min, sub_max;
	38	void (func)(uint8_t, int, uint8_t );
	39	};
	40
	41	uint32_t msg_to_addr(uint8_t *msg)
	42	{
	43	union {
	44	uint32_t as32;
	45	uint8_t as8[4];
	46	} addr;
	47
	48	addr.as8[0] = msg[0];
	49	addr.as8[1] = msg[1];
	50	addr.as8[2] = msg[2];
	51	addr.as8[3] = 0;
	52
	53	return addr.as32;
	54	}
	55
72f58822	56
1a2460dc L	57	static int msg_xmit_header(uint8_t func, uint8_t subf, int len)
	58	{
	59	z80_memfifo_putc(fifo_msgout, 0xAE);
	60	z80_memfifo_putc(fifo_msgout, len+2);
	61	z80_memfifo_putc(fifo_msgout, func);
	62	z80_memfifo_putc(fifo_msgout, subf);
	63
	64	return 0;
	65	}
	66
	67	int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg)
	68	{
	69	msg_xmit_header(func, subf, len);
	70	while (len--)
	71	z80_memfifo_putc(fifo_msgout, *msg++);
	72
	73	return 0;
	74	}
	75
72f58822 L	76	void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
	77	{
	78	(void)len;
	79
89adce76	80	z80_memfifo_init(subf, msg_to_addr(msg));
72f58822 L	81	}
	82
	83
	84	void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
	85	{
	86	(void)subf;
	87
	88	while (len--)
	89	putchar(*msg++);
	90	}
	91
1a2460dc L	92	/* echo message */
	93	void do_msg_echo(uint8_t subf, int len, uint8_t * msg)
	94	{
	95	(void)subf;
	96
	97	/* send re-echo */
	98	msg_xmit(1, 3, len, msg);
	99	}
	100
8590a76b L	101	/* get timer */
	102	void do_msg_get_timer(uint8_t subf, int len, uint8_t * msg)
	103	{
a8eb521f	104	uint32_t time_ms = (len >= 4) ? (uint32_t ) msg : 0;
8590a76b	105
a8eb521f	106	time_ms = get_timer(time_ms);
8590a76b L	107	msg_xmit(3, subf, sizeof(time_ms), (uint8_t *) &time_ms);
	108	}
	109
5f7f3586 L	110	/* ---------------------------------------------------------------------------*/
5f7f3586 L	111
845cbdbd L	112	#define CPM_DAY_OFFSET ((1978-1900) * 365 + 19) /* 19 leap years */
	113
	114	/*
	115	* Convert CP/M time stamp to a broken-down time structure
	116	*
	117	*/
	118	int mk_date_time (int len, uint8_t msg, struct tm tmp)
	119	{
	120	time_t stamp;
	121
	122	if (len != 5)
	123	return -1;
	124
	125	/* days since 2000-01-01 */
	126	long days = msg[3] + (msg[4] << 8) - 8036;
	127
	128	if (days < 0)
	129	return -1;
	130
	131	stamp = days * ONE_DAY;
	132	stamp += bcd2bin(msg[0]);
	133	stamp += bcd2bin(msg[1]) * 60 ;
8d0fad4c	134	stamp += bcd2bin(msg[2]) * 3600L;
845cbdbd L	135	gmtime_r(&stamp, tmp);
	136	return 0;
	137	}
	138
	139	void mk_cpm_time(struct tm *tmp, uint8_t cpm_time[5])
	140	{
	141	uint16_t days = 1;
	142	uint_fast8_t leap=2;
	143
	144	for (int year=78; year < tmp->tm_year; year++) {
	145	days = days + 365 + (leap == 0);
	146	leap = (leap+1)%4;
	147	}
	148	days += tmp->tm_yday;
	149
	150	cpm_time[0] = bin2bcd(tmp->tm_sec);
	151	cpm_time[1] = bin2bcd(tmp->tm_min);
	152	cpm_time[2] = bin2bcd(tmp->tm_hour);
	153	cpm_time[3] = days;
	154	cpm_time[4] = days >> 8;
845cbdbd L	155	}
	156
	157	/* get/set cp/m time */
	158	void do_msg_get_set_time(uint8_t subf, int len, uint8_t * msg)
	159	{
	160	struct tm t;
	161	uint8_t cpm_time[5];
	162	int rc;
	163
	164	memset(cpm_time, 0, ARRAY_SIZE(cpm_time));
	165
	166	switch (subf) {
	167	case 3: /* set date & time */
	168	/* initialize t with current time */
	169	rc = rtc_get (&t);
	170
85046f8c	171	if (rc >= 0) {
845cbdbd L	172	/* insert new date & time */
	173	if (mk_date_time (len, msg, &t) != 0) {
	174	my_puts_P(PSTR("## set_time: Bad date format\n"));
	175	break;
	176	}
	177
	178	time_t time;
	179	time = mk_gmtime(&t);
	180	gmtime_r(&time, &t);
	181
	182	/* and write to RTC */
	183	rc = rtc_set (&t);
	184	if(rc)
	185	my_puts_P(PSTR("## set_time: Set date failed\n"));
	186	} else {
	187	my_puts_P(PSTR("## set_time: Get date failed\n"));
	188	}
	189	/* FALL TROUGH */
	190	case 2: /* get date & time */
	191	rc = rtc_get (&t);
85046f8c L	192	if (rc >= 0) {
	193	time_t time;
	194	time = mk_gmtime(&t);
	195	//mktime(&t);
	196	gmtime_r(&time, &t);
845cbdbd	197
85046f8c L	198	mk_cpm_time(&t, cpm_time);
85046f8c L	199	} else {
845cbdbd	200	my_puts_P(PSTR("## get_time: Get date failed\n"));
845cbdbd	201	}
845cbdbd L	202	break;
	203	}
	204
	205	msg_xmit(3, subf, sizeof(cpm_time), cpm_time);
	206	}
	207
	208	/* ---------------------------------------------------------------------------*/
	209
1aed7fd5 L	210	/* TODO: Variable Disk Format */
1aed7fd5 L	211	#define CONFIG_CPM_DISKSIZE (810241024L)
5f7f3586 L	212
	213	struct cpm_drive_s {
	214	uint8_t drv;
	215	uint8_t device;
	216	char *img_name;
393b1897	217	bool dirty;
5f7f3586 L	218	FIL fd;
	219	};
	220
1aed7fd5 L	221	static uint8_t disk_buffer[CONFIG_CPM_BLOCK_SIZE];
1aed7fd5 L	222	static struct cpm_drive_s drv_table[CONFIG_CPM_MAX_DRIVE];
393b1897 L	223	static int handle_cpm_drv_to;
393b1897 L	224
393b1897 L	225
	226	int cpm_drv_to(int state)
	227	{
	228	static uint32_t ts;
	229
	230	switch(state) {
	231	case 0:
	232	break;
	233
	234	case 1:
	235	ts = get_timer(0);
	236	state = 2;
	237	break;
	238
	239	case 2:
	240	if (get_timer(ts) > 1000) {
1aed7fd5	241	for (uint_fast8_t i=0; i < CONFIG_CPM_MAX_DRIVE; i++) {
393b1897 L	242	if (drv_table[i].dirty) {
	243	f_sync(&drv_table[i].fd);
	244	drv_table[i].dirty = false;
afc7c4b4	245	debug_cpmsd("## %7lu f_sync: %c:\n", get_timer(0), i + CONFIG_CPM_BASE_DRIVE);
393b1897 L	246	}
	247	}
	248	state = 0;
	249	}
	250	}
	251	return state;
	252	}
	253
	254
	255	void msg_cpm_result(uint8_t subf, uint8_t rc, int res)
	256	{
	257	uint8_t result_msg[3];
	258
	259	if (res)
	260	rc \|= 0x80;
	261
	262	result_msg[0] = rc;
	263	result_msg[1] = res;
	264	result_msg[2] = res >> 8;
	265
	266	if (rc) {
	267	debug_cpmsd("###%7lu error rc: %.02x, res: %d\n", get_timer(0), rc, res);
	268	}
	269
	270	msg_xmit(2, subf, sizeof(result_msg), result_msg);
	271	}
5f7f3586 L	272
	273	/*
	274	db 2 ; disk command
	275	ds 1 ; subcommand (login/read/write)
	276	ds 1 ; @adrv (8 bits) +0
	277	ds 1 ; @rdrv (8 bits) +1
	278	ds 3 ; @xdph (24 bits) +2
	279	*/
	280
	281	void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg)
	282	{
5f7f3586	283	FRESULT res = 0;
5f7f3586 L	284	uint8_t drv;
5f7f3586 L	285	char *np;
5f7f3586 L	286
	287	(void)subf;
	288
afc7c4b4	289	if (len != 5) {
393b1897	290	return msg_cpm_result(subf, 0x01, res);
5f7f3586 L	291	}
5f7f3586 L	292
afc7c4b4	293	debug_cpmsd("\n## %7lu login: %c:\n", get_timer(0), msg[1]+CONFIG_CPM_BASE_DRIVE);
5f7f3586	294
afc7c4b4 L	295	/* Get relative drive number */
afc7c4b4 L	296	drv = msg[1];
1aed7fd5	297	if ( drv>= CONFIG_CPM_MAX_DRIVE) {
393b1897	298	return msg_cpm_result(subf, 0x02, res);
5f7f3586 L	299	}
5f7f3586 L	300
5f7f3586 L	301	/*
	302	uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2];
	303	*/
	304
	305	if (drv_table[drv].img_name != NULL) {
7d60b20b	306	debug_cpmsd("## %7lu close: '%s'\n", get_timer(0), drv_table[drv].img_name);
5f7f3586	307	f_close(&drv_table[drv].fd);
393b1897	308	drv_table[drv].dirty = false;
5f7f3586 L	309	free(drv_table[drv].img_name);
	310	drv_table[drv].img_name = NULL;
	311	}
	312
	313	strcpy_P((char *)disk_buffer, PSTR("dsk0"));
	314	disk_buffer[3] = msg[0] + '0';
1b77fa4e	315	if (((np = getenv_char((char*)disk_buffer)) == NULL) \|\|
5f7f3586	316	((drv_table[drv].img_name = strdup(np)) == NULL)) {
393b1897	317	return msg_cpm_result(subf, 0x03, res);
5f7f3586 L	318	}
	319
	320
	321	res = f_open(&drv_table[drv].fd, drv_table[drv].img_name,
	322	FA_WRITE \| FA_READ);
	323
7d60b20b	324	debug_cpmsd("## %7lu open: '%s', (env: '%s'), res: %d\n", get_timer(0),
5f7f3586 L	325	drv_table[drv].img_name, disk_buffer, res);
5f7f3586 L	326
afc7c4b4 L	327	if (!res && f_size(&drv_table[drv].fd) < CONFIG_CPM_DISKSIZE) {
	328	unsigned int bw;
	329
	330	debug_cpmsd(" expanding image file from %ld to %ld\n",
	331	f_size(&drv_table[drv].fd), CONFIG_CPM_DISKSIZE);
	332
	333	res = f_lseek(&drv_table[drv].fd, CONFIG_CPM_DISKSIZE-CONFIG_CPM_BLOCK_SIZE);
	334	if (!res) {
	335	memset(disk_buffer, 0xe5, CONFIG_CPM_BLOCK_SIZE);
	336	res = f_write(&drv_table[drv].fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &bw);
	337	if (res \|\| bw < CONFIG_CPM_BLOCK_SIZE) {
	338	debug_cpmsd(" failed! res: %d, bytes written: %u\n", res, bw);
	339	}
	340	drv_table[drv].dirty = true;
	341	bg_setstat(handle_cpm_drv_to, 1);
	342	}
	343	}
	344
5f7f3586	345	/* send result*/
393b1897	346	msg_cpm_result(subf, 0x00, res);
5f7f3586 L	347	}
	348
	349
	350	/*
	351	db 2 ; disk command
	352	ds 1 ; subcommand (login/read/write)
daacc6f9 L	353	ds 1 ; @adrv (8 bits) +0
	354	ds 1 ; @rdrv (8 bits) +1
	355	ds 2 ; @trk (16 bits) +2
	356	ds 2 ; @sect(16 bits) +4
	357	ds 1 ; @cnt (8 bits) +6
5f7f3586 L	358	ds 3 ; phys. transfer addr +7
	359	*/
	360
daacc6f9 L	361	#define ADRV 0
	362	#define RDRV 1
	363	#define TRK 2
	364	#define SEC 4
	365	#define CNT 6
	366	#define ADDR 7
	367
5f7f3586 L	368	void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg)
	369	{
	370	uint8_t drv;
	371	uint32_t addr;
	372	uint32_t pos;
7d60b20b	373	uint8_t secs;
5f7f3586 L	374	bool dowrite = (subf == 2);
	375	FRESULT res = 0;
	376	uint8_t rc = 0;
	377	bool buserr = 0;
5f7f3586	378
afc7c4b4	379	if (len != 10) {
393b1897	380	return msg_cpm_result(subf, 0x01, res);
5f7f3586 L	381	}
5f7f3586 L	382
afc7c4b4	383	drv = msg[RDRV];
1aed7fd5	384	if ( drv>= CONFIG_CPM_MAX_DRIVE) {
393b1897	385	return msg_cpm_result(subf, 0x02, res);
5f7f3586 L	386	}
5f7f3586 L	387
7d60b20b	388	secs = msg[CNT];
daacc6f9	389	addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR];
5f7f3586	390
5f7f3586	391
daacc6f9 L	392	/* TODO: tracks per sector from dpb */
daacc6f9 L	393	pos = (((uint16_t)(msg[TRK+1] << 8) + msg[TRK]) * 8
1aed7fd5	394	+ ((uint32_t)(msg[SEC+1] << 8) + msg[SEC])) * CONFIG_CPM_BLOCK_SIZE;
5f7f3586	395
7d60b20b L	396	debug_cpmsd("## %7lu cpm_rw: %s %c: trk:%4d, sec: %d, pos: %.8lx, secs: %2d, "
7d60b20b L	397	"addr: %.5lx\n", get_timer(0), dowrite ? "write" : " read",
afc7c4b4 L	398	msg[RDRV]+CONFIG_CPM_BASE_DRIVE,
afc7c4b4 L	399	((uint16_t)(msg[TRK+1] << 8) + msg[TRK]), msg[SEC], pos, msg[CNT], addr);
5f7f3586	400
1aed7fd5 L	401	if (pos + secs * CONFIG_CPM_BLOCK_SIZE > CONFIG_CPM_DISKSIZE) {
	402	debug_cpmsd(" access > DISKSIZE (%.8lx > %.8lx) aborted!\n",
	403	pos + secs * CONFIG_CPM_BLOCK_SIZE, CONFIG_CPM_DISKSIZE);
	404	return msg_cpm_result(subf, 0x04, res);
	405	}
	406
5f7f3586	407	res = f_lseek(&drv_table[drv].fd, pos);
1aed7fd5	408
7d60b20b	409	while (!res && secs--) {
8bbf185e	410	unsigned int brw;
5f7f3586 L	411	if (dowrite) {
	412	if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
	413	buserr = 1;
7d60b20b	414	break;
5f7f3586	415	} else {
1aed7fd5	416	z80_read_block(disk_buffer, addr, CONFIG_CPM_BLOCK_SIZE);
5f7f3586	417	z80_bus_cmd(Release);
5f7f3586	418	}
1aed7fd5	419	res = f_write(&drv_table[drv].fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &brw);
5f7f3586	420	} else {
1aed7fd5 L	421	res = f_read(&drv_table[drv].fd, disk_buffer, CONFIG_CPM_BLOCK_SIZE, &brw);
1aed7fd5 L	422	if (res == FR_OK) {
5f7f3586 L	423	if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
5f7f3586 L	424	buserr = 1;
7d60b20b	425	break;
5f7f3586	426	} else {
afc7c4b4	427	z80_write_block(disk_buffer, addr, CONFIG_CPM_BLOCK_SIZE);
5f7f3586 L	428	z80_bus_cmd(Release);
	429	}
	430	}
	431	}
1aed7fd5	432	if (brw != CONFIG_CPM_BLOCK_SIZE) {
afc7c4b4 L	433	debug_cpmsd(" short read or write: res: %d, bytes rd/wr: %u\n", res, brw);
afc7c4b4 L	434	res = 64;
5f7f3586	435	}
1aed7fd5	436	addr += CONFIG_CPM_BLOCK_SIZE;
5f7f3586 L	437	}
5f7f3586 L	438
393b1897	439	if (dowrite && !res) {
393b1897 L	440	drv_table[drv].dirty = true;
	441	bg_setstat(handle_cpm_drv_to, 1);
	442	}
	443
5f7f3586	444	if (buserr) {
7d60b20b	445	debug_cpmsd("Bus timeout\n");
5f7f3586 L	446	rc = 0x03;
5f7f3586 L	447	}
5f7f3586 L	448
5f7f3586 L	449	/* send result*/
393b1897	450	msg_cpm_result(subf, rc, res);
5f7f3586 L	451	}
5f7f3586 L	452
72f58822 L	453
	454	const FLASH struct msg_item z80_messages[] =
	455	{
	456	{ 0, /* fct nr. */
89adce76	457	1, 3, /* sub fct nr. from, to */
72f58822 L	458	do_msg_ini_memfifo},
	459	{ 1,
	460	1, 1,
	461	do_msg_char_out},
1a2460dc L	462	{ 1,
	463	2, 2,
	464	do_msg_echo},
5f7f3586 L	465	{ 2,
	466	0, 0,
	467	do_msg_cpm_login},
	468	{ 2,
	469	1, 2,
	470	do_msg_cpm_rw},
8590a76b L	471	{ 3,
	472	1, 1,
	473	do_msg_get_timer},
845cbdbd L	474	{ 3,
	475	2, 3, /* 2: get, 3: set time and date */
	476	do_msg_get_set_time},
72f58822 L	477	{ 0xff, /* end mark */
	478	0, 0,
	479	0},
	480
	481	};
	482
	483
	484
	485
	486	void do_message(int len, uint8_t *msg)
	487	{
	488	uint8_t fct, sub_fct;
	489	int_fast8_t i = 0;
	490
	491	if (len >= 2) {
	492	fct = *msg++;
	493	sub_fct = *msg++;
	494	len -= 2;
	495
89adce76 L	496	while (fct != z80_messages[i].fct) {
	497	if (z80_messages[i].fct == 0xff) {
	498	DBG_P(1, "do_message: Unknown function: %i, %i\n",
	499	fct, sub_fct);
	500	return; /* TODO: unknown message # */
	501	}
8a7decea	502
72f58822	503	++i;
72f58822 L	504	}
	505
	506	while (fct == z80_messages[i].fct) {
8a7decea	507	if (sub_fct >= z80_messages[i].sub_min &&
89adce76	508	sub_fct <= z80_messages[i].sub_max )
72f58822 L	509	break;
	510	++i;
	511	}
	512
	513	if (z80_messages[i].fct != fct) {
	514	DBG_P(1, "do_message: Unknown sub function: %i, %i\n",
	515	fct, sub_fct);
	516	return; /* TODO: unknown message sub# */
	517	}
	518
	519	(z80_messages[i].func)(sub_fct, len, msg);
	520
	521
	522	} else {
	523	/* TODO: error */
	524	DBG_P(1, "do_message: to few arguments (%i); this shouldn't happen!\n", len);
	525	}
	526	}
	527
	528
	529
	530	#define CTRBUF_LEN 256
	531
	532	void check_msg_fifo(void)
	533	{
	534	int ch;
	535	static int_fast8_t state;
	536	static int msglen,idx;
	537	static uint8_t buffer[CTRBUF_LEN];
	538
89adce76	539	while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
72f58822 L	540	switch (state) {
72f58822 L	541	case 0: /* wait for start of message */
3531528e	542	if (ch == 0xAE) { /* TODO: magic number */
72f58822 L	543	msglen = 0;
	544	idx = 0;
	545	state = 1;
	546	}
	547	break;
	548	case 1: /* get msg len */
	549	if (ch > 0 && ch <= CTRBUF_LEN) {
	550	msglen = ch;
	551	state = 2;
	552	} else
	553	state = 0;
	554	break;
	555	case 2: /* get message */
	556	buffer[idx++] = ch;
89adce76 L	557	if (idx == msglen) {
	558	do_message(msglen, buffer);
	559	state = 0;
	560	}
	561	break;
	562	}
	563	}
	564	}
	565
	566
	567	int msg_handling(int state)
	568	{
50939dec	569	bool pending;
8a7decea L	570
8a7decea L	571	ATOMIC_BLOCK(ATOMIC_FORCEON) {
89adce76 L	572	pending = (Stat & S_MSG_PENDING) != 0;
	573	Stat &= ~S_MSG_PENDING;
	574	}
8a7decea	575
89adce76	576	if (pending) {
215ec4b2 L	577	uint8_t init_request;
	578	z80_bus_cmd(Request);
	579	init_request = z80_read(0x43);
	580	z80_bus_cmd(Release);
	581	if ( init_request != 0) {
8bbf185e	582	/* Get address of fifo 0 */
89adce76	583	z80_bus_cmd(Request);
8bbf185e L	584	uint32_t fifo_addr = z80_read(0x40) +
	585	((uint16_t) z80_read(0x40+1) << 8) +
	586	((uint32_t) z80_read(0x40+2) << 16);
215ec4b2 L	587	z80_write(0x43, 0);
	588	z80_bus_cmd(Release);
	589
	590	if (fifo_addr != 0) {
	591	z80_memfifo_init(fifo_msgin, fifo_addr);
	592	state = 1;
	593	} else
	594	state = 0;
	595
	596	} else {
89adce76	597	check_msg_fifo();
72f58822 L	598	}
	599	}
	600
89adce76 L	601	return state;
89adce76 L	602	}
89adce76 L	603
	604
	605	static int handle_msg_handling;
	606
	607	void setup_z180_serv(void)
	608	{
8a7decea	609
89adce76	610	handle_msg_handling = bg_register(msg_handling, 0);
393b1897	611	handle_cpm_drv_to = bg_register(cpm_drv_to, 0);
72f58822 L	612	}
72f58822 L	613
89adce76 L	614	void restart_z180_serv(void)
	615	{
	616	z80_bus_cmd(Request);
215ec4b2	617	z80_memset(0x40, 0, 4);
89adce76	618	z80_bus_cmd(Release);
8a7decea L	619
	620	for (int i = 0; i < NUM_FIFOS; i++)
	621	z80_memfifo_init(i, 0);
89adce76	622	bg_setstat(handle_msg_handling, 0);
5f7f3586	623
89adce76	624	}
72f58822	625
845cbdbd	626	#if 0
72f58822 L	627	/--------------------------------------------------------------------------/
72f58822 L	628
72f58822 L	629	const FLASH uint8_t iniprog[] = {
	630	0xAF, // xor a
	631	0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
	632	0x3E, 0x30, // ld a,030h
	633	0xED, 0x39, 0x32 //out0 (dcntl),a ;0 mem, max i/0 wait states
	634	};
	635
	636	const FLASH uint8_t sertest[] = {
	637	0xAF, // xor a
	638	0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
	639	0x3E, 0x30, // ld a,030h
	640	0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
	641	0x3E, 0x80, // ld a,M_MPBT ;no MP, PS=10, DR=16, SS=0
	642	0xED, 0x39, 0x03, // out0 (cntlb1),a
	643	0x3E, 0x64, // ld a,M_RE + M_TE + M_MOD2 ;
	644	0xED, 0x39, 0x01, // out0 (cntla1),a
	645	0x3E, 0x00, // ld a,0
	646	0xED, 0x39, 0x05, // out0 (stat1),a ;Enable rx interrupts
	647	0xED, 0x38, 0x05, //l0:in0 a,(stat1)
	648	0xE6, 0x80, // and 80h
	649	0x28, 0xF9, // jr z,l0
	650	0xED, 0x00, 0x09, // in0 b,(rdr1)
	651	0xED, 0x38, 0x05, //l1:in0 a,(stat1)
	652	0xE6, 0x02, // and 02h
	653	0x28, 0xF9, // jr z,l1
	654	0xED, 0x01, 0x07, // out0 (tdr1),b
	655	0x18, 0xEA, // jr l0
	656	};
	657
	658	const FLASH uint8_t test1[] = {
	659	0xAF, // xor a
	660	0xED, 0x39, 0x36, // out0 (rcr),a ;disable DRAM refresh
	661	0x3E, 0x30, // ld a,030h
	662	0xED, 0x39, 0x32, // out0 (dcntl),a ;0 mem, max i/0 wait states
	663	0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
	664	0x06, 0x08, // ld b,dmct_e-dmclrt
	665	0x0E, 0x20, // ld c,sar0l
8a7decea	666	0xED, 0x93, // otimr
72f58822 L	667	0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
72f58822 L	668	0xED, 0x39, 0x31, // out0 (dmode),a ;
8a7decea	669	0x3E, 0x62, // ld a,062h ;enable dma0,
72f58822 L	670	0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
72f58822 L	671	0x18, 0xFB, // jr cl_1 ;
8a7decea	672	0x00, 0x00, //dmclrt: dw 0 ;src (inc)
72f58822 L	673	0x00, // db 0 ;src
	674	0x00, 0x00, // dw 0 ;dst (inc),
	675	0x00, // db 0 ;dst
	676	0x00, 0x00, // dw 0 ;count (64k)
	677	};
845cbdbd	678	#endif