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[z180-stamp.git] / z180 / init.180
1 page 255
2 .z80
3
4 extrn ddtz,bpent
5 extrn $stack
6 extrn charini,?const,?conin
7 extrn ?cono,?conos
8
9 extrn romend
10
11
12 global isv_sw
13
14 include config.inc
15 if CPU_Z180
16 include z180reg.inc
17 include z180.lib
18 endif
19
20
21
22
23 ;----------------------------------------------------------------------
24
25 cseg
26 romstart equ $
27
28 org romstart+0
29 jp start
30
31 iobyte: db 0
32 ; restart vectors
33
34 rsti defl 1
35 rept 7
36 org 8*rsti + romstart
37 jp bpent
38 rsti defl rsti+1
39 endm
40
41 ;----------------------------------------------------------------------
42
43 org romstart+40h
44
45 dw 0
46 db 0
47
48
49 if ROMSYS
50 $crom: defb c$rom ;
51 else
52 db 0 ;
53 endif
54
55 INIWAITS defl CWAITIO
56 if ROMSYS
57 INIWAITS defl INIWAITS+CWAITROM
58 endif
59
60 hwini0:
61 if CPU_Z180
62
63 db 3 ;count
64 db rcr,CREFSH ;configure DRAM refresh
65 db dcntl,INIWAITS ;wait states
66 db cbar,SYS$CBAR
67 else
68 db 0
69 endif
70
71 ;----------------------------------------------------------------------
72
73 org romstart+50h
74 start:
75 jp cstart
76 jp wstart
77 jp ?const
78 jp ?conin
79 jp ?cono
80 jp ?conos
81 jp charini
82
83 ;----------------------------------------------------------------------
84
85 dmclrt: ;clear ram per dma
86 db dmct_e-dmclrt-2 ;
87 db sar0l ;first port
88 dw nullbyte ;src (fixed)
89 nullbyte:
90 db 000h ;src
91 dw romend ;dst (inc), start after "rom" code
92 db 00h ;dst
93 dw 0-romend ;count (64k)
94 dmct_e:
95
96 cstart:
97 if CPU_Z180
98
99 push af
100 in0 a,(itc) ;Illegal opcode trap?
101 jp m,??st01
102 ld a,i ;I register == 0 ?
103 jr z,??st02 ; yes, harware reset
104
105 ??st01:
106 ; TODO: SYS$CBR
107 ld a,(syscbr)
108 out0 (cbr),a
109 pop af ;restore registers
110 jp bpent ;
111
112 ??st02:
113 di ;0058
114 ld a,CREFSH
115 out0 (rcr),a ; configure DRAM refresh
116 ld a,CWAITIO
117 out0 (dcntl),a ; wait states
118
119 ld a,M_NCD ;No Clock Divide
120 out0 (ccr),a
121 ; ld a,M_X2CM ;X2 Clock Multiplier
122 ; out0 (cmr),a
123 else
124 di
125 xor a
126 ld (@cbnk),a
127 endif
128
129 ; search warm start mark
130
131 if CPU_Z180
132
133 ld ix,mark_55AA ;00b8 ; top of common area
134 ld a,SYS$CBAR ;
135 out0 (cbar),a ;
136 ld a,071h ;00bc
137 ex af,af' ;00be ;for cbr = 0x70 downto 0x40
138 swsm_l:
139 ex af,af' ;00bf
140 dec a ;00c0
141 cp 03fh ;00c1
142 jr z,kstart ;00c3 ; break (mark not found)
143 out0 (cbr),a ;00c5
144 ex af,af' ;00c8
145 ld a,0aah ;00c9
146 cp (ix+000h) ;00cb
147 jr nz,swsm_l ;00ce
148 cp (ix+002h) ;00d0
149 jr nz,swsm_l ;00d3
150 cpl ;00d5
151 cp (ix+001h) ;00d6
152 jr nz,swsm_l ;00d9
153 cp (ix+003h) ;00db
154 jr nz,swsm_l ;00de
155 ld sp,$stack ;00e0 mark found, check
156 call checkcrc_alv ;00e3
157 jp z,wstart ;00e6 check ok,
158 else
159 ld ix,mark_55AA ; top of common area
160 ld a,0aah ;
161 cp (ix+000h) ;
162 jr nz,kstart ;
163 cp (ix+002h) ;
164 jr nz,kstart ;
165 cpl ;
166 cp (ix+001h) ;
167 jr nz,kstart ;
168 cp (ix+003h) ;
169 jr nz,kstart ;
170 ld sp,$stack ; mark found, check
171 jp z,wstart ; check ok,
172 endif
173 ;
174 ; ram not ok, initialize -- kstart --
175
176 kstart:
177 if CPU_Z180
178
179 if 0
180
181 ld a,088h ;00e9 0000-7fff: common 0
182 out0 (cbar),a ;00eb 8000-ffff: common 1
183 ld ix,08000h ;00f3
184 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)
185 ??f_0:
186 out0 (cbr),a ;00f9
187
188 ld (ix+0),a ;0103
189 cpl
190 ld (ix+1),a ;0103
191 cpl
192 add a,8 ;010a next 'bank'
193 cp 078h ;010c stop at 078000
194 jr nz,??f_0 ;010e
195
196 ld de,8000h ;0114 first block not tested, but mark as ok
197 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)
198 ??cp_0:
199 out0 (cbr),a ;011c
200 ld c,a
201 xor (ix+0)
202 ld b,a
203 ld a,c
204 cpl
205 xor (ix+1)
206 or b
207 jr nz,??cp_1
208 scf
209 ??cp_1:
210 rr d
211 rr e
212 ld a,c
213 add a,8
214 cp 078h ; stop at 078000
215 jr nz,??cp_0
216
217 else
218
219 ld de,0ffffh
220 ld a,070h
221 out0 (cbr),a
222
223 endif
224
225 ;
226 ; ram test found 1 or more error free blocks (32k)
227 ;
228
229 ramok:
230 ld a,SYS$CBAR ;01c8
231 out0 (cbar),a ;01ca
232 ld h,d
233 ld l,e
234 ld c,070h ;01ce highest block
235 ld b,15 ;01d0
236 ??sr_1:
237 add hl,hl
238 jr c,alloc ;01d4 highest "error free" block
239 ld a,c ;01d6
240 sub 008h ;01d7
241 ld c,a ;01d9
242 djnz ??sr_1 ;01da
243
244 slp ;01dc should never be reached
245
246 alloc:
247 out0 (cbr),c ;01de
248 ld a,c
249 ld (syscbr),a
250 endif
251 ld sp,$stack ;01e1
252
253 ; Clear RAM using DMA0
254
255 if CPU_Z180
256
257 if 0
258
259 ld hl,dmclrt ;load DMA registers
260 call io.ini.m
261 ld a,0cbh ;01ef dst +1, src fixed, burst
262 out0 (dmode),a ;01f1
263
264 ld b,512/64
265 ld a,062h ;01f4 enable dma0,
266 ??cl_1:
267 out0 (dstat),a ;01f9 clear (up to) 64k
268 djnz ??cl_1 ; end of RAM?
269
270 endif
271
272 ; Init bank manager
273
274 ld hl,banktabsys ;020f
275 ld (hl),c ; Common area
276 inc hl ;0213
277 ld (hl),c ; System work area
278 inc hl ;0215 Point to bank 0 entry
279 ld b,BANKS ;0216
280 l0218h:
281 ld (hl),0ffh ;0218 Mark all banks as unassigned
282 inc hl ;021a
283 djnz l0218h ;021b
284
285 ld hl,memalv ;
286 ld b,8 ; 8*4k ie. first 32k
287 ??a_0:
288 ld (hl),0e0h ; mark as sys ("rom"/monitor)
289 inc hl
290 djnz ??a_0
291
292 rr d ; shift out bit for block 0
293 rr e ;
294 ld c,15 ;022c 15*32k remaining blocks
295 l022eh:
296 ld a,0feh ; 0xfe == block with error(s)
297 rr d ;
298 rr e
299 adc a,0 ; ==> 0xff : block ok
300 ld b,32/4 ; 32k == 8 * 4k
301 l0236h:
302 ld (hl),a ;
303 inc hl ;
304 djnz l0236h ;
305 dec c ;
306 jr nz,l022eh ;next 32k block
307
308 ld hl,memalv+0ch ;memalv+0ch
309 ld a,(banktabsys) ;
310 call add_hl_a
311 ld b,3 ;
312 l024ah:
313 ld (hl),0ech ;alloc system ram
314 inc hl ;
315 djnz l024ah ;
316 ld (hl),0efh ;alloc common
317 call gencrc_alv
318
319 ld hl,0000h ;bank #
320 ld bc,0f0fh ; size (?) (4k blocks)
321 xor a ;
322 call sub_0420h ;alloc mem for bank 0
323 ld c,l ;
324 or a ;
325 call z,sub_04b5h ;
326
327 ld hl,0101h ;
328 ld bc,0f0fh ;
329 xor a ;
330 call sub_0420h ;
331 ld c,l ;
332 or a ;
333 call z,sub_04b5h ;
334 endif
335
336 ld hl,055AAh ;set warm start mark
337 ld (mark_55AA),hl ;
338 ld (mark_55AA+2),hl;
339
340 ;
341 ; (crc ok) -- wstart --
342 ;
343 wstart:
344 call sysram_init ;027f
345 call ivtab_init
346 if CPU_Z180
347 call prt0_init
348 endif
349
350 call charini
351 call bufferinit
352
353 iff CPU_Z180
354 ld a,0
355 call selbnk
356 endif
357
358
359 im 2 ;?030e
360 ei ;0282
361
362 call ?const ;0284
363 call ?const ;0287
364 or a ;028a
365 call nz,?conin ;028d
366
367 if CPU_Z180
368 ld a,(banktab) ;
369 ld e,a ;
370 else
371 ; TODO:
372 endif
373 jp ddtz ;0290
374
375
376 if CPU_Z180
377 ; TODO: SYS$CBR
378 syscbr: db 1
379 endif
380
381 ;
382 ;----------------------------------------------------------------------
383 ;
384
385 ;TODO: Make a ringbuffer module.
386
387 global buf.init
388
389 buf.init:
390 ld (ix+o.in_idx),0
391 ld (ix+o.out_idx),0
392 ld (ix+o.mask),a
393 ret
394
395 ;----------------------------------------------------------------------
396 if 0
397 extrn msginit,msg_tx_fifo,msg_rx_fifo
398 extrn msg.sout
399
400 bufferinit:
401
402 ld de,msg_tx_fifo
403 in0 a,cbr
404 call log2phys
405 ld (40h+0),hl
406 ld (40h+2),a
407
408 ; ld (bufdat+1),hl
409 ; ld (bufdat+3),a
410 ; ld a,1
411 ; ld (bufdat+0),a
412 ; ld hl,inimsg
413 ; call msg.sout
414
415 ld de,msg_rx_fifo
416 in0 a,cbr
417 call log2phys
418 ld (bufdat+1),hl
419 ld (bufdat+3),a
420 ld a,2
421 ld (bufdat+0),a
422 ld hl,inimsg
423 call msg.sout
424
425 ret
426
427 inimsg:
428 db inimsg_e - $ - 1
429 db 0AEh
430 db inimsg_e - $ - 1
431 db 0
432 bufdat:
433 db 0
434 dw 0
435 db 0
436 inimsg_e:
437
438 endif
439 ;----------------------------------------------------------------------
440 ;
441
442 extrn msginit,msg.sout
443 extrn mtx.fifo,mrx.fifo
444 extrn co.fifo,ci.fifo
445
446
447 bufferinit:
448 if CPU_Z180
449 call msginit
450
451 ld hl,buffers
452 ld b,buftablen
453 bfi_1:
454 ld a,(hl)
455 inc hl
456 ld (bufdat+0),a
457 ld e,(hl)
458 inc hl
459 ld d,(hl)
460 inc hl
461 push hl
462
463 or a
464 jr nz,bfi_2
465 ; in0 a,(cbr)
466 call hw_log2phys
467 ld (40h+0),hl
468 ld (40h+2),a
469 out0 (AVRINT5),a
470 jr bfi_3
471 bfi_2:
472 ; in0 a,(cbr)
473 call hw_log2phys
474 ld (bufdat+1),hl
475 ld (bufdat+3),a
476 ld hl,inimsg
477 call msg.sout
478 bfi_3:
479 pop hl
480 djnz bfi_1
481 ret
482 else
483 call msginit
484
485 ld hl,buffers
486 ld b,buftablen
487 bfi_1:
488 ld a,(hl)
489 inc hl
490 ld (bufdat+0),a
491 ld e,(hl)
492 inc hl
493 ld d,(hl)
494 inc hl
495 ex de,hl
496
497 or a
498 jr nz,bfi_2
499
500 ld a,(@cbnk)
501 call bnk2phys
502
503 ld (40h+0),hl
504 ld (40h+2),a
505 out (AVRINT5),a
506 jr bfi_3
507 bfi_2:
508
509 ld a,(@cbnk)
510 call bnk2phys
511
512 ld (bufdat+1),hl
513 ld (bufdat+3),a
514 ld hl,inimsg
515 call msg.sout
516 bfi_3:
517 ex de,hl
518 djnz bfi_1
519 ret
520 endif
521
522 buffers:
523 db 0
524 dw mtx.fifo
525 db 1
526 dw mrx.fifo
527 db 2
528 dw co.fifo
529 db 3
530 dw ci.fifo
531 buftablen equ ($ - buffers)/3
532
533 inimsg:
534 db inimsg_e - $ -1
535 db 0AEh
536 db inimsg_e - $ -1
537 db 0
538 bufdat:
539 db 0
540 dw 0
541 db 0
542 inimsg_e:
543
544
545 ;
546 ;----------------------------------------------------------------------
547 ;
548
549 sysram_init:
550 ld hl,sysramw
551 ld de,topcodsys
552 ld bc,sysrame-sysramw
553 ldir
554
555 ret
556
557 ;----------------------------------------------------------------------
558
559 ivtab_init:
560 ld hl,ivtab ;
561 ld a,h ;
562 ld i,a ;
563 if CPU_Z180
564 out0 (il),l ;
565 endif
566
567 ; Let all vectors point to spurious int routines.
568
569 ld d,high sp.int0
570 ld a,low sp.int0
571 ld b,9
572 ivt_i1:
573 ld (hl),a
574 inc l
575 ld (hl),d
576 inc l
577 add a,sp.int.len
578 djnz ivt_i1
579 ret
580
581 ;----------------------------------------------------------------------
582
583 if CPU_Z180
584 prt0_init:
585 ld a,i
586 ld h,a
587 in0 a,(il)
588 and 0E0h
589 or IV$PRT0
590 ld l,a
591 ld (hl),low iprt0
592 inc hl
593 ld (hl),high iprt0
594 ld hl,prt0itab
595 call io.ini.m
596 ret
597
598 prt0itab:
599 db prt0it_e-prt0itab-2
600 db tmdr0l
601 dw PRT_TC10MS
602 dw PRT_TC10MS
603 db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.
604 prt0it_e:
605 endif
606
607
608 ;
609 ;----------------------------------------------------------------------
610 ;
611
612 io.ini:
613 push bc
614 if CPU_Z180
615
616 ld b,0 ;high byte port adress
617 ld a,(hl) ;count
618 inc hl
619 or a
620 jr z,ioi_e
621 ioi_1:
622 ld c,(hl) ;port address
623 inc hl
624 outi
625 inc b ;outi decrements b
626 dec a
627 jr nz,ioi_1
628
629 else
630 jr ioi_nxt
631 ioi_l:
632 ld c,(hl) ;port address
633 inc hl
634 otir
635 ioi_nxt:
636 ld b,(hl) ;count
637 inc hl
638 inc b
639 djnz ioi_l
640 endif
641 ioi_e:
642 pop bc
643 ret
644
645 if CPU_Z180
646 io.ini.m:
647 push bc
648 ld b,(hl)
649 inc hl
650 ld c,(hl)
651 inc hl
652 otimr
653 pop bc
654 ret
655 endif
656
657 io.ini.l:
658 ;
659
660 ;
661 ;----------------------------------------------------------------------
662 ;
663
664 if CPU_Z180
665
666 ; compute crc
667 ; hl: start adr
668 ; bc: len
669 ; bc returns crc val
670
671 do_crc16:
672 ld de,0FFFFh
673 crc1:
674 ld a,(hl)
675 xor e
676 ld e,a
677 rrca
678 rrca
679 rrca
680 rrca
681 and 0Fh
682 xor e
683 ld e,a
684 rrca
685 rrca
686 rrca
687 push af
688 and 1Fh
689 xor d
690 ld d,a
691 pop af
692 push af
693 rrca
694 and 0F0h
695 xor d
696 ld d,a
697 pop af
698 and 0E0h
699 xor e
700 ld e,d
701 ld d,a
702 cpi
703 jp pe,crc1
704 or e ;z-flag
705 ret
706
707
708 gencrc_alv:
709 push hl ;03f6
710 push de ;03f7
711 push bc
712 push af ;03f8
713 ld hl,banktabsys ;03f9
714 ld bc,crc_len ;03fc
715 call do_crc16 ;03ff
716 ld (hl),e
717 inc hl
718 ld (hl),d
719 pop af ;0406
720 pop bc
721 pop de ;0407
722 pop hl ;0408
723 ret ;0409
724
725 checkcrc_alv:
726 push hl ;040a
727 push de
728 push bc ;040b
729 ld hl,banktabsys ;040d
730 ld bc,crc_len+2 ;0410
731 call do_crc16 ;0413
732 pop bc ;041d
733 pop de
734 pop hl ;041e
735 ret ;041f
736
737 ;----------------------------------------------------------------------
738
739 ;
740 ; alloc
741 ;
742 ; h: max bank #
743 ; l: min bank #
744 ; b: max size
745 ; c: min size
746 ;
747 ; ret:
748 ; a: 0 == ok
749 ; 1 ==
750 ; 2 == no bank # in requested range
751 ; ff == crc error
752 ;
753
754 sub_0420h:
755 call checkcrc_alv ;0420
756 jr nz,l049ch ;0424 crc error, tables corrupt
757
758 call sub_049dh ;0427 bank # in req. range available?
759 jr c,l0499h ;042a
760 push ix ;042c
761 push iy ;042e
762 push de ;0430
763 push hl ;0431
764 push bc ;0432
765 ld c,b ;0433
766 ld b,alv_len+1 ;0434
767 ld d,0 ;0436
768 ld hl,memalv-1 ;0438
769 jr l0441h ;043b
770
771 ; find free blocks
772
773 l043dh:
774 ld a,(hl) ;043d
775 inc a ;043e free blocks are marked 0ffh
776 jr z,l0446h ;043f
777 l0441h:
778 inc hl ;0441
779 djnz l043dh ;0442
780 jr l0464h ;0444
781 l0446h:
782 push hl ;0446
783 pop ix ;0447 free blocks start here
784 ld e,000h ;0449
785 jr l0451h ;044b
786 l044dh: ; count free blocks
787 ld a,(hl) ;044d
788 inc a ;044e
789 jr nz,l0457h ;044f
790 l0451h:
791 inc e ;0451
792 inc hl ;0452
793 djnz l044dh ;0453
794 jr l0464h ;0455
795
796 ; end of free blocks run.
797
798 l0457h:
799 ld a,d ;0457
800 cp e ;0458 nr of blocks >= requested ?
801 jr nc,l0441h ;0459
802
803 ld d,e ;045b
804 push ix ;045c
805 pop iy ;045e
806 ld a,d ;0460
807 cp c ;0461
808 jr c,l0441h ;0462
809 l0464h:
810 pop bc ;0464
811 ld a,d ;0465
812 cp b ;0466
813 jr c,l046ch ;0467
814 ld d,b ;0469
815 jr l0471h ;046a
816 l046ch:
817 cp c ;046c
818 jr nc,l0471h ;046d
819 ld d,000h ;046f
820 l0471h:
821 ld a,d ;0471
822 push iy ;0472
823 pop hl ;0474
824 ld de,memalv ;0475
825 or a ;0478
826 sbc hl,de ;0479
827 ld b,l ;047b
828 ld c,a ;047c
829 pop hl ;047d
830 l047eh:
831 or a ;047e
832 jr z,l0489h ;047f
833 ld (iy+0),l ;0481
834 inc iy ;0484
835 dec a ;0486
836 jr l047eh ;0487
837 l0489h:
838 pop de ;0489
839 pop iy ;048a
840 pop ix ;048c
841 call gencrc_alv ;048e
842 ld a,c ;0491
843 or a ;0492
844 ld a,000h ;0493
845 ret nz ;0495
846 or 001h ;0496
847 ret ;0498
848
849 l0499h:
850 ld a,2 ;0499
851 l049ch:
852 or a
853 ret ;049c
854
855
856 ; search a free bank number in range
857 ; h: max #
858 ; l: min #
859 ; ret:
860 ; l: bank number available
861 ; nc, if found, bank nr. in l
862 ; cy, if none found
863
864 sub_049dh:
865 push de ;049d
866 push bc ;049e
867 ex de,hl ;049f
868 dec e ;04a0
869 l04a1h:
870 inc e ;04a1 test next #
871 ld a,d ;04a2
872 cp e ;04a3
873 jr c,l04b1h ;04a4
874 ld a,e ;04a6
875 ld hl,memalv ;04a7
876 ld bc,alv_len ;04aa
877 cpir ;04ad bank# allready allocated?
878 jr z,l04a1h ;04af if yes, search for next
879 l04b1h:
880 ex de,hl ;04b1
881 pop bc ;04b2
882 pop de ;04b3
883 ret ;04b4
884
885
886 sub_04b5h:
887 ld a,l ;04b5
888 cp 012h ;04b6
889 ccf ;04b8
890 ret c ;04b9
891 push hl ;04ba
892 ld hl,banktab ;04bb
893 call add_hl_a
894 ld (hl),b ;04c3
895 call gencrc_alv ;04c4
896 pop hl ;04c7
897 or a ;04c8 clear carry
898 ret ;04c9
899
900
901 ;--------------------------------------------------------------
902 ;
903 ; de: Log. Address
904 ; a: Bank number
905 ;
906 ;out ahl: Phys. (linear) Address
907
908
909 bnk2phys:
910 push hl
911 ld hl,banktab
912 call add_hl_a
913 ld a,(hl)
914 pop hl
915
916 ; fall thru
917 ;--------------------------------------------------------------
918 ;
919 ; de: Log. Address
920 ; a: Bank (bbr)
921 ;
922 ; OP: ahl = (a<<12) + (d<<8) + e
923 ;
924 ;out ahl: Phys. (linear) Address
925
926
927 log2phys:
928 push bc ;
929 ld c,a ;
930 ld b,16 ;
931 mlt bc ;bc = a<<4
932 ld l,d ;
933 ld h,0 ;
934 add hl,bc ;bc + d == a<<4 + d
935 ld a,h ;
936 ld h,l ;
937 ld l,e ;
938 pop bc ;
939 ret ;
940
941 ;--------------------------------------------------------------
942 ;
943 ; de: Log. Address
944 ;
945 ;
946 ; OP: ahl = (bankbase<<12) + (d<<8) + e
947 ;
948 ;out ahl: Phys. (linear) Address
949
950
951 hw_log2phys:
952 push bc ;
953 in0 c,(cbar)
954 ld a,d
955 or 00fh
956 cp c
957 jr c,hlp_1
958 in0 c,(cbr)
959 jr hlp_e
960 hlp_1:
961 ld b,16
962 mlt bc
963 ld a,d
964 cp c
965 ld c,0
966 jr c,hlp_e
967 in0 c,(bbr)
968 hlp_e:
969 ld b,16 ;
970 mlt bc ;bc = a<<4
971 ld l,d ;
972 ld h,0 ;
973 add hl,bc ;bc + d == a<<4 + d
974 ld a,h ;
975 ld h,l ;
976 ld l,e ;
977 pop bc ;
978 ret ;
979
980 else
981
982 ;
983 ;----------------------------------------------------------------------
984 ;
985
986 bnk2phys:
987 sla h
988 jr nc,b2p_1 ;A15=1 --> common
989 ld a,3
990 b2p_1:
991 srl a
992 rr h
993 ret
994
995 endif
996
997 ;--------------------------------------------------------------
998 ;
999 ;return:
1000 ; hl = hl + a
1001 ; Flags undefined
1002 ;
1003
1004 add_hl_a:
1005 add a,l
1006 ld l,a
1007 ret nc
1008 inc h
1009 ret
1010
1011 ; ---------------------------------------------------------
1012
1013 sysramw:
1014
1015 .phase isvsw_loc
1016 topcodsys:
1017
1018 ; Trampoline for interrupt routines in banked ram.
1019 ; Switch stack pointer to "system" stack in top ram
1020 ; Save cbar
1021
1022 isv_sw: ;
1023 ex (sp),hl ; save hl, return adr in hl
1024 push de ;
1025 push af ;
1026 ex de,hl ;
1027 ld hl,0 ;
1028 add hl,sp ;
1029 ld a,h ;
1030 cp 0f8h ;
1031 jr nc,isw_1 ;
1032 ld sp,$stack ;
1033 isw_1:
1034 push hl ;
1035 in0 h,(cbar) ;
1036 push hl ;
1037 ld a,SYS$CBAR ;
1038 out0 (cbar),a ;
1039 ex de,hl ;
1040 ld e,(hl) ;
1041 inc hl ;
1042 ld d,(hl) ;
1043 ex de,hl ;
1044 push bc ;
1045 call jphl ;
1046
1047 pop bc ;
1048 pop hl ;
1049 out0 (cbar),h ;
1050 pop hl ;
1051 ld sp,hl ;
1052 pop af ;
1053 pop de ;
1054 pop hl ;
1055 ei ;
1056 ret ;
1057 jphl:
1058 jp (hl) ;
1059
1060 ; ---------------------------------------------------------
1061
1062 if CPU_Z180
1063
1064 iprt0:
1065 push af
1066 push hl
1067 in0 a,(tcr)
1068 in0 a,(tmdr0l)
1069 in0 a,(tmdr0h)
1070 ld a,(tim_ms)
1071 inc a
1072 cp 100
1073 jr nz,iprt_1
1074 xor a
1075 ld hl,(tim_s)
1076 inc hl
1077 ld (tim_s),hl
1078 iprt_1:
1079 ld (tim_ms),a
1080 pop hl
1081 pop af
1082 ei
1083 ret
1084
1085 endif
1086
1087 ; ---------------------------------------------------------
1088
1089 sp.int0:
1090 ld a,0d0h
1091 jr sp.i.1
1092 sp.int.len equ $-sp.int0
1093 ld a,0d1h
1094 jr sp.i.1
1095 ld a,0d2h
1096 jr sp.i.1
1097 ld a,0d3h
1098 jr sp.i.1
1099 ld a,0d4h
1100 jr sp.i.1
1101 ld a,0d5h
1102 jr sp.i.1
1103 ld a,0d6h
1104 jr sp.i.1
1105 ld a,0d7h
1106 jr sp.i.1
1107 ld a,0d8h
1108 sp.i.1:
1109 ; out (80h),a
1110 halt
1111
1112 ; ---------------------------------------------------------
1113
1114 iff CPU_Z180
1115
1116 ; Get IFF2
1117 ; This routine may not be loaded in page zero
1118 ;
1119 ; return Carry clear, if INTs are enabled.
1120 ;
1121 global getiff
1122 getiff:
1123 xor a ;clear accu and carry
1124 push af ;stack bottom := 00xxh
1125 pop af
1126 ld a,i ;P flag := IFF2
1127 ret pe ;exit carry clear, if enabled
1128 dec sp
1129 dec sp ;has stack bottom been overwritten?
1130 pop af
1131 and a ;if not 00xxh, INTs were
1132 ret nz ;actually enabled
1133 scf ;Otherwise, they really are disabled
1134 ret
1135
1136 ;----------------------------------------------------------------------
1137
1138 global selbnk
1139
1140 ; a: bank (0..2)
1141
1142 selbnk:
1143 push bc
1144 ld c,a
1145 call getiff
1146 push af
1147
1148 ld a,c
1149 di
1150 ld (@cbnk),a
1151 ld a,5
1152 out (SIOAC),a
1153 ld a,(mm_sio0)
1154 rla
1155 srl c
1156 rra
1157 out (SIOAC),a
1158 ld (mm_sio0),a
1159
1160 ld a,5
1161 out (SIOBC),a
1162 ld a,(mm_sio1)
1163 rla
1164 srl c
1165 rra
1166 out (SIOBC),a
1167 ld (mm_sio1),a
1168 pop af
1169 pop bc
1170 ret c ;INTs were disabled
1171 ei
1172 ret
1173
1174 ;----------------------------------------------------------------------
1175
1176 ; c: bank (0..2)
1177
1178 if 0
1179
1180 selbnk:
1181 ld a,(@cbnk)
1182 xor c
1183 and 3
1184 ret z ;no change
1185
1186 call getiff
1187 push af
1188 ld a,c
1189 di
1190 ld (@cbnk),a
1191 ld a,5
1192 out (SIOAC),a
1193 ld a,(mm_sio0)
1194 rla
1195 srl c
1196 rra
1197 out (SIOAC),a
1198 ld (mm_sio0),a
1199
1200 ld a,5
1201 out (SIOBC),a
1202 ld a,(mm_sio1)
1203 rla
1204 srl c
1205 rra
1206 out (SIOBC),a
1207 ld (mm_sio1),a
1208 pop af
1209 ret nc ;INTs were disabled
1210 ei
1211 ret
1212
1213 endif
1214
1215 ;----------------------------------------------------------------------
1216
1217 if 0
1218 ex af,af'
1219 push af
1220 ex af,af'
1221
1222 rra
1223 jr nc,stbk1
1224 ex af,af'
1225 ld a,5
1226 out (SIOAC),a
1227 ld a,(mm_sio0)
1228 rla
1229 srl c
1230 rra
1231 out (SIOAC),a
1232 ld (mm_sio1),a
1233 ex af,af'
1234
1235 stbk1:
1236 rra
1237 jr nc,stbk2
1238 ex af,af'
1239 ld a,5
1240 out (SIOBC),a
1241 ld a,(mm_sio1)
1242 rla
1243 srl c
1244 rra
1245 out (SIOBC),a
1246 ld (mm_sio1),a
1247 ex af,af'
1248
1249 stbk2:
1250 endif
1251
1252 global @cbnk
1253 global mm_sio0, mm_sio1
1254
1255 @cbnk: db 0 ; current bank (0..2)
1256 mm_sio0:
1257 ds 1
1258 mm_sio1:
1259 ds 1
1260
1261
1262 endif
1263
1264 ;----------------------------------------------------------------------
1265
1266 curph defl $
1267 .dephase
1268 sysrame:
1269 .phase curph
1270 tim_ms: db 0
1271 tim_s: dw 0
1272 .dephase
1273
1274 ;-----------------------------------------------------
1275
1276 if CPU_Z180
1277
1278 dseg
1279
1280 ds 1
1281 banktabsys:
1282 ds 1 ;0c001h
1283 ds 1 ;0c002h
1284 banktab:
1285 ds BANKS ;0c003h
1286 memalv:
1287 ds 512/4 ;Number of 4k blocks
1288 alv_len equ $-memalv
1289 crc_len equ $-banktabsys
1290
1291 crc_memalv:
1292 ds 2 ;
1293
1294 endif
1295
1296 cseg
1297
1298 ;.phase 0ffc0h
1299 ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table
1300 ;.dephase
1301
1302 ;.phase 0fffch
1303 mark_55AA equ 0fffch
1304 ;ds 4 ; 0fffch
1305 ;.dephase
1306
1307
1308 end
1309
Z180 Stamp Monitor