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a16ba2b0
L		 1 page 255\r
2 .z80\r
3\r
4 extrn ddtz,bpent\r
5 extrn $stack\r
30d1329e 6 extrn charini,?const,?conin\r
8df5b655 7 extrn ?cono,?conos\r
a16ba2b0
L		 8\r
9 extrn romend\r
10\r
11\r
12 global isv_sw\r
13\r
14 include config.inc\r
8df5b655
L		 15 if CPU_Z180\r
16 include z180reg.inc\r
17 include z180.lib\r
18 endif\r
815c1735 19\r
a16ba2b0
L		 20\r
21\r
22\r
23;----------------------------------------------------------------------\r
24\r
25 cseg\r
8df5b655 26romstart equ $\r
a16ba2b0 27\r
8df5b655 28 org romstart+0\r
815c1735 29 jp start\r
a16ba2b0 30\r
8df5b655 31iobyte: db 0\r
a16ba2b0
L		 32; restart vectors\r
33\r
34rsti defl 1\r
35 rept 7\r
8df5b655 36 org 8*rsti + romstart\r
a16ba2b0
L		 37 jp bpent\r
38rsti defl rsti+1\r
39 endm\r
40\r
41;----------------------------------------------------------------------\r
349c01b1 42 \r
8df5b655 43 org romstart+40h\r
349c01b1
L		 44\r
45 dw 0\r
46 db 0\r
47\r
a16ba2b0
L		 48\r
49 if ROMSYS\r
50$crom: defb c$rom ;\r
51 else\r
52 db 0 ;\r
53 endif\r
54\r
8df5b655
L		 55INIWAITS defl CWAITIO\r
56 if ROMSYS\r
57INIWAITS defl INIWAITS+CWAITROM\r
58 endif\r
59\r
60hwini0:\r
61 if CPU_Z180\r
62\r
63 db 3 ;count\r
64 db rcr,CREFSH ;configure DRAM refresh\r
65 db dcntl,INIWAITS ;wait states\r
66 db cbar,SYS$CBAR\r
67 else\r
68 db 0\r
69 endif\r
70\r
71;----------------------------------------------------------------------\r
72\r
73 org romstart+50h\r
74start:\r
75 jp cstart\r
76 jp wstart\r
77 jp ?const\r
78 jp ?conin\r
79 jp ?cono\r
80 jp ?conos\r
81 jp charini\r
82\r
83;----------------------------------------------------------------------\r
84\r
a16ba2b0
L		 85dmclrt: ;clear ram per dma\r
86 db dmct_e-dmclrt-2 ;\r
87 db sar0l ;first port\r
815c1735 88 dw nullbyte ;src (fixed)\r
a16ba2b0
L		 89nullbyte:\r
90 db 000h ;src\r
91 dw romend ;dst (inc), start after "rom" code\r
92 db 00h ;dst\r
93 dw 0-romend ;count (64k)\r
94dmct_e:\r
95\r
8df5b655
L		 96cstart:\r
97 if CPU_Z180\r
a16ba2b0 98\r
30d1329e
L		 99 push af\r
100 in0 a,(itc) ;Illegal opcode trap?\r
101 jp m,??st01\r
102 ld a,i ;I register == 0 ?\r
103 jr z,??st02 ; yes, harware reset\r
a16ba2b0
L		 104\r
105??st01:\r
8df5b655 106; TODO: SYS$CBR\r
30d1329e
L		 107 ld a,(syscbr)\r
108 out0 (cbr),a\r
109 pop af ;restore registers\r
30d1329e 110 jp bpent ;\r
a16ba2b0
L		 111\r
112??st02:\r
113 di ;0058\r
114 ld a,CREFSH\r
115 out0 (rcr),a ; configure DRAM refresh\r
116 ld a,CWAITIO\r
117 out0 (dcntl),a ; wait states\r
118\r
815c1735
L		 119 ld a,M_NCD ;No Clock Divide\r
120 out0 (ccr),a\r
bad2d92d
L		 121; ld a,M_X2CM ;X2 Clock Multiplier\r
122; out0 (cmr),a\r
8df5b655
L		 123 else\r
124 di\r
125 xor a\r
126 ld (@cbnk),a\r
127 endif\r
815c1735 128\r
a16ba2b0
L		 129; search warm start mark\r
130\r
8df5b655
L		 131 if CPU_Z180\r
132\r
a16ba2b0
L		 133 ld ix,mark_55AA ;00b8 ; top of common area\r
134 ld a,SYS$CBAR ;\r
135 out0 (cbar),a ;\r
136 ld a,071h ;00bc\r
137 ex af,af' ;00be ;for cbr = 0x70 downto 0x40\r
138swsm_l:\r
815c1735 139 ex af,af' ;00bf\r
a16ba2b0
L		 140 dec a ;00c0\r
141 cp 03fh ;00c1\r
142 jr z,kstart ;00c3 ; break (mark not found)\r
143 out0 (cbr),a ;00c5\r
144 ex af,af' ;00c8\r
145 ld a,0aah ;00c9\r
146 cp (ix+000h) ;00cb\r
147 jr nz,swsm_l ;00ce\r
148 cp (ix+002h) ;00d0\r
149 jr nz,swsm_l ;00d3\r
150 cpl ;00d5\r
151 cp (ix+001h) ;00d6\r
152 jr nz,swsm_l ;00d9\r
153 cp (ix+003h) ;00db\r
154 jr nz,swsm_l ;00de\r
155 ld sp,$stack ;00e0 mark found, check\r
156 call checkcrc_alv ;00e3\r
157 jp z,wstart ;00e6 check ok,\r
8df5b655
L		 158 else\r
159 ld ix,mark_55AA ; top of common area\r
160 ld a,0aah ;\r
161 cp (ix+000h) ;\r
162 jr nz,kstart ;\r
163 cp (ix+002h) ;\r
164 jr nz,kstart ;\r
165 cpl ;\r
166 cp (ix+001h) ;\r
167 jr nz,kstart ;\r
168 cp (ix+003h) ;\r
169 jr nz,kstart ;\r
170 ld sp,$stack ; mark found, check\r
171 jp z,wstart ; check ok,\r
172 endif\r
a16ba2b0
L		 173;\r
174; ram not ok, initialize -- kstart --\r
175\r
176kstart:\r
8df5b655
L		 177 if CPU_Z180\r
178 \r
179 if 0\r
a16ba2b0
L		 180\r
181 ld a,088h ;00e9 0000-7fff: common 0\r
182 out0 (cbar),a ;00eb 8000-ffff: common 1\r
183 ld ix,08000h ;00f3\r
184 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
185??f_0:\r
186 out0 (cbr),a ;00f9\r
187\r
815c1735 188 ld (ix+0),a ;0103\r
a16ba2b0 189 cpl\r
815c1735 190 ld (ix+1),a ;0103\r
a16ba2b0
L		 191 cpl\r
192 add a,8 ;010a next 'bank'\r
193 cp 078h ;010c stop at 078000\r
194 jr nz,??f_0 ;010e\r
195\r
196 ld de,8000h ;0114 first block not tested, but mark as ok\r
197 ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
198??cp_0:\r
199 out0 (cbr),a ;011c\r
200 ld c,a\r
201 xor (ix+0)\r
202 ld b,a\r
203 ld a,c\r
204 cpl\r
205 xor (ix+1)\r
206 or b\r
207 jr nz,??cp_1\r
208 scf\r
209??cp_1:\r
210 rr d\r
211 rr e\r
212 ld a,c\r
213 add a,8\r
214 cp 078h ; stop at 078000\r
215 jr nz,??cp_0\r
8df5b655
L		 216 \r
217 else\r
218 \r
219 ld de,0ffffh\r
220 ld a,070h\r
221 out0 (cbr),a\r
222 \r
223 endif\r
815c1735 224\r
a16ba2b0
L		 225;\r
226; ram test found 1 or more error free blocks (32k)\r
227;\r
228\r
229ramok:\r
230 ld a,SYS$CBAR ;01c8\r
231 out0 (cbar),a ;01ca\r
232 ld h,d\r
233 ld l,e\r
234 ld c,070h ;01ce highest block\r
235 ld b,15 ;01d0\r
236??sr_1:\r
237 add hl,hl\r
238 jr c,alloc ;01d4 highest "error free" block\r
239 ld a,c ;01d6\r
240 sub 008h ;01d7\r
241 ld c,a ;01d9\r
242 djnz ??sr_1 ;01da\r
243\r
244 slp ;01dc should never be reached\r
245\r
246alloc:\r
247 out0 (cbr),c ;01de\r
30d1329e
L		 248 ld a,c\r
249 ld (syscbr),a\r
8df5b655 250 endif\r
a16ba2b0 251 ld sp,$stack ;01e1\r
815c1735 252\r
a16ba2b0
L		 253; Clear RAM using DMA0\r
254\r
8df5b655
L		 255 if CPU_Z180\r
256\r
257 if 0\r
258 \r
a16ba2b0
L		 259 ld hl,dmclrt ;load DMA registers\r
260 call io.ini.m\r
261 ld a,0cbh ;01ef dst +1, src fixed, burst\r
262 out0 (dmode),a ;01f1\r
263\r
264 ld b,512/64\r
815c1735 265 ld a,062h ;01f4 enable dma0,\r
a16ba2b0
L		 266??cl_1:\r
267 out0 (dstat),a ;01f9 clear (up to) 64k\r
268 djnz ??cl_1 ; end of RAM?\r
8df5b655
L		 269 \r
270 endif\r
815c1735 271\r
a16ba2b0 272; Init bank manager\r
815c1735 273\r
a16ba2b0
L		 274 ld hl,banktabsys ;020f\r
275 ld (hl),c ; Common area\r
276 inc hl ;0213\r
277 ld (hl),c ; System work area\r
278 inc hl ;0215 Point to bank 0 entry\r
279 ld b,BANKS ;0216\r
280l0218h:\r
281 ld (hl),0ffh ;0218 Mark all banks as unassigned\r
282 inc hl ;021a\r
283 djnz l0218h ;021b\r
284\r
285 ld hl,memalv ;\r
286 ld b,8 ; 8*4k ie. first 32k\r
287??a_0:\r
288 ld (hl),0e0h ; mark as sys ("rom"/monitor)\r
289 inc hl\r
290 djnz ??a_0\r
815c1735 291\r
a16ba2b0
L		 292 rr d ; shift out bit for block 0\r
293 rr e ;\r
294 ld c,15 ;022c 15*32k remaining blocks\r
295l022eh:\r
296 ld a,0feh ; 0xfe == block with error(s)\r
297 rr d ;\r
298 rr e\r
299 adc a,0 ; ==> 0xff : block ok\r
815c1735 300 ld b,32/4 ; 32k == 8 * 4k\r
a16ba2b0
L		 301l0236h:\r
302 ld (hl),a ;\r
303 inc hl ;\r
304 djnz l0236h ;\r
305 dec c ;\r
306 jr nz,l022eh ;next 32k block\r
815c1735 307\r
a16ba2b0
L		 308 ld hl,memalv+0ch ;memalv+0ch\r
309 ld a,(banktabsys) ;\r
310 call add_hl_a\r
311 ld b,3 ;\r
312l024ah:\r
313 ld (hl),0ech ;alloc system ram\r
314 inc hl ;\r
315 djnz l024ah ;\r
316 ld (hl),0efh ;alloc common\r
317 call gencrc_alv\r
318\r
815c1735 319 ld hl,0000h ;bank #\r
a16ba2b0
L		 320 ld bc,0f0fh ; size (?) (4k blocks)\r
321 xor a ;\r
322 call sub_0420h ;alloc mem for bank 0\r
323 ld c,l ;\r
324 or a ;\r
325 call z,sub_04b5h ;\r
326\r
327 ld hl,0101h ;\r
328 ld bc,0f0fh ;\r
329 xor a ;\r
330 call sub_0420h ;\r
331 ld c,l ;\r
332 or a ;\r
333 call z,sub_04b5h ;\r
8df5b655 334 endif\r
a16ba2b0
L		 335\r
336 ld hl,055AAh ;set warm start mark\r
337 ld (mark_55AA),hl ;\r
338 ld (mark_55AA+2),hl;\r
339\r
340;\r
8df5b655 341; (crc ok) -- wstart --\r
a16ba2b0
L		 342;\r
343wstart:\r
344 call sysram_init ;027f\r
345 call ivtab_init\r
8df5b655
L		 346 if CPU_Z180\r
347 call prt0_init\r
348 endif\r
a16ba2b0 349\r
30d1329e 350 call charini\r
bad2d92d 351 call bufferinit\r
a16ba2b0 352\r
8df5b655
L		 353 iff CPU_Z180\r
354 ld a,0\r
355 call selbnk\r
356 endif\r
a16ba2b0
L		 357\r
358\r
359 im 2 ;?030e\r
360 ei ;0282\r
361\r
30d1329e
L		 362 call ?const ;0284\r
363 call ?const ;0287\r
a16ba2b0 364 or a ;028a\r
30d1329e 365 call nz,?conin ;028d\r
815c1735 366\r
8df5b655
L		 367 if CPU_Z180\r
368 ld a,(banktab) ;\r
369 ld e,a ;\r
370 else\r
371; TODO:\r
372 endif\r
a16ba2b0 373 jp ddtz ;0290\r
815c1735 374\r
30d1329e 375\r
8df5b655
L		 376 if CPU_Z180\r
377; TODO: SYS$CBR\r
30d1329e 378syscbr: db 1\r
8df5b655 379 endif\r
30d1329e 380\r
a16ba2b0
L		 381;\r
382;----------------------------------------------------------------------\r
383;\r
384\r
a16ba2b0
L		 385;TODO: Make a ringbuffer module.\r
386\r
387 global buf.init\r
815c1735 388\r
a16ba2b0
L		 389buf.init:\r
390 ld (ix+o.in_idx),0\r
391 ld (ix+o.out_idx),0\r
392 ld (ix+o.mask),a\r
393 ret\r
394\r
395;----------------------------------------------------------------------\r
6a4e9540 396if 0\r
bad2d92d
L		 397 extrn msginit,msg_tx_fifo,msg_rx_fifo\r
398 extrn msg.sout\r
349c01b1
L		 399\r
400bufferinit:\r
349c01b1 401\r
bad2d92d 402 ld de,msg_tx_fifo\r
349c01b1
L		 403 in0 a,cbr\r
404 call log2phys\r
405 ld (40h+0),hl\r
406 ld (40h+2),a\r
bad2d92d 407\r
6a4e9540
L		 408; ld (bufdat+1),hl\r
409; ld (bufdat+3),a\r
410; ld a,1\r
411; ld (bufdat+0),a\r
412; ld hl,inimsg\r
413; call msg.sout\r
349c01b1 414\r
bad2d92d
L		 415 ld de,msg_rx_fifo\r
416 in0 a,cbr\r
417 call log2phys\r
418 ld (bufdat+1),hl\r
419 ld (bufdat+3),a\r
6a4e9540 420 ld a,2\r
bad2d92d
L		 421 ld (bufdat+0),a\r
422 ld hl,inimsg\r
423 call msg.sout\r
349c01b1 424\r
bad2d92d 425 ret\r
a16ba2b0 426\r
349c01b1 427inimsg:\r
bad2d92d 428 db inimsg_e - $ - 1\r
3531528e 429 db 0AEh\r
bad2d92d 430 db inimsg_e - $ - 1\r
349c01b1
L		 431 db 0\r
432bufdat:\r
433 db 0\r
434 dw 0\r
435 db 0\r
436inimsg_e:\r
bad2d92d 437\r
6a4e9540 438endif\r
349c01b1
L		 439;----------------------------------------------------------------------\r
440;\r
4caee1ec 441\r
6a4e9540
L		 442 extrn msginit,msg.sout\r
443 extrn mtx.fifo,mrx.fifo\r
444 extrn co.fifo,ci.fifo\r
4caee1ec
L		 445\r
446\r
a16ba2b0 447bufferinit:\r
8df5b655 448 if CPU_Z180\r
a16ba2b0 449 call msginit\r
815c1735 450\r
a16ba2b0 451 ld hl,buffers\r
6a4e9540 452 ld b,buftablen\r
a16ba2b0 453bfi_1:\r
6a4e9540
L		 454 ld a,(hl)\r
455 inc hl\r
456 ld (bufdat+0),a\r
a16ba2b0
L		 457 ld e,(hl)\r
458 inc hl\r
459 ld d,(hl)\r
460 inc hl\r
461 push hl\r
6a4e9540
L		 462\r
463 or a\r
464 jr nz,bfi_2\r
8df5b655
L		 465; in0 a,(cbr)\r
466 call hw_log2phys\r
6a4e9540
L		 467 ld (40h+0),hl\r
468 ld (40h+2),a\r
469 out0 (AVRINT5),a\r
470 jr bfi_3 \r
471bfi_2:\r
8df5b655
L		 472; in0 a,(cbr)\r
473 call hw_log2phys\r
a16ba2b0
L		 474 ld (bufdat+1),hl\r
475 ld (bufdat+3),a\r
a16ba2b0
L		 476 ld hl,inimsg\r
477 call msg.sout\r
6a4e9540 478bfi_3:\r
a16ba2b0 479 pop hl\r
a16ba2b0
L		 480 djnz bfi_1\r
481 ret\r
8df5b655
L		 482 else\r
483 call msginit\r
484\r
485 ld hl,buffers\r
486 ld b,buftablen\r
487bfi_1:\r
488 ld a,(hl)\r
489 inc hl\r
490 ld (bufdat+0),a\r
491 ld e,(hl)\r
492 inc hl\r
493 ld d,(hl)\r
494 inc hl\r
495 ex de,hl\r
496\r
497 or a\r
498 jr nz,bfi_2\r
499\r
500 ld a,(@cbnk)\r
501 call bnk2phys\r
502\r
503 ld (40h+0),hl\r
504 ld (40h+2),a\r
505 out (AVRINT5),a\r
506 jr bfi_3\r
507bfi_2:\r
508\r
509 ld a,(@cbnk)\r
510 call bnk2phys\r
511\r
512 ld (bufdat+1),hl\r
513 ld (bufdat+3),a\r
514 ld hl,inimsg\r
515 call msg.sout\r
516bfi_3:\r
517 ex de,hl\r
518 djnz bfi_1\r
519 ret\r
520 endif\r
a16ba2b0 521\r
a16ba2b0 522buffers:\r
6a4e9540
L		 523 db 0\r
524 dw mtx.fifo\r
525 db 1\r
526 dw mrx.fifo\r
527 db 2\r
528 dw co.fifo\r
529 db 3\r
530 dw ci.fifo\r
531buftablen equ ($ - buffers)/3\r
815c1735
L		 532\r
533inimsg:\r
6a4e9540 534 db inimsg_e - $ -1\r
3531528e 535 db 0AEh\r
a16ba2b0
L		 536 db inimsg_e - $ -1\r
537 db 0\r
538bufdat:\r
539 db 0\r
540 dw 0\r
541 db 0\r
e598b357 542inimsg_e:\r
a16ba2b0 543\r
4caee1ec 544\r
a16ba2b0
L		 545;\r
546;----------------------------------------------------------------------\r
547;\r
548\r
549sysram_init:\r
550 ld hl,sysramw\r
551 ld de,topcodsys\r
552 ld bc,sysrame-sysramw\r
553 ldir\r
554\r
555 ret\r
556\r
557;----------------------------------------------------------------------\r
558\r
559ivtab_init:\r
560 ld hl,ivtab ;\r
561 ld a,h ;\r
562 ld i,a ;\r
8df5b655 563 if CPU_Z180\r
a16ba2b0 564 out0 (il),l ;\r
8df5b655 565 endif\r
a16ba2b0
L		 566\r
567; Let all vectors point to spurious int routines.\r
568\r
569 ld d,high sp.int0\r
570 ld a,low sp.int0\r
571 ld b,9\r
815c1735 572ivt_i1:\r
a16ba2b0
L		 573 ld (hl),a\r
574 inc l\r
575 ld (hl),d\r
576 inc l\r
577 add a,sp.int.len\r
578 djnz ivt_i1\r
579 ret\r
580\r
4caee1ec 581;----------------------------------------------------------------------\r
a16ba2b0 582\r
8df5b655 583 if CPU_Z180\r
a16ba2b0
L		 584prt0_init:\r
585 ld a,i\r
586 ld h,a\r
587 in0 a,(il)\r
588 and 0E0h\r
589 or IV$PRT0\r
590 ld l,a\r
591 ld (hl),low iprt0\r
592 inc hl\r
593 ld (hl),high iprt0\r
594 ld hl,prt0itab\r
595 call io.ini.m\r
596 ret\r
815c1735 597\r
a16ba2b0
L		 598prt0itab:\r
599 db prt0it_e-prt0itab-2\r
600 db tmdr0l\r
601 dw PRT_TC10MS\r
602 dw PRT_TC10MS\r
603 db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r
604prt0it_e:\r
8df5b655 605 endif\r
a16ba2b0 606\r
4caee1ec 607\r
a16ba2b0
L		 608;\r
609;----------------------------------------------------------------------\r
610;\r
611\r
612io.ini:\r
613 push bc\r
8df5b655
L		 614 if CPU_Z180\r
615\r
a16ba2b0
L		 616 ld b,0 ;high byte port adress\r
617 ld a,(hl) ;count\r
618 inc hl\r
8df5b655
L		 619 or a\r
620 jr z,ioi_e\r
a16ba2b0
L		 621ioi_1:\r
622 ld c,(hl) ;port address\r
623 inc hl\r
624 outi\r
625 inc b ;outi decrements b\r
626 dec a\r
627 jr nz,ioi_1\r
8df5b655
L		 628\r
629 else\r
630 jr ioi_nxt\r
631ioi_l:\r
632 ld c,(hl) ;port address\r
633 inc hl\r
634 otir\r
635ioi_nxt:\r
636 ld b,(hl) ;count\r
637 inc hl\r
638 inc b\r
639 djnz ioi_l\r
640 endif\r
641ioi_e: \r
a16ba2b0
L		 642 pop bc\r
643 ret\r
644\r
8df5b655 645 if CPU_Z180\r
a16ba2b0
L		 646io.ini.m:\r
647 push bc\r
648 ld b,(hl)\r
649 inc hl\r
650 ld c,(hl)\r
651 inc hl\r
815c1735
L		 652 otimr\r
653 pop bc\r
a16ba2b0 654 ret\r
8df5b655 655 endif\r
815c1735 656\r
a16ba2b0
L		 657io.ini.l:\r
658;\r
659\r
8df5b655 660;\r
a16ba2b0
L		 661;----------------------------------------------------------------------\r
662;\r
663\r
8df5b655
L		 664 if CPU_Z180\r
665\r
a16ba2b0
L		 666; compute crc\r
667; hl: start adr\r
668; bc: len\r
669; bc returns crc val\r
670\r
671do_crc16:\r
672 ld de,0FFFFh\r
673crc1:\r
674 ld a,(hl)\r
675 xor e\r
676 ld e,a\r
677 rrca\r
678 rrca\r
679 rrca\r
680 rrca\r
681 and 0Fh\r
682 xor e\r
683 ld e,a\r
684 rrca\r
685 rrca\r
686 rrca\r
687 push af\r
688 and 1Fh\r
689 xor d\r
690 ld d,a\r
691 pop af\r
692 push af\r
693 rrca\r
694 and 0F0h\r
695 xor d\r
696 ld d,a\r
697 pop af\r
698 and 0E0h\r
699 xor e\r
700 ld e,d\r
701 ld d,a\r
702 cpi\r
703 jp pe,crc1\r
704 or e ;z-flag\r
705 ret\r
706\r
707\r
708gencrc_alv:\r
709 push hl ;03f6\r
710 push de ;03f7\r
711 push bc\r
712 push af ;03f8\r
713 ld hl,banktabsys ;03f9\r
714 ld bc,crc_len ;03fc\r
715 call do_crc16 ;03ff\r
716 ld (hl),e\r
717 inc hl\r
718 ld (hl),d\r
719 pop af ;0406\r
720 pop bc\r
721 pop de ;0407\r
722 pop hl ;0408\r
723 ret ;0409\r
724\r
725checkcrc_alv:\r
726 push hl ;040a\r
727 push de\r
728 push bc ;040b\r
729 ld hl,banktabsys ;040d\r
730 ld bc,crc_len+2 ;0410\r
731 call do_crc16 ;0413\r
732 pop bc ;041d\r
733 pop de\r
734 pop hl ;041e\r
735 ret ;041f\r
736\r
4caee1ec
L		 737;----------------------------------------------------------------------\r
738\r
a16ba2b0
L		 739;\r
740; alloc\r
741;\r
742; h: max bank #\r
743; l: min bank #\r
744; b: max size\r
745; c: min size\r
746;\r
747; ret:\r
748; a: 0 == ok\r
815c1735 749; 1 ==\r
a16ba2b0
L		 750; 2 == no bank # in requested range\r
751; ff == crc error\r
752;\r
753\r
754sub_0420h:\r
755 call checkcrc_alv ;0420\r
756 jr nz,l049ch ;0424 crc error, tables corrupt\r
815c1735 757\r
a16ba2b0
L		 758 call sub_049dh ;0427 bank # in req. range available?\r
759 jr c,l0499h ;042a\r
760 push ix ;042c\r
761 push iy ;042e\r
762 push de ;0430\r
763 push hl ;0431\r
764 push bc ;0432\r
765 ld c,b ;0433\r
766 ld b,alv_len+1 ;0434\r
767 ld d,0 ;0436\r
768 ld hl,memalv-1 ;0438\r
769 jr l0441h ;043b\r
770\r
771; find free blocks\r
772\r
773l043dh:\r
774 ld a,(hl) ;043d\r
775 inc a ;043e free blocks are marked 0ffh\r
776 jr z,l0446h ;043f\r
777l0441h:\r
778 inc hl ;0441\r
779 djnz l043dh ;0442\r
780 jr l0464h ;0444\r
781l0446h:\r
815c1735 782 push hl ;0446\r
a16ba2b0
L		 783 pop ix ;0447 free blocks start here\r
784 ld e,000h ;0449\r
785 jr l0451h ;044b\r
786l044dh: ; count free blocks\r
787 ld a,(hl) ;044d\r
788 inc a ;044e\r
789 jr nz,l0457h ;044f\r
790l0451h:\r
791 inc e ;0451\r
792 inc hl ;0452\r
793 djnz l044dh ;0453\r
794 jr l0464h ;0455\r
795\r
815c1735 796; end of free blocks run.\r
a16ba2b0
L		 797\r
798l0457h:\r
799 ld a,d ;0457\r
800 cp e ;0458 nr of blocks >= requested ?\r
815c1735 801 jr nc,l0441h ;0459\r
a16ba2b0
L		 802\r
803 ld d,e ;045b\r
804 push ix ;045c\r
805 pop iy ;045e\r
806 ld a,d ;0460\r
807 cp c ;0461\r
808 jr c,l0441h ;0462\r
809l0464h:\r
810 pop bc ;0464\r
811 ld a,d ;0465\r
812 cp b ;0466\r
813 jr c,l046ch ;0467\r
814 ld d,b ;0469\r
815 jr l0471h ;046a\r
816l046ch:\r
817 cp c ;046c\r
818 jr nc,l0471h ;046d\r
819 ld d,000h ;046f\r
820l0471h:\r
821 ld a,d ;0471\r
822 push iy ;0472\r
823 pop hl ;0474\r
824 ld de,memalv ;0475\r
825 or a ;0478\r
826 sbc hl,de ;0479\r
827 ld b,l ;047b\r
828 ld c,a ;047c\r
829 pop hl ;047d\r
830l047eh:\r
831 or a ;047e\r
832 jr z,l0489h ;047f\r
833 ld (iy+0),l ;0481\r
834 inc iy ;0484\r
835 dec a ;0486\r
836 jr l047eh ;0487\r
837l0489h:\r
838 pop de ;0489\r
839 pop iy ;048a\r
840 pop ix ;048c\r
841 call gencrc_alv ;048e\r
842 ld a,c ;0491\r
843 or a ;0492\r
844 ld a,000h ;0493\r
845 ret nz ;0495\r
846 or 001h ;0496\r
847 ret ;0498\r
848\r
849l0499h:\r
850 ld a,2 ;0499\r
851l049ch:\r
852 or a\r
853 ret ;049c\r
854\r
855\r
856; search a free bank number in range\r
857; h: max #\r
858; l: min #\r
859; ret:\r
860; l: bank number available\r
861; nc, if found, bank nr. in l\r
862; cy, if none found\r
863\r
864sub_049dh:\r
865 push de ;049d\r
866 push bc ;049e\r
867 ex de,hl ;049f\r
868 dec e ;04a0\r
869l04a1h:\r
870 inc e ;04a1 test next #\r
871 ld a,d ;04a2\r
872 cp e ;04a3\r
815c1735 873 jr c,l04b1h ;04a4\r
a16ba2b0
L		 874 ld a,e ;04a6\r
875 ld hl,memalv ;04a7\r
876 ld bc,alv_len ;04aa\r
877 cpir ;04ad bank# allready allocated?\r
878 jr z,l04a1h ;04af if yes, search for next\r
879l04b1h:\r
880 ex de,hl ;04b1\r
881 pop bc ;04b2\r
882 pop de ;04b3\r
883 ret ;04b4\r
884\r
885\r
886sub_04b5h:\r
887 ld a,l ;04b5\r
888 cp 012h ;04b6\r
889 ccf ;04b8\r
890 ret c ;04b9\r
891 push hl ;04ba\r
892 ld hl,banktab ;04bb\r
893 call add_hl_a\r
894 ld (hl),b ;04c3\r
895 call gencrc_alv ;04c4\r
896 pop hl ;04c7\r
897 or a ;04c8 clear carry\r
898 ret ;04c9\r
899\r
900\r
901;--------------------------------------------------------------\r
902;\r
903; de: Log. Address\r
904; a: Bank number\r
905;\r
906;out ahl: Phys. (linear) Address\r
907\r
908\r
909bnk2phys:\r
910 push hl\r
911 ld hl,banktab\r
912 call add_hl_a\r
913 ld a,(hl)\r
914 pop hl\r
915\r
916 ; fall thru\r
917;--------------------------------------------------------------\r
918;\r
919; de: Log. Address\r
920; a: Bank (bbr)\r
921;\r
922; OP: ahl = (a<<12) + (d<<8) + e\r
923;\r
4caee1ec 924;out ahl: Phys. (linear) Address\r
a16ba2b0
L		 925\r
926\r
927log2phys:\r
928 push bc ;\r
929 ld c,a ;\r
930 ld b,16 ;\r
931 mlt bc ;bc = a<<4\r
932 ld l,d ;\r
933 ld h,0 ;\r
815c1735 934 add hl,bc ;bc + d == a<<4 + d\r
a16ba2b0
L		 935 ld a,h ;\r
936 ld h,l ;\r
937 ld l,e ;\r
938 pop bc ;\r
939 ret ;\r
940\r
8df5b655
L		 941;--------------------------------------------------------------\r
942;\r
943; de: Log. Address\r
944; \r
945;\r
946; OP: ahl = (bankbase<<12) + (d<<8) + e\r
947;\r
948;out ahl: Phys. (linear) Address\r
949\r
950\r
951hw_log2phys:\r
952 push bc ;\r
953 in0 c,(cbar)\r
954 ld a,d\r
955 or 00fh\r
956 cp c\r
957 jr c,hlp_1\r
958 in0 c,(cbr)\r
959 jr hlp_e\r
960hlp_1:\r
961 ld b,16\r
962 mlt bc\r
963 ld a,d\r
964 cp c\r
965 ld c,0\r
966 jr c,hlp_e\r
967 in0 c,(bbr)\r
968hlp_e: \r
969 ld b,16 ;\r
970 mlt bc ;bc = a<<4\r
971 ld l,d ;\r
972 ld h,0 ;\r
973 add hl,bc ;bc + d == a<<4 + d\r
974 ld a,h ;\r
975 ld h,l ;\r
976 ld l,e ;\r
977 pop bc ;\r
978 ret ;\r
979\r
980 else\r
981\r
982;\r
983;----------------------------------------------------------------------\r
984;\r
985\r
986bnk2phys:\r
987 sla h\r
988 jr nc,b2p_1 ;A15=1 --> common\r
989 ld a,3\r
990b2p_1:\r
991 srl a\r
992 rr h\r
993 ret\r
994\r
995 endif\r
a16ba2b0
L		 996\r
997;--------------------------------------------------------------\r
998;\r
999;return:\r
1000; hl = hl + a\r
1001; Flags undefined\r
1002;\r
1003\r
1004add_hl_a:\r
815c1735
L		 1005 add a,l\r
1006 ld l,a\r
1007 ret nc\r
1008 inc h\r
1009 ret\r
a16ba2b0
L		 1010\r
1011; ---------------------------------------------------------\r
1012\r
1013sysramw:\r
1014\r
1015 .phase isvsw_loc\r
1016topcodsys:\r
1017\r
1018; Trampoline for interrupt routines in banked ram.\r
1019; Switch stack pointer to "system" stack in top ram\r
1020; Save cbar\r
815c1735 1021\r
a16ba2b0
L		 1022isv_sw: ;\r
1023 ex (sp),hl ; save hl, return adr in hl\r
1024 push de ;\r
1025 push af ;\r
1026 ex de,hl ;\r
1027 ld hl,0 ;\r
1028 add hl,sp ;\r
1029 ld a,h ;\r
1030 cp 0f8h ;\r
1031 jr nc,isw_1 ;\r
1032 ld sp,$stack ;\r
1033isw_1:\r
1034 push hl ;\r
1035 in0 h,(cbar) ;\r
1036 push hl ;\r
1037 ld a,SYS$CBAR ;\r
1038 out0 (cbar),a ;\r
1039 ex de,hl ;\r
1040 ld e,(hl) ;\r
1041 inc hl ;\r
1042 ld d,(hl) ;\r
1043 ex de,hl ;\r
1044 push bc ;\r
1045 call jphl ;\r
1046\r
1047 pop bc ;\r
1048 pop hl ;\r
1049 out0 (cbar),h ;\r
1050 pop hl ;\r
1051 ld sp,hl ;\r
1052 pop af ;\r
1053 pop de ;\r
1054 pop hl ;\r
1055 ei ;\r
1056 ret ;\r
1057jphl:\r
1058 jp (hl) ;\r
1059\r
1060; ---------------------------------------------------------\r
1061\r
8df5b655 1062 if CPU_Z180\r
4caee1ec 1063\r
a16ba2b0
L		 1064iprt0:\r
1065 push af\r
1066 push hl\r
1067 in0 a,(tcr)\r
1068 in0 a,(tmdr0l)\r
1069 in0 a,(tmdr0h)\r
1070 ld a,(tim_ms)\r
1071 inc a\r
1072 cp 100\r
1073 jr nz,iprt_1\r
1074 xor a\r
1075 ld hl,(tim_s)\r
1076 inc hl\r
1077 ld (tim_s),hl\r
1078iprt_1:\r
1079 ld (tim_ms),a\r
1080 pop hl\r
1081 pop af\r
1082 ei\r
1083 ret\r
1084\r
8df5b655
L		 1085 endif\r
1086\r
a16ba2b0
L		 1087; ---------------------------------------------------------\r
1088\r
1089sp.int0:\r
1090 ld a,0d0h\r
1091 jr sp.i.1\r
1092sp.int.len equ $-sp.int0\r
1093 ld a,0d1h\r
1094 jr sp.i.1\r
1095 ld a,0d2h\r
1096 jr sp.i.1\r
1097 ld a,0d3h\r
1098 jr sp.i.1\r
1099 ld a,0d4h\r
1100 jr sp.i.1\r
1101 ld a,0d5h\r
1102 jr sp.i.1\r
1103 ld a,0d6h\r
1104 jr sp.i.1\r
1105 ld a,0d7h\r
1106 jr sp.i.1\r
1107 ld a,0d8h\r
1108sp.i.1:\r
1109; out (80h),a\r
1110 halt\r
1111\r
8df5b655
L		 1112; ---------------------------------------------------------\r
1113\r
1114 iff CPU_Z180\r
1115\r
1116; Get IFF2\r
1117; This routine may not be loaded in page zero\r
1118;\r
1119; return Carry clear, if INTs are enabled.\r
1120;\r
1121 global getiff\r
1122getiff:\r
1123 xor a ;clear accu and carry\r
1124 push af ;stack bottom := 00xxh\r
1125 pop af\r
1126 ld a,i ;P flag := IFF2\r
1127 ret pe ;exit carry clear, if enabled\r
1128 dec sp\r
1129 dec sp ;has stack bottom been overwritten?\r
1130 pop af\r
1131 and a ;if not 00xxh, INTs were\r
1132 ret nz ;actually enabled\r
1133 scf ;Otherwise, they really are disabled\r
1134 ret\r
1135\r
1136;----------------------------------------------------------------------\r
1137\r
1138 global selbnk\r
1139\r
1140; a: bank (0..2)\r
1141\r
1142selbnk:\r
1143 push bc\r
1144 ld c,a\r
1145 call getiff\r
1146 push af\r
1147\r
1148 ld a,c\r
1149 di\r
1150 ld (@cbnk),a\r
1151 ld a,5\r
1152 out (SIOAC),a\r
1153 ld a,(mm_sio0)\r
1154 rla\r
1155 srl c\r
1156 rra\r
1157 out (SIOAC),a\r
1158 ld (mm_sio0),a\r
1159\r
1160 ld a,5\r
1161 out (SIOBC),a\r
1162 ld a,(mm_sio1)\r
1163 rla\r
1164 srl c\r
1165 rra\r
1166 out (SIOBC),a\r
1167 ld (mm_sio1),a\r
1168 pop af\r
1169 pop bc\r
1170 ret c ;INTs were disabled\r
1171 ei\r
1172 ret\r
1173\r
1174;----------------------------------------------------------------------\r
1175\r
1176; c: bank (0..2)\r
1177\r
1178 if 0\r
1179\r
1180selbnk:\r
1181 ld a,(@cbnk)\r
1182 xor c\r
1183 and 3\r
1184 ret z ;no change\r
1185\r
1186 call getiff\r
1187 push af\r
1188 ld a,c\r
1189 di\r
1190 ld (@cbnk),a\r
1191 ld a,5\r
1192 out (SIOAC),a\r
1193 ld a,(mm_sio0)\r
1194 rla\r
1195 srl c\r
1196 rra\r
1197 out (SIOAC),a\r
1198 ld (mm_sio0),a\r
1199\r
1200 ld a,5\r
1201 out (SIOBC),a\r
1202 ld a,(mm_sio1)\r
1203 rla\r
1204 srl c\r
1205 rra\r
1206 out (SIOBC),a\r
1207 ld (mm_sio1),a\r
1208 pop af\r
1209 ret nc ;INTs were disabled\r
1210 ei\r
1211 ret\r
1212\r
1213 endif\r
1214\r
1215;----------------------------------------------------------------------\r
1216\r
1217 if 0\r
1218 ex af,af'\r
1219 push af\r
1220 ex af,af'\r
1221\r
1222 rra\r
1223 jr nc,stbk1\r
1224 ex af,af'\r
1225 ld a,5\r
1226 out (SIOAC),a\r
1227 ld a,(mm_sio0)\r
1228 rla\r
1229 srl c\r
1230 rra\r
1231 out (SIOAC),a\r
1232 ld (mm_sio1),a\r
1233 ex af,af'\r
1234\r
1235stbk1:\r
1236 rra\r
1237 jr nc,stbk2\r
1238 ex af,af'\r
1239 ld a,5\r
1240 out (SIOBC),a\r
1241 ld a,(mm_sio1)\r
1242 rla\r
1243 srl c\r
1244 rra\r
1245 out (SIOBC),a\r
1246 ld (mm_sio1),a\r
1247 ex af,af'\r
1248\r
1249stbk2:\r
1250 endif\r
1251\r
1252 global @cbnk\r
1253 global mm_sio0, mm_sio1\r
1254\r
1255@cbnk: db 0 ; current bank (0..2)\r
1256mm_sio0:\r
1257 ds 1\r
1258mm_sio1:\r
1259 ds 1\r
1260\r
1261\r
1262 endif\r
1263\r
1264;----------------------------------------------------------------------\r
1265\r
a16ba2b0
L		 1266curph defl $\r
1267 .dephase\r
1268sysrame:\r
1269 .phase curph\r
1270tim_ms: db 0\r
1271tim_s: dw 0\r
1272 .dephase\r
815c1735 1273\r
a16ba2b0
L		 1274;-----------------------------------------------------\r
1275\r
8df5b655
L		 1276 if CPU_Z180\r
1277\r
a16ba2b0
L		 1278 dseg\r
1279\r
1280 ds 1\r
1281banktabsys:\r
1282 ds 1 ;0c001h\r
1283 ds 1 ;0c002h\r
1284banktab:\r
1285 ds BANKS ;0c003h\r
1286memalv:\r
1287 ds 512/4 ;Number of 4k blocks\r
1288alv_len equ $-memalv\r
1289crc_len equ $-banktabsys\r
1290\r
815c1735 1291crc_memalv:\r
a16ba2b0
L		 1292 ds 2 ;\r
1293\r
8df5b655
L		 1294 endif\r
1295\r
a16ba2b0
L		 1296 cseg\r
1297\r
1298 ;.phase 0ffc0h\r
1299;ivtab equ 0ffc0h ; 0ffc0h ;int vector table\r
1300 ;.dephase\r
1301\r
1302 ;.phase 0fffch\r
1303mark_55AA equ 0fffch\r
1304 ;ds 4 ; 0fffch\r
1305 ;.dephase\r
1306\r
1307\r
1308 end\r
1309\r
Z180 Stamp Monitor