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[irmp.git] / irsnd.c
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4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
2ac088b2 4 * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
7644ac04 6 * Supported mikrocontrollers:\r
7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
2ac088b2 10 * ATtiny44 ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
e664a9f3 13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
7644ac04 14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
cb93f9e9 16 * $Id: irsnd.c,v 1.72 2014/02/20 14:55:17 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
2ac088b2 36#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
08f2dd9d 37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
46#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
47# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 48# define IRSND_PORT_LETTER B\r
49# define IRSND_BIT_NUMBER 0\r
08f2dd9d 50# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 51# define IRSND_PORT_LETTER B\r
52# define IRSND_BIT_NUMBER 1\r
08f2dd9d 53# else\r
54# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
55# endif // IRSND_OCx\r
21a4e0ee 56#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 57# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 58# define IRSND_PORT_LETTER A\r
59# define IRSND_BIT_NUMBER 2\r
90387f65 60# else\r
61# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
62# endif // IRSND_OCx\r
08f2dd9d 63#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
64# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 65# define IRSND_PORT_LETTER B\r
66# define IRSND_BIT_NUMBER 3\r
08f2dd9d 67# else\r
68# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
69# endif // IRSND_OCx\r
70#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
71# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 72# define IRSND_PORT_LETTER D\r
73# define IRSND_BIT_NUMBER 7\r
08f2dd9d 74# else\r
75# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
76# endif // IRSND_OCx\r
77#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
78# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 79# define IRSND_PORT_LETTER B\r
80# define IRSND_BIT_NUMBER 1\r
08f2dd9d 81# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 82# define IRSND_PORT_LETTER B\r
83# define IRSND_BIT_NUMBER 0\r
08f2dd9d 84# else\r
85# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
86# endif // IRSND_OCx\r
f50e01e7 87#elif defined (__AVR_ATmega164__) \\r
88 || defined (__AVR_ATmega324__) \\r
89 || defined (__AVR_ATmega644__) \\r
90 || defined (__AVR_ATmega644P__) \\r
0f700c8e 91 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 92 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
93# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 94# define IRSND_PORT_LETTER D\r
95# define IRSND_BIT_NUMBER 7\r
08f2dd9d 96# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 97# define IRSND_PORT_LETTER D\r
98# define IRSND_BIT_NUMBER 6\r
08f2dd9d 99# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 100# define IRSND_PORT_LETTER B\r
101# define IRSND_BIT_NUMBER 3\r
08f2dd9d 102# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 103# define IRSND_PORT_LETTER B\r
104# define IRSND_BIT_NUMBER 4\r
08f2dd9d 105# else\r
106# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
107# endif // IRSND_OCx\r
f50e01e7 108#elif defined (__AVR_ATmega48__) \\r
109 || defined (__AVR_ATmega88__) \\r
7644ac04 110 || defined (__AVR_ATmega88P__) \\r
f50e01e7 111 || defined (__AVR_ATmega168__) \\r
1f54e86c 112 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
114# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 115# define IRSND_PORT_LETTER B\r
116# define IRSND_BIT_NUMBER 3\r
08f2dd9d 117# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 118# define IRSND_PORT_LETTER D\r
119# define IRSND_BIT_NUMBER 3\r
08f2dd9d 120# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 121# define IRSND_PORT_LETTER D\r
122# define IRSND_BIT_NUMBER 6\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 5\r
08f2dd9d 126# else\r
127# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
128# endif // IRSND_OCx\r
f874da09 129#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 130# if IRSND_OCx == IRSND_OC0 \r
f874da09 131# define IRSND_PORT_LETTER B\r
132# define IRSND_BIT_NUMBER 0\r
08f2dd9d 133# elif IRSND_OCx == IRSND_OC1A \r
f874da09 134# define IRSND_PORT_LETTER D\r
135# define IRSND_BIT_NUMBER 5\r
08f2dd9d 136# elif IRSND_OCx == IRSND_OC1B \r
f874da09 137# define IRSND_PORT_LETTER E\r
138# define IRSND_BIT_NUMBER 2\r
08f2dd9d 139# else\r
140# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
141# endif // IRSND_OCx\r
9c86ff1a 142#elif defined (PIC_C18) //Microchip C18 compiler\r
143 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 144#elif defined (ARM_STM32) //STM32\r
145 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 146#else\r
08f2dd9d 147# if !defined (unix) && !defined (WIN32)\r
148# error mikrocontroller not defined, please fill in definitions here.\r
149# endif // unix, WIN32\r
f50e01e7 150#endif // __AVR...\r
151\r
f874da09 152#if defined(ATMEL_AVR)\r
153# define _CONCAT(a,b) a##b\r
154# define CONCAT(a,b) _CONCAT(a,b)\r
155# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
156# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
157# define IRSND_BIT IRSND_BIT_NUMBER\r
158#endif\r
159\r
9405f84a 160#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 161 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 162#else\r
9c86ff1a 163 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 164#endif\r
165\r
f50e01e7 166/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
167 * IR timings\r
168 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
169 */\r
4225a882 170#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
171#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
172#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
173#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
174#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
a7054daf 175#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
176#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 177\r
178#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
179#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 180#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 181#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
182#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
183#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
a7054daf 184#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 185\r
186#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
187#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
188#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
189#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
190#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
a7054daf 191#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 192\r
a7054daf 193#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
194#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 195\r
4225a882 196#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
197#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
198#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
199#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
200#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
a7054daf 201#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 202\r
770a1a9d 203#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
204#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
205#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
206#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
207#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
208#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
209#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
210\r
4225a882 211#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
212#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
213#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
214#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
215#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
a7054daf 216#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 217\r
218#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
219#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
a7054daf 220#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 221\r
222#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
223#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
224#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
225#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
a7054daf 226#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 227\r
228#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
229#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
230#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
a7054daf 231#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
232#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 233\r
beda975f 234#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
235#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
236#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
237#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
238#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
239\r
4225a882 240#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
241#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
242#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
243#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
244#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
a7054daf 245#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 246\r
247#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
248#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
249#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
250#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
251#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
252#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
a7054daf 253#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
254#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 255\r
5481e9cd 256#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
257#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
258#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
259#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
260#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
261#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
262#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
263#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
264#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
265#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
266#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
a7054daf 267#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 268\r
9c86ff1a 269#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
270#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
a7054daf 271#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
272#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 273#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 274\r
a48187fa 275#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
276\r
02ccdb69 277#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
278#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
279#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 280\r
cb93f9e9 281#define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
282#define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)\r
283#define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
284#define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)\r
285#define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
286\r
08f2dd9d 287#ifdef PIC_C18 // PIC C18\r
288# define IRSND_FREQ_TYPE uint8_t\r
289# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
290# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
291# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
292# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
293# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
294# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
295# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
296#elif defined (ARM_STM32) // STM32\r
297# define IRSND_FREQ_TYPE uint32_t\r
298# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
299# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
300# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
301# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
302# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
303# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
304# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
305#else // AVR\r
a03ad359 306# if F_CPU >= 16000000L\r
307# define AVR_PRESCALER 8\r
308# else\r
309# define AVR_PRESCALER 1\r
310# endif\r
08f2dd9d 311# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 312# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
313# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
314# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
315# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
316# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
317# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
318# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 319#endif\r
4225a882 320\r
48664931 321#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
322#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
323#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
324#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
325#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
326#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 327\r
c7c9a4a1 328#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
329#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
330#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
331#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
332#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
333#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
334\r
c7a47e89 335#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
336#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
337#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
338#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
339#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
340#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
341#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
342\r
9405f84a 343#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
344#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
345#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
346#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
347#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
348#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 349#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
350\r
351#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
352#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
353#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
354#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
355#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
356#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
357#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 358\r
fa09ce10 359#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r
360#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r
361#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r
362#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r
363#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
364#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
365\r
c9b6916a 366#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r
367#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r
368#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r
369#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r
370#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r
371#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r
372#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
373\r
9c86ff1a 374static volatile uint8_t irsnd_busy = 0;\r
375static volatile uint8_t irsnd_protocol = 0;\r
376static volatile uint8_t irsnd_buffer[6] = {0};\r
377static volatile uint8_t irsnd_repeat = 0;\r
4225a882 378static volatile uint8_t irsnd_is_on = FALSE;\r
379\r
f50e01e7 380#if IRSND_USE_CALLBACK == 1\r
381static void (*irsnd_callback_ptr) (uint8_t);\r
382#endif // IRSND_USE_CALLBACK == 1\r
383\r
4225a882 384/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
385 * Switch PWM on\r
4225a882 386 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
387 */\r
388static void\r
389irsnd_on (void)\r
390{\r
391 if (! irsnd_is_on)\r
392 {\r
cb93f9e9 393#ifndef ANALYZE\r
08f2dd9d 394# if defined(PIC_C18) // PIC C18\r
cb93f9e9 395 PWMon();\r
396 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
08f2dd9d 397# elif defined (ARM_STM32) // STM32\r
e664a9f3 398 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
399 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
400 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
08f2dd9d 401# else // AVR\r
402# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 403 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 404# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 405 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 406# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 407 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 408# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 409 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 410# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 411 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 412# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 413 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 414# else\r
415# error wrong value of IRSND_OCx\r
416# endif // IRSND_OCx\r
417# endif // C18\r
cb93f9e9 418#endif // ANALYZE\r
f50e01e7 419\r
420#if IRSND_USE_CALLBACK == 1\r
e664a9f3 421 if (irsnd_callback_ptr)\r
422 {\r
423 (*irsnd_callback_ptr) (TRUE);\r
424 }\r
f50e01e7 425#endif // IRSND_USE_CALLBACK == 1\r
426\r
e664a9f3 427 irsnd_is_on = TRUE;\r
4225a882 428 }\r
429}\r
430\r
431/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
432 * Switch PWM off\r
433 * @details Switches PWM off\r
434 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
435 */\r
436static void\r
437irsnd_off (void)\r
438{\r
439 if (irsnd_is_on)\r
440 {\r
cb93f9e9 441#ifndef ANALYZE\r
9c86ff1a 442 \r
08f2dd9d 443# if defined(PIC_C18) // PIC C18\r
cb93f9e9 444 PWMoff();\r
445 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
08f2dd9d 446# elif defined (ARM_STM32) // STM32\r
e664a9f3 447 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
448 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
449 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
450 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
08f2dd9d 451# else //AVR\r
9c86ff1a 452\r
08f2dd9d 453# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 454 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 455# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 456 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 457# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 458 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 459# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 460 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 461# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 462 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 463# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 464 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 465# else\r
466# error wrong value of IRSND_OCx\r
467# endif // IRSND_OCx\r
e664a9f3 468 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 469# endif //C18\r
cb93f9e9 470#endif // ANALYZE\r
f50e01e7 471\r
472#if IRSND_USE_CALLBACK == 1\r
e664a9f3 473 if (irsnd_callback_ptr)\r
474 {\r
475 (*irsnd_callback_ptr) (FALSE);\r
476 }\r
f50e01e7 477#endif // IRSND_USE_CALLBACK == 1\r
478\r
e664a9f3 479 irsnd_is_on = FALSE;\r
4225a882 480 }\r
481}\r
482\r
483/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
484 * Set PWM frequency\r
485 * @details sets pwm frequency\r
486 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
487 */\r
488static void\r
08f2dd9d 489irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 490{\r
cb93f9e9 491#ifndef ANALYZE\r
08f2dd9d 492# if defined(PIC_C18) // PIC C18\r
e664a9f3 493 OpenPWM(freq); \r
cb93f9e9 494 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
495 PWMoff();\r
08f2dd9d 496# elif defined (ARM_STM32) // STM32\r
e664a9f3 497 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 498\r
e664a9f3 499 if (TimeBaseFreq == 0)\r
500 {\r
501 RCC_ClocksTypeDef RCC_ClocksStructure;\r
502 /* Get system clocks and store timer clock in variable */\r
503 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
08f2dd9d 504# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 505 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
506 {\r
507 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
508 }\r
509 else\r
510 {\r
511 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
512 }\r
08f2dd9d 513# else\r
e664a9f3 514 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
515 {\r
516 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
517 }\r
518 else\r
519 {\r
520 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
521 }\r
08f2dd9d 522# endif\r
e664a9f3 523 }\r
08f2dd9d 524\r
e664a9f3 525 freq = TimeBaseFreq/freq;\r
08f2dd9d 526\r
e664a9f3 527 /* Set frequency */\r
528 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
529 /* Set duty cycle */\r
530 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
08f2dd9d 531# else // AVR\r
532\r
533# if IRSND_OCx == IRSND_OC2\r
e664a9f3 534 OCR2 = freq; // use register OCR2 for OC2\r
08f2dd9d 535# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 536 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 537# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 538 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 539# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 540 OCR0 = freq; // use register OCR2 for OC2\r
08f2dd9d 541# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 542 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 543# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 544 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 545# else\r
546# error wrong value of IRSND_OCx\r
547# endif\r
548# endif //PIC_C18\r
cb93f9e9 549#endif // ANALYZE\r
4225a882 550}\r
551\r
552/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
553 * Initialize the PWM\r
554 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
555 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
556 */\r
557void\r
558irsnd_init (void)\r
559{\r
cb93f9e9 560#ifndef ANALYZE\r
08f2dd9d 561# if defined(PIC_C18) // PIC C18\r
e664a9f3 562 OpenTimer;\r
cb93f9e9 563 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
564 IRSND_PIN = 0; // set IO to outout\r
565 PWMoff();\r
08f2dd9d 566# elif defined (ARM_STM32) // STM32\r
e664a9f3 567 GPIO_InitTypeDef GPIO_InitStructure;\r
568 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
569 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 570\r
571 /* GPIOx clock enable */\r
572# if defined (ARM_STM32L1XX)\r
e664a9f3 573 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 574# elif defined (ARM_STM32F10X)\r
e664a9f3 575 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 576# elif defined (ARM_STM32F4XX)\r
e664a9f3 577 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 578# endif\r
579\r
e664a9f3 580 /* GPIO Configuration */\r
581 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
08f2dd9d 582# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
e664a9f3 583 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
584 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
585 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
586 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
587 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
588 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
08f2dd9d 589# elif defined (ARM_STM32F10X)\r
e664a9f3 590 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
591 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
592 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
593 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
08f2dd9d 594# endif\r
595\r
e664a9f3 596 /* TIMx clock enable */\r
08f2dd9d 597# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 598 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 599# else\r
e664a9f3 600 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 601# endif\r
08f2dd9d 602\r
e664a9f3 603 /* Time base configuration */\r
604 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
605 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
606 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
607 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
608 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
609\r
610 /* PWM1 Mode configuration */\r
611 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
612 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
613 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
614 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
615 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
616\r
617 /* Preload configuration */\r
618 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
619 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
620\r
621 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
08f2dd9d 622# else // AVR\r
e664a9f3 623 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
624 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
08f2dd9d 625\r
626# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 627 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 628# if AVR_PRESCALER == 8\r
e664a9f3 629 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 630# else\r
e664a9f3 631 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 632# endif\r
08f2dd9d 633# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
e664a9f3 634 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 635# if AVR_PRESCALER == 8\r
e664a9f3 636 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 637# else\r
e664a9f3 638 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 639# endif\r
08f2dd9d 640# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 641 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 642# if AVR_PRESCALER == 8\r
e664a9f3 643 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 644# else\r
e664a9f3 645 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 646# endif\r
08f2dd9d 647# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
e664a9f3 648 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 649# if AVR_PRESCALER == 8\r
e664a9f3 650 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 651# else\r
e664a9f3 652 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 653# endif\r
08f2dd9d 654# else\r
655# error wrong value of IRSND_OCx\r
656# endif\r
e664a9f3 657 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
08f2dd9d 658# endif //PIC_C18\r
cb93f9e9 659#endif // ANALYZE\r
4225a882 660}\r
661\r
f50e01e7 662#if IRSND_USE_CALLBACK == 1\r
663void\r
664irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
665{\r
666 irsnd_callback_ptr = cb;\r
667}\r
668#endif // IRSND_USE_CALLBACK == 1\r
669\r
4225a882 670uint8_t\r
671irsnd_is_busy (void)\r
672{\r
673 return irsnd_busy;\r
674}\r
675\r
676static uint16_t\r
677bitsrevervse (uint16_t x, uint8_t len)\r
678{\r
679 uint16_t xx = 0;\r
680\r
681 while(len)\r
682 {\r
e664a9f3 683 xx <<= 1;\r
684 if (x & 1)\r
685 {\r
686 xx |= 1;\r
687 }\r
688 x >>= 1;\r
689 len--;\r
4225a882 690 }\r
691 return xx;\r
692}\r
693\r
694\r
9547ee89 695#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
696static uint8_t sircs_additional_bitlen;\r
697#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
698\r
4225a882 699uint8_t\r
879b06c2 700irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 701{\r
702#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
703 static uint8_t toggle_bit_recs80;\r
704#endif\r
705#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
706 static uint8_t toggle_bit_recs80ext;\r
707#endif\r
708#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
709 static uint8_t toggle_bit_rc5;\r
9547ee89 710#endif\r
779fbc81 711#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 712 static uint8_t toggle_bit_rc6;\r
beda975f 713#endif\r
714#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
715 static uint8_t toggle_bit_thomson;\r
4225a882 716#endif\r
717 uint16_t address;\r
718 uint16_t command;\r
719\r
879b06c2 720 if (do_wait)\r
4225a882 721 {\r
e664a9f3 722 while (irsnd_busy)\r
723 {\r
724 // do nothing;\r
725 }\r
879b06c2 726 }\r
727 else if (irsnd_busy)\r
728 {\r
e664a9f3 729 return (FALSE);\r
4225a882 730 }\r
731\r
732 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 733 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 734\r
735 switch (irsnd_protocol)\r
736 {\r
737#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 738 case IRMP_SIRCS_PROTOCOL:\r
739 {\r
740 // uint8_t sircs_additional_command_len;\r
741 uint8_t sircs_additional_address_len;\r
742\r
743 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
744\r
745 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
746 {\r
747 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
748 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
749 }\r
750 else\r
751 {\r
752 // sircs_additional_command_len = sircs_additional_bitlen;\r
753 sircs_additional_address_len = 0;\r
754 }\r
755\r
756 command = bitsrevervse (irmp_data_p->command, 15);\r
757\r
758 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
759 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
760\r
761 if (sircs_additional_address_len > 0)\r
762 {\r
763 address = bitsrevervse (irmp_data_p->address, 5);\r
764 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
765 irsnd_buffer[2] = (address & 0x000F) << 4;\r
766 }\r
767 irsnd_busy = TRUE;\r
768 break;\r
769 }\r
4225a882 770#endif\r
771#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 772 case IRMP_APPLE_PROTOCOL:\r
773 {\r
774 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
775 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
776\r
777 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
778 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
779\r
780 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
781\r
782 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
783 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
784 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
785 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
786 irsnd_busy = TRUE;\r
787 break;\r
788 }\r
789 case IRMP_NEC_PROTOCOL:\r
790 {\r
791 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
792 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
793\r
794 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
795 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
796 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
797 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
798 irsnd_busy = TRUE;\r
799 break;\r
800 }\r
7644ac04 801#endif\r
802#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 803 case IRMP_NEC16_PROTOCOL:\r
804 {\r
805 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
806 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 807\r
e664a9f3 808 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
809 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
810 irsnd_busy = TRUE;\r
811 break;\r
812 }\r
7644ac04 813#endif\r
814#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 815 case IRMP_NEC42_PROTOCOL:\r
816 {\r
817 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
818 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
819\r
820 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
821 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
822 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
823 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
824 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
825 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
826 irsnd_busy = TRUE;\r
827 break;\r
828 }\r
4225a882 829#endif\r
830#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 831 case IRMP_SAMSUNG_PROTOCOL:\r
832 {\r
833 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
834 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
835\r
836 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
837 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
838 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
839 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
840 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
841 irsnd_busy = TRUE;\r
842 break;\r
843 }\r
844 case IRMP_SAMSUNG32_PROTOCOL:\r
845 {\r
846 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
847 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
848\r
849 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
850 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
851 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
852 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
853 irsnd_busy = TRUE;\r
854 break;\r
855 }\r
4225a882 856#endif\r
857#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 858 case IRMP_MATSUSHITA_PROTOCOL:\r
859 {\r
860 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
861 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
862\r
863 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
864 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
865 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
866 irsnd_busy = TRUE;\r
867 break;\r
868 }\r
4225a882 869#endif\r
770a1a9d 870#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 871 case IRMP_KASEIKYO_PROTOCOL:\r
872 {\r
873 uint8_t xor_value;\r
874 uint16_t genre2;\r
770a1a9d 875\r
e664a9f3 876 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
877 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
878 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 879\r
e664a9f3 880 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 881\r
e664a9f3 882 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
883 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
884 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
885 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
886 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
770a1a9d 887\r
e664a9f3 888 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 889\r
e664a9f3 890 irsnd_buffer[5] = xor_value;\r
891 irsnd_busy = TRUE;\r
892 break;\r
893 }\r
770a1a9d 894#endif\r
4225a882 895#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 896 case IRMP_RECS80_PROTOCOL:\r
897 {\r
898 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
4225a882 899\r
e664a9f3 900 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
901 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
902 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
903 irsnd_busy = TRUE;\r
904 break;\r
905 }\r
4225a882 906#endif\r
907#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 908 case IRMP_RECS80EXT_PROTOCOL:\r
909 {\r
910 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
4225a882 911\r
e664a9f3 912 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
913 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
914 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
915 irsnd_busy = TRUE;\r
916 break;\r
917 }\r
4225a882 918#endif\r
919#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 920 case IRMP_RC5_PROTOCOL:\r
921 {\r
922 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
4225a882 923\r
e664a9f3 924 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
925 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
926 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
927 irsnd_busy = TRUE;\r
928 break;\r
929 }\r
4225a882 930#endif\r
9547ee89 931#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 932 case IRMP_RC6_PROTOCOL:\r
933 {\r
934 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
9547ee89 935\r
e664a9f3 936 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
937 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
938 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
939 irsnd_busy = TRUE;\r
940 break;\r
941 }\r
9547ee89 942#endif\r
943#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 944 case IRMP_RC6A_PROTOCOL:\r
945 {\r
946 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
947\r
948 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
949 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
950 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
951 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
952 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
953 irsnd_busy = TRUE;\r
954 break;\r
955 }\r
9547ee89 956#endif\r
4225a882 957#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 958 case IRMP_DENON_PROTOCOL:\r
959 {\r
960 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
961 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
962 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
963 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
964 irsnd_busy = TRUE;\r
965 break;\r
966 }\r
4225a882 967#endif\r
beda975f 968#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 969 case IRMP_THOMSON_PROTOCOL:\r
970 {\r
971 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
beda975f 972\r
e664a9f3 973 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
974 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
975 irsnd_busy = TRUE;\r
976 break;\r
977 }\r
beda975f 978#endif\r
4225a882 979#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 980 case IRMP_NUBERT_PROTOCOL:\r
981 {\r
982 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
983 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
984 irsnd_busy = TRUE;\r
985 break;\r
986 }\r
5481e9cd 987#endif\r
988#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 989 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
990 {\r
991 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
992 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
993 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
994 irsnd_busy = TRUE;\r
995 break;\r
996 }\r
4225a882 997#endif\r
5b437ff6 998#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 999 case IRMP_GRUNDIG_PROTOCOL:\r
1000 {\r
1001 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r
5b437ff6 1002\r
e664a9f3 1003 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
1004 irsnd_buffer[1] = 0xC0; // 11\r
1005 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
1006 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
d155e9ab 1007\r
e664a9f3 1008 irsnd_busy = TRUE;\r
1009 break;\r
1010 }\r
d155e9ab 1011#endif\r
a48187fa 1012#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1013 case IRMP_IR60_PROTOCOL:\r
1014 {\r
1015 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 1016#if 0\r
e664a9f3 1017 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
1018 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 1019#else\r
e664a9f3 1020 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
1021 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
08f2dd9d 1022#endif\r
a48187fa 1023\r
e664a9f3 1024 irsnd_busy = TRUE;\r
1025 break;\r
1026 }\r
a48187fa 1027#endif\r
d155e9ab 1028#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1029 case IRMP_NOKIA_PROTOCOL:\r
1030 {\r
1031 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1032 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1033\r
1034 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1035 irsnd_buffer[1] = 0xFF; // 11111111\r
1036 irsnd_buffer[2] = 0x80; // 1\r
1037 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1038 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1039 irsnd_buffer[5] = (address << 7); // A\r
1040\r
1041 irsnd_busy = TRUE;\r
1042 break;\r
1043 }\r
5b437ff6 1044#endif\r
a7054daf 1045#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1046 case IRMP_SIEMENS_PROTOCOL:\r
1047 {\r
cb93f9e9 1048 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA\r
1049 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC\r
1050 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
9405f84a 1051\r
e664a9f3 1052 irsnd_busy = TRUE;\r
1053 break;\r
1054 }\r
b5ea7869 1055#endif\r
cb93f9e9 1056#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1057 case IRMP_RUWIDO_PROTOCOL:\r
1058 {\r
1059 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA\r
1060 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC\r
1061 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c\r
1062 irsnd_busy = TRUE;\r
1063 break;\r
1064 }\r
1065#endif\r
48664931 1066#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1067 case IRMP_FDC_PROTOCOL:\r
1068 {\r
1069 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1070 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
1071\r
1072 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1073 irsnd_buffer[1] = 0; // 00000000\r
1074 irsnd_buffer[2] = 0; // 0000RRRR\r
1075 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1076 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1077 irsnd_busy = TRUE;\r
1078 break;\r
1079 }\r
c7c9a4a1 1080#endif\r
1081#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1082 case IRMP_RCCAR_PROTOCOL:\r
1083 {\r
1084 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1085 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1086\r
1087 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1088 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1089 \r
1090 irsnd_busy = TRUE;\r
1091 break;\r
1092 }\r
a7054daf 1093#endif\r
c7a47e89 1094#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1095 case IRMP_JVC_PROTOCOL:\r
1096 {\r
1097 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1098 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
c7a47e89 1099\r
e664a9f3 1100 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1101 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
c7a47e89 1102\r
e664a9f3 1103 irsnd_busy = TRUE;\r
1104 break;\r
1105 }\r
c7a47e89 1106#endif\r
9405f84a 1107#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1108 case IRMP_NIKON_PROTOCOL:\r
1109 {\r
1110 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1111 irsnd_busy = TRUE;\r
1112 break;\r
1113 }\r
f50e01e7 1114#endif\r
1115#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1116 case IRMP_LEGO_PROTOCOL:\r
1117 {\r
1118 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
fa09ce10 1119\r
e664a9f3 1120 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1121 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1122 irsnd_busy = TRUE;\r
1123 break;\r
1124 }\r
fa09ce10 1125#endif\r
1126#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1127 case IRMP_A1TVBOX_PROTOCOL:\r
1128 {\r
1129 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r
1130 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r
1131 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r
1132\r
1133 irsnd_busy = TRUE;\r
1134 break;\r
1135 }\r
1136#endif\r
c9b6916a 1137#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1138 case IRMP_ROOMBA_PROTOCOL:\r
1139 {\r
1140\r
1141 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r
1142 irsnd_busy = TRUE;\r
1143 break;\r
1144 }\r
1145#endif\r
e664a9f3 1146 default:\r
1147 {\r
1148 break;\r
1149 }\r
4225a882 1150 }\r
1151\r
1152 return irsnd_busy;\r
1153}\r
1154\r
beda975f 1155void\r
1156irsnd_stop (void)\r
1157{\r
acf7fb44 1158 irsnd_repeat = 0;\r
beda975f 1159}\r
1160\r
4225a882 1161/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1162 * ISR routine\r
1163 * @details ISR routine, called 10000 times per second\r
1164 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1165 */\r
1166uint8_t\r
1167irsnd_ISR (void)\r
1168{\r
a48187fa 1169 static uint8_t send_trailer = FALSE;\r
1170 static uint8_t current_bit = 0xFF;\r
1171 static uint8_t pulse_counter = 0;\r
1172 static IRSND_PAUSE_LEN pause_counter = 0;\r
1173 static uint8_t startbit_pulse_len = 0;\r
1174 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1175 static uint8_t pulse_1_len = 0;\r
1176 static uint8_t pause_1_len = 0;\r
1177 static uint8_t pulse_0_len = 0;\r
1178 static uint8_t pause_0_len = 0;\r
1179 static uint8_t has_stop_bit = 0;\r
1180 static uint8_t new_frame = TRUE;\r
1181 static uint8_t complete_data_len = 0;\r
1182 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1183 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1184 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1185 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1186 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1187 static uint8_t repeat_counter = 0; // repeat counter\r
1188 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1189 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1190#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1191 static uint8_t last_bit_value;\r
5481e9cd 1192#endif\r
a48187fa 1193 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1194 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1195\r
1196 if (irsnd_busy)\r
1197 {\r
e664a9f3 1198 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1199 {\r
1200 if (auto_repetition_counter > 0)\r
1201 {\r
1202 auto_repetition_pause_counter++;\r
4225a882 1203\r
08f2dd9d 1204#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1205 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1206 {\r
1207 repeat_frame_pause_len--;\r
1208 }\r
08f2dd9d 1209#endif\r
1210\r
e664a9f3 1211 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
1212 {\r
1213 auto_repetition_pause_counter = 0;\r
4225a882 1214\r
08f2dd9d 1215#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1216 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
1217 {\r
1218 current_bit = 16;\r
1219 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1220 }\r
1221 else\r
08f2dd9d 1222#endif\r
1223#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1224 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
1225 {\r
1226 current_bit = 15;\r
1227 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1228 }\r
1229 else\r
08f2dd9d 1230#endif\r
1231#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1232 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1233 {\r
1234 current_bit = 7;\r
1235 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1236 }\r
1237 else\r
08f2dd9d 1238#endif\r
1239#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1240 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
1241 {\r
1242 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
1243 {\r
1244 current_bit = 23;\r
1245 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1246 }\r
1247 else // nokia stop frame\r
1248 {\r
1249 current_bit = 0xFF;\r
1250 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1251 }\r
1252 }\r
1253 else\r
1254#endif\r
1255 {\r
1256 ;\r
1257 }\r
1258 }\r
1259 else\r
1260 {\r
cb93f9e9 1261#ifdef ANALYZE\r
e664a9f3 1262 if (irsnd_is_on)\r
1263 {\r
1264 putchar ('0');\r
1265 }\r
1266 else\r
1267 {\r
1268 putchar ('1');\r
1269 }\r
1270#endif\r
1271 return irsnd_busy;\r
1272 }\r
1273 }\r
beda975f 1274#if 0\r
e664a9f3 1275 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
cb93f9e9 1276#else\r
1277 // fm 2013-05-06: SIRCs has 2 autorepetitions and N normal repetitions.\r
1278 // if auto_repetition_counter == 0, we have to repeat the frame according to flags\r
1279 if (auto_repetition_counter == 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1280#endif\r
e664a9f3 1281 {\r
1282 packet_repeat_pause_counter++;\r
cb93f9e9 1283// fprintf (stdout, "!%d %d!\n", packet_repeat_pause_counter, repeat_frame_pause_len);\r
1284// fflush (stdout);\r
1285#ifdef ANALYZE\r
e664a9f3 1286 if (irsnd_is_on)\r
1287 {\r
1288 putchar ('0');\r
1289 }\r
1290 else\r
1291 {\r
1292 putchar ('1');\r
1293 }\r
1294#endif\r
1295 return irsnd_busy;\r
1296 }\r
1297 else\r
1298 {\r
1299 if (send_trailer)\r
1300 {\r
1301 irsnd_busy = FALSE;\r
1302 send_trailer = FALSE;\r
1303 return irsnd_busy;\r
1304 }\r
1305 \r
1306 n_repeat_frames = irsnd_repeat;\r
1307\r
1308 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1309 {\r
1310 n_repeat_frames = 255;\r
1311 }\r
1312\r
1313 packet_repeat_pause_counter = 0;\r
1314 pulse_counter = 0;\r
1315 pause_counter = 0;\r
1316\r
1317 switch (irsnd_protocol)\r
1318 {\r
4225a882 1319#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1320 case IRMP_SIRCS_PROTOCOL:\r
1321 {\r
1322 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
1323 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
1324 pulse_1_len = SIRCS_1_PULSE_LEN;\r
1325 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
1326 pulse_0_len = SIRCS_0_PULSE_LEN;\r
1327 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
1328 has_stop_bit = SIRCS_STOP_BIT;\r
1329 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
1330 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1331 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1332 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
1333 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1334 break;\r
1335 }\r
4225a882 1336#endif\r
1337#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1338 case IRMP_NEC_PROTOCOL:\r
1339 {\r
1340 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1341\r
1342 if (repeat_counter > 0)\r
1343 {\r
1344 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
1345 complete_data_len = 0;\r
1346 }\r
1347 else\r
1348 {\r
1349 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1350 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1351 }\r
1352\r
1353 pulse_1_len = NEC_PULSE_LEN;\r
1354 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1355 pulse_0_len = NEC_PULSE_LEN;\r
1356 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1357 has_stop_bit = NEC_STOP_BIT;\r
1358 n_auto_repetitions = 1; // 1 frame\r
1359 auto_repetition_pause_len = 0;\r
1360 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1361 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1362 break;\r
1363 }\r
4225a882 1364#endif\r
7644ac04 1365#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1366 case IRMP_NEC16_PROTOCOL:\r
1367 {\r
1368 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1369 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1370 pulse_1_len = NEC_PULSE_LEN;\r
1371 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1372 pulse_0_len = NEC_PULSE_LEN;\r
1373 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1374 has_stop_bit = NEC_STOP_BIT;\r
1375 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1376 n_auto_repetitions = 1; // 1 frame\r
1377 auto_repetition_pause_len = 0;\r
1378 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1379 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1380 break;\r
1381 }\r
7644ac04 1382#endif\r
1383#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1384 case IRMP_NEC42_PROTOCOL:\r
1385 {\r
1386 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1387 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1388 pulse_1_len = NEC_PULSE_LEN;\r
1389 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1390 pulse_0_len = NEC_PULSE_LEN;\r
1391 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1392 has_stop_bit = NEC_STOP_BIT;\r
1393 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1394 n_auto_repetitions = 1; // 1 frame\r
1395 auto_repetition_pause_len = 0;\r
1396 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1397 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1398 break;\r
1399 }\r
7644ac04 1400#endif\r
4225a882 1401#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1402 case IRMP_SAMSUNG_PROTOCOL:\r
1403 {\r
1404 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1405 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1406 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1407 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1408 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1409 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1410 has_stop_bit = SAMSUNG_STOP_BIT;\r
1411 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1412 n_auto_repetitions = 1; // 1 frame\r
1413 auto_repetition_pause_len = 0;\r
1414 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
1415 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1416 break;\r
1417 }\r
1418\r
1419 case IRMP_SAMSUNG32_PROTOCOL:\r
1420 {\r
1421 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1422 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1423 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1424 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1425 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1426 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1427 has_stop_bit = SAMSUNG_STOP_BIT;\r
1428 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
1429 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r
1430 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1431 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
1432 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1433 break;\r
1434 }\r
4225a882 1435#endif\r
1436#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1437 case IRMP_MATSUSHITA_PROTOCOL:\r
1438 {\r
1439 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1440 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1441 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1442 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1443 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1444 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1445 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1446 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1447 n_auto_repetitions = 1; // 1 frame\r
1448 auto_repetition_pause_len = 0;\r
1449 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1450 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1451 break;\r
1452 }\r
4225a882 1453#endif\r
770a1a9d 1454#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1455 case IRMP_KASEIKYO_PROTOCOL:\r
1456 {\r
1457 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
1458 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
1459 pulse_1_len = KASEIKYO_PULSE_LEN;\r
1460 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
1461 pulse_0_len = KASEIKYO_PULSE_LEN;\r
1462 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
1463 has_stop_bit = KASEIKYO_STOP_BIT;\r
1464 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1465 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1466 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1467 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1468 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1469 break;\r
1470 }\r
770a1a9d 1471#endif\r
4225a882 1472#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1473 case IRMP_RECS80_PROTOCOL:\r
1474 {\r
1475 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
1476 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
1477 pulse_1_len = RECS80_PULSE_LEN;\r
1478 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
1479 pulse_0_len = RECS80_PULSE_LEN;\r
1480 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
1481 has_stop_bit = RECS80_STOP_BIT;\r
1482 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1483 n_auto_repetitions = 1; // 1 frame\r
1484 auto_repetition_pause_len = 0;\r
1485 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
1486 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1487 break;\r
1488 }\r
4225a882 1489#endif\r
1490#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1491 case IRMP_RECS80EXT_PROTOCOL:\r
1492 {\r
1493 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
1494 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
1495 pulse_1_len = RECS80EXT_PULSE_LEN;\r
1496 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
1497 pulse_0_len = RECS80EXT_PULSE_LEN;\r
1498 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
1499 has_stop_bit = RECS80EXT_STOP_BIT;\r
1500 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1501 n_auto_repetitions = 1; // 1 frame\r
1502 auto_repetition_pause_len = 0;\r
1503 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
1504 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1505 break;\r
1506 }\r
4225a882 1507#endif\r
1508#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1509 case IRMP_RC5_PROTOCOL:\r
1510 {\r
1511 startbit_pulse_len = RC5_BIT_LEN;\r
1512 startbit_pause_len = RC5_BIT_LEN;\r
1513 pulse_len = RC5_BIT_LEN;\r
1514 pause_len = RC5_BIT_LEN;\r
1515 has_stop_bit = RC5_STOP_BIT;\r
1516 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1517 n_auto_repetitions = 1; // 1 frame\r
1518 auto_repetition_pause_len = 0;\r
1519 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
1520 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1521 break;\r
1522 }\r
4225a882 1523#endif\r
9547ee89 1524#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1525 case IRMP_RC6_PROTOCOL:\r
1526 {\r
1527 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1528 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1529 pulse_len = RC6_BIT_LEN;\r
1530 pause_len = RC6_BIT_LEN;\r
1531 has_stop_bit = RC6_STOP_BIT;\r
1532 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1533 n_auto_repetitions = 1; // 1 frame\r
1534 auto_repetition_pause_len = 0;\r
1535 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1536 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1537 break;\r
1538 }\r
9547ee89 1539#endif\r
1540#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1541 case IRMP_RC6A_PROTOCOL:\r
1542 {\r
1543 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1544 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1545 pulse_len = RC6_BIT_LEN;\r
1546 pause_len = RC6_BIT_LEN;\r
1547 has_stop_bit = RC6_STOP_BIT;\r
1548 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1549 n_auto_repetitions = 1; // 1 frame\r
1550 auto_repetition_pause_len = 0;\r
1551 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1552 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1553 break;\r
1554 }\r
9547ee89 1555#endif\r
4225a882 1556#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1557 case IRMP_DENON_PROTOCOL:\r
1558 {\r
1559 startbit_pulse_len = 0x00;\r
1560 startbit_pause_len = 0x00;\r
1561 pulse_1_len = DENON_PULSE_LEN;\r
1562 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
1563 pulse_0_len = DENON_PULSE_LEN;\r
1564 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
1565 has_stop_bit = DENON_STOP_BIT;\r
1566 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1567 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1568 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1569 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1570 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
1571 break;\r
1572 }\r
4225a882 1573#endif\r
beda975f 1574#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1575 case IRMP_THOMSON_PROTOCOL:\r
1576 {\r
1577 startbit_pulse_len = 0x00;\r
1578 startbit_pause_len = 0x00;\r
1579 pulse_1_len = THOMSON_PULSE_LEN;\r
1580 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1581 pulse_0_len = THOMSON_PULSE_LEN;\r
1582 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1583 has_stop_bit = THOMSON_STOP_BIT;\r
1584 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1585 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1586 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1587 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1588 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1589 break;\r
1590 }\r
beda975f 1591#endif\r
4225a882 1592#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1593 case IRMP_NUBERT_PROTOCOL:\r
1594 {\r
1595 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
1596 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
1597 pulse_1_len = NUBERT_1_PULSE_LEN;\r
1598 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
1599 pulse_0_len = NUBERT_0_PULSE_LEN;\r
1600 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
1601 has_stop_bit = NUBERT_STOP_BIT;\r
1602 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1603 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1604 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1605 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
1606 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1607 break;\r
1608 }\r
5481e9cd 1609#endif\r
1610#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1611 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1612 {\r
1613 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
1614 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
1615 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
1616 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
1617 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
1618 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
1619 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1620 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1621 n_auto_repetitions = 1; // 1 frame\r
1622 auto_repetition_pause_len = 0;\r
1623 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1624 last_bit_value = 0;\r
1625 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1626 break;\r
1627 }\r
5b437ff6 1628#endif\r
1629#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1630 case IRMP_GRUNDIG_PROTOCOL:\r
1631 {\r
1632 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1633 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1634 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1635 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1636 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1637 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1638 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1639 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1640 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1641 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1642 break;\r
1643 }\r
a48187fa 1644#endif\r
1645#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1646 case IRMP_IR60_PROTOCOL:\r
1647 {\r
1648 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1649 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1650 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1651 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1652 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1653 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1654 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1655 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1656 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1657 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
1658 break;\r
1659 }\r
d155e9ab 1660#endif\r
1661#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1662 case IRMP_NOKIA_PROTOCOL:\r
1663 {\r
1664 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1665 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1666 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1667 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1668 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1669 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1670 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1671 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1672 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1673 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1674 break;\r
1675 }\r
a7054daf 1676#endif\r
1677#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1678 case IRMP_SIEMENS_PROTOCOL:\r
1679 {\r
1680 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1681 startbit_pause_len = SIEMENS_BIT_LEN;\r
1682 pulse_len = SIEMENS_BIT_LEN;\r
1683 pause_len = SIEMENS_BIT_LEN;\r
1684 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
cb93f9e9 1685 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;\r
e664a9f3 1686 n_auto_repetitions = 1; // 1 frame\r
1687 auto_repetition_pause_len = 0;\r
1688 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1689 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1690 break;\r
1691 }\r
b5ea7869 1692#endif\r
cb93f9e9 1693#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1694 case IRMP_RUWIDO_PROTOCOL:\r
1695 {\r
1696 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;\r
1697 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;\r
1698 pulse_len = RUWIDO_BIT_PULSE_LEN;\r
1699 pause_len = RUWIDO_BIT_PAUSE_LEN;\r
1700 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
1701 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;\r
1702 n_auto_repetitions = 1; // 1 frame\r
1703 auto_repetition_pause_len = 0;\r
1704 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;\r
1705 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1706 break;\r
1707 }\r
1708#endif\r
48664931 1709#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1710 case IRMP_FDC_PROTOCOL:\r
1711 {\r
1712 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
1713 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
1714 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
1715 pulse_1_len = FDC_PULSE_LEN;\r
1716 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
1717 pulse_0_len = FDC_PULSE_LEN;\r
1718 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
1719 has_stop_bit = FDC_STOP_BIT;\r
1720 n_auto_repetitions = 1; // 1 frame\r
1721 auto_repetition_pause_len = 0;\r
1722 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
1723 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1724 break;\r
1725 }\r
c7c9a4a1 1726#endif\r
1727#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1728 case IRMP_RCCAR_PROTOCOL:\r
1729 {\r
1730 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
1731 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
1732 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
1733 pulse_1_len = RCCAR_PULSE_LEN;\r
1734 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
1735 pulse_0_len = RCCAR_PULSE_LEN;\r
1736 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
1737 has_stop_bit = RCCAR_STOP_BIT;\r
1738 n_auto_repetitions = 1; // 1 frame\r
1739 auto_repetition_pause_len = 0;\r
1740 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
1741 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1742 break;\r
1743 }\r
4225a882 1744#endif\r
c7a47e89 1745#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1746 case IRMP_JVC_PROTOCOL:\r
1747 {\r
1748 if (repeat_counter != 0) // skip start bit if repetition frame\r
1749 {\r
1750 current_bit = 0;\r
1751 }\r
1752\r
1753 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
1754 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
1755 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
1756 pulse_1_len = JVC_PULSE_LEN;\r
1757 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
1758 pulse_0_len = JVC_PULSE_LEN;\r
1759 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
1760 has_stop_bit = JVC_STOP_BIT;\r
1761 n_auto_repetitions = 1; // 1 frame\r
1762 auto_repetition_pause_len = 0;\r
1763 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
1764 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1765 break;\r
1766 }\r
c7a47e89 1767#endif\r
9405f84a 1768#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1769 case IRMP_NIKON_PROTOCOL:\r
1770 {\r
1771 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
1772 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
1773 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
1774 pulse_1_len = NIKON_PULSE_LEN;\r
1775 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
1776 pulse_0_len = NIKON_PULSE_LEN;\r
1777 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
1778 has_stop_bit = NIKON_STOP_BIT;\r
1779 n_auto_repetitions = 1; // 1 frame\r
1780 auto_repetition_pause_len = 0;\r
1781 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
1782 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1783 break;\r
1784 }\r
9405f84a 1785#endif\r
f50e01e7 1786#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1787 case IRMP_LEGO_PROTOCOL:\r
1788 {\r
1789 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
1790 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
1791 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
1792 pulse_1_len = LEGO_PULSE_LEN;\r
1793 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
1794 pulse_0_len = LEGO_PULSE_LEN;\r
1795 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
1796 has_stop_bit = LEGO_STOP_BIT;\r
1797 n_auto_repetitions = 1; // 1 frame\r
1798 auto_repetition_pause_len = 0;\r
1799 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
1800 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1801 break;\r
1802 }\r
fa09ce10 1803#endif\r
1804#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1805 case IRMP_A1TVBOX_PROTOCOL:\r
1806 {\r
1807 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r
1808 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r
1809 pulse_len = A1TVBOX_BIT_PULSE_LEN;\r
1810 pause_len = A1TVBOX_BIT_PAUSE_LEN;\r
1811 has_stop_bit = A1TVBOX_STOP_BIT;\r
1812 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r
1813 n_auto_repetitions = 1; // 1 frame\r
1814 auto_repetition_pause_len = 0;\r
1815 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r
1816 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1817 break;\r
1818 }\r
c9b6916a 1819#endif\r
1820#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1821 case IRMP_ROOMBA_PROTOCOL:\r
1822 {\r
1823 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r
1824 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r
1825 pulse_1_len = ROOMBA_1_PULSE_LEN;\r
1826 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r
1827 pulse_0_len = ROOMBA_0_PULSE_LEN;\r
1828 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r
1829 has_stop_bit = ROOMBA_STOP_BIT;\r
1830 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r
cb93f9e9 1831 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames\r
1832 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
c9b6916a 1833 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
1834 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1835 break;\r
1836 }\r
e664a9f3 1837#endif\r
1838 default:\r
1839 {\r
1840 irsnd_busy = FALSE;\r
1841 break;\r
1842 }\r
1843 }\r
1844 }\r
1845 }\r
1846\r
1847 if (irsnd_busy)\r
1848 {\r
1849 new_frame = FALSE;\r
1850\r
1851 switch (irsnd_protocol)\r
1852 {\r
4225a882 1853#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1854 case IRMP_SIRCS_PROTOCOL:\r
4225a882 1855#endif\r
1856#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1857 case IRMP_NEC_PROTOCOL:\r
4225a882 1858#endif\r
7644ac04 1859#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1860 case IRMP_NEC16_PROTOCOL:\r
7644ac04 1861#endif\r
1862#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1863 case IRMP_NEC42_PROTOCOL:\r
7644ac04 1864#endif\r
4225a882 1865#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1866 case IRMP_SAMSUNG_PROTOCOL:\r
1867 case IRMP_SAMSUNG32_PROTOCOL:\r
4225a882 1868#endif\r
1869#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1870 case IRMP_MATSUSHITA_PROTOCOL:\r
4225a882 1871#endif\r
770a1a9d 1872#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1873 case IRMP_KASEIKYO_PROTOCOL:\r
770a1a9d 1874#endif\r
4225a882 1875#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1876 case IRMP_RECS80_PROTOCOL:\r
4225a882 1877#endif\r
1878#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1879 case IRMP_RECS80EXT_PROTOCOL:\r
4225a882 1880#endif\r
1881#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1882 case IRMP_DENON_PROTOCOL:\r
4225a882 1883#endif\r
1884#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1885 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 1886#endif\r
1887#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1888 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 1889#endif\r
c7c9a4a1 1890#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1891 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1892#endif\r
c7c9a4a1 1893#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1894 case IRMP_RCCAR_PROTOCOL:\r
c7c9a4a1 1895#endif\r
c7a47e89 1896#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1897 case IRMP_JVC_PROTOCOL:\r
c7a47e89 1898#endif\r
9405f84a 1899#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1900 case IRMP_NIKON_PROTOCOL:\r
9405f84a 1901#endif\r
f50e01e7 1902#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1903 case IRMP_LEGO_PROTOCOL:\r
f50e01e7 1904#endif\r
cb93f9e9 1905#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
1906 case IRMP_THOMSON_PROTOCOL:\r
1907#endif\r
c9b6916a 1908#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1909 case IRMP_ROOMBA_PROTOCOL:\r
1910#endif\r
a7054daf 1911\r
7644ac04 1912#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
1913 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 1914 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
c7a47e89 1915 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
cb93f9e9 1916 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \\r
1917 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
e664a9f3 1918 {\r
08f2dd9d 1919#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1920 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
1921 {\r
1922 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
1923 {\r
1924 auto_repetition_pause_len--;\r
1925 }\r
1926\r
1927 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1928 {\r
1929 repeat_frame_pause_len--;\r
1930 }\r
1931 }\r
1932#endif\r
1933\r
1934 if (pulse_counter == 0)\r
1935 {\r
1936 if (current_bit == 0xFF) // send start bit\r
1937 {\r
1938 pulse_len = startbit_pulse_len;\r
1939 pause_len = startbit_pause_len;\r
1940 }\r
1941 else if (current_bit < complete_data_len) // send n'th bit\r
1942 {\r
5481e9cd 1943#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1944 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
1945 {\r
1946 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
1947 {\r
1948 pulse_len = SAMSUNG_PULSE_LEN;\r
1949 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1950 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
1951 }\r
1952 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
1953 {\r
1954 pulse_len = SAMSUNG_PULSE_LEN;\r
1955 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1956 }\r
1957 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
1958 {\r
1959 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1960\r
1961 pulse_len = SAMSUNG_PULSE_LEN;\r
1962 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1963 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
1964 }\r
1965 }\r
1966 else\r
5481e9cd 1967#endif\r
1968\r
7644ac04 1969#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1970 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
1971 {\r
1972 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
1973 {\r
1974 pulse_len = NEC_PULSE_LEN;\r
1975 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1976 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1977 }\r
1978 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
1979 {\r
1980 pulse_len = NEC_PULSE_LEN;\r
1981 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1982 }\r
1983 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
1984 {\r
1985 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1986\r
1987 pulse_len = NEC_PULSE_LEN;\r
1988 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1989 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1990 }\r
1991 }\r
1992 else\r
7644ac04 1993#endif\r
1994\r
5481e9cd 1995#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1996 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
1997 {\r
1998 if (current_bit == 0) // send 2nd start bit\r
1999 {\r
2000 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2001 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2002 }\r
2003 else if (current_bit == 1) // send 3rd start bit\r
2004 {\r
2005 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
2006 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
2007 }\r
2008 else if (current_bit == 2) // send 4th start bit\r
2009 {\r
2010 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2011 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2012 }\r
2013 else if (current_bit == 19) // send trailer bit\r
2014 {\r
2015 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2016 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
2017 }\r
2018 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
2019 {\r
2020 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r
2021 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2022\r
2023 if (cur_bit_value == last_bit_value)\r
2024 {\r
2025 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
2026 }\r
2027 else\r
2028 {\r
2029 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
2030 last_bit_value = cur_bit_value;\r
2031 }\r
2032 }\r
2033 }\r
2034 else\r
2035#endif\r
2036 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r
2037 {\r
2038 pulse_len = pulse_1_len;\r
2039 pause_len = pause_1_len;\r
2040 }\r
2041 else\r
2042 {\r
2043 pulse_len = pulse_0_len;\r
2044 pause_len = pause_0_len;\r
2045 }\r
2046 }\r
2047 else if (has_stop_bit) // send stop bit\r
2048 {\r
2049 pulse_len = pulse_0_len;\r
2050\r
2051 if (auto_repetition_counter < n_auto_repetitions)\r
2052 {\r
2053 pause_len = pause_0_len;\r
2054 }\r
2055 else\r
2056 {\r
2057 pause_len = 255; // last frame: pause of 255\r
2058 }\r
2059 }\r
2060 }\r
2061\r
2062 if (pulse_counter < pulse_len)\r
2063 {\r
2064 if (pulse_counter == 0)\r
2065 {\r
2066 irsnd_on ();\r
2067 }\r
2068 pulse_counter++;\r
2069 }\r
2070 else if (pause_counter < pause_len)\r
2071 {\r
2072 if (pause_counter == 0)\r
2073 {\r
2074 irsnd_off ();\r
2075 }\r
2076 pause_counter++;\r
2077 }\r
2078 else\r
2079 {\r
2080 current_bit++;\r
2081\r
2082 if (current_bit >= complete_data_len + has_stop_bit)\r
2083 {\r
2084 current_bit = 0xFF;\r
2085 auto_repetition_counter++;\r
2086\r
2087 if (auto_repetition_counter == n_auto_repetitions)\r
2088 {\r
2089 irsnd_busy = FALSE;\r
2090 auto_repetition_counter = 0;\r
2091 }\r
2092 new_frame = TRUE;\r
2093 }\r
2094\r
2095 pulse_counter = 0;\r
2096 pause_counter = 0;\r
2097 }\r
2098 break;\r
2099 }\r
a7054daf 2100#endif\r
2101\r
4225a882 2102#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 2103 case IRMP_RC5_PROTOCOL:\r
a7054daf 2104#endif\r
9547ee89 2105#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 2106 case IRMP_RC6_PROTOCOL:\r
9547ee89 2107#endif\r
2108#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2109 case IRMP_RC6A_PROTOCOL:\r
9547ee89 2110#endif\r
a7054daf 2111#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2112 case IRMP_SIEMENS_PROTOCOL:\r
a7054daf 2113#endif\r
cb93f9e9 2114#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
2115 case IRMP_RUWIDO_PROTOCOL:\r
2116#endif\r
a7054daf 2117#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2118 case IRMP_GRUNDIG_PROTOCOL:\r
a7054daf 2119#endif\r
a48187fa 2120#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2121 case IRMP_IR60_PROTOCOL:\r
a48187fa 2122#endif\r
a7054daf 2123#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2124 case IRMP_NOKIA_PROTOCOL:\r
fa09ce10 2125#endif\r
2126#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2127 case IRMP_A1TVBOX_PROTOCOL:\r
a7054daf 2128#endif\r
4225a882 2129\r
cb93f9e9 2130#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \\r
2131 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \\r
2132 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \\r
2133 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \\r
2134 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
2135 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \\r
2136 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \\r
2137 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \\r
2138 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2139 {\r
2140 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
2141 {\r
2142 current_bit++;\r
4225a882 2143\r
e664a9f3 2144 if (current_bit >= complete_data_len)\r
2145 {\r
2146 current_bit = 0xFF;\r
a7054daf 2147\r
a48187fa 2148#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2149 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2150 {\r
2151 auto_repetition_counter++;\r
2152\r
2153 if (repeat_counter > 0)\r
2154 { // set 117 msec pause time\r
2155 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
2156 }\r
2157\r
2158 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2159 {\r
2160 n_auto_repetitions++; // increment number of auto repetitions\r
2161 repeat_counter++;\r
2162 }\r
2163 else if (auto_repetition_counter == n_auto_repetitions)\r
2164 {\r
2165 irsnd_busy = FALSE;\r
2166 auto_repetition_counter = 0;\r
2167 }\r
2168 }\r
2169 else\r
2170#endif\r
2171 {\r
2172 irsnd_busy = FALSE;\r
2173 }\r
2174\r
2175 new_frame = TRUE;\r
2176 irsnd_off ();\r
2177 }\r
2178\r
2179 pulse_counter = 0;\r
2180 pause_counter = 0;\r
2181 }\r
2182\r
2183 if (! new_frame)\r
2184 {\r
2185 uint8_t first_pulse;\r
5b437ff6 2186\r
a48187fa 2187#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2188 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2189 {\r
2190 if (current_bit == 0xFF || // start bit of start-frame\r
2191 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
2192 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
2193 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
2194 {\r
2195 pulse_len = startbit_pulse_len;\r
2196 pause_len = startbit_pause_len;\r
2197 first_pulse = TRUE;\r
2198 }\r
2199 else // send n'th bit\r
2200 {\r
2201 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2202 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2203 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2204 }\r
2205 }\r
2206 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
cb93f9e9 2207 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)\r
e664a9f3 2208#endif\r
2209 {\r
2210 if (current_bit == 0xFF) // 1 start bit\r
2211 {\r
9547ee89 2212#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2213 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2214 {\r
2215 pulse_len = startbit_pulse_len;\r
2216 pause_len = startbit_pause_len;\r
2217 }\r
2218 else\r
fa09ce10 2219#endif\r
2220#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2221 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r
2222 {\r
2223 current_bit = 0;\r
2224 }\r
2225 else\r
2226#endif\r
2227 {\r
2228 ;\r
2229 }\r
2230\r
2231 first_pulse = TRUE;\r
2232 }\r
2233 else // send n'th bit\r
2234 {\r
9547ee89 2235#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2236 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2237 {\r
2238 pulse_len = RC6_BIT_LEN;\r
2239 pause_len = RC6_BIT_LEN;\r
2240\r
2241 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2242 {\r
2243 if (current_bit == 4) // toggle bit (double len)\r
2244 {\r
2245 pulse_len = 2 * RC6_BIT_LEN;\r
2246 pause_len = 2 * RC6_BIT_LEN;\r
2247 }\r
2248 }\r
2249 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2250 {\r
2251 if (current_bit == 4) // toggle bit (double len)\r
2252 {\r
2253 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2254 pause_len = 2 * RC6_BIT_LEN;\r
2255 }\r
2256 else if (current_bit == 5) // toggle bit (double len)\r
2257 {\r
2258 pause_len = 2 * RC6_BIT_LEN;\r
2259 }\r
2260 }\r
2261 }\r
2262#endif\r
2263 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2264 }\r
2265\r
2266 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2267 {\r
2268 first_pulse = first_pulse ? FALSE : TRUE;\r
2269 }\r
2270 }\r
2271\r
2272 if (first_pulse)\r
2273 {\r
2274 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2275\r
2276 if (pulse_counter < pulse_len)\r
2277 {\r
2278 if (pulse_counter == 0)\r
2279 {\r
2280 irsnd_on ();\r
2281 }\r
2282 pulse_counter++;\r
2283 }\r
2284 else // if (pause_counter < pause_len)\r
2285 {\r
2286 if (pause_counter == 0)\r
2287 {\r
2288 irsnd_off ();\r
2289 }\r
2290 pause_counter++;\r
2291 }\r
2292 }\r
2293 else\r
2294 {\r
2295 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2296\r
2297 if (pause_counter < pause_len)\r
2298 {\r
2299 if (pause_counter == 0)\r
2300 {\r
2301 irsnd_off ();\r
2302 }\r
2303 pause_counter++;\r
2304 }\r
2305 else // if (pulse_counter < pulse_len)\r
2306 {\r
2307 if (pulse_counter == 0)\r
2308 {\r
2309 irsnd_on ();\r
2310 }\r
2311 pulse_counter++;\r
2312 }\r
2313 }\r
2314 }\r
2315 break;\r
2316 }\r
9547ee89 2317#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
cb93f9e9 2318 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2319\r
e664a9f3 2320 default:\r
2321 {\r
2322 irsnd_busy = FALSE;\r
2323 break;\r
2324 }\r
2325 }\r
2326 }\r
2327\r
2328 if (! irsnd_busy)\r
2329 {\r
2330 if (repeat_counter < n_repeat_frames)\r
2331 {\r
c7c9a4a1 2332#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2333 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2334 {\r
2335 irsnd_buffer[2] |= 0x0F;\r
2336 }\r
2337#endif\r
2338 repeat_counter++;\r
2339 irsnd_busy = TRUE;\r
2340 }\r
2341 else\r
2342 {\r
2343 irsnd_busy = TRUE; //Rainer\r
2344 send_trailer = TRUE;\r
2345 n_repeat_frames = 0;\r
2346 repeat_counter = 0;\r
2347 }\r
2348 }\r
4225a882 2349 }\r
2350\r
cb93f9e9 2351#ifdef ANALYZE\r
4225a882 2352 if (irsnd_is_on)\r
2353 {\r
e664a9f3 2354 putchar ('0');\r
4225a882 2355 }\r
2356 else\r
2357 {\r
e664a9f3 2358 putchar ('1');\r
4225a882 2359 }\r
2360#endif\r
2361\r
2362 return irsnd_busy;\r
2363}\r
2364\r
cb93f9e9 2365#ifdef ANALYZE\r
4225a882 2366\r
2367// main function - for unix/linux + windows only!\r
2368// AVR: see main.c!\r
2369// Compile it under linux with:\r
2370// cc irsnd.c -o irsnd\r
2371//\r
2372// usage: ./irsnd protocol hex-address hex-command >filename\r
2373\r
2374int\r
2375main (int argc, char ** argv)\r
2376{\r
4225a882 2377 int protocol;\r
2378 int address;\r
2379 int command;\r
4225a882 2380 IRMP_DATA irmp_data;\r
2381\r
a7054daf 2382 if (argc != 4 && argc != 5)\r
4225a882 2383 {\r
e664a9f3 2384 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
2385 return 1;\r
4225a882 2386 }\r
2387\r
2388 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
e664a9f3 2389 sscanf (argv[2], "%x", &address) == 1 &&\r
2390 sscanf (argv[3], "%x", &command) == 1)\r
4225a882 2391 {\r
e664a9f3 2392 irmp_data.protocol = protocol;\r
2393 irmp_data.address = address;\r
2394 irmp_data.command = command;\r
4225a882 2395\r
e664a9f3 2396 if (argc == 5)\r
2397 {\r
2398 irmp_data.flags = atoi (argv[4]);\r
2399 }\r
2400 else\r
2401 {\r
2402 irmp_data.flags = 0;\r
2403 }\r
a7054daf 2404\r
e664a9f3 2405 irsnd_init ();\r
4225a882 2406\r
e664a9f3 2407 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2408\r
e664a9f3 2409 while (irsnd_busy)\r
2410 {\r
2411 irsnd_ISR ();\r
2412 }\r
beda975f 2413\r
e664a9f3 2414 putchar ('\n');\r
a03ad359 2415\r
f874da09 2416#if 1 // enable here to send twice\r
e664a9f3 2417 (void) irsnd_send_data (&irmp_data, TRUE);\r
a03ad359 2418\r
e664a9f3 2419 while (irsnd_busy)\r
2420 {\r
2421 irsnd_ISR ();\r
2422 }\r
a03ad359 2423\r
e664a9f3 2424 putchar ('\n');\r
f874da09 2425#endif\r
4225a882 2426 }\r
2427 else\r
2428 {\r
e664a9f3 2429 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2430 return 1;\r
4225a882 2431 }\r
2432 return 0;\r
2433}\r
2434\r
cb93f9e9 2435#endif // ANALYZE\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)