# 0008 030c\r
-000001111111111100001111111111111111111111111110000011111111110000011111111111000011111111111100001111111111111111111111111110000111111111111111111111111110000011111111111000001111111111100001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111111111111111111100000111111111110000011111111110000011111111111000011111111111100000111111111100000111111111111111111111111110000011111111111111111111111111000001111111111111111111111111100000111111111111111111111111110000011111111111000011111111111000001111111111111111111111111110000111111111111111111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000011111111111000001111111111111111111111111110000111111111110000011111111111000001111111111000001111111111111111111111111100000111111111111111111111111111000011111111111000011111111111000001111111111100000111111111110000111111111111111111111111111000001111111111111111111111111100001111111111100000111111111110000111111111111111\r
+00000111111111110000111111111111111111111111111000001111111111000001111111111100001111111111110000111111111111111111111111111000011111111111111111111111111000001111111111100000111111111110000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100000111111111111111111111111110000011111111111000001111111111000001111111111100001111111111110000011111111110000011111111111111111111111111000001111111111111111111111111100000111111111111111111111111110000011111111111111111111111111000001111111111100001111111111100000111111111111111111111111111000011111111111111111111111111000001111111111\r
# 0008 008c\r
-00001111111111100000111111111111111111111111111000011111111111000001111111111100001111111111100000111111111110000111111111111000011111111111111111111111111100001111111111100001111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111110000111111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111000001111111111111111111111111100000111111111111111111111111110000011111111111000001111111111111111111111111100001111111111111111111111111110000111111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100000111111111111111111111111110000011111111111000011111111111100001111111111100000111111111110000111111111110000011111111111111111111111111000001111111111100000111111111110000111111111110000111111111111111111111111111000001111111111111111111111111100000111111111110000111111111110000011111111111111\r
+00001111111111100000111111111111111111111111111000011111111111000001111111111100001111111111100000111111111110000111111111111000011111111111111111111111111100001111111111100001111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111110000111111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111000001111111111111111111111111100000111111111111111111111111110000011111111111000001111111111111111111111111100001111111111111111111111111110000111111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111\r
# 0008 028c\r
-000001111111111100000111111111111111111111111110000011111111111000011111111111000001111111111100001111111111111111111111111110000111111111111000011111111111111111111111111100001111111111100000111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111110000111111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111000001111111111100000111111111111111111111111110000111111111111000011111111111111111111111111100001111111111111111111111111110000111111111111111111111111111000011111111111000001111111111100001111111111111111111111111110000111111111111111111111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100000111111111111111111111111110000011111111111000011111111111000001111111111100001111111111111111111111111110000111111111110000011111111111111111111111111000001111111111100000111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111110000111111111110000011111111111111\r
+00000111111111110000011111111111111111111111111000001111111111100001111111111100000111111111110000111111111111111111111111111000011111111111100001111111111111111111111111110000111111111110000011111111111000011111111111000001111111111111111111111111100000111111111111111111111111110000011111111111000011111111111100001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000111111111111111111111111111000011111111111000001111111111100001111111111100000111111111110000011111111111111111111111111000011111111111100001111111111111111111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111\r
# 0008 031c\r
-000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111100001111111111111111111111111110000111111111111111111111111111000011111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111111111111111111100000111111111110000111111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111000001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000011111111111100001111111111111111111111111110000011111111111111111111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111111111111111111110000111111111110000011111111111000001111111111100001111111111111111111111111110000111111111111111111111111111000001111111111100001111111111110000111111111110000011111111111111111111111111100001111111111111111111111111110000111111111111111111111111111000001111111111100000111111111110000111111111111111\r
+00000111111111110000111111111111111111111111111000011111111111000001111111111100001111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111111111111111111110000011111111111000011111111111100001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000111111111111111111111111111000011111111111000001111111111100001111111111100000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111111111111111111111000011111111111000001111111111100001111111111110000111111111111111111111111111000001111111111111111111111111100000111111111\r
# 0008 024c\r
-000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111100001111111111111111111111111100000111111111110000011111111111000011111111111111111111111111100001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111111111111111111100000111111111110000111111111110000011111111111000011111111111100001111111111111111111111111100000111111111111111111111111110000011111111111000001111111111111111111111111100001111111111111111111111111110000011111111111000011111111111000001111111111111111111111111100000111111111111111111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000011111111111000001111111111111111111111111110000111111111110000111111111111000011111111111000001111111111111111111111111100000111111111110000111111111110000011111111111111111111111111000001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000111111111111111\r
+00000111111111110000111111111111111111111111111000011111111111000001111111111100001111111111110000111111111111111111111111110000011111111111000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100000111111111111111111111111110000011111111111000011111111111000001111111111100001111111111110000111111111111111111111111110000011111111111111111111111111000001111111111100000111111111111111111111111110000111111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111\r
# 0008 02cc\r
-0000011111111111000011111111111111111111111111100001111111111100000111111111110000111111111111000011111111111111111111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111100001111111111100001111111111110000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000111111111111000011111111111111111111111111100001111111111100000111111111110000111111111110000011111111111000001111111111111111111111111100001111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111110000111111111110000011111111111111111111111111100001111111111111111111111111100000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000111111111111000011111111111111111111111111100001111111111100000111111111110000111111111110000011111111111111111111111111000001111111111100000111111111111111111111111110000111111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111100001111111111110000111111111111111\r
+00000111111111110000111111111111111111111111111000011111111111000001111111111100001111111111110000111111111111111111111111111000011111111111000001111111111111111111111111100000111111111111111111111111110000011111111111000011111111111000001111111111111111111111111100000111111111111111111111111111000011111111111000011111111111100001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100001111111111110000111111111111111111111111111000011111111111000001111111111100001111111111100000111111111110000011111111111111111111111111000011111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111100001111111111100000111111111111111111111111111000011111111111111111111111111000001111111111\r
# 0008 01cc\r
-000001111111111100001111111111111111111111111110000011111111111000011111111111000001111111111100000111111111110000111111111111111111111111111000001111111111111111111111111110000111111111111111111111111111000011111111111100001111111111100000111111111111111111111111110000011111111111111111111111111100001111111111100000111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000011111111111111111111111111000011111111111100001111111111100000111111111110000111111111111111111111111111000011111111111000001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000011111111111111111111111111000001111111111100001111111111100000111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111111111111111111111000011111111111000011111111111100001111111111111111111111111110000111111111111111111111111111000011111111111000001111111111100001111111111111111111\r
+00000111111111110000111111111111111111111111111000001111111111100001111111111100000111111111110000011111111111000011111111111111111111111111100000111111111111111111111111111000011111111111111111111111111100001111111111110000111111111110000011111111111111111111111111000001111111111111111111111111110000111111111110000011111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111111111111111111100001111111111110000111111111110000011111111111000011111111111111111111111111100001111111111100000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111\r
# 0008 00cc\r
-000011111111111000001111111111111111111111111110000111111111110000011111111111000011111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000011111111111111111111111111100001111111111110000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000011111111111000011111111111000011111111111111111111111111100000111111111111111111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111111111111111111100000111111111110000111111111111000011111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111100001111111111100000111111111111111111111111111000011111111111111111111111111000001111111111100001111111111110000111111111111111\r
+00001111111111100000111111111111111111111111111000011111111111000001111111111100001111111111100000111111111110000111111111110000011111111111111111111111111000001111111111111111111111111100000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100001111111111111111111111111110000111111111111000011111111111000001111111111100001111111111111111111111111110000111111111111111111111111111000011111111111000001111111111100001111111111111111111111111110000111111111111111111111111111000001111111111100001111111111100001111111111111111111111111110000011111111111111111111111111000001111111111\r
# 0008 012c\r
-000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111100001111111111100001111111111111111111111111110000011111111111000011111111111000001111111111111111111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111111111111111111100000111111111110000111111111110000011111111111000011111111111111111111111111100001111111111100000111111111111111111111111111000011111111111111111111111111100001111111111100001111111111111111111111111110000011111111111000011111111111000001111111111111111111111111100000111111111111111111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000011111111111000001111111111111111111111111110000111111111110000111111111111000011111111111000001111111111100001111111111111111111111111110000111111111110000011111111111000001111111111111111111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000111111111111111\r
+00000111111111110000111111111111111111111111111000011111111111000001111111111100001111111111110000111111111110000111111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100000111111111111111111111111110000011111111111000011111111111000001111111111100001111111111111111111111111110000111111111110000011111111111111111111111111100001111111111111111111111111110000111111111110000111111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111\r
# 0006 018c\r
-000001111111111100001111111111111111111111111110000111111111110000011111111111000011111111111100001111111111100001111111111111111111111111110000011111111111111111111111111000001111111111100001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111111111111111111100001111111111110000111111111110000011111111111000011111111111111111111111111100001111111111100000111111111110000011111111111111111111111111000001111111111111111111111111100001111111111111111111111111110000011111111111000011111111111000001111111111111111111111111100000111111111111111111111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000011111111111000001111111111111111111111111110000111111111110000111111111111000011111111111000001111111111100001111111111111111111111111110000111111111111111111111111111000011111111111000001111111111100000111111111110000111111111111111111111111111000011111111111111111111111111100001111111111100000111111111110000111111111111111\r
+00000111111111110000111111111111111111111111111000011111111111000001111111111100001111111111110000111111111110000111111111111111111111111111000001111111111111111111111111100000111111111110000111111111110000011111111111000011111111111111111111111111100001111111111111111111111111110000111111111110000011111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100000111111111111111111111111110000111111111111000011111111111000001111111111100001111111111111111111111111110000111111111110000011111111111000001111111111111111111111111100000111111111111111111111111110000111111111111111111111111111000001111111111100001111111111100000111111111111111111111111110000011111111111111111111111111000001111111111\r
--- /dev/null
+# IRMP Scan\r
+# DENON RC-176, 20KHz Interrupt-frequency\r
+# Cassette Deck A/B\r
+000000111111111100000111111111110000011111111111111111111111111100000111111111110000011111111110000001111111111111111111111111110000011111111111111111111111111100000001111111110000001111111111000001111111111111111111111111100000011111111110000001111111111111111111111111100000011111111110000011111111111000000111111111100000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000011111111110000011111111111000001111111111111111111111111110000001111111110000001111111111000000111111111110000011111111110000000111111111111111111111111100000111111111111111111111111111000000111111111100000011111111111111111111111111000000111111111100000111111111111111111111111111000001111111111111111111111111110000001111111111111111111111111100000011111111111111\r
+# Cassette Deck REC\r
+0000001111111111000000111111111100000111111111111111111111111111000001111111111100000111111111100000001111111111111111111111111100000111111111111111111111111110000001111111111111111111111111100000011111111111111111111111111000000111111111111111111111111110000001111111111000000111111111111111111111111110000001111111111000001111111111100000011111111110000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000000111111111100000011111111110000001111111111111111111111111100000011111111110000011111111111000001111111111100000111111111110000011111111110000000111111111000001111111111100000001111111111111111111111111000000111111111100000111111111111111111111111111000000111111111111111111111111110000001111111111111111111111111100000011111111111111\r
+# Cassette Deck Pause\r
+00000011111111110000001111111111000001111111111111111111111111110000011111111111000000111111111100000111111111111111111111111111000000111111111100000111111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100000011111111110000011111111111111111111111111100000011111111100000011111111110000001111111111100000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000001111111111100000111111111100000011111111111111111111111111000000111111111100000111111111110000011111111111000001111111111111111111111111110000011111111111000001111111111100000111111111110000011111111111111111111111111100000111111111100000011111111111111111111111111000001111111111111111111111111110000001111111111111111111111111110000011111111111111\r
+# Cassette Deck Stop\r
+00000011111111110000011111111111000001111111111111111111111111110000011111111111000001111111111000001111111111100000111111111111111111111111111000000111111111111111111111111110000001111111111111111111111111100000011111111111111111111111111000000111111111100000111111111111111111111111111000001111111111100000011111111110000001111111111000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000000111111111100000111111111111111111111111111000000111111111100000111111111110000111111111111111111111111111000000011111111100000011111111110000001111111111000001111111111100000011111111111111111111111111000001111111111100000011111111111111111111111111000001111111111111111111111111110000001111111111111111111111111100000011111111111111\r
+# Cassette Deck REW\r
+00000011111111100000011111111110000001111111111111111111111111100000011111111110000001111111111000001111111111111111111111111110000011111111111111111111111111100000111111111110000001111111111111111111111111100000111111111111111111111111111000001111111111100000111111111111111111111111111000001111111111100000011111111110000011111111110000000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111110000001111111111000000111111111111111111111111110000011111111111000000111111111100000111111111110000011111111111000001111111111111111111111111110000011111111111000001111111111000000111111111111111111111111110000001111111111000000111111111111111111111111110000001111111111111111111111111100000011111111111111111111111111000000011111111111111\r
+# Cassette Deck FF\r
+000000111111111100001111111111100000111111111111111111111111111000000111111111100000001111111110000001111111111000000111111111111111111111111110000001111111111000001111111111111111111111111110000011111111111111111111111111100000011111111110000011111111111111111111111111100000011111111110000011111111110000000111111111100000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111100000011111111110000001111111111111111111111111100000011111111111000011111111111000001111111111111111111111111110000001111111111000001111111111111111111111111110000011111111111000001111111111100000111111111111111111111111110000001111111111000000111111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100000111111111111111\r
+# Cassette Deck Play <\r
+00001111111111110000011111111111000001111111111111111111111111110000111111111111000001111111111100000111111111111111111111111110000111111111111111111111111111110000111111111111111111111111111000000111111111100000011111111111111111111111111100011111111111110000111111111111111111111111111000001111111111100001111111111110000011111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111100001111111111111111111111111111000001111111111100001111111111100000011111111111000001111111111000000111111111110000111111111111111111111111111000001111111111100000111111111111111111111111111000011111111111100000111111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100000111111111111111\r
+# Cassette Deck Play >\r
+000011111111111000000111111111110000011111111111111111111111111100001111111111100000111111111110000011111111111000011111111111110001111111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100001111111111110000111111111111111111111111111100000111111111110000111111111111000011111111111100001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000011111111111100000111111111111000011111111111111111111111111100000111111111110000011111111111000001111111111111111111111111110000111111111111111111111111111100000111111111100000011111111111000011111111111100001111111111111111111111111111000001111111111100000111111111111111111111111111000111111111111111111111111111100000011111111111111111111111111000000111111111111111\r
+# Cassette Deck CD |<<\r
+000001111111111000000011111111100000001111111110000001111111111111111111111111100000011111111110000011111111111111111111111111100000011111111110000011111111111000001111111111111111111111111110000011111111111111111111111111100000011111111110000011111111111111111111111111100000111111111110000001111111110000000111111111000000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111100000011111111110000001111111111000000111111111111111111111111110000000111111111000001111111111100000011111111111111111111111111000001111111111111111111111111110000011111111111000000111111111000000111111111111111111111111111000001111111111000000011111111111111111111111110000001111111111111111111111111100000011111111111111111111111111100000111111111111111\r
+# CD >>|\r
+0000011111111111000001111111111100000111111111110000011111111111111111111111111100000011111111110000111111111111000011111111111100000111111111110000011111111111111111111111111100000111111111111111111111111111000011111111111000001111111111111111111111111111000111111111111000000111111111100000111111111110000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000000111111111100000011111111110000011111111111000001111111111111111111111111110000011111111111000001111111111111111111111111100000011111111111111111111111111000000111111111111111111111111111000001111111111100000111111111100000111111111111111111111111111000001111111111100000111111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100000111111111111111\r
+# CD RANDOM\r
+000001111111111100000011111111110000011111111111000001111111111111111111111111110000001111111111000001111111111000000111111111111111111111111111000001111111111000000111111111111111111111111110000001111111111000000111111111111111111111111110000001111111111111111111111111100000011111111110000011111111111000011111111111100000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000011111111111000001111111111100000111111111111111111111111111000000111111111000000111111111111111111111111111000001111111111000000111111111111111111111111110000001111111111000000111111111111111111111111110000001111111111000000111111111100000011111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100000111111111111111\r
+# CD REPEAT\r
+0000011111111111000001111111111000000111111111100000011111111111111111111111111000000111111111100000011111111110000001111111111000001111111111111111111111111110000001111111111000000111111111111111111111111110000011111111111000001111111111111111111111111110000011111111111000001111111111000000111111111100000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000011111111111000001111111111100000011111111110000011111111111111111111111111100000111111111110000011111111111111111111111111100000111111111111111111111111111000001111111111100000111111111111111111111111111000000111111111100000111111111111111111111111111000001111111111100001111111111111111111111111110000001111111111111111111111111100000011111111111111111111111111100000111111111111111\r
+# CD DISC SKIP\r
+00000011111111110000001111111111000001111111111100000111111111111111111111111111000001111111111100000111111111111111111111111111000001111111111111111111111111110000011111111111000001111111111111111111111111110000011111111111000001111111111111111111111111100000011111111111111111111111111000000111111111100000011111111110000001111111111000000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000001111111111000000111111111100000111111111110000001111111111111111111111111100000001111111110000001111111111000001111111111100000111111111111111111111111111000011111111111000000111111111111111111111111110000001111111111000000111111111100000111111111111111111111111111000000111111111111111111111111110000001111111111111111111111111100000011111111111111\r
+# CD Pause\r
+00000011111111110000001111111111000000111111111100000011111111111111111111111111000001111111111100000111111111111111111111111111000001111111111000000111111111111111111111111111000000111111111111111111111111110000001111111111111111111111111100000011111111110000011111111111111111111111111100000111111111110000011111111111000001111111111000000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111000000111111111100000001111111110000001111111111111111111111111100000111111111110000001111111111000000111111111111111111111111110000011111111111000001111111111100000111111111110000001111111111111111111111111100000111111111110000011111111111111111111111111000000111111111111111111111111110000001111111111111111111111111100000011111111111111\r
+# CD Stop\r
+00000011111111110000011111111111000001111111111100000011111111111111111111111111000000111111111100000111111111110000001111111111111111111111111100000011111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100000011111111110000011111111111111111111111111100000011111111110000011111111111000001111111111000000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111000001111111111100000011111111110000001111111111111111111111111100000011111111110000011111111111111111111111111100000011111111110000011111111111000001111111111100000111111111110000001111111111111111111111111000000111111111100000111111111111111111111111111000000111111111111111111111111111000000111111111111111111111111100000111111111111111\r
+# CD Play\r
+000001111111111100000111111111110000111111111111000001111111111111111111111111110000011111111110000011111111111000001111111111100000111111111111111111111111111000001111111111111111111111111110000011111111111111111111111111100000011111111110000000111111111111111111111111100000011111111110000001111111111000001111111111100000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000011111111111000001111111111100000011111111111111111111111110000001111111111000001111111111111111111111111110000011111111111111111111111111100000001111111110000001111111111000001111111111100000111111111111111111111111111000001111111111100000111111111111111111111111111000000111111111111111111111111110000011111111111111111111111111100000111111111111111\r
+# TUNER Preset Up\r
+000011111111111000001111111111100000111111111111111111111111111100001111111111111111111111111110000011111111111000001111111111100001111111111111111111111111111100001111111111111111111111111110000011111111111000001111111111111111111111111111000111111111111000001111111111111111111111111110000011111111111111111111111111110000111111111110000011111111110000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000011111111100000011111111111000001111111111111111111111111110000111111111111111111111111111100001111111111110000111111111111111111111111111110001111111111100000111111111110000001111111111111111111111111110000111111111111000111111111111111111111111111100000011111111110000011111111111000011111111111111111111111111110000001111111111111111111111111100000111111111111111\r
+# TUNER Preset Down\r
+000011111111111000011111111111110001111111111111111111111111111000001111111111111111111111111110000011111111111100011111111111111111111111111110000011111111111000001111111111111111111111111110000011111111111000011111111111111111111111111110000111111111111000011111111111111111111111111111000111111111111111111111111111000000011111111100000011111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000011111111111000011111111111111111111111111110000011111111111111111111111111100001111111111110000111111111111000011111111111111111111111111100000111111111110000111111111111111111111111111110000111111111110000011111111111111111111111111100001111111111111000011111111111100011111111111111111111111111100000111111111111111111111111111110001111111111111111\r
+# AMP Tape 2\r
+000011111111111100000111111111111111111111111111000011111111111000001111111111100001111111111110000011111111111000011111111111111111111111111110000001111111111000001111111111111111111111111110000111111111111111111111111111110001111111111110000111111111111000001111111111111111111111111110000111111111111000011111111111000000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100001111111111110000111111111111111111111111111000001111111111100000111111111110000011111111111000011111111111111111111111111111000011111111111000011111111111111111111111111100000011111111111000011111111111100001111111111111111111111111110000011111111111111111111111111110000111111111111000011111111111111111111111111100000011111111111111111111111111100000111111111111111\r
+# AMP Tape 1\r
+000000111111111100000111111111111111111111111111000001111111111100000111111111110000011111111110000001111111111111111111111111100000011111111110000001111111111000000111111111111111111111111110000001111111111111111111111111100000011111111110000001111111111000001111111111111111111111111110000001111111111000001111111111100000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000011111111110000011111111111111111111111111100000111111111110000011111111110000001111111111000000111111111100000011111111111111111111111111000001111111111111111111111111110000001111111111000000111111111100000111111111111111111111111111000000111111111111111111111111110000001111111111000001111111111111111111111111110000001111111111111111111111111100000011111111111111\r
+# AMP Aux\r
+00000111111111100000001111111111111111111111111100000111111111100000011111111110000001111111111000000111111111100000011111111110000011111111111111111111111111100000011111111110000001111111111000001111111111000000111111111110000011111111111111111111111111000000111111111100000011111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000111111111110000011111111111111111111111111100000011111111110000011111111110000000111111111100000111111111111111111111111111000001111111111111111111111111110000011111111110000001111111111111111111111111110000011111111111111111111111111100000111111111111111111111111111000001111111111111111111111111100000011111111110000001111111111111111111111111110000011111111111111111111111111100000011111111111111\r
+# AMP Tuner\r
+0000011111111111000001111111111111111111111111111000011111111111100001111111111100000111111111110000001111111111111111111111111110000111111111111111111111111111000000111111111100000111111111100000011111111110000011111111111100001111111111110000011111111111111111111111111000000111111111100000111111111111000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000001111111111100000111111111111111111111111111100011111111111100000111111111100000111111111110000111111111111100001111111111110000111111111111111111111111111000001111111111111111111111111110000001111111111111111111111111110000111111111111111111111111111000000111111111111111111111111111000011111111111100001111111111111111111111111110000011111111111111111111111111110001111111111111111\r
+# AMP CD\r
+00000011111111100000011111111111111111111111111110000111111111110000111111111111000011111111111100000111111111100001111111111111111111111111111100001111111111100000011111111110000011111111111000001111111111100001111111111110000011111111111111111111111111100000111111111110000011111111110000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100000011111111110000011111111111111111111111111110000111111111110000111111111111000011111111111000000111111111111111111111111111000011111111111100001111111111111111111111111111000001111111111111111111111111110000111111111111111111111111111100000111111111111111111111111111000001111111111111111111111111110000111111111110000011111111111111111111111111100000011111111111111111111111111100000111111111111111\r
+# AMP Phono\r
+00000111111111110000011111111111111111111111111100000011111111110000111111111111000011111111111100001111111111111111111111111110000011111111111000001111111111100000011111111110000011111111111100001111111111100001111111111110000111111111111111111111111111100001111111111110000111111111110000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000111111111110000011111111111111111111111111100000011111111110000011111111111100001111111111110000111111111110000011111111111111111111111111100001111111111111111111111111111000011111111111111111111111111110000011111111111111111111111111100000111111111111111111111111111000011111111111111111111111111110000011111111111000011111111111111111111111111110000011111111111111111111111111000001111111111111111\r
+# AMP Volume Up\r
+000000111111111110000111111111111111111111111111000001111111111100000111111111110000011111111111000011111111111111111111111111100000011111111110000011111111111111111111111111110000011111111111111111111111111100001111111111100000111111111110000011111111111000001111111111111111111111111111000011111111111000001111111111100001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000111111111110000011111111111111111111111111100000111111111100000001111111111000011111111111100001111111111100000111111111111111111111111111000001111111111100001111111111111000111111111111111111111111111100000111111111111111111111111111000000111111111111111111111111111000111111111111000001111111111111111111111111110000011111111111111111111111111110000111111111111111\r
+# AMP Volume Down\r
+0000111111111111000011111111111111111111111111100000011111111110000011111111111100001111111111100000111111111110000011111111110000011111111111111111111111111110000111111111111111111111111111100000111111111100000111111111110000011111111111000011111111111111111111111111111000011111111111000001111111111100000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000111111111111000001111111111111111111111111110000011111111111000001111111111100001111111111100000011111111111111111111111111000001111111111111111111111111111000011111111111100000111111111100000111111111111111111111111111000000111111111111111111111111111000011111111111111111111111111100000111111111110000011111111111111111111111111110001111111111111111111111111111000001111111111111111\r
+# AMP Power\r
+00000011111111110000011111111111111111111111111110000111111111111000111111111111000000111111111100000111111111110000011111111110000001111111111100001111111111110000111111111111111111111111111000000111111111100000111111111111000011111111111111111111111111100001111111111110000111111111111000011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110000111111111110000011111111111111111111111111110000111111111111000011111111111000000111111111100000111111111111111111111111111100001111111111111111111111111110000111111111111111111111111111100000111111111111111111111111111100001111111111100000011111111111111111111111111000001111111111111111111111111111000011111111111000001111111111111111111111111110000011111111111111111111111111110001111111111111111\r
+# AMP Mute\r
+000000111111111100000111111111111111111111111111000001111111111100001111111111100000111111111110000111111111111111111111111111110001111111111111111111111111111000001111111111100000111111111111111111111111111100001111111111110001111111111110000111111111111000001111111111111111111111111110000011111111111000011111111111100001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000000111111111100000111111111111111111111111111100001111111111100000011111111110000011111111111000001111111111110000111111111110000011111111111111111111111111100001111111111100000111111111111111111111111111100001111111111111111111111111111000001111111111111111111111111110000111111111111000011111111111111111111111111110000111111111111111111111111111100000111111111111111\r
# 0x0002, code = 0x0220 : 000101000100000 + 1 stop bit + 000100111011111 + 1 stop bit\r
-00011111111000111111110001111111100011111111111111111110001111111100011111111111111111110001111111100011111111000111111110001111111111111111111000111111110001111111100011111111000111111110001111111100011111111\r
-00011111111000111111110001111111100011111111111111111110001111111100011111111000111111111111111111100011111111111111111110001111111111111111111000111111110001111111111111111111000111111111111111111100011111111111111111110001111111111111111111000111111111111111111100011111111\r
+0001111111100011111111000111111110001111111111111111111000111111110001111111111111111111000111111110001111111100011111111000111111111111111111100011111111000111111110001111111100011111111000111111110001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100011111111000111111110001111111100011111111111111111110001111111100011111111000111111111111111111100011111111111111111110001111111111111111111000111111110001111111111111111111000111111111111111111100011111111111111111110001111111111111111111000111111111111111111100011111111\r
# Wiederholung:\r
-00011111111000111111110001111111100011111111111111111110001111111100011111111111111111110001111111100011111111000111111110001111111111111111111000111111110001111111100011111111000111111110001111111100011111111\r
-00011111111000111111110001111111100011111111111111111110001111111100011111111000111111111111111111100011111111111111111110001111111111111111111000111111110001111111111111111111000111111111111111111100011111111111111111110001111111111111111111000111111111111111111100011111111\r
+0001111111100011111111000111111110001111111111111111111000111111110001111111111111111111000111111110001111111100011111111000111111111111111111100011111111000111111110001111111100011111111000111111110001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100011111111000111111110001111111100011111111111111111110001111111100011111111000111111111111111111100011111111111111111110001111111111111111111000111111110001111111111111111111000111111111111111111100011111111111111111110001111111111111111111000111111111111111111100011111111\r
set -e # exit on error
cd `dirname $0`
mkdir -p tmpsrc
-cp ../irmp.[ch] ../irmpconfig.h ../irsnd.[ch] ../irsndconfig.h ../makefile.lnx tmpsrc
+cp ../irmp.[ch] ../irmpconfig.h ../irsnd.[ch] ../irsndconfig.h ../irmpsystem.h ../irmpprotocols.h ../makefile.lnx tmpsrc
cd tmpsrc
sed 's/#define \(IRMP_SUPPORT_[A-Z_0-9]* *\)[01]/#define \1 1/g' <irmpconfig.h >irmpconfig.new
mv irmpconfig.new irmpconfig.h
rc5x.txt \
rc6-hold.txt \
rc6.txt \
- sharp-denon.txt \
- sharp-denon2.txt \
xbox360-10kHz.txt
do
echo "testing $j ..."
fi
done
+# t-home-mediareceiver-15kHz.txt (RUWIDO) conflicts with Denon
+
for j in \
- Siemens-Gigaset-M740AV-15kHz.txt \
bo_beolink1000-15kHz.txt \
denon-15kHz.txt \
+ denon-rc-176-15kHz.txt \
irc-15kHz.txt \
kathrein-15kHz.txt \
recs80-15kHz.txt \
samsung32-15kHz.txt \
- t-home-mediareceiver-15kHz.txt \
- tp400vt-15kHz.txt \
+ Siemens-Gigaset-M740AV-15kHz.txt \
+ tp400vt-15kHz.txt \
universal-15kHz.txt \
xbox360-15kHz.txt
do
IRMP - Infrared Multi Protocol Decoder\r
--------------------------------------\r
\r
-Version IRMP: 2.0.4 27.02.2012\r
-Version IRSND: 2.0.4 27.02.2012\r
+Version IRMP: 2.2.0 23.05.2012\r
+Version IRSND: 2.2.0 23.05.2012\r
\r
Dokumentation:\r
\r
-<AVRStudio><MANAGEMENT><ProjectName>irmp</ProjectName><Created>07-Jan-2010 20:23:49</Created><LastEdit>16-Feb-2012 11:39:00</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>07-Jan-2010 20:23:49</Created><Version>4</Version><Build>4, 18, 0, 670</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\irmp.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>C:\avr\irmp\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>AVR Simulator</CURRENT_TARGET><CURRENT_PART>ATmega88.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>main.c</SOURCEFILE><SOURCEFILE>irmp.c</SOURCEFILE><SOURCEFILE>irmpextlog.c</SOURCEFILE><HEADERFILE>irmp.h</HEADERFILE><HEADERFILE>irmpconfig.h</HEADERFILE><HEADERFILE>irmpextlog.h</HEADERFILE><OTHERFILE>default\irmp.lss</OTHERFILE><OTHERFILE>default\irmp.map</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>atmega88</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>irmp.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>0</ISDIRTY><OPTIONS/><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\Program Files\WinAVR-20100110\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\Program Files\WinAVR-20100110\utils\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><IOView><usergroups/><sort sorted="0" column="0" ordername="1" orderaddress="1" ordergroup="1"/></IOView><Files><File00000><FileId>00000</FileId><FileName>main.c</FileName><Status>1</Status></File00000><File00001><FileId>00001</FileId><FileName>irmp.c</FileName><Status>1</Status></File00001><File00002><FileId>00002</FileId><FileName>irmp.h</FileName><Status>1</Status></File00002><File00003><FileId>00003</FileId><FileName>irmpconfig.h</FileName><Status>1</Status></File00003><File00004><FileId>00004</FileId><FileName>irmpextlog.c</FileName><Status>1</Status></File00004><File00005><FileId>00005</FileId><FileName>irmpextlog.h</FileName><Status>1</Status></File00005></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio>\r
+<AVRStudio><MANAGEMENT><ProjectName>irmp</ProjectName><Created>07-Jan-2010 20:23:49</Created><LastEdit>22-May-2012 17:10:27</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>07-Jan-2010 20:23:49</Created><Version>4</Version><Build>4, 18, 0, 670</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\irmp.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>C:\avr\irmp\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>AVR Simulator</CURRENT_TARGET><CURRENT_PART>ATmega88.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>main.c</SOURCEFILE><SOURCEFILE>irmp.c</SOURCEFILE><HEADERFILE>irmp.h</HEADERFILE><HEADERFILE>irmpconfig.h</HEADERFILE><HEADERFILE>irmpprotocols.h</HEADERFILE><HEADERFILE>irmpsystem.h</HEADERFILE><OTHERFILE>default\irmp.lss</OTHERFILE><OTHERFILE>default\irmp.map</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>atmega88</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>irmp.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>1</ISDIRTY><OPTIONS><OPTION><FILE>irmp.c</FILE><OPTIONLIST></OPTIONLIST></OPTION><OPTION><FILE>main.c</FILE><OPTIONLIST></OPTIONLIST></OPTION></OPTIONS><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\Program Files\WinAVR-20100110\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\Program Files\WinAVR-20100110\utils\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><ProjectFiles><Files><Name>C:\avr\irmp\irmp.h</Name><Name>C:\avr\irmp\irmpconfig.h</Name><Name>C:\avr\irmp\irmpprotocols.h</Name><Name>C:\avr\irmp\irmpsystem.h</Name><Name>C:\avr\irmp\main.c</Name><Name>C:\avr\irmp\irmp.c</Name></Files></ProjectFiles><IOView><usergroups/><sort sorted="0" column="0" ordername="1" orderaddress="1" ordergroup="1"/></IOView><Files><File00000><FileId>00000</FileId><FileName>main.c</FileName><Status>1</Status></File00000><File00001><FileId>00001</FileId><FileName>irmp.c</FileName><Status>1</Status></File00001><File00002><FileId>00002</FileId><FileName>irmp.h</FileName><Status>1</Status></File00002><File00003><FileId>00003</FileId><FileName>irmpconfig.h</FileName><Status>1</Status></File00003><File00004><FileId>00004</FileId><FileName>irmpsystem.h</FileName><Status>1</Status></File00004><File00005><FileId>00005</FileId><FileName>irmpprotocols.h</FileName><Status>1</Status></File00005></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio>\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* irmp.c - infrared multi-protocol decoder, supports several remote control protocols\r
*\r
- * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.c,v 1.116 2012/02/24 11:40:41 fm Exp $\r
+ * $Id: irmp.c,v 1.121 2012/05/22 15:08:46 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * Typical manufacturers of remote controls:\r
- *\r
- * SIRCS - Sony\r
- * NEC - NEC, Yamaha, Canon, Tevion, Harman/Kardon, Hitachi, JVC, Pioneer, Toshiba, Xoro, Orion, and many other Japanese manufacturers\r
- * SAMSUNG - Samsung\r
- * SAMSUNG32 - Samsung\r
- * MATSUSHITA - Matsushita\r
- * KASEIKYO - Panasonic, Denon & other Japanese manufacturers (members of "Japan's Association for Electric Home Application")\r
- * RECS80 - Philips, Nokia, Thomson, Nordmende, Telefunken, Saba\r
- * RC5 - Philips and other European manufacturers\r
- * DENON - Denon, Sharp\r
- * RC6 - Philips and other European manufacturers\r
- * APPLE - Apple\r
- * NUBERT - Nubert Subwoofer System\r
- * B&O - Bang & Olufsen\r
- * PANASONIC - Panasonic (older, yet not implemented)\r
- * GRUNDIG - Grundig\r
- * NOKIA - Nokia\r
- * SIEMENS - Siemens, e.g. Gigaset M740AV\r
- * FDC - FDC IR keyboard\r
- * RCCAR - IR remote control for RC cars\r
- * JVC - JVC\r
- * THOMSON - Thomson\r
- * NIKON - Nikon cameras\r
- * RUWIDO - T-Home\r
- * KATHREIN - Kathrein\r
- * LEGO - Lego Power Functions RC\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * SIRCS\r
- * -----\r
- *\r
- * frame: 1 start bit + 12-20 data bits + no stop bit\r
- * data: 7 command bits + 5 address bits + 0 to 8 additional bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * -----------------_________ ------_____ ------------______\r
- * 2400us 600us 600us 600us 1200us 600 us no stop bit\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * NEC + extended NEC\r
- * -------------------------\r
- *\r
- * frame: 1 start bit + 32 data bits + 1 stop bit\r
- * data NEC: 8 address bits + 8 inverted address bits + 8 command bits + 8 inverted command bits\r
- * data extended NEC: 16 address bits + 8 command bits + 8 inverted command bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * -----------------_________ ------______ ------________________ ------______....\r
- * 9000us 4500us 560us 560us 560us 1690 us 560us\r
- *\r
- *\r
- * Repetition frame:\r
- *\r
- * -----------------_________------______ .... ~100ms Pause, then repeat\r
- * 9000us 2250us 560us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * SAMSUNG\r
- * -------\r
- *\r
- * frame: 1 start bit + 16 data(1) bits + 1 sync bit + additional 20 data(2) bits + 1 stop bit\r
- * data(1): 16 address bits\r
- * data(2): 4 ID bits + 8 command bits + 8 inverted command bits\r
- *\r
- * start bit: data "0": data "1": sync bit: stop bit:\r
- * ----------______________ ------______ ------________________ ------______________ ------______....\r
- * 4500us 4500us 550us 450us 550us 1450us 550us 4500us 550us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * SAMSUNG32\r
- * ----------\r
- *\r
- * frame: 1 start bit + 32 data bits + 1 stop bit\r
- * data: 16 address bits + 16 command bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * ----------______________ ------______ ------________________ ------______....\r
- * 4500us 4500us 550us 450us 550us 1450us 550us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * MATSUSHITA\r
- * ----------\r
- *\r
- * frame: 1 start bit + 24 data bits + 1 stop bit\r
- * data: 6 custom bits + 6 command bits + 12 address bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * ----------_________ ------______ ------________________ ------______....\r
- * 3488us 3488us 872us 872us 872us 2616us 872us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * KASEIKYO\r
- * --------\r
- *\r
- * frame: 1 start bit + 48 data bits + 1 stop bit\r
- * data: 16 manufacturer bits + 4 parity bits + 4 genre1 bits + 4 genre2 bits + 10 command bits + 2 id bits + 8 parity bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * ----------______ ------______ ------________________ ------______....\r
- * 3380us 1690us 423us 423us 423us 1269us 423us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * RECS80\r
- * ------\r
- *\r
- * frame: 2 start bits + 10 data bits + 1 stop bit\r
- * data: 1 toggle bit + 3 address bits + 6 command bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * -----_____________________ -----____________ -----______________ ------_______....\r
- * 158us 7432us 158us 4902us 158us 7432us 158us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * RECS80EXT\r
- * ---------\r
- *\r
- * frame: 2 start bits + 11 data bits + 1 stop bit\r
- * data: 1 toggle bit + 4 address bits + 6 command bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * -----_____________________ -----____________ -----______________ ------_______....\r
- * 158us 3637us 158us 4902us 158us 7432us 158us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * RC5 + RC5X\r
- * ----------\r
- *\r
- * RC5 frame: 2 start bits + 12 data bits + no stop bit\r
- * RC5 data: 1 toggle bit + 5 address bits + 6 command bits\r
- * RC5X frame: 1 start bit + 13 data bits + no stop bit\r
- * RC5X data: 1 inverted command bit + 1 toggle bit + 5 address bits + 6 command bits\r
- *\r
- * start bit: data "0": data "1":\r
- * ______----- ------______ ______------\r
- * 889us 889us 889us 889us 889us 889us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * DENON\r
- * -----\r
- *\r
- * frame: 0 start bits + 16 data bits + stop bit + 65ms pause + 16 inverted data bits + stop bit\r
- * data: 5 address bits + 10 command bits\r
- *\r
- * Theory:\r
- *\r
- * data "0": data "1":\r
- * ------________________ ------______________\r
- * 275us 775us 275us 1900us\r
- *\r
- * Practice:\r
- *\r
- * data "0": data "1":\r
- * ------________________ ------______________\r
- * 310us 745us 310us 1780us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * RC6\r
- * ---\r
- *\r
- * RC6 frame: 1 start bit + 1 bit "1" + 3 mode bits + 1 toggle bit + 16 data bits + 2666 us pause\r
- * RC6 data: 8 address bits + 8 command bits\r
- *\r
- * start bit toggle bit "0": toggle bit "1": data/mode "0": data/mode "1":\r
- * ____________------- _______------- -------_______ _______------- -------_______\r
- * 2666us 889us 889us 889us 889us 889us 444us 444us 444us 444us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * APPLE\r
- * -----\r
- *\r
- * frame: 1 start bit + 32 data bits + 1 stop bit\r
- * data: 16 address bits + 11100000 + 8 command bits\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * -----------------_________ ------______ ------________________ ------______....\r
- * 9000us 4500us 560us 560us 560us 1690 us 560us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * NUBERT (subwoofer system)\r
- * -------------------------\r
- *\r
- * frame: 1 start bit + 10 data bits + 1 stop bit\r
- * data: 0 address bits + 10 command bits ?\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * ----------_____ ------______ ------________________ ------______....\r
- * 1340us 340us 500us 1300us 1340us 340us 500us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * BANG_OLUFSEN\r
- * ------------\r
- *\r
- * frame: 4 start bits + 16 data bits + 1 trailer bit + 1 stop bit\r
- * data: 0 address bits + 16 command bits\r
- *\r
- * 1st start bit: 2nd start bit: 3rd start bit: 4th start bit:\r
- * -----________ -----________ -----_____________ -----________\r
- * 210us 3000us 210us 3000us 210us 15000us 210us 3000us\r
- *\r
- * data "0": data "1": data "repeat bit": trailer bit: stop bit:\r
- * -----________ -----_____________ -----___________ -----_____________ -----____...\r
- * 210us 3000us 210us 9000us 210us 6000us 210us 12000us 210us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * GRUNDIG\r
- * -------\r
- *\r
- * packet: 1 start frame + 19,968ms pause + N info frames + 117,76ms pause + 1 stop frame\r
- * frame: 1 pre bit + 1 start bit + 9 data bits + no stop bit\r
- * pause between info frames: 117,76ms\r
- *\r
- * data of start frame: 9 x 1\r
- * data of info frame: 9 command bits\r
- * data of stop frame: 9 x 1\r
- *\r
- * pre bit: start bit data "0": data "1":\r
- * ------____________ ------______ ______------ ------______ \r
- * 528us 2639us 528us 528us 528us 528us 528us 528us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * NOKIA:\r
- * ------\r
- *\r
- * Timing similar to Grundig, but 16 data bits:\r
- * frame: 1 pre bit + 1 start bit + 8 command bits + 8 address bits + no stop bit\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * SIEMENS or RUWIDO:\r
- * ------------------\r
- *\r
- * SIEMENS frame: 1 start bit + 22 data bits + no stop bit\r
- * SIEMENS data: 13 address bits + 1 repeat bit + 7 data bits + 1 unknown bit\r
- *\r
- * start bit data "0": data "1":\r
- * -------_______ _______------- -------_______\r
- * 250us 250us 250us 250us 250us 250us\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
- * PANASONIC (older protocol, yet not implemented, see also MATSUSHITA, timing very similar)\r
- * -----------------------------------------------------------------------------------------\r
- *\r
- * frame: 1 start bit + 22 data bits + 1 stop bit\r
- * 22 data bits = 5 custom bits + 6 data bits + 5 inverted custom bits + 6 inverted data bits\r
- *\r
- * European version: T = 456us\r
- * USA & Canada version: T = 422us\r
- *\r
- * start bit: data "0": data "1": stop bit:\r
- * 8T 8T 2T 2T 2T 6T 2T\r
- * -------------____________ ------_____ ------_____________ ------_______....\r
- * 3648us 3648us 912us 912us 912us 2736us 912us (Europe)\r
- * 3376us 3376us 844us 844us 844us 2532us 844us (US)\r
- *\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- *\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
* the Free Software Foundation; either version 2 of the License, or\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
-#if defined(__18CXX)\r
-#define PIC_C18 // Microchip C18 Compiler\r
-#endif\r
-\r
-#if defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC Compiler instead of AVR\r
-#define PIC_CCS_COMPILER\r
-#endif\r
-\r
-#ifdef unix // test on linux/unix\r
-#include <stdio.h>\r
-#include <unistd.h>\r
-#include <stdlib.h>\r
-#include <string.h>\r
-#include <inttypes.h>\r
-\r
-#define ANALYZE\r
-#define PROGMEM\r
-#define memcpy_P memcpy\r
-\r
-#else // not unix:\r
-\r
-#ifdef WIN32\r
-#include <stdio.h>\r
-#include <string.h>\r
-typedef unsigned char uint8_t;\r
-typedef unsigned short uint16_t;\r
-#define ANALYZE\r
-#define PROGMEM\r
-#define memcpy_P memcpy\r
-\r
-#else\r
-\r
-#if defined (PIC_CCS_COMPILER) || defined(PIC_C18)\r
-\r
-#include <string.h>\r
-#define PROGMEM\r
-#define memcpy_P memcpy\r
-\r
-#if defined (PIC_CCS_COMPILER)\r
-typedef unsigned int8 uint8_t;\r
-typedef unsigned int16 uint16_t;\r
-#endif\r
-\r
-#else // AVR:\r
-\r
-#include <inttypes.h>\r
-#include <stdio.h>\r
-#include <string.h>\r
-#include <avr/io.h>\r
-#include <util/delay.h>\r
-#include <avr/pgmspace.h>\r
-\r
-#endif // PIC_CCS_COMPILER or PIC_C18\r
-\r
-#endif // windows\r
-#endif // unix\r
-\r
-#ifndef IRMP_USE_AS_LIB\r
-#include "irmpconfig.h"\r
-#endif\r
#include "irmp.h"\r
\r
#if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_IR60_PROTOCOL == 1\r
-#define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r
+# define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r
#else\r
-#define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r
+# define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r
#endif\r
\r
#if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 || IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r
-#define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r
+# define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r
#else\r
-#define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r
+# define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r
#endif\r
\r
#if IRMP_SUPPORT_RC5_PROTOCOL == 1 || \\r
IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \\r
IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \\r
IRMP_SUPPORT_IR60_PROTOCOL\r
-#define IRMP_SUPPORT_MANCHESTER 1\r
+# define IRMP_SUPPORT_MANCHESTER 1\r
#else\r
-#define IRMP_SUPPORT_MANCHESTER 0\r
+# define IRMP_SUPPORT_MANCHESTER 0\r
#endif\r
\r
#if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r
-#define IRMP_SUPPORT_SERIAL 1\r
+# define IRMP_SUPPORT_SERIAL 1\r
#else\r
-#define IRMP_SUPPORT_SERIAL 0\r
+# define IRMP_SUPPORT_SERIAL 0\r
#endif\r
\r
#define IRMP_KEY_REPETITION_LEN (uint16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec\r
#define SIRCS_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
#define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r
#if IRMP_SUPPORT_NETBOX_PROTOCOL // only 5% to avoid conflict with NETBOX:\r
-#define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r
+# define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r
#else // only 5% + 1 to avoid conflict with RC6:\r
-#define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r
+# define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r
#endif\r
#define SIRCS_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
#define SIRCS_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
#define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
\r
#define DENON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
-#define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r
#define DENON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
#define DENON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
-#if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r
-#define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5)) // no -1, avoid conflict with RUWIDO\r
-#else\r
-#define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1) // be more tolerant\r
-#endif\r
+// RUWIDO (see t-home-mediareceiver-15kHz.txt) conflicts here with DENON\r
+#define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
#define DENON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
+#define DENON_AUTO_REPETITION_PAUSE_LEN ((uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
\r
#define THOMSON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r
#define THOMSON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r
#define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!\r
\r
#ifdef ANALYZE\r
-#define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r
-#define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r
-#define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r
-#define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r
+# define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r
+# define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r
+# define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r
+# define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r
static int silent;\r
static int time_counter;\r
static int verbose;\r
#else\r
-#define ANALYZE_PUTCHAR(a)\r
-#define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r
-#define ANALYZE_PRINTF(...)\r
-#define ANALYZE_NEWLINE()\r
+# define ANALYZE_PUTCHAR(a)\r
+# define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r
+# define ANALYZE_PRINTF(...)\r
+# define ANALYZE_NEWLINE()\r
#endif\r
\r
#if IRMP_USE_CALLBACK == 1\r
static volatile uint16_t irmp_command;\r
static volatile uint16_t irmp_id; // only used for SAMSUNG protocol\r
static volatile uint8_t irmp_flags;\r
-// static volatile uint8_t irmp_busy_flag;\r
+// static volatile uint8_t irmp_busy_flag;\r
\r
#ifdef ANALYZE\r
+#define input(x) (x)\r
static uint8_t IRMP_PIN;\r
#endif\r
\r
void\r
irmp_init (void)\r
{\r
-#if !defined(PIC_CCS_COMPILER) && !defined(PIC_C18) // only AVR\r
+#if defined(PIC_CCS) || defined(PIC_C18) // PIC: do nothing\r
+#elif defined (ARM_STM32) // STM32\r
+ GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+ /* GPIOx clock enable */\r
+ #if defined (ARM_STM32L1XX)\r
+ RCC_AHBPeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r
+ #elif defined (ARM_STM32F10X)\r
+ RCC_APB2PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r
+ #elif defined (ARM_STM32F4XX)\r
+ RCC_AHB1PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r
+ #endif\r
+\r
+ /* GPIO Configuration */\r
+ GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r
+ #if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
+ #elif defined (ARM_STM32F10X)\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+ #endif\r
+ GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r
+\r
+ /* GPIO Configuration */\r
+ GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
+ GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r
+#else // AVR\r
IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup\r
IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input\r
#endif\r
}\r
#endif\r
default:\r
+ {\r
rtc = TRUE;\r
+ break;\r
+ }\r
}\r
\r
if (rtc)\r
if (repetition_len < 0xFFFF) // avoid overflow of counter\r
{\r
repetition_len++;\r
+\r
+#if IRMP_SUPPORT_DENON_PROTOCOL == 1\r
+ if (repetition_len >= DENON_AUTO_REPETITION_PAUSE_LEN && last_irmp_denon_command != 0)\r
+ {\r
+ ANALYZE_PRINTF ("%8.3fms error 6: did not receive inverted command repetition\n",\r
+ (double) (time_counter * 1000) / F_INTERRUPTS);\r
+ last_irmp_denon_command = 0;\r
+ }\r
+#endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r
}\r
}\r
}\r
if ((~irmp_tmp_command & 0x3FF) == last_irmp_denon_command) // command bits must be inverted\r
{\r
irmp_tmp_command = last_irmp_denon_command; // use command received before!\r
+ last_irmp_denon_command = 0;\r
\r
irmp_protocol = irmp_param.protocol; // store protocol\r
irmp_address = irmp_tmp_address; // store address\r
}\r
else\r
{\r
- ANALYZE_PRINTF ("waiting for inverted command repetition\n");\r
+ ANALYZE_PRINTF ("%8.3fms waiting for inverted command repetition\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r
irmp_ir_detected = FALSE;\r
last_irmp_denon_command = irmp_tmp_command;\r
+ repetition_len = 0;\r
}\r
}\r
else\r
\r
if (! analyze)\r
{\r
- for (i = 0; i < (int) ((8000.0 * F_INTERRUPTS) / 10000); i++) // newline: long pause of 800 msec\r
+ for (i = 0; i < (int) ((10000.0 * F_INTERRUPTS) / 10000); i++) // newline: long pause of 10000 msec\r
{\r
next_tick ();\r
}\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* irmp.h\r
*\r
- * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irmp.h,v 1.73 2012/02/24 15:00:18 fm Exp $\r
+ * $Id: irmp.h,v 1.79 2012/05/23 12:26:25 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
-#ifndef _WC_IRMP_H_\r
-#define _WC_IRMP_H_\r
+#ifndef _IRMP_H_\r
+#define _IRMP_H_\r
\r
-#if defined(__18CXX) // Microchip C18 declaration of missing typedef\r
-typedef unsigned char uint8_t;\r
-typedef unsigned int uint16_t;\r
-#endif //Microchip C18\r
+#include "irmpsystem.h"\r
\r
-/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * timing constants:\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- */\r
-// fm 22.09.2011: may not be more than 16000L, otherwise some JVC codes will not be accepted\r
-#define IRMP_TIMEOUT_TIME 15500.0e-6 // timeout after 15.5 ms darkness\r
-#define IRMP_TIMEOUT_TIME_MS 15500L // timeout after 15.5 ms darkness\r
-\r
-#if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r
-#define IRMP_TIMEOUT_NIKON_TIME 29500.0e-6 // 2nd timeout after 29.5 ms darkness (only for NIKON!)\r
-#define IRMP_TIMEOUT_NIKON_TIME_MS 29500L // 2nd timeout after 29.5 ms darkness\r
-typedef uint16_t PAUSE_LEN;\r
-#define IRMP_TIMEOUT_NIKON_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_NIKON_TIME + 0.5)\r
-#else\r
-#if (F_INTERRUPTS * IRMP_TIMEOUT_TIME_MS) / 1000000 >= 254\r
-typedef uint16_t PAUSE_LEN;\r
-#else\r
-typedef uint8_t PAUSE_LEN;\r
-#endif\r
+#ifndef IRMP_USE_AS_LIB\r
+# include "irmpconfig.h"\r
#endif\r
\r
-#define IRMP_TIMEOUT_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_TIME + 0.5)\r
-\r
-/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * IR protocols\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- */\r
-#define IRMP_SIRCS_PROTOCOL 1 // Sony\r
-#define IRMP_NEC_PROTOCOL 2 // NEC, Pioneer, JVC, Toshiba, NoName etc.\r
-#define IRMP_SAMSUNG_PROTOCOL 3 // Samsung\r
-#define IRMP_MATSUSHITA_PROTOCOL 4 // Matsushita\r
-#define IRMP_KASEIKYO_PROTOCOL 5 // Kaseikyo (Panasonic etc)\r
-#define IRMP_RECS80_PROTOCOL 6 // Philips, Thomson, Nordmende, Telefunken, Saba\r
-#define IRMP_RC5_PROTOCOL 7 // Philips etc\r
-#define IRMP_DENON_PROTOCOL 8 // Denon, Sharp\r
-#define IRMP_RC6_PROTOCOL 9 // Philips etc\r
-#define IRMP_SAMSUNG32_PROTOCOL 10 // Samsung32: no sync pulse at bit 16, length 32 instead of 37\r
-#define IRMP_APPLE_PROTOCOL 11 // Apple, very similar to NEC\r
-#define IRMP_RECS80EXT_PROTOCOL 12 // Philips, Technisat, Thomson, Nordmende, Telefunken, Saba\r
-#define IRMP_NUBERT_PROTOCOL 13 // Nubert\r
-#define IRMP_BANG_OLUFSEN_PROTOCOL 14 // Bang & Olufsen\r
-#define IRMP_GRUNDIG_PROTOCOL 15 // Grundig\r
-#define IRMP_NOKIA_PROTOCOL 16 // Nokia\r
-#define IRMP_SIEMENS_PROTOCOL 17 // Siemens, e.g. Gigaset\r
-#define IRMP_FDC_PROTOCOL 18 // FDC keyboard\r
-#define IRMP_RCCAR_PROTOCOL 19 // RC Car\r
-#define IRMP_JVC_PROTOCOL 20 // JVC (NEC with 16 bits)\r
-#define IRMP_RC6A_PROTOCOL 21 // RC6A, e.g. Kathrein, XBOX\r
-#define IRMP_NIKON_PROTOCOL 22 // Nikon\r
-#define IRMP_RUWIDO_PROTOCOL 23 // Ruwido, e.g. T-Home Mediareceiver\r
-#define IRMP_IR60_PROTOCOL 24 // IR60 (SDA2008)\r
-#define IRMP_KATHREIN_PROTOCOL 25 // Kathrein\r
-#define IRMP_NETBOX_PROTOCOL 26 // Netbox keyboard (bitserial)\r
-#define IRMP_NEC16_PROTOCOL 27 // NEC with 16 bits (incl. sync)\r
-#define IRMP_NEC42_PROTOCOL 28 // NEC with 42 bits\r
-#define IRMP_LEGO_PROTOCOL 29 // LEGO Power Functions RC\r
-#define IRMP_THOMSON_PROTOCOL 30 // Thomson\r
-\r
-#define IRMP_N_PROTOCOLS 30 // number of supported protocols\r
-\r
-// some flags of struct IRMP_PARAMETER:\r
-#define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01\r
-#define IRMP_PARAM_FLAG_1ST_PULSE_IS_1 0x02\r
-#define IRMP_PARAM_FLAG_IS_SERIAL 0x04\r
-\r
-#define SIRCS_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r
-#define SIRCS_START_BIT_PAUSE_TIME 600.0e-6 // 600 usec pause\r
-#define SIRCS_1_PULSE_TIME 1200.0e-6 // 1200 usec pulse\r
-#define SIRCS_0_PULSE_TIME 600.0e-6 // 600 usec pulse\r
-#define SIRCS_PAUSE_TIME 600.0e-6 // 600 usec pause\r
-#define SIRCS_FRAMES 3 // SIRCS sends each frame 3 times\r
-#define SIRCS_AUTO_REPETITION_PAUSE_TIME 25.0e-3 // auto repetition after 25ms\r
-#define SIRCS_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms\r
-#define SIRCS_ADDRESS_OFFSET 15 // skip 15 bits\r
-#define SIRCS_ADDRESS_LEN 5 // read up to 5 address bits\r
-#define SIRCS_COMMAND_OFFSET 0 // skip 0 bits\r
-#define SIRCS_COMMAND_LEN 15 // read 12-15 command bits\r
-#define SIRCS_MINIMUM_DATA_LEN 12 // minimum data length\r
-#define SIRCS_COMPLETE_DATA_LEN 20 // complete length - may be up to 20\r
-#define SIRCS_STOP_BIT 0 // has no stop bit\r
-#define SIRCS_LSB 1 // LSB...MSB\r
-#define SIRCS_FLAGS 0 // flags\r
-\r
-#define NEC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r
-#define NEC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
-#define NEC_REPEAT_START_BIT_PAUSE_TIME 2250.0e-6 // 2250 usec pause\r
-#define NEC_PULSE_TIME 560.0e-6 // 560 usec pulse\r
-#define NEC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r
-#define NEC_0_PAUSE_TIME 560.0e-6 // 560 usec pause\r
-#define NEC_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
-#define NEC_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define NEC_ADDRESS_LEN 16 // read 16 address bits\r
-#define NEC_COMMAND_OFFSET 16 // skip 16 bits (8 address + 8 /address)\r
-#define NEC_COMMAND_LEN 16 // read 16 bits (8 command + 8 /command)\r
-#define NEC_COMPLETE_DATA_LEN 32 // complete length\r
-#define NEC_STOP_BIT 1 // has stop bit\r
-#define NEC_LSB 1 // LSB...MSB\r
-#define NEC_FLAGS 0 // flags\r
-\r
-#define NEC42_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define NEC42_ADDRESS_LEN 13 // read 13 address bits\r
-#define NEC42_COMMAND_OFFSET 26 // skip 26 bits (2 x 13 address bits)\r
-#define NEC42_COMMAND_LEN 8 // read 8 command bits\r
-#define NEC42_COMPLETE_DATA_LEN 42 // complete length (2 x 13 + 2 x 8)\r
-\r
-#define NEC16_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define NEC16_ADDRESS_LEN 8 // read 8 address bits\r
-#define NEC16_COMMAND_OFFSET 8 // skip 8 bits (8 address)\r
-#define NEC16_COMMAND_LEN 8 // read 8 bits (8 command)\r
-#define NEC16_COMPLETE_DATA_LEN 16 // complete length\r
-\r
-#define SAMSUNG_START_BIT_PULSE_TIME 4500.0e-6 // 4500 usec pulse\r
-#define SAMSUNG_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
-#define SAMSUNG_PULSE_TIME 550.0e-6 // 550 usec pulse\r
-#define SAMSUNG_1_PAUSE_TIME 1650.0e-6 // 1650 usec pause\r
-#define SAMSUNG_0_PAUSE_TIME 550.0e-6 // 550 usec pause\r
-\r
-#define SAMSUNG_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms\r
-#define SAMSUNG_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define SAMSUNG_ADDRESS_LEN 16 // read 16 address bits\r
-#define SAMSUNG_ID_OFFSET 17 // skip 16 + 1 sync bit\r
-#define SAMSUNG_ID_LEN 4 // read 4 id bits\r
-#define SAMSUNG_COMMAND_OFFSET 21 // skip 16 + 1 sync + 4 data bits\r
-#define SAMSUNG_COMMAND_LEN 16 // read 16 command bits\r
-#define SAMSUNG_COMPLETE_DATA_LEN 37 // complete length\r
-#define SAMSUNG_STOP_BIT 1 // has stop bit\r
-#define SAMSUNG_LSB 1 // LSB...MSB?\r
-#define SAMSUNG_FLAGS 0 // flags\r
-\r
-#define SAMSUNG32_COMMAND_OFFSET 16 // skip 16 bits\r
-#define SAMSUNG32_COMMAND_LEN 16 // read 16 command bits\r
-#define SAMSUNG32_COMPLETE_DATA_LEN 32 // complete length\r
-#define SAMSUNG32_FRAMES 1 // SAMSUNG32 sends each frame 1 times\r
-#define SAMSUNG32_AUTO_REPETITION_PAUSE_TIME 47.0e-3 // repetition after 47 ms\r
-#define SAMSUNG32_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 47ms\r
-\r
-#define MATSUSHITA_START_BIT_PULSE_TIME 3488.0e-6 // 3488 usec pulse\r
-#define MATSUSHITA_START_BIT_PAUSE_TIME 3488.0e-6 // 3488 usec pause\r
-#define MATSUSHITA_PULSE_TIME 872.0e-6 // 872 usec pulse\r
-#define MATSUSHITA_1_PAUSE_TIME 2616.0e-6 // 2616 usec pause\r
-#define MATSUSHITA_0_PAUSE_TIME 872.0e-6 // 872 usec pause\r
-#define MATSUSHITA_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
-#define MATSUSHITA_ADDRESS_OFFSET 12 // skip 12 bits\r
-#define MATSUSHITA_ADDRESS_LEN 12 // read 12 address bits\r
-#define MATSUSHITA_COMMAND_OFFSET 0 // skip 0 bits\r
-#define MATSUSHITA_COMMAND_LEN 12 // read 12 bits (6 custom + 6 command)\r
-#define MATSUSHITA_COMPLETE_DATA_LEN 24 // complete length\r
-#define MATSUSHITA_STOP_BIT 1 // has stop bit\r
-#define MATSUSHITA_LSB 1 // LSB...MSB?\r
-#define MATSUSHITA_FLAGS 0 // flags\r
-\r
-#define KASEIKYO_START_BIT_PULSE_TIME 3380.0e-6 // 3380 usec pulse\r
-#define KASEIKYO_START_BIT_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r
-#define KASEIKYO_PULSE_TIME 423.0e-6 // 525 usec pulse\r
-#define KASEIKYO_1_PAUSE_TIME 1269.0e-6 // 525 usec pause\r
-#define KASEIKYO_0_PAUSE_TIME 423.0e-6 // 1690 usec pause\r
-#define KASEIKYO_AUTO_REPETITION_PAUSE_TIME 74.0e-3 // repetition after 74 ms\r
-#define KASEIKYO_FRAME_REPEAT_PAUSE_TIME 74.0e-3 // frame repeat after 74 ms\r
-#define KASEIKYO_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define KASEIKYO_ADDRESS_LEN 16 // read 16 address bits\r
-#define KASEIKYO_COMMAND_OFFSET 28 // skip 28 bits (16 manufacturer & 4 parity & 8 genre)\r
-#define KASEIKYO_COMMAND_LEN 12 // read 12 command bits (10 real command & 2 id)\r
-#define KASEIKYO_COMPLETE_DATA_LEN 48 // complete length\r
-#define KASEIKYO_STOP_BIT 1 // has stop bit\r
-#define KASEIKYO_LSB 1 // LSB...MSB?\r
-#define KASEIKYO_FRAMES 2 // KASEIKYO sends 1st frame 2 times\r
-#define KASEIKYO_FLAGS 0 // flags\r
-\r
-#define RECS80_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
-#define RECS80_START_BIT_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r
-#define RECS80_PULSE_TIME 158.0e-6 // 158 usec pulse\r
-#define RECS80_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r
-#define RECS80_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r
-#define RECS80_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
-#define RECS80_ADDRESS_OFFSET 1 // skip 1 bit (toggle bit)\r
-#define RECS80_ADDRESS_LEN 3 // read 3 address bits\r
-#define RECS80_COMMAND_OFFSET 4 // skip 4 bits (1 toggle + 3 address)\r
-#define RECS80_COMMAND_LEN 6 // read 6 command bits\r
-#define RECS80_COMPLETE_DATA_LEN 10 // complete length\r
-#define RECS80_STOP_BIT 1 // has stop bit\r
-#define RECS80_LSB 0 // MSB...LSB\r
-#define RECS80_FLAGS 0 // flags\r
-\r
-#define RC5_BIT_TIME 889.0e-6 // 889 usec pulse/pause\r
-#define RC5_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
-\r
-#define RC5_ADDRESS_OFFSET 1 // skip 1 bit (2nd start)\r
-#define RC5_ADDRESS_LEN 6 // read 1 toggle bit (for key repetition detection) + 5 address bits\r
-#define RC5_COMMAND_OFFSET 7 // skip 5 bits (2nd start + 1 toggle + 5 address)\r
-#define RC5_COMMAND_LEN 6 // read 6 command bits\r
-#define RC5_COMPLETE_DATA_LEN 13 // complete length\r
-#define RC5_STOP_BIT 0 // has no stop bit\r
-#define RC5_LSB 0 // MSB...LSB\r
-#define RC5_FLAGS IRMP_PARAM_FLAG_IS_MANCHESTER // flags\r
-\r
-#define DENON_PULSE_TIME 310.0e-6 // 310 usec pulse in practice, 275 in theory\r
-#define DENON_1_PAUSE_TIME 1780.0e-6 // 1780 usec pause in practice, 1900 in theory\r
-#define DENON_0_PAUSE_TIME 745.0e-6 // 745 usec pause in practice, 775 in theory\r
-#define DENON_FRAMES 2 // DENON sends each frame 2 times\r
-#define DENON_AUTO_REPETITION_PAUSE_TIME 65.0e-3 // inverted repetition after 65ms\r
-#define DENON_FRAME_REPEAT_PAUSE_TIME 65.0e-3 // frame repeat after 65ms\r
-#define DENON_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define DENON_ADDRESS_LEN 5 // read 5 address bits\r
-#define DENON_COMMAND_OFFSET 5 // skip 5\r
-#define DENON_COMMAND_LEN 10 // read 10 command bits\r
-#define DENON_COMPLETE_DATA_LEN 15 // complete length\r
-#define DENON_STOP_BIT 1 // has stop bit\r
-#define DENON_LSB 0 // MSB...LSB\r
-#define DENON_FLAGS 0 // flags\r
-\r
-#define RC6_START_BIT_PULSE_TIME 2666.0e-6 // 2.666 msec pulse\r
-#define RC6_START_BIT_PAUSE_TIME 889.0e-6 // 889 usec pause\r
-#define RC6_TOGGLE_BIT_TIME 889.0e-6 // 889 msec pulse/pause\r
-#define RC6_BIT_TIME 444.0e-6 // 889 usec pulse/pause\r
-#define RC6_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
-#define RC6_ADDRESS_OFFSET 5 // skip "1" + 3 mode bits + 1 toggle bit\r
-#define RC6_ADDRESS_LEN 8 // read 8 address bits\r
-#define RC6_COMMAND_OFFSET 13 // skip 12 bits ("1" + 3 mode + 1 toggle + 8 address)\r
-#define RC6_COMMAND_LEN 8 // read 8 command bits\r
-#define RC6_COMPLETE_DATA_LEN_SHORT 21 // complete length\r
-#define RC6_COMPLETE_DATA_LEN_LONG 36 // complete length\r
-#define RC6_STOP_BIT 0 // has no stop bit\r
-#define RC6_LSB 0 // MSB...LSB\r
-#define RC6_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
-\r
-#define RECS80EXT_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
-#define RECS80EXT_START_BIT_PAUSE_TIME 3637.0e-6 // 3637 usec pause\r
-#define RECS80EXT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
-#define RECS80EXT_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r
-#define RECS80EXT_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r
-#define RECS80EXT_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
-#define RECS80EXT_ADDRESS_OFFSET 2 // skip 2 bits (2nd start + 1 toggle)\r
-#define RECS80EXT_ADDRESS_LEN 4 // read 4 address bits\r
-#define RECS80EXT_COMMAND_OFFSET 6 // skip 6 bits (2nd start + 1 toggle + 4 address)\r
-#define RECS80EXT_COMMAND_LEN 6 // read 6 command bits\r
-#define RECS80EXT_COMPLETE_DATA_LEN 12 // complete length\r
-#define RECS80EXT_STOP_BIT 1 // has stop bit\r
-#define RECS80EXT_LSB 0 // MSB...LSB\r
-#define RECS80EXT_FLAGS 0 // flags\r
-\r
-#define NUBERT_START_BIT_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r
-#define NUBERT_START_BIT_PAUSE_TIME 340.0e-6 // 340 usec pause\r
-#define NUBERT_1_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r
-#define NUBERT_1_PAUSE_TIME 340.0e-6 // 340 usec pause\r
-#define NUBERT_0_PULSE_TIME 500.0e-6 // 500 usec pulse\r
-#define NUBERT_0_PAUSE_TIME 1300.0e-6 // 1300 usec pause\r
-#define NUBERT_FRAMES 2 // Nubert sends 2 frames\r
-#define NUBERT_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r
-#define NUBERT_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 45ms\r
-#define NUBERT_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define NUBERT_ADDRESS_LEN 0 // read 0 address bits\r
-#define NUBERT_COMMAND_OFFSET 0 // skip 0 bits\r
-#define NUBERT_COMMAND_LEN 10 // read 10 bits\r
-#define NUBERT_COMPLETE_DATA_LEN 10 // complete length\r
-#define NUBERT_STOP_BIT 1 // has stop bit\r
-#define NUBERT_LSB 0 // MSB?\r
-#define NUBERT_FLAGS 0 // flags\r
-\r
-#define BANG_OLUFSEN_START_BIT1_PULSE_TIME 200.0e-6 // 200 usec pulse\r
-#define BANG_OLUFSEN_START_BIT1_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
-#define BANG_OLUFSEN_START_BIT2_PULSE_TIME 200.0e-6 // 200 usec pulse\r
-#define BANG_OLUFSEN_START_BIT2_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
-#define BANG_OLUFSEN_START_BIT3_PULSE_TIME 200.0e-6 // 200 usec pulse\r
-#define BANG_OLUFSEN_START_BIT3_PAUSE_TIME 15625.0e-6 // 15625 usec pause\r
-#define BANG_OLUFSEN_START_BIT4_PULSE_TIME 200.0e-6 // 200 usec pulse\r
-#define BANG_OLUFSEN_START_BIT4_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
-#define BANG_OLUFSEN_PULSE_TIME 200.0e-6 // 200 usec pulse\r
-#define BANG_OLUFSEN_1_PAUSE_TIME 9375.0e-6 // 9375 usec pause\r
-#define BANG_OLUFSEN_0_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
-#define BANG_OLUFSEN_R_PAUSE_TIME 6250.0e-6 // 6250 usec pause (repeat last bit)\r
-#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME 12500.0e-6 // 12500 usec pause (trailer bit)\r
-#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
-#define BANG_OLUFSEN_ADDRESS_OFFSET 0 // no address bits\r
-#define BANG_OLUFSEN_ADDRESS_LEN 0 // no address bits\r
-#define BANG_OLUFSEN_COMMAND_OFFSET 3 // skip startbits 2, 3, 4\r
-#define BANG_OLUFSEN_COMMAND_LEN 16 // read 16 command bits\r
-#define BANG_OLUFSEN_COMPLETE_DATA_LEN 20 // complete length: startbits 2, 3, 4 + 16 data bits + trailer bit\r
-#define BANG_OLUFSEN_STOP_BIT 1 // has stop bit\r
-#define BANG_OLUFSEN_LSB 0 // MSB...LSB\r
-#define BANG_OLUFSEN_FLAGS 0 // flags\r
-\r
-#define GRUNDIG_NOKIA_IR60_BIT_TIME 528.0e-6 // 528 usec pulse/pause\r
-#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME 2639.0e-6 // 2639 usec pause after pre bit\r
-#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME 117.76e-3 // info frame repeat after 117.76 ms\r
-#define GRUNDIG_NOKIA_IR60_STOP_BIT 0 // has no stop bit\r
-#define GRUNDIG_NOKIA_IR60_LSB 1 // MSB...LSB\r
-#define GRUNDIG_NOKIA_IR60_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
-\r
-#define GRUNDIG_FRAMES 2 // GRUNDIG sends each frame 1+1 times\r
-#define GRUNDIG_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r
-#define GRUNDIG_ADDRESS_OFFSET 0 // no address\r
-#define GRUNDIG_ADDRESS_LEN 0 // no address\r
-#define GRUNDIG_COMMAND_OFFSET 1 // skip 1 start bit\r
-#define GRUNDIG_COMMAND_LEN 9 // read 9 command bits\r
-#define GRUNDIG_COMPLETE_DATA_LEN 10 // complete length: 1 start bit + 9 data bits\r
-\r
-#define NOKIA_FRAMES 3 // NOKIA sends each frame 1 + 1 + 1 times\r
-#define NOKIA_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r
-#define NOKIA_ADDRESS_OFFSET 9 // skip 9 bits (1 start bit + 8 data bits)\r
-#define NOKIA_ADDRESS_LEN 8 // 7 address bits\r
-#define NOKIA_COMMAND_OFFSET 1 // skip 1 bit (1 start bit)\r
-#define NOKIA_COMMAND_LEN 8 // read 8 command bits\r
-#define NOKIA_COMPLETE_DATA_LEN 17 // complete length: 1 start bit + 8 address bits + 8 command bits\r
-\r
-#define IR60_FRAMES 2 // IR60 sends each frame 1+1 times\r
-#define IR60_AUTO_REPETITION_PAUSE_TIME 22.2e-3 // repetition after 22.2ms\r
-#define IR60_TIMEOUT_TIME 5000.0e-6 // timeout grundig frame, switch to IR60\r
-#define IR60_ADDRESS_OFFSET 0 // skip 1 bits\r
-#define IR60_ADDRESS_LEN 0 // read 0 address bits\r
-#define IR60_COMMAND_OFFSET 0 // skip 1 bit (start bit after pre bit, always 1)\r
-#define IR60_COMMAND_LEN 7 // read 6 command bits\r
-#define IR60_COMPLETE_DATA_LEN 7 // complete length\r
-\r
-#define SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME 275.0e-6 // 275 usec pulse\r
-#define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME 550.0e-6 // 550 usec pause\r
-#define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME 275.0e-6 // 275 usec short pulse\r
-#define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME_2 550.0e-6 // 550 usec long pulse\r
-#define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME 275.0e-6 // 275 usec short pause\r
-#define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME_2 550.0e-6 // 550 usec long pause\r
-#define SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
-#define SIEMENS_OR_RUWIDO_STOP_BIT 0 // has no stop bit\r
-#define SIEMENS_OR_RUWIDO_LSB 0 // MSB...LSB\r
-#define SIEMENS_OR_RUWIDO_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
-\r
-#define RUWIDO_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define RUWIDO_ADDRESS_LEN 9 // read 9 address bits\r
-#define RUWIDO_COMMAND_OFFSET 9 // skip 9 bits\r
-#define RUWIDO_COMMAND_LEN 8 // read 7 + 1 command bits, last bit is only check bit\r
-#define RUWIDO_COMPLETE_DATA_LEN 17 // complete length\r
-\r
-#define SIEMENS_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define SIEMENS_ADDRESS_LEN 11 // read 11 bits\r
-#define SIEMENS_COMMAND_OFFSET 11 // skip 11 bits\r
-#define SIEMENS_COMMAND_LEN 11 // read 10 + 1 command bits, last bit is only check bit\r
-#define SIEMENS_COMPLETE_DATA_LEN 22 // complete length\r
+#if defined (ATMEL_AVR)\r
+# define _CONCAT(a,b) a##b\r
+# define CONCAT(a,b) _CONCAT(a,b)\r
+# define IRMP_PORT CONCAT(PORT, IRMP_PORT_LETTER)\r
+# define IRMP_DDR CONCAT(DDR, IRMP_PORT_LETTER)\r
+# define IRMP_PIN CONCAT(PIN, IRMP_PORT_LETTER)\r
+# define IRMP_BIT IRMP_BIT_NUMBER\r
+# define input(x) ((x) & (1 << IRMP_BIT))\r
+#elif defined (PIC_C18)\r
+# define input(x) (x)\r
+#elif defined (PIC_CCS)\r
+# define input(x) (x)\r
+#elif defined (ARM_STM32)\r
+# define _CONCAT(a,b) a##b\r
+# define CONCAT(a,b) _CONCAT(a,b)\r
+# define IRMP_PORT CONCAT(GPIO, IRMP_PORT_LETTER)\r
+# if defined (ARM_STM32L1XX)\r
+# define IRMP_PORT_RCC CONCAT(RCC_AHBPeriph_GPIO, IRMP_PORT_LETTER)\r
+# elif defined (ARM_STM32F10X)\r
+# define IRMP_PORT_RCC CONCAT(RCC_APB2Periph_GPIO, IRMP_PORT_LETTER)\r
+# elif defined (ARM_STM32F4XX)\r
+# define IRMP_PORT_RCC CONCAT(RCC_AHB1Periph_GPIO, IRMP_PORT_LETTER)\r
+# endif\r
+# define IRMP_BIT CONCAT(GPIO_Pin_, IRMP_BIT_NUMBER)\r
+# define IRMP_PIN IRMP_PORT // for use with input(x) below\r
+# define input(x) (GPIO_ReadInputDataBit(x, IRMP_BIT))\r
+# ifndef USE_STDPERIPH_DRIVER\r
+# warning The STM32 port of IRMP uses the ST standard peripheral drivers which are not enabled in your build configuration.\r
+# endif\r
+#endif\r
\r
-#define FDC_START_BIT_PULSE_TIME 2085.0e-6 // 2085 usec pulse\r
-#define FDC_START_BIT_PAUSE_TIME 966.0e-6 // 966 usec pause\r
-#define FDC_PULSE_TIME 300.0e-6 // 300 usec pulse\r
-#define FDC_1_PAUSE_TIME 715.0e-6 // 715 usec pause\r
-#define FDC_0_PAUSE_TIME 220.0e-6 // 220 usec pause\r
-#define FDC_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms\r
-#define FDC_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define FDC_ADDRESS_LEN 14 // read 14 address bits, but use only 6, shift 8 into command\r
-#define FDC_COMMAND_OFFSET 20 // skip 20 bits\r
-#define FDC_COMMAND_LEN 12 // read 12 bits\r
-#define FDC_COMPLETE_DATA_LEN 40 // complete length\r
-#define FDC_STOP_BIT 1 // has stop bit\r
-#define FDC_LSB 1 // LSB...MSB\r
-#define FDC_FLAGS 0 // flags\r
+#if IRMP_SUPPORT_DENON_PROTOCOL == 1 && IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r
+# warning DENON protocol conflicts wih RUWIDO, please enable only one of both protocols\r
+# warning RUWIDO protocol disabled\r
+# undef IRMP_SUPPORT_RUWIDO_PROTOCOL\r
+# define IRMP_SUPPORT_RUWIDO_PROTOCOL 0\r
+#endif\r
\r
-#define RCCAR_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse\r
-#define RCCAR_START_BIT_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r
-#define RCCAR_PULSE_TIME 600.0e-6 // 360 usec pulse\r
-#define RCCAR_1_PAUSE_TIME 450.0e-6 // 650 usec pause\r
-#define RCCAR_0_PAUSE_TIME 900.0e-6 // 180 usec pause\r
-#define RCCAR_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
-#define RCCAR_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define RCCAR_ADDRESS_LEN 0 // read 0 address bits\r
-#define RCCAR_COMMAND_OFFSET 0 // skip 0 bits\r
-#define RCCAR_COMMAND_LEN 13 // read 13 bits\r
-#define RCCAR_COMPLETE_DATA_LEN 13 // complete length\r
-#define RCCAR_STOP_BIT 1 // has stop bit\r
-#define RCCAR_LSB 1 // LSB...MSB\r
-#define RCCAR_FLAGS 0 // flags\r
+#if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+# warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000)\r
+# undef IRMP_SUPPORT_SIEMENS_PROTOCOL\r
+# define IRMP_SUPPORT_SIEMENS_PROTOCOL 0\r
+#endif\r
\r
-#define JVC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r
-#define JVC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
-#define JVC_PULSE_TIME 560.0e-6 // 560 usec pulse\r
-#define JVC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r
-#define JVC_0_PAUSE_TIME 560.0e-6 // 560 usec pause\r
-#define JVC_FRAME_REPEAT_PAUSE_TIME 22.0e-3 // frame repeat after 22ms\r
-#define JVC_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define JVC_ADDRESS_LEN 4 // read 4 address bits\r
-#define JVC_COMMAND_OFFSET 4 // skip 4 bits\r
-#define JVC_COMMAND_LEN 12 // read 12 bits\r
-#define JVC_COMPLETE_DATA_LEN 16 // complete length\r
-#define JVC_STOP_BIT 1 // has stop bit\r
-#define JVC_LSB 1 // LSB...MSB\r
-#define JVC_FLAGS 0 // flags\r
+#if IRMP_SUPPORT_RUWIDO_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+# warning F_INTERRUPTS too low, RUWIDO protocol disabled (should be at least 15000)\r
+# undef IRMP_SUPPORT_RUWIDO_PROTOCOL\r
+# define IRMP_SUPPORT_RUWIDO_PROTOCOL 0\r
+#endif\r
\r
-#define NIKON_START_BIT_PULSE_TIME 2200.0e-6 // 2200 usec pulse\r
-#define NIKON_START_BIT_PAUSE_TIME 27100.0e-6 // 27100 usec pause\r
-#define NIKON_PULSE_TIME 500.0e-6 // 500 usec pulse\r
-#define NIKON_1_PAUSE_TIME 3500.0e-6 // 3500 usec pause\r
-#define NIKON_0_PAUSE_TIME 1500.0e-6 // 1500 usec pause\r
-#define NIKON_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms\r
-#define NIKON_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define NIKON_ADDRESS_LEN 0 // read 0 address bits\r
-#define NIKON_COMMAND_OFFSET 0 // skip 0 bits\r
-#define NIKON_COMMAND_LEN 2 // read 2 bits\r
-#define NIKON_COMPLETE_DATA_LEN 2 // complete length\r
-#define NIKON_STOP_BIT 1 // has stop bit\r
-#define NIKON_LSB 0 // LSB...MSB\r
-#define NIKON_FLAGS 0 // flags\r
+#if IRMP_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+# warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 15000)\r
+# undef IRMP_SUPPORT_RECS80_PROTOCOL\r
+# define IRMP_SUPPORT_RECS80_PROTOCOL 0\r
+#endif\r
\r
-#define KATHREIN_START_BIT_PULSE_TIME 210.0e-6 // 1340 usec pulse\r
-#define KATHREIN_START_BIT_PAUSE_TIME 6218.0e-6 // 340 usec pause\r
-#define KATHREIN_1_PULSE_TIME 210.0e-6 // 1340 usec pulse\r
-#define KATHREIN_1_PAUSE_TIME 3000.0e-6 // 340 usec pause\r
-#define KATHREIN_0_PULSE_TIME 210.0e-6 // 500 usec pulse\r
-#define KATHREIN_0_PAUSE_TIME 1400.0e-6 // 1300 usec pause\r
-#define KATHREIN_SYNC_BIT_PAUSE_LEN_TIME 4600.0e-6 // 4600 usec sync (on 6th and/or 8th bit)\r
-#define KATHREIN_FRAMES 1 // Kathrein sends 1 frame\r
-#define KATHREIN_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r
-#define KATHREIN_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r
-#define KATHREIN_ADDRESS_OFFSET 1 // skip 1 bits\r
-#define KATHREIN_ADDRESS_LEN 4 // read 4 address bits\r
-#define KATHREIN_COMMAND_OFFSET 5 // skip 5 bits\r
-#define KATHREIN_COMMAND_LEN 7 // read 7 bits\r
-#define KATHREIN_COMPLETE_DATA_LEN 13 // complete length\r
-#define KATHREIN_STOP_BIT 1 // has stop bit\r
-#define KATHREIN_LSB 0 // MSB\r
-#define KATHREIN_FLAGS 0 // flags\r
+#if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+# warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 15000)\r
+# undef IRMP_SUPPORT_RECS80EXT_PROTOCOL\r
+# define IRMP_SUPPORT_RECS80EXT_PROTOCOL 0\r
+#endif\r
\r
-#define NETBOX_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r
-#define NETBOX_START_BIT_PAUSE_TIME 800.0e-6 // 800 usec pause\r
-#define NETBOX_PULSE_TIME 800.0e-6 // 800 usec pulse\r
-#define NETBOX_PAUSE_TIME 800.0e-6 // 800 usec pause\r
-#define NETBOX_FRAMES 1 // Netbox sends 1 frame\r
-#define NETBOX_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r
-#define NETBOX_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r
-#define NETBOX_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define NETBOX_ADDRESS_LEN 3 // read 3 address bits\r
-#define NETBOX_COMMAND_OFFSET 3 // skip 3 bits\r
-#define NETBOX_COMMAND_LEN 13 // read 13 bits\r
-#define NETBOX_COMPLETE_DATA_LEN 16 // complete length\r
-#define NETBOX_STOP_BIT 0 // has no stop bit\r
-#define NETBOX_LSB 1 // LSB\r
-#define NETBOX_FLAGS IRMP_PARAM_FLAG_IS_SERIAL // flags\r
+#if IRMP_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
+# warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000)\r
+# undef IRMP_SUPPORT_LEGO_PROTOCOL\r
+# define IRMP_SUPPORT_LEGO_PROTOCOL 0\r
+#endif\r
\r
-#define LEGO_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz)\r
-#define LEGO_START_BIT_PAUSE_TIME 1026.0e-6 // 1026 usec pause (39 x 1/38kHz)\r
-#define LEGO_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz)\r
-#define LEGO_1_PAUSE_TIME 553.0e-6 // 553 usec pause (21 x 1/38kHz)\r
-#define LEGO_0_PAUSE_TIME 263.0e-6 // 263 usec pause (10 x 1/38kHz)\r
-#define LEGO_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
-#define LEGO_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define LEGO_ADDRESS_LEN 0 // read 0 address bits\r
-#define LEGO_COMMAND_OFFSET 0 // skip 0 bits\r
-#define LEGO_COMMAND_LEN 16 // read 16 bits (12 command + 4 CRC)\r
-#define LEGO_COMPLETE_DATA_LEN 16 // complete length\r
-#define LEGO_STOP_BIT 1 // has stop bit\r
-#define LEGO_LSB 0 // MSB...LSB\r
-#define LEGO_FLAGS 0 // flags\r
+#if IRMP_SUPPORT_JVC_PROTOCOL == 1 && IRMP_SUPPORT_NEC_PROTOCOL == 0\r
+# warning JVC protocol needs also NEC protocol, NEC protocol enabled\r
+# undef IRMP_SUPPORT_NEC_PROTOCOL\r
+# define IRMP_SUPPORT_NEC_PROTOCOL 1\r
+#endif\r
\r
-#define THOMSON_PULSE_TIME 550.0e-6 // 550 usec pulse\r
-#define THOMSON_1_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
-#define THOMSON_0_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r
-#define THOMSON_FRAMES 1 // THOMSON sends 1 frame\r
-#define THOMSON_AUTO_REPETITION_PAUSE_TIME 65.0e-3 // repetition after 65ms\r
-#define THOMSON_FRAME_REPEAT_PAUSE_TIME 65.0e-3 // frame repeat after 65ms\r
-#define THOMSON_ADDRESS_OFFSET 0 // skip 0 bits\r
-#define THOMSON_ADDRESS_LEN 4 // read 4 address bits\r
-#define THOMSON_COMMAND_OFFSET 5 // skip 4 address bits + 1 toggle bit\r
-#define THOMSON_COMMAND_LEN 7 // read 7 command bits\r
-#define THOMSON_COMPLETE_DATA_LEN 12 // complete length\r
-#define THOMSON_STOP_BIT 1 // has stop bit\r
-#define THOMSON_LSB 0 // MSB...LSB\r
-#define THOMSON_FLAGS 0 // flags\r
+#if IRMP_SUPPORT_NEC16_PROTOCOL == 1 && IRMP_SUPPORT_NEC_PROTOCOL == 0\r
+# warning NEC16 protocol needs also NEC protocol, NEC protocol enabled\r
+# undef IRMP_SUPPORT_NEC_PROTOCOL\r
+# define IRMP_SUPPORT_NEC_PROTOCOL 1\r
+#endif\r
\r
-#define AUTO_FRAME_REPETITION_TIME 80.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms\r
- // KASEIKYO: automatic repetition after 75ms\r
+#if IRMP_SUPPORT_NEC42_PROTOCOL == 1 && IRMP_SUPPORT_NEC_PROTOCOL == 0\r
+# warning NEC42 protocol needs also NEC protocol, NEC protocol enabled\r
+# undef IRMP_SUPPORT_NEC_PROTOCOL\r
+# define IRMP_SUPPORT_NEC_PROTOCOL 1\r
+#endif\r
\r
-#define TRUE 1\r
-#define FALSE 0\r
+#if F_INTERRUPTS > 20000\r
+#error F_INTERRUPTS too high (should be not greater than 20000)\r
+#endif\r
\r
-#define IRMP_FLAG_REPETITION 0x01\r
+#include "irmpprotocols.h"\r
\r
-typedef struct\r
-{\r
- uint8_t protocol; // protocol, i.e. NEC_PROTOCOL\r
- uint16_t address; // address\r
- uint16_t command; // command\r
- uint8_t flags; // flags, e.g. repetition\r
-} IRMP_DATA;\r
+#define IRMP_FLAG_REPETITION 0x01\r
\r
extern void irmp_init (void);\r
extern uint8_t irmp_get_data (IRMP_DATA *);\r
\r
#if IRMP_USE_CALLBACK == 1\r
extern void irmp_set_callback_ptr (void (*cb)(uint8_t));\r
-#endif // IRSND_USE_CALLBACK == 1\r
+#endif // IRMP_USE_CALLBACK == 1\r
\r
-#endif /* _WC_IRMP_H_ */\r
+#endif /* _IRMP_H_ */\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* irmpconfig.h\r
*\r
- * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de\r
+ * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRMP.H!\r
*\r
- * $Id: irmpconfig.h,v 1.83 2012/02/24 15:00:18 fm Exp $\r
+ * Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de\r
+ *\r
+ * $Id: irmpconfig.h,v 1.90 2012/05/23 12:26:26 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
#ifndef _IRMPCONFIG_H_\r
#define _IRMPCONFIG_H_\r
\r
+#ifndef _IRMP_H_\r
+# error please include only irmp.h, not irmpconfig.h\r
+#endif\r
+\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* Change F_INTERRUPTS if you change the number of interrupts per second,\r
* Normally, F_INTERRUPTS should be in the range from 10000 to 15000, typical is 15000\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
#ifndef F_INTERRUPTS\r
-#define F_INTERRUPTS 15000 // interrupts per second, min: 10000, max: 20000, typ: 15000\r
+# define F_INTERRUPTS 15000 // interrupts per second, min: 10000, max: 20000, typ: 15000\r
#endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*\r
* If you want to use FDC or RCCAR simultaneous with RC5 protocol, additional program space is required.\r
* If you don't need RC5 when using FDC/RCCAR, you should disable RC5.\r
+ * You cannot enable both DENON and RUWIDO, only enable one of them.\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
#define IRMP_SUPPORT_JVC_PROTOCOL 0 // JVC >= 10000 ~150 bytes\r
#define IRMP_SUPPORT_NEC16_PROTOCOL 0 // NEC16 >= 10000 ~100 bytes\r
#define IRMP_SUPPORT_NEC42_PROTOCOL 0 // NEC42 >= 10000 ~300 bytes\r
-#define IRMP_SUPPORT_IR60_PROTOCOL 1 // IR60 (SDA2008) >= 10000 ~300 bytes\r
+#define IRMP_SUPPORT_IR60_PROTOCOL 0 // IR60 (SDA2008) >= 10000 ~300 bytes\r
#define IRMP_SUPPORT_GRUNDIG_PROTOCOL 0 // Grundig >= 10000 ~300 bytes\r
#define IRMP_SUPPORT_SIEMENS_PROTOCOL 0 // Siemens Gigaset >= 15000 ~550 bytes\r
#define IRMP_SUPPORT_NOKIA_PROTOCOL 0 // Nokia >= 10000 ~300 bytes\r
#define IRMP_SUPPORT_LEGO_PROTOCOL 0 // LEGO Power RC >= 20000 ~150 bytes\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Change hardware pin here:\r
+ * Change hardware pin here for ATMEL AVR\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#if defined (PIC_C18) // Microchip C18 Compiler\r
-#include <p18cxxx.h> // main PIC18 h file\r
-#define IRMP_PIN PORTBbits.RB4 // use RB4 as IR input on PIC\r
-#define input(x) (x)\r
-\r
-#elif defined (PIC_CCS_COMPILER) // PIC CCS Compiler:\r
-#define IRMP_PIN PIN_B4 // use PB4 as IR input on PIC\r
-\r
-#else // AVR:\r
-#define IRMP_PORT PORTB\r
-#define IRMP_DDR DDRB\r
-#define IRMP_PIN PINB\r
-#define IRMP_BIT 6 // use PB6 as IR input on AVR\r
-#define input(x) ((x) & (1 << IRMP_BIT))\r
-#endif\r
+#if defined (ATMEL_AVR) // use PB6 as IR input on AVR\r
+# define IRMP_PORT_LETTER B\r
+# define IRMP_BIT_NUMBER 6\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Set IRMP_LOGGING to 1 if want to log data to UART with 9600Bd\r
+ * Change hardware pin here for PIC C18 compiler\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#ifndef IRMP_LOGGING\r
-#define IRMP_LOGGING 0 // 1: log IR signal (scan), 0: do not (default)\r
-#endif\r
+#elif defined (PIC_C18) // use RB4 as IR input on PIC\r
+# define IRMP_PIN PORTBbits.RB4\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Use external logging routines\r
- * If you enable external logging, you have also to enable IRMP_LOGGING above\r
+ * Change hardware pin here for PIC CCS compiler\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#ifndef IRMP_EXT_LOGGING\r
-#define IRMP_EXT_LOGGING 0 // 1:log, 0: do not log ; \r
-#endif\r
+#elif defined (PIC_CCS)\r
+# define IRMP_PIN PIN_B4 // use PB4 as IR input on PIC\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Set IRMP_PROTOCOL_NAMES to 1 if want to access protocol names (for logging etc), costs ~300 bytes RAM!\r
+ * Change hardware pin here for ARM STM32\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#define IRMP_PROTOCOL_NAMES 0 // 1: access protocol names, 0: do not (default),\r
+#elif defined (ARM_STM32) // use C13 as IR input on STM32\r
+# define IRMP_PORT_LETTER C\r
+# define IRMP_BIT_NUMBER 13\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Use Callbacks to indicate input signal\r
+ * Handling of unknown target system: DON'T CHANGE\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#define IRMP_USE_CALLBACK 0 // flag: 0 = don't use callbacks, 1 = use callbacks, default is 0\r
+#elif !defined (UNIX_OR_WINDOWS)\r
+# error target system not defined.\r
+#endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * DO NOT CHANGE THE FOLLOWING LINES !\r
+ * Set IRMP_LOGGING to 1 if want to log data to UART with 9600Bd\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
-# warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000)\r
-# undef IRMP_SUPPORT_SIEMENS_PROTOCOL\r
-# define IRMP_SUPPORT_SIEMENS_PROTOCOL 0\r
-#endif\r
-\r
-#if IRMP_SUPPORT_RUWIDO_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
-# warning F_INTERRUPTS too low, RUWIDO protocol disabled (should be at least 15000)\r
-# undef IRMP_SUPPORT_RUWIDO_PROTOCOL\r
-# define IRMP_SUPPORT_RUWIDO_PROTOCOL 0\r
-#endif\r
-\r
-#if IRMP_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
-# warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 15000)\r
-# undef IRMP_SUPPORT_RECS80_PROTOCOL\r
-# define IRMP_SUPPORT_RECS80_PROTOCOL 0\r
-#endif\r
-\r
-#if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
-# warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 15000)\r
-# undef IRMP_SUPPORT_RECS80EXT_PROTOCOL\r
-# define IRMP_SUPPORT_RECS80EXT_PROTOCOL 0\r
-#endif\r
-\r
-#if IRMP_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
-# warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000)\r
-# undef IRMP_SUPPORT_LEGO_PROTOCOL\r
-# define IRMP_SUPPORT_LEGO_PROTOCOL 0\r
-#endif\r
-\r
-#if IRMP_SUPPORT_JVC_PROTOCOL == 1 && IRMP_SUPPORT_NEC_PROTOCOL == 0\r
-# warning JVC protocol needs also NEC protocol, NEC protocol enabled\r
-# undef IRMP_SUPPORT_NEC_PROTOCOL\r
-# define IRMP_SUPPORT_NEC_PROTOCOL 1\r
+#ifndef IRMP_LOGGING\r
+# define IRMP_LOGGING 0 // 1: log IR signal (scan), 0: do not. default is 0\r
#endif\r
\r
-#if IRMP_SUPPORT_NEC16_PROTOCOL == 1 && IRMP_SUPPORT_NEC_PROTOCOL == 0\r
-# warning NEC16 protocol needs also NEC protocol, NEC protocol enabled\r
-# undef IRMP_SUPPORT_NEC_PROTOCOL\r
-# define IRMP_SUPPORT_NEC_PROTOCOL 1\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * Use external logging routines\r
+ * If you enable external logging, you have also to enable IRMP_LOGGING above\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#ifndef IRMP_EXT_LOGGING\r
+# define IRMP_EXT_LOGGING 0 // 1: use external logging, 0: do not. default is 0\r
#endif\r
\r
-#if IRMP_SUPPORT_NEC42_PROTOCOL == 1 && IRMP_SUPPORT_NEC_PROTOCOL == 0\r
-# warning NEC42 protocol needs also NEC protocol, NEC protocol enabled\r
-# undef IRMP_SUPPORT_NEC_PROTOCOL\r
-# define IRMP_SUPPORT_NEC_PROTOCOL 1\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * Set IRMP_PROTOCOL_NAMES to 1 if want to access protocol names (for logging etc), costs ~300 bytes RAM!\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#ifndef IRMP_PROTOCOL_NAMES\r
+# define IRMP_PROTOCOL_NAMES 0 // 1: access protocol names, 0: do not. default is 0\r
#endif\r
\r
-#if F_INTERRUPTS > 20000\r
-#error F_INTERRUPTS too high (should be not greater than 20000)\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * Use Callbacks to indicate input signal\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#ifndef IRMP_USE_CALLBACK\r
+# define IRMP_USE_CALLBACK 0 // 1: use callbacks. 0: do not. default is 0\r
#endif\r
\r
#endif /* _WC_IRMPCONFIG_H_ */\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* irmpextlog.c - external logging\r
*\r
- * $Id: irmpextlog.c,v 1.1 2012/02/16 10:40:08 fm Exp $\r
+ * $Id: irmpextlog.c,v 1.2 2012/02/27 09:04:21 fm Exp $\r
*\r
* If you cannot use the internal UART logging routine, adapt the\r
* source below for your application. The following implementation\r
--- /dev/null
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * irmp-system.h - irmp target system definitions\r
+ *\r
+ * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRMP.H or IRSND.H!\r
+ *\r
+ * Copyright (c) 2012 Frank Meyer - frank(at)fli4l.de\r
+ *\r
+ * $Id: irmpprotocols.h,v 1.4 2012/05/23 12:26:26 fm Exp $\r
+ *\r
+ * This program is free software; you can redistribute it and/or modify\r
+ * it under the terms of the GNU General Public License as published by\r
+ * the Free Software Foundation; either version 2 of the License, or\r
+ * (at your option) any later version.\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+\r
+#ifndef _IRMP_PROTOCOLS_H_\r
+#define _IRMP_PROTOCOLS_H_\r
+\r
+#if !defined(_IRMP_H_) && !defined(_IRSND_H_)\r
+# error please include only irmp.h or irsnd.h, not irmpprotocols.h\r
+#endif\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * IR protocols\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+#define IRMP_SIRCS_PROTOCOL 1 // Sony\r
+#define IRMP_NEC_PROTOCOL 2 // NEC, Pioneer, JVC, Toshiba, NoName etc.\r
+#define IRMP_SAMSUNG_PROTOCOL 3 // Samsung\r
+#define IRMP_MATSUSHITA_PROTOCOL 4 // Matsushita\r
+#define IRMP_KASEIKYO_PROTOCOL 5 // Kaseikyo (Panasonic etc)\r
+#define IRMP_RECS80_PROTOCOL 6 // Philips, Thomson, Nordmende, Telefunken, Saba\r
+#define IRMP_RC5_PROTOCOL 7 // Philips etc\r
+#define IRMP_DENON_PROTOCOL 8 // Denon, Sharp\r
+#define IRMP_RC6_PROTOCOL 9 // Philips etc\r
+#define IRMP_SAMSUNG32_PROTOCOL 10 // Samsung32: no sync pulse at bit 16, length 32 instead of 37\r
+#define IRMP_APPLE_PROTOCOL 11 // Apple, very similar to NEC\r
+#define IRMP_RECS80EXT_PROTOCOL 12 // Philips, Technisat, Thomson, Nordmende, Telefunken, Saba\r
+#define IRMP_NUBERT_PROTOCOL 13 // Nubert\r
+#define IRMP_BANG_OLUFSEN_PROTOCOL 14 // Bang & Olufsen\r
+#define IRMP_GRUNDIG_PROTOCOL 15 // Grundig\r
+#define IRMP_NOKIA_PROTOCOL 16 // Nokia\r
+#define IRMP_SIEMENS_PROTOCOL 17 // Siemens, e.g. Gigaset\r
+#define IRMP_FDC_PROTOCOL 18 // FDC keyboard\r
+#define IRMP_RCCAR_PROTOCOL 19 // RC Car\r
+#define IRMP_JVC_PROTOCOL 20 // JVC (NEC with 16 bits)\r
+#define IRMP_RC6A_PROTOCOL 21 // RC6A, e.g. Kathrein, XBOX\r
+#define IRMP_NIKON_PROTOCOL 22 // Nikon\r
+#define IRMP_RUWIDO_PROTOCOL 23 // Ruwido, e.g. T-Home Mediareceiver\r
+#define IRMP_IR60_PROTOCOL 24 // IR60 (SDA2008)\r
+#define IRMP_KATHREIN_PROTOCOL 25 // Kathrein\r
+#define IRMP_NETBOX_PROTOCOL 26 // Netbox keyboard (bitserial)\r
+#define IRMP_NEC16_PROTOCOL 27 // NEC with 16 bits (incl. sync)\r
+#define IRMP_NEC42_PROTOCOL 28 // NEC with 42 bits\r
+#define IRMP_LEGO_PROTOCOL 29 // LEGO Power Functions RC\r
+#define IRMP_THOMSON_PROTOCOL 30 // Thomson\r
+\r
+#define IRMP_N_PROTOCOLS 30 // number of supported protocols\r
+\r
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * timing constants:\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+// fm 22.09.2011: may not be more than 16000L, otherwise some JVC codes will not be accepted\r
+#define IRMP_TIMEOUT_TIME 15500.0e-6 // timeout after 15.5 ms darkness\r
+#define IRMP_TIMEOUT_TIME_MS 15500L // timeout after 15.5 ms darkness\r
+\r
+#if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r
+# define IRMP_TIMEOUT_NIKON_TIME 29500.0e-6 // 2nd timeout after 29.5 ms darkness (only for NIKON!)\r
+# define IRMP_TIMEOUT_NIKON_TIME_MS 29500L // 2nd timeout after 29.5 ms darkness\r
+typedef uint16_t PAUSE_LEN;\r
+# define IRMP_TIMEOUT_NIKON_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_NIKON_TIME + 0.5)\r
+#else\r
+# if (F_INTERRUPTS * IRMP_TIMEOUT_TIME_MS) / 1000000 >= 254\r
+typedef uint16_t PAUSE_LEN;\r
+# else\r
+typedef uint8_t PAUSE_LEN;\r
+# endif\r
+#endif\r
+\r
+#define IRMP_TIMEOUT_LEN (PAUSE_LEN)(F_INTERRUPTS * IRMP_TIMEOUT_TIME + 0.5)\r
+\r
+// some flags of struct IRMP_PARAMETER:\r
+#define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01\r
+#define IRMP_PARAM_FLAG_1ST_PULSE_IS_1 0x02\r
+#define IRMP_PARAM_FLAG_IS_SERIAL 0x04\r
+\r
+#define SIRCS_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r
+#define SIRCS_START_BIT_PAUSE_TIME 600.0e-6 // 600 usec pause\r
+#define SIRCS_1_PULSE_TIME 1200.0e-6 // 1200 usec pulse\r
+#define SIRCS_0_PULSE_TIME 600.0e-6 // 600 usec pulse\r
+#define SIRCS_PAUSE_TIME 600.0e-6 // 600 usec pause\r
+#define SIRCS_FRAMES 3 // SIRCS sends each frame 3 times\r
+#define SIRCS_AUTO_REPETITION_PAUSE_TIME 25.0e-3 // auto repetition after 25ms\r
+#define SIRCS_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms\r
+#define SIRCS_ADDRESS_OFFSET 15 // skip 15 bits\r
+#define SIRCS_ADDRESS_LEN 5 // read up to 5 address bits\r
+#define SIRCS_COMMAND_OFFSET 0 // skip 0 bits\r
+#define SIRCS_COMMAND_LEN 15 // read 12-15 command bits\r
+#define SIRCS_MINIMUM_DATA_LEN 12 // minimum data length\r
+#define SIRCS_COMPLETE_DATA_LEN 20 // complete length - may be up to 20\r
+#define SIRCS_STOP_BIT 0 // has no stop bit\r
+#define SIRCS_LSB 1 // LSB...MSB\r
+#define SIRCS_FLAGS 0 // flags\r
+\r
+#define NEC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r
+#define NEC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
+#define NEC_REPEAT_START_BIT_PAUSE_TIME 2250.0e-6 // 2250 usec pause\r
+#define NEC_PULSE_TIME 560.0e-6 // 560 usec pulse\r
+#define NEC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r
+#define NEC_0_PAUSE_TIME 560.0e-6 // 560 usec pause\r
+#define NEC_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
+#define NEC_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define NEC_ADDRESS_LEN 16 // read 16 address bits\r
+#define NEC_COMMAND_OFFSET 16 // skip 16 bits (8 address + 8 /address)\r
+#define NEC_COMMAND_LEN 16 // read 16 bits (8 command + 8 /command)\r
+#define NEC_COMPLETE_DATA_LEN 32 // complete length\r
+#define NEC_STOP_BIT 1 // has stop bit\r
+#define NEC_LSB 1 // LSB...MSB\r
+#define NEC_FLAGS 0 // flags\r
+\r
+#define NEC42_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define NEC42_ADDRESS_LEN 13 // read 13 address bits\r
+#define NEC42_COMMAND_OFFSET 26 // skip 26 bits (2 x 13 address bits)\r
+#define NEC42_COMMAND_LEN 8 // read 8 command bits\r
+#define NEC42_COMPLETE_DATA_LEN 42 // complete length (2 x 13 + 2 x 8)\r
+\r
+#define NEC16_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define NEC16_ADDRESS_LEN 8 // read 8 address bits\r
+#define NEC16_COMMAND_OFFSET 8 // skip 8 bits (8 address)\r
+#define NEC16_COMMAND_LEN 8 // read 8 bits (8 command)\r
+#define NEC16_COMPLETE_DATA_LEN 16 // complete length\r
+\r
+#define SAMSUNG_START_BIT_PULSE_TIME 4500.0e-6 // 4500 usec pulse\r
+#define SAMSUNG_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
+#define SAMSUNG_PULSE_TIME 550.0e-6 // 550 usec pulse\r
+#define SAMSUNG_1_PAUSE_TIME 1650.0e-6 // 1650 usec pause\r
+#define SAMSUNG_0_PAUSE_TIME 550.0e-6 // 550 usec pause\r
+\r
+#define SAMSUNG_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms\r
+#define SAMSUNG_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define SAMSUNG_ADDRESS_LEN 16 // read 16 address bits\r
+#define SAMSUNG_ID_OFFSET 17 // skip 16 + 1 sync bit\r
+#define SAMSUNG_ID_LEN 4 // read 4 id bits\r
+#define SAMSUNG_COMMAND_OFFSET 21 // skip 16 + 1 sync + 4 data bits\r
+#define SAMSUNG_COMMAND_LEN 16 // read 16 command bits\r
+#define SAMSUNG_COMPLETE_DATA_LEN 37 // complete length\r
+#define SAMSUNG_STOP_BIT 1 // has stop bit\r
+#define SAMSUNG_LSB 1 // LSB...MSB?\r
+#define SAMSUNG_FLAGS 0 // flags\r
+\r
+#define SAMSUNG32_COMMAND_OFFSET 16 // skip 16 bits\r
+#define SAMSUNG32_COMMAND_LEN 16 // read 16 command bits\r
+#define SAMSUNG32_COMPLETE_DATA_LEN 32 // complete length\r
+#define SAMSUNG32_FRAMES 1 // SAMSUNG32 sends each frame 1 times\r
+#define SAMSUNG32_AUTO_REPETITION_PAUSE_TIME 47.0e-3 // repetition after 47 ms\r
+#define SAMSUNG32_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 47ms\r
+\r
+#define MATSUSHITA_START_BIT_PULSE_TIME 3488.0e-6 // 3488 usec pulse\r
+#define MATSUSHITA_START_BIT_PAUSE_TIME 3488.0e-6 // 3488 usec pause\r
+#define MATSUSHITA_PULSE_TIME 872.0e-6 // 872 usec pulse\r
+#define MATSUSHITA_1_PAUSE_TIME 2616.0e-6 // 2616 usec pause\r
+#define MATSUSHITA_0_PAUSE_TIME 872.0e-6 // 872 usec pause\r
+#define MATSUSHITA_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+#define MATSUSHITA_ADDRESS_OFFSET 12 // skip 12 bits\r
+#define MATSUSHITA_ADDRESS_LEN 12 // read 12 address bits\r
+#define MATSUSHITA_COMMAND_OFFSET 0 // skip 0 bits\r
+#define MATSUSHITA_COMMAND_LEN 12 // read 12 bits (6 custom + 6 command)\r
+#define MATSUSHITA_COMPLETE_DATA_LEN 24 // complete length\r
+#define MATSUSHITA_STOP_BIT 1 // has stop bit\r
+#define MATSUSHITA_LSB 1 // LSB...MSB?\r
+#define MATSUSHITA_FLAGS 0 // flags\r
+\r
+#define KASEIKYO_START_BIT_PULSE_TIME 3380.0e-6 // 3380 usec pulse\r
+#define KASEIKYO_START_BIT_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r
+#define KASEIKYO_PULSE_TIME 423.0e-6 // 525 usec pulse\r
+#define KASEIKYO_1_PAUSE_TIME 1269.0e-6 // 525 usec pause\r
+#define KASEIKYO_0_PAUSE_TIME 423.0e-6 // 1690 usec pause\r
+#define KASEIKYO_AUTO_REPETITION_PAUSE_TIME 74.0e-3 // repetition after 74 ms\r
+#define KASEIKYO_FRAME_REPEAT_PAUSE_TIME 74.0e-3 // frame repeat after 74 ms\r
+#define KASEIKYO_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define KASEIKYO_ADDRESS_LEN 16 // read 16 address bits\r
+#define KASEIKYO_COMMAND_OFFSET 28 // skip 28 bits (16 manufacturer & 4 parity & 8 genre)\r
+#define KASEIKYO_COMMAND_LEN 12 // read 12 command bits (10 real command & 2 id)\r
+#define KASEIKYO_COMPLETE_DATA_LEN 48 // complete length\r
+#define KASEIKYO_STOP_BIT 1 // has stop bit\r
+#define KASEIKYO_LSB 1 // LSB...MSB?\r
+#define KASEIKYO_FRAMES 2 // KASEIKYO sends 1st frame 2 times\r
+#define KASEIKYO_FLAGS 0 // flags\r
+\r
+#define RECS80_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
+#define RECS80_START_BIT_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r
+#define RECS80_PULSE_TIME 158.0e-6 // 158 usec pulse\r
+#define RECS80_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r
+#define RECS80_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r
+#define RECS80_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+#define RECS80_ADDRESS_OFFSET 1 // skip 1 bit (toggle bit)\r
+#define RECS80_ADDRESS_LEN 3 // read 3 address bits\r
+#define RECS80_COMMAND_OFFSET 4 // skip 4 bits (1 toggle + 3 address)\r
+#define RECS80_COMMAND_LEN 6 // read 6 command bits\r
+#define RECS80_COMPLETE_DATA_LEN 10 // complete length\r
+#define RECS80_STOP_BIT 1 // has stop bit\r
+#define RECS80_LSB 0 // MSB...LSB\r
+#define RECS80_FLAGS 0 // flags\r
+\r
+#define RC5_BIT_TIME 889.0e-6 // 889 usec pulse/pause\r
+#define RC5_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+\r
+#define RC5_ADDRESS_OFFSET 1 // skip 1 bit (2nd start)\r
+#define RC5_ADDRESS_LEN 6 // read 1 toggle bit (for key repetition detection) + 5 address bits\r
+#define RC5_COMMAND_OFFSET 7 // skip 5 bits (2nd start + 1 toggle + 5 address)\r
+#define RC5_COMMAND_LEN 6 // read 6 command bits\r
+#define RC5_COMPLETE_DATA_LEN 13 // complete length\r
+#define RC5_STOP_BIT 0 // has no stop bit\r
+#define RC5_LSB 0 // MSB...LSB\r
+#define RC5_FLAGS IRMP_PARAM_FLAG_IS_MANCHESTER // flags\r
+\r
+#define DENON_PULSE_TIME 310.0e-6 // 310 usec pulse in practice, 275 in theory\r
+#define DENON_1_PAUSE_TIME 1780.0e-6 // 1780 usec pause in practice, 1900 in theory\r
+#define DENON_0_PAUSE_TIME 745.0e-6 // 745 usec pause in practice, 775 in theory\r
+#define DENON_FRAMES 2 // DENON sends each frame 2 times\r
+#define DENON_AUTO_REPETITION_PAUSE_TIME 65.0e-3 // inverted repetition after 65ms\r
+#define DENON_FRAME_REPEAT_PAUSE_TIME 130.0e-3 // frame repeat after 2 * 65ms\r
+#define DENON_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define DENON_ADDRESS_LEN 5 // read 5 address bits\r
+#define DENON_COMMAND_OFFSET 5 // skip 5\r
+#define DENON_COMMAND_LEN 10 // read 10 command bits\r
+#define DENON_COMPLETE_DATA_LEN 15 // complete length\r
+#define DENON_STOP_BIT 1 // has stop bit\r
+#define DENON_LSB 0 // MSB...LSB\r
+#define DENON_FLAGS 0 // flags\r
+\r
+#define RC6_START_BIT_PULSE_TIME 2666.0e-6 // 2.666 msec pulse\r
+#define RC6_START_BIT_PAUSE_TIME 889.0e-6 // 889 usec pause\r
+#define RC6_TOGGLE_BIT_TIME 889.0e-6 // 889 msec pulse/pause\r
+#define RC6_BIT_TIME 444.0e-6 // 889 usec pulse/pause\r
+#define RC6_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+#define RC6_ADDRESS_OFFSET 5 // skip "1" + 3 mode bits + 1 toggle bit\r
+#define RC6_ADDRESS_LEN 8 // read 8 address bits\r
+#define RC6_COMMAND_OFFSET 13 // skip 12 bits ("1" + 3 mode + 1 toggle + 8 address)\r
+#define RC6_COMMAND_LEN 8 // read 8 command bits\r
+#define RC6_COMPLETE_DATA_LEN_SHORT 21 // complete length\r
+#define RC6_COMPLETE_DATA_LEN_LONG 36 // complete length\r
+#define RC6_STOP_BIT 0 // has no stop bit\r
+#define RC6_LSB 0 // MSB...LSB\r
+#define RC6_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
+\r
+#define RECS80EXT_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
+#define RECS80EXT_START_BIT_PAUSE_TIME 3637.0e-6 // 3637 usec pause\r
+#define RECS80EXT_PULSE_TIME 158.0e-6 // 158 usec pulse\r
+#define RECS80EXT_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r
+#define RECS80EXT_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r
+#define RECS80EXT_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+#define RECS80EXT_ADDRESS_OFFSET 2 // skip 2 bits (2nd start + 1 toggle)\r
+#define RECS80EXT_ADDRESS_LEN 4 // read 4 address bits\r
+#define RECS80EXT_COMMAND_OFFSET 6 // skip 6 bits (2nd start + 1 toggle + 4 address)\r
+#define RECS80EXT_COMMAND_LEN 6 // read 6 command bits\r
+#define RECS80EXT_COMPLETE_DATA_LEN 12 // complete length\r
+#define RECS80EXT_STOP_BIT 1 // has stop bit\r
+#define RECS80EXT_LSB 0 // MSB...LSB\r
+#define RECS80EXT_FLAGS 0 // flags\r
+\r
+#define NUBERT_START_BIT_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r
+#define NUBERT_START_BIT_PAUSE_TIME 340.0e-6 // 340 usec pause\r
+#define NUBERT_1_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r
+#define NUBERT_1_PAUSE_TIME 340.0e-6 // 340 usec pause\r
+#define NUBERT_0_PULSE_TIME 500.0e-6 // 500 usec pulse\r
+#define NUBERT_0_PAUSE_TIME 1300.0e-6 // 1300 usec pause\r
+#define NUBERT_FRAMES 2 // Nubert sends 2 frames\r
+#define NUBERT_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r
+#define NUBERT_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 45ms\r
+#define NUBERT_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define NUBERT_ADDRESS_LEN 0 // read 0 address bits\r
+#define NUBERT_COMMAND_OFFSET 0 // skip 0 bits\r
+#define NUBERT_COMMAND_LEN 10 // read 10 bits\r
+#define NUBERT_COMPLETE_DATA_LEN 10 // complete length\r
+#define NUBERT_STOP_BIT 1 // has stop bit\r
+#define NUBERT_LSB 0 // MSB?\r
+#define NUBERT_FLAGS 0 // flags\r
+\r
+#define BANG_OLUFSEN_START_BIT1_PULSE_TIME 200.0e-6 // 200 usec pulse\r
+#define BANG_OLUFSEN_START_BIT1_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
+#define BANG_OLUFSEN_START_BIT2_PULSE_TIME 200.0e-6 // 200 usec pulse\r
+#define BANG_OLUFSEN_START_BIT2_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
+#define BANG_OLUFSEN_START_BIT3_PULSE_TIME 200.0e-6 // 200 usec pulse\r
+#define BANG_OLUFSEN_START_BIT3_PAUSE_TIME 15625.0e-6 // 15625 usec pause\r
+#define BANG_OLUFSEN_START_BIT4_PULSE_TIME 200.0e-6 // 200 usec pulse\r
+#define BANG_OLUFSEN_START_BIT4_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
+#define BANG_OLUFSEN_PULSE_TIME 200.0e-6 // 200 usec pulse\r
+#define BANG_OLUFSEN_1_PAUSE_TIME 9375.0e-6 // 9375 usec pause\r
+#define BANG_OLUFSEN_0_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r
+#define BANG_OLUFSEN_R_PAUSE_TIME 6250.0e-6 // 6250 usec pause (repeat last bit)\r
+#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME 12500.0e-6 // 12500 usec pause (trailer bit)\r
+#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+#define BANG_OLUFSEN_ADDRESS_OFFSET 0 // no address bits\r
+#define BANG_OLUFSEN_ADDRESS_LEN 0 // no address bits\r
+#define BANG_OLUFSEN_COMMAND_OFFSET 3 // skip startbits 2, 3, 4\r
+#define BANG_OLUFSEN_COMMAND_LEN 16 // read 16 command bits\r
+#define BANG_OLUFSEN_COMPLETE_DATA_LEN 20 // complete length: startbits 2, 3, 4 + 16 data bits + trailer bit\r
+#define BANG_OLUFSEN_STOP_BIT 1 // has stop bit\r
+#define BANG_OLUFSEN_LSB 0 // MSB...LSB\r
+#define BANG_OLUFSEN_FLAGS 0 // flags\r
+\r
+#define GRUNDIG_NOKIA_IR60_BIT_TIME 528.0e-6 // 528 usec pulse/pause\r
+#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME 2639.0e-6 // 2639 usec pause after pre bit\r
+#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME 117.76e-3 // info frame repeat after 117.76 ms\r
+#define GRUNDIG_NOKIA_IR60_STOP_BIT 0 // has no stop bit\r
+#define GRUNDIG_NOKIA_IR60_LSB 1 // MSB...LSB\r
+#define GRUNDIG_NOKIA_IR60_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
+\r
+#define GRUNDIG_FRAMES 2 // GRUNDIG sends each frame 1+1 times\r
+#define GRUNDIG_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r
+#define GRUNDIG_ADDRESS_OFFSET 0 // no address\r
+#define GRUNDIG_ADDRESS_LEN 0 // no address\r
+#define GRUNDIG_COMMAND_OFFSET 1 // skip 1 start bit\r
+#define GRUNDIG_COMMAND_LEN 9 // read 9 command bits\r
+#define GRUNDIG_COMPLETE_DATA_LEN 10 // complete length: 1 start bit + 9 data bits\r
+\r
+#define NOKIA_FRAMES 3 // NOKIA sends each frame 1 + 1 + 1 times\r
+#define NOKIA_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r
+#define NOKIA_ADDRESS_OFFSET 9 // skip 9 bits (1 start bit + 8 data bits)\r
+#define NOKIA_ADDRESS_LEN 8 // 7 address bits\r
+#define NOKIA_COMMAND_OFFSET 1 // skip 1 bit (1 start bit)\r
+#define NOKIA_COMMAND_LEN 8 // read 8 command bits\r
+#define NOKIA_COMPLETE_DATA_LEN 17 // complete length: 1 start bit + 8 address bits + 8 command bits\r
+\r
+#define IR60_FRAMES 2 // IR60 sends each frame 1+1 times\r
+#define IR60_AUTO_REPETITION_PAUSE_TIME 22.2e-3 // repetition after 22.2ms\r
+#define IR60_TIMEOUT_TIME 5000.0e-6 // timeout grundig frame, switch to IR60\r
+#define IR60_ADDRESS_OFFSET 0 // skip 1 bits\r
+#define IR60_ADDRESS_LEN 0 // read 0 address bits\r
+#define IR60_COMMAND_OFFSET 0 // skip 1 bit (start bit after pre bit, always 1)\r
+#define IR60_COMMAND_LEN 7 // read 6 command bits\r
+#define IR60_COMPLETE_DATA_LEN 7 // complete length\r
+\r
+#define SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME 275.0e-6 // 275 usec pulse\r
+#define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME 550.0e-6 // 550 usec pause\r
+#define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME 275.0e-6 // 275 usec short pulse\r
+#define SIEMENS_OR_RUWIDO_BIT_PULSE_TIME_2 550.0e-6 // 550 usec long pulse\r
+#define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME 275.0e-6 // 275 usec short pause\r
+#define SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME_2 550.0e-6 // 550 usec long pause\r
+#define SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r
+#define SIEMENS_OR_RUWIDO_STOP_BIT 0 // has no stop bit\r
+#define SIEMENS_OR_RUWIDO_LSB 0 // MSB...LSB\r
+#define SIEMENS_OR_RUWIDO_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r
+\r
+#define RUWIDO_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define RUWIDO_ADDRESS_LEN 9 // read 9 address bits\r
+#define RUWIDO_COMMAND_OFFSET 9 // skip 9 bits\r
+#define RUWIDO_COMMAND_LEN 8 // read 7 + 1 command bits, last bit is only check bit\r
+#define RUWIDO_COMPLETE_DATA_LEN 17 // complete length\r
+\r
+#define SIEMENS_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define SIEMENS_ADDRESS_LEN 11 // read 11 bits\r
+#define SIEMENS_COMMAND_OFFSET 11 // skip 11 bits\r
+#define SIEMENS_COMMAND_LEN 11 // read 10 + 1 command bits, last bit is only check bit\r
+#define SIEMENS_COMPLETE_DATA_LEN 22 // complete length\r
+\r
+#define FDC_START_BIT_PULSE_TIME 2085.0e-6 // 2085 usec pulse\r
+#define FDC_START_BIT_PAUSE_TIME 966.0e-6 // 966 usec pause\r
+#define FDC_PULSE_TIME 300.0e-6 // 300 usec pulse\r
+#define FDC_1_PAUSE_TIME 715.0e-6 // 715 usec pause\r
+#define FDC_0_PAUSE_TIME 220.0e-6 // 220 usec pause\r
+#define FDC_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms\r
+#define FDC_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define FDC_ADDRESS_LEN 14 // read 14 address bits, but use only 6, shift 8 into command\r
+#define FDC_COMMAND_OFFSET 20 // skip 20 bits\r
+#define FDC_COMMAND_LEN 12 // read 12 bits\r
+#define FDC_COMPLETE_DATA_LEN 40 // complete length\r
+#define FDC_STOP_BIT 1 // has stop bit\r
+#define FDC_LSB 1 // LSB...MSB\r
+#define FDC_FLAGS 0 // flags\r
+\r
+#define RCCAR_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse\r
+#define RCCAR_START_BIT_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r
+#define RCCAR_PULSE_TIME 600.0e-6 // 360 usec pulse\r
+#define RCCAR_1_PAUSE_TIME 450.0e-6 // 650 usec pause\r
+#define RCCAR_0_PAUSE_TIME 900.0e-6 // 180 usec pause\r
+#define RCCAR_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
+#define RCCAR_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define RCCAR_ADDRESS_LEN 0 // read 0 address bits\r
+#define RCCAR_COMMAND_OFFSET 0 // skip 0 bits\r
+#define RCCAR_COMMAND_LEN 13 // read 13 bits\r
+#define RCCAR_COMPLETE_DATA_LEN 13 // complete length\r
+#define RCCAR_STOP_BIT 1 // has stop bit\r
+#define RCCAR_LSB 1 // LSB...MSB\r
+#define RCCAR_FLAGS 0 // flags\r
+\r
+#define JVC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r
+#define JVC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
+#define JVC_PULSE_TIME 560.0e-6 // 560 usec pulse\r
+#define JVC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r
+#define JVC_0_PAUSE_TIME 560.0e-6 // 560 usec pause\r
+#define JVC_FRAME_REPEAT_PAUSE_TIME 22.0e-3 // frame repeat after 22ms\r
+#define JVC_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define JVC_ADDRESS_LEN 4 // read 4 address bits\r
+#define JVC_COMMAND_OFFSET 4 // skip 4 bits\r
+#define JVC_COMMAND_LEN 12 // read 12 bits\r
+#define JVC_COMPLETE_DATA_LEN 16 // complete length\r
+#define JVC_STOP_BIT 1 // has stop bit\r
+#define JVC_LSB 1 // LSB...MSB\r
+#define JVC_FLAGS 0 // flags\r
+\r
+#define NIKON_START_BIT_PULSE_TIME 2200.0e-6 // 2200 usec pulse\r
+#define NIKON_START_BIT_PAUSE_TIME 27100.0e-6 // 27100 usec pause\r
+#define NIKON_PULSE_TIME 500.0e-6 // 500 usec pulse\r
+#define NIKON_1_PAUSE_TIME 3500.0e-6 // 3500 usec pause\r
+#define NIKON_0_PAUSE_TIME 1500.0e-6 // 1500 usec pause\r
+#define NIKON_FRAME_REPEAT_PAUSE_TIME 60.0e-3 // frame repeat after 60ms\r
+#define NIKON_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define NIKON_ADDRESS_LEN 0 // read 0 address bits\r
+#define NIKON_COMMAND_OFFSET 0 // skip 0 bits\r
+#define NIKON_COMMAND_LEN 2 // read 2 bits\r
+#define NIKON_COMPLETE_DATA_LEN 2 // complete length\r
+#define NIKON_STOP_BIT 1 // has stop bit\r
+#define NIKON_LSB 0 // LSB...MSB\r
+#define NIKON_FLAGS 0 // flags\r
+\r
+#define KATHREIN_START_BIT_PULSE_TIME 210.0e-6 // 1340 usec pulse\r
+#define KATHREIN_START_BIT_PAUSE_TIME 6218.0e-6 // 340 usec pause\r
+#define KATHREIN_1_PULSE_TIME 210.0e-6 // 1340 usec pulse\r
+#define KATHREIN_1_PAUSE_TIME 3000.0e-6 // 340 usec pause\r
+#define KATHREIN_0_PULSE_TIME 210.0e-6 // 500 usec pulse\r
+#define KATHREIN_0_PAUSE_TIME 1400.0e-6 // 1300 usec pause\r
+#define KATHREIN_SYNC_BIT_PAUSE_LEN_TIME 4600.0e-6 // 4600 usec sync (on 6th and/or 8th bit)\r
+#define KATHREIN_FRAMES 1 // Kathrein sends 1 frame\r
+#define KATHREIN_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r
+#define KATHREIN_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r
+#define KATHREIN_ADDRESS_OFFSET 1 // skip 1 bits\r
+#define KATHREIN_ADDRESS_LEN 4 // read 4 address bits\r
+#define KATHREIN_COMMAND_OFFSET 5 // skip 5 bits\r
+#define KATHREIN_COMMAND_LEN 7 // read 7 bits\r
+#define KATHREIN_COMPLETE_DATA_LEN 13 // complete length\r
+#define KATHREIN_STOP_BIT 1 // has stop bit\r
+#define KATHREIN_LSB 0 // MSB\r
+#define KATHREIN_FLAGS 0 // flags\r
+\r
+#define NETBOX_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r
+#define NETBOX_START_BIT_PAUSE_TIME 800.0e-6 // 800 usec pause\r
+#define NETBOX_PULSE_TIME 800.0e-6 // 800 usec pulse\r
+#define NETBOX_PAUSE_TIME 800.0e-6 // 800 usec pause\r
+#define NETBOX_FRAMES 1 // Netbox sends 1 frame\r
+#define NETBOX_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r
+#define NETBOX_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 35ms\r
+#define NETBOX_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define NETBOX_ADDRESS_LEN 3 // read 3 address bits\r
+#define NETBOX_COMMAND_OFFSET 3 // skip 3 bits\r
+#define NETBOX_COMMAND_LEN 13 // read 13 bits\r
+#define NETBOX_COMPLETE_DATA_LEN 16 // complete length\r
+#define NETBOX_STOP_BIT 0 // has no stop bit\r
+#define NETBOX_LSB 1 // LSB\r
+#define NETBOX_FLAGS IRMP_PARAM_FLAG_IS_SERIAL // flags\r
+\r
+#define LEGO_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz)\r
+#define LEGO_START_BIT_PAUSE_TIME 1026.0e-6 // 1026 usec pause (39 x 1/38kHz)\r
+#define LEGO_PULSE_TIME 158.0e-6 // 158 usec pulse ( 6 x 1/38kHz)\r
+#define LEGO_1_PAUSE_TIME 553.0e-6 // 553 usec pause (21 x 1/38kHz)\r
+#define LEGO_0_PAUSE_TIME 263.0e-6 // 263 usec pause (10 x 1/38kHz)\r
+#define LEGO_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r
+#define LEGO_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define LEGO_ADDRESS_LEN 0 // read 0 address bits\r
+#define LEGO_COMMAND_OFFSET 0 // skip 0 bits\r
+#define LEGO_COMMAND_LEN 16 // read 16 bits (12 command + 4 CRC)\r
+#define LEGO_COMPLETE_DATA_LEN 16 // complete length\r
+#define LEGO_STOP_BIT 1 // has stop bit\r
+#define LEGO_LSB 0 // MSB...LSB\r
+#define LEGO_FLAGS 0 // flags\r
+\r
+#define THOMSON_PULSE_TIME 550.0e-6 // 550 usec pulse\r
+#define THOMSON_1_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r
+#define THOMSON_0_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r
+#define THOMSON_FRAMES 1 // THOMSON sends 1 frame\r
+#define THOMSON_AUTO_REPETITION_PAUSE_TIME 65.0e-3 // repetition after 65ms\r
+#define THOMSON_FRAME_REPEAT_PAUSE_TIME 65.0e-3 // frame repeat after 65ms\r
+#define THOMSON_ADDRESS_OFFSET 0 // skip 0 bits\r
+#define THOMSON_ADDRESS_LEN 4 // read 4 address bits\r
+#define THOMSON_COMMAND_OFFSET 5 // skip 4 address bits + 1 toggle bit\r
+#define THOMSON_COMMAND_LEN 7 // read 7 command bits\r
+#define THOMSON_COMPLETE_DATA_LEN 12 // complete length\r
+#define THOMSON_STOP_BIT 1 // has stop bit\r
+#define THOMSON_LSB 0 // MSB...LSB\r
+#define THOMSON_FLAGS 0 // flags\r
+\r
+#define AUTO_FRAME_REPETITION_TIME 80.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms\r
+\r
+#endif // _IRMP_PROTOCOLS_H_\r
--- /dev/null
+/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ * irmpsystem.h - system specific includes and defines\r
+ *\r
+ * Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de\r
+ *\r
+ * $Id: irmpsystem.h,v 1.5 2012/05/23 12:26:26 fm Exp $\r
+ *\r
+ * This program is free software; you can redistribute it and/or modify\r
+ * it under the terms of the GNU General Public License as published by\r
+ * the Free Software Foundation; either version 2 of the License, or\r
+ * (at your option) any later version.\r
+ *---------------------------------------------------------------------------------------------------------------------------------------------------\r
+ */\r
+\r
+#ifndef _IRMPSYSTEM_H_\r
+#define _IRMPSYSTEM_H_\r
+\r
+#if !defined(_IRMP_H_) && !defined(_IRSND_H_)\r
+# error please include only irmp.h or irsnd.h, not irmpsystem.h\r
+#endif\r
+\r
+#if defined(__18CXX) // Microchip PIC C18 compiler\r
+# define PIC_C18\r
+#elif defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC compiler\r
+# define PIC_CCS\r
+#elif defined(STM32L1XX_MD) || defined(STM32L1XX_MDP) || defined(STM32L1XX_HD) // ARM STM32\r
+# include <stm32l1xx.h>\r
+# define ARM_STM32\r
+# define ARM_STM32L1XX\r
+#elif defined(STM32F10X_LD) || defined(STM32F10X_LD_VL) \\r
+ || defined(STM32F10X_MD) || defined(STM32F10X_MD_VL) \\r
+ || defined(STM32F10X_HD) || defined(STM32F10X_HD_VL) \\r
+ || defined(STM32F10X_XL) || defined(STM32F10X_CL) // ARM STM32\r
+# include <stm32f10x.h>\r
+# define ARM_STM32\r
+# define ARM_STM32F10X\r
+#elif defined(STM32F4XX) // ARM STM32\r
+# include <stm32f4xx.h>\r
+# define ARM_STM32\r
+# define ARM_STM32F4XX\r
+#elif defined(unix) || defined(WIN32) // Unix/Linux or Windows\r
+# define UNIX_OR_WINDOWS\r
+#else\r
+# define ATMEL_AVR // ATMEL AVR\r
+#endif\r
+\r
+#include <string.h>\r
+\r
+#ifdef UNIX_OR_WINDOWS // Analyze on Unix/Linux or Windows\r
+# include <stdio.h>\r
+# include <stdlib.h>\r
+# include <stdint.h>\r
+# define F_CPU 8000000L\r
+# define ANALYZE\r
+# define DEBUG\r
+#endif\r
+\r
+#if defined(ATMEL_AVR)\r
+# include <stdint.h>\r
+# include <stdio.h>\r
+# include <avr/io.h>\r
+# include <util/delay.h>\r
+# include <avr/pgmspace.h>\r
+# include <avr/interrupt.h>\r
+# define IRSND_OC2 0 // OC2\r
+# define IRSND_OC2A 1 // OC2A\r
+# define IRSND_OC2B 2 // OC2B\r
+# define IRSND_OC0 3 // OC0\r
+# define IRSND_OC0A 4 // OC0A\r
+# define IRSND_OC0B 5 // OC0B\r
+#else\r
+# define PROGMEM\r
+# define memcpy_P memcpy\r
+#endif\r
+\r
+#if defined(PIC_CCS) || defined(PIC_C18) || defined(ARM_STM32)\r
+typedef unsigned char uint8_t;\r
+typedef unsigned short uint16_t;\r
+#endif\r
+\r
+#if defined (PIC_C18)\r
+# include <p18cxxx.h> // main PIC18 h file\r
+# include <timers.h> // timer lib\r
+# include <pwm.h> // pwm lib\r
+# define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module\r
+# define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module\r
+#endif\r
+\r
+#ifndef TRUE\r
+# define TRUE 1\r
+# define FALSE 0\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ uint8_t protocol; // protocol, i.e. NEC_PROTOCOL\r
+ uint16_t address; // address\r
+ uint16_t command; // command\r
+ uint8_t flags; // flags, e.g. repetition\r
+} IRMP_DATA;\r
+\r
+#endif // _IRMPSYSTEM_H_\r
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/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* @file irsnd.c\r
*\r
- * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r
*\r
* Supported mikrocontrollers:\r
*\r
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
*\r
- * $Id: irsnd.c,v 1.48 2012/02/24 14:24:28 fm Exp $\r
+ * $Id: irsnd.c,v 1.54 2012/05/23 12:26:26 fm Exp $\r
*\r
* This program is free software; you can redistribute it and/or modify\r
* it under the terms of the GNU General Public License as published by\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
-#if defined(__18CXX) \r
-#define PIC_C18 // Microchip C18\r
-#include <p18cxxx.h> // basic P18 lib\r
-#include "timers.h" // timer lib\r
-#include "pwm.h" // pwm lib\r
-#endif \r
-\r
-#ifdef unix // test/debug on linux/unix\r
-#include <stdio.h>\r
-#include <unistd.h>\r
-#include <stdlib.h>\r
-#include <string.h>\r
-#include <inttypes.h>\r
-\r
-#define DEBUG\r
-#define F_CPU 8000000L\r
-\r
-#else // not unix:\r
-\r
-#ifdef WIN32 // test/debug on windows\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-#include <string.h>\r
-\r
-#define F_CPU 8000000L\r
-typedef unsigned char uint8_t;\r
-typedef unsigned short uint16_t;\r
-#define DEBUG\r
-\r
-#else\r
-\r
-#ifdef CODEVISION\r
-#define COM2A0 6\r
-#define WGM21 1\r
-#define CS20 0\r
-#elif defined(PIC_C18)\r
- //nothing to do here\r
-#else\r
-#include <inttypes.h>\r
-#include <avr/io.h>\r
-#include <util/delay.h>\r
-#include <avr/pgmspace.h>\r
-#endif // CODEVISION\r
-\r
-#endif // WIN32\r
-#endif // unix\r
-\r
-#include "irmp.h"\r
-#include "irsndconfig.h"\r
#include "irsnd.h"\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7\r
-#if IRSND_OCx == IRSND_OC0A // OC0A\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 2 // OC0A\r
-#elif IRSND_OCx == IRSND_OC0B // OC0B\r
-#define IRSND_PORT PORTA // port A\r
-#define IRSND_DDR DDRA // ddr A\r
-#define IRSND_BIT 7 // OC0B\r
-#else\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
-#endif // IRSND_OCx\r
-\r
-#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
-#if IRSND_OCx == IRSND_OC0A // OC0A\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 0 // OC0A\r
-#elif IRSND_OCx == IRSND_OC0B // OC0B\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 1 // OC0B\r
-#else\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
-#endif // IRSND_OCx\r
-\r
-#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
-#if IRSND_OCx == IRSND_OC2 // OC0A\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 3 // OC0A\r
-#else\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
-#endif // IRSND_OCx\r
-\r
-\r
-#elif defined (__AVR_ATmega16__) \\r
- || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
-#if IRSND_OCx == IRSND_OC2 // OC2\r
-#define IRSND_PORT PORTD // port D\r
-#define IRSND_DDR DDRD // ddr D\r
-#define IRSND_BIT 7 // OC2\r
-#else\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
-#endif // IRSND_OCx\r
-\r
-#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
-#if IRSND_OCx == IRSND_OC2 // OC2\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 1 // OC2\r
-\r
-#elif IRSND_OCx == IRSND_OC0 // OC0\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 0 // OC0\r
-#else\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
-#endif // IRSND_OCx\r
-\r
+#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7\r
+# if IRSND_OCx == IRSND_OC0A // OC0A\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 2 // OC0A\r
+# elif IRSND_OCx == IRSND_OC0B // OC0B\r
+# define IRSND_PORT PORTA // port A\r
+# define IRSND_DDR DDRA // ddr A\r
+# define IRSND_BIT 7 // OC0B\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
+# endif // IRSND_OCx\r
+#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
+# if IRSND_OCx == IRSND_OC0A // OC0A\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 0 // OC0A\r
+# elif IRSND_OCx == IRSND_OC0B // OC0B\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 1 // OC0B\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
+# endif // IRSND_OCx\r
+#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
+# if IRSND_OCx == IRSND_OC2 // OC0A\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 3 // OC0A\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
+# endif // IRSND_OCx\r
+#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
+# if IRSND_OCx == IRSND_OC2 // OC2\r
+# define IRSND_PORT PORTD // port D\r
+# define IRSND_DDR DDRD // ddr D\r
+# define IRSND_BIT 7 // OC2\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
+# endif // IRSND_OCx\r
+#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
+# if IRSND_OCx == IRSND_OC2 // OC2\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 1 // OC2\r
+# elif IRSND_OCx == IRSND_OC0 // OC0\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 0 // OC0\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
+# endif // IRSND_OCx\r
#elif defined (__AVR_ATmega164__) \\r
|| defined (__AVR_ATmega324__) \\r
|| defined (__AVR_ATmega644__) \\r
|| defined (__AVR_ATmega644P__) \\r
|| defined (__AVR_ATmega1284__) \\r
- || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
-#if IRSND_OCx == IRSND_OC2A // OC2A\r
-#define IRSND_PORT PORTD // port D\r
-#define IRSND_DDR DDRD // ddr D\r
-#define IRSND_BIT 7 // OC2A\r
-#elif IRSND_OCx == IRSND_OC2B // OC2B\r
-#define IRSND_PORT PORTD // port D\r
-#define IRSND_DDR DDRD // ddr D\r
-#define IRSND_BIT 6 // OC2B\r
-#elif IRSND_OCx == IRSND_OC0A // OC0A\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 3 // OC0A\r
-#elif IRSND_OCx == IRSND_OC0B // OC0B\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 4 // OC0B\r
-#else\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
-#endif // IRSND_OCx\r
-\r
+ || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
+# if IRSND_OCx == IRSND_OC2A // OC2A\r
+# define IRSND_PORT PORTD // port D\r
+# define IRSND_DDR DDRD // ddr D\r
+# define IRSND_BIT 7 // OC2A\r
+# elif IRSND_OCx == IRSND_OC2B // OC2B\r
+# define IRSND_PORT PORTD // port D\r
+# define IRSND_DDR DDRD // ddr D\r
+# define IRSND_BIT 6 // OC2B\r
+# elif IRSND_OCx == IRSND_OC0A // OC0A\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 3 // OC0A\r
+# elif IRSND_OCx == IRSND_OC0B // OC0B\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 4 // OC0B\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
+# endif // IRSND_OCx\r
#elif defined (__AVR_ATmega48__) \\r
|| defined (__AVR_ATmega88__) \\r
|| defined (__AVR_ATmega88P__) \\r
|| defined (__AVR_ATmega168__) \\r
|| defined (__AVR_ATmega168P__) \\r
- || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
-#if IRSND_OCx == IRSND_OC2A // OC2A\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 3 // OC2A\r
-#elif IRSND_OCx == IRSND_OC2B // OC2B\r
-#define IRSND_PORT PORTD // port D\r
-#define IRSND_DDR DDRD // ddr D\r
-#define IRSND_BIT 3 // OC2B\r
-#elif IRSND_OCx == IRSND_OC0A // OC0A\r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 6 // OC0A\r
-#elif IRSND_OCx == IRSND_OC0B // OC0B\r
-#define IRSND_PORT PORTD // port D\r
-#define IRSND_DDR DDRD // ddr D\r
-#define IRSND_BIT 5 // OC0B\r
-#else\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
-#endif // IRSND_OCx\r
+ || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
+# if IRSND_OCx == IRSND_OC2A // OC2A\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 3 // OC2A\r
+# elif IRSND_OCx == IRSND_OC2B // OC2B\r
+# define IRSND_PORT PORTD // port D\r
+# define IRSND_DDR DDRD // ddr D\r
+# define IRSND_BIT 3 // OC2B\r
+# elif IRSND_OCx == IRSND_OC0A // OC0A\r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 6 // OC0A\r
+# elif IRSND_OCx == IRSND_OC0B // OC0B\r
+# define IRSND_PORT PORTD // port D\r
+# define IRSND_DDR DDRD // ddr D\r
+# define IRSND_BIT 5 // OC0B\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
+# endif // IRSND_OCx\r
#elif defined (__AVR_ATmega8515__) \r
-#if IRSND_OCx == IRSND_OC0 \r
-#define IRSND_PORT PORTB // port B\r
-#define IRSND_DDR DDRB // ddr B\r
-#define IRSND_BIT 0 // OC0\r
-#elif IRSND_OCx == IRSND_OC1A \r
-#define IRSND_PORT PORTD // port D\r
-#define IRSND_DDR DDRD // ddr D\r
-#define IRSND_BIT 5 // OC1A\r
-#elif IRSND_OCx == IRSND_OC1B \r
-#define IRSND_PORT PORTE // port E\r
-#define IRSND_DDR DDRE // ddr E\r
-#define IRSND_BIT 2 // OC1E\r
-#error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
-#endif // IRSND_OCx\r
-\r
+# if IRSND_OCx == IRSND_OC0 \r
+# define IRSND_PORT PORTB // port B\r
+# define IRSND_DDR DDRB // ddr B\r
+# define IRSND_BIT 0 // OC0\r
+# elif IRSND_OCx == IRSND_OC1A \r
+# define IRSND_PORT PORTD // port D\r
+# define IRSND_DDR DDRD // ddr D\r
+# define IRSND_BIT 5 // OC1A\r
+# elif IRSND_OCx == IRSND_OC1B \r
+# define IRSND_PORT PORTE // port E\r
+# define IRSND_DDR DDRE // ddr E\r
+# define IRSND_BIT 2 // OC1E\r
+# else\r
+# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
+# endif // IRSND_OCx\r
#elif defined (PIC_C18) //Microchip C18 compiler\r
//Nothing here to do here -> See irsndconfig.h\r
-\r
+#elif defined (ARM_STM32) //STM32\r
+ //Nothing here to do here -> See irsndconfig.h\r
#else\r
-#if !defined (unix) && !defined (WIN32)\r
-#error mikrocontroller not defined, please fill in definitions here.\r
-#endif // unix, WIN32\r
+# if !defined (unix) && !defined (WIN32)\r
+# error mikrocontroller not defined, please fill in definitions here.\r
+# endif // unix, WIN32\r
#endif // __AVR...\r
\r
#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
\r
\r
-#ifdef PIC_C18\r
-#define IRSND_FREQ_30_KHZ (uint8_t) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
-#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
-#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
-#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
-#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
-#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
-#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
-#else // AVR\r
-#define IRSND_FREQ_30_KHZ (uint8_t) ((F_CPU / 30000 / 2) - 1)\r
-#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2) - 1)\r
-#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2) - 1)\r
-#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2) - 1)\r
-#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2) - 1)\r
-#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2) - 1)\r
-#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2) - 1)\r
+#ifdef PIC_C18 // PIC C18\r
+# define IRSND_FREQ_TYPE uint8_t\r
+# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
+#elif defined (ARM_STM32) // STM32\r
+# define IRSND_FREQ_TYPE uint32_t\r
+# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
+# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
+# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
+# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
+# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
+# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
+# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
+#else // AVR\r
+# define IRSND_FREQ_TYPE uint8_t\r
+# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2) - 1)\r
+# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2) - 1)\r
+# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2) - 1)\r
+# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2) - 1)\r
+# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2) - 1)\r
+# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2) - 1)\r
+# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2) - 1)\r
#endif\r
\r
#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
if (! irsnd_is_on)\r
{\r
#ifndef DEBUG\r
-\r
-#if defined(PIC_C18)\r
+# if defined(PIC_C18) // PIC C18\r
IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
-#else\r
-\r
-#if IRSND_OCx == IRSND_OC2 // use OC2\r
+# elif defined (ARM_STM32) // STM32\r
+ TIM_Cmd(IRSND_TIMER, ENABLE); // TIMx enable counter\r
+# else // AVR\r
+# if IRSND_OCx == IRSND_OC2 // use OC2\r
TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
-#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
+# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
-#elif IRSND_OCx == IRSND_OC2B // use OC2B\r
+# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
-#elif IRSND_OCx == IRSND_OC0 // use OC0\r
+# elif IRSND_OCx == IRSND_OC0 // use OC0\r
TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
-#elif IRSND_OCx == IRSND_OC0A // use OC0A\r
+# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
-#elif IRSND_OCx == IRSND_OC0B // use OC0B\r
+# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
-#else\r
-#error wrong value of IRSND_OCx\r
-#endif // IRSND_OCx\r
-\r
-#endif //C18\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif // IRSND_OCx\r
+# endif // C18\r
#endif // DEBUG\r
\r
#if IRSND_USE_CALLBACK == 1\r
{\r
#ifndef DEBUG\r
\r
-#if defined(PIC_C18)\r
+# if defined(PIC_C18) // PIC C18\r
IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
-#else //AVR\r
+# elif defined (ARM_STM32) // STM32\r
+ TIM_Cmd(IRSND_TIMER, DISABLE); // TIMx enable counter\r
+# else //AVR\r
\r
-#if IRSND_OCx == IRSND_OC2 // use OC2\r
+# if IRSND_OCx == IRSND_OC2 // use OC2\r
TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
-#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
+# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
-#elif IRSND_OCx == IRSND_OC2B // use OC2B\r
+# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
-#elif IRSND_OCx == IRSND_OC0 // use OC0\r
+# elif IRSND_OCx == IRSND_OC0 // use OC0\r
TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
-#elif IRSND_OCx == IRSND_OC0A // use OC0A\r
+# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
-#elif IRSND_OCx == IRSND_OC0B // use OC0B\r
+# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
-#else\r
-#error wrong value of IRSND_OCx\r
-#endif // IRSND_OCx\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif // IRSND_OCx\r
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
-#endif //C18\r
+# endif //C18\r
#endif // DEBUG\r
\r
#if IRSND_USE_CALLBACK == 1\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
static void\r
-irsnd_set_freq (uint8_t freq)\r
+irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
{\r
#ifndef DEBUG\r
-\r
-#if defined(PIC_C18)\r
- OpenPWM(freq); \r
- SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
-#else //AVR\r
-\r
-#if IRSND_OCx == IRSND_OC2\r
- OCR2 = freq; // use register OCR2 for OC2\r
-#elif IRSND_OCx == IRSND_OC2A // use OC2A\r
- OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
-#elif IRSND_OCx == IRSND_OC2B // use OC2B\r
- OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
-#elif IRSND_OCx == IRSND_OC0 // use OC0\r
- OCR0 = freq; // use register OCR2 for OC2\r
-#elif IRSND_OCx == IRSND_OC0A // use OC0A\r
- OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
-#elif IRSND_OCx == IRSND_OC0B // use OC0B\r
- OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
-#else\r
-#error wrong value of IRSND_OCx\r
-#endif\r
-#endif //PIC_C18\r
+# if defined(PIC_C18) // PIC C18\r
+ OpenPWM(freq); \r
+ SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
+# elif defined (ARM_STM32) // STM32\r
+ static uint32_t TimeBaseFreq = 0;\r
+ TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
+ TIM_OCInitTypeDef TIM_OCInitStructure;\r
+\r
+ if (TimeBaseFreq == 0)\r
+ {\r
+ RCC_ClocksTypeDef RCC_ClocksStructure;\r
+ /* Get system clocks and store timer clock in variable */\r
+ RCC_GetClocksFreq(&RCC_ClocksStructure);\r
+# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
+ TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
+# else\r
+ TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
+# endif\r
+ }\r
+\r
+ freq = TimeBaseFreq/freq;\r
+\r
+ /* Time base configuration */\r
+ TIM_TimeBaseStructure.TIM_Period = freq;\r
+ TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
+ TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
+ TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
+ TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
+\r
+ /* PWM1 Mode configuration: Channel1 */\r
+ TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
+ TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
+ TIM_OCInitStructure.TIM_Pulse = (freq + 1) / 2;\r
+ TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
+ TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
+\r
+# else // AVR\r
+\r
+# if IRSND_OCx == IRSND_OC2\r
+ OCR2 = freq; // use register OCR2 for OC2\r
+# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
+ OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
+# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
+ OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
+# elif IRSND_OCx == IRSND_OC0 // use OC0\r
+ OCR0 = freq; // use register OCR2 for OC2\r
+# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
+ OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
+# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
+ OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif\r
+# endif //PIC_C18\r
#endif // DEBUG\r
}\r
\r
irsnd_init (void)\r
{\r
#ifndef DEBUG\r
-#if defined(PIC_C18)\r
- OpenTimer;\r
- irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
- IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
-#else\r
- IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
- IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
-\r
-#if IRSND_OCx == IRSND_OC2 // use OC2\r
- TCCR2 = (1<<WGM21); // CTC mode\r
- TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
-#elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
- TCCR2A = (1<<WGM21); // CTC mode\r
- TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
-#elif IRSND_OCx == IRSND_OC0 // use OC0\r
- TCCR0 = (1<<WGM01); // CTC mode\r
- TCCR0 |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
-#elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
- TCCR0A = (1<<WGM01); // CTC mode\r
- TCCR0B |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
-#else\r
-#error wrong value of IRSND_OCx\r
-#endif\r
- irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
-#endif //PIC_C18\r
+# if defined(PIC_C18) // PIC C18\r
+ OpenTimer;\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
+ IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
+# elif defined (ARM_STM32) // STM32\r
+ GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+ /* GPIOx clock enable */\r
+# if defined (ARM_STM32L1XX)\r
+ RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
+# elif defined (ARM_STM32F10X)\r
+ RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
+# elif defined (ARM_STM32F4XX)\r
+ RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
+# endif\r
+\r
+ /* GPIO Configuration */\r
+ GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
+# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
+ GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
+ GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
+# elif defined (ARM_STM32F10X)\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+ GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
+ GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
+# endif\r
+\r
+ /* TIMx clock enable */\r
+# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
+ RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
+# else\r
+ RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
+# endif\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
+\r
+ /* TIMx Configuration */\r
+ TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
+ TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
+ TIM_Cmd(IRSND_TIMER, ENABLE);\r
+# else // AVR\r
+ IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
+ IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
+\r
+# if IRSND_OCx == IRSND_OC2 // use OC2\r
+ TCCR2 = (1<<WGM21); // CTC mode\r
+ TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
+# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
+ TCCR2A = (1<<WGM21); // CTC mode\r
+ TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
+# elif IRSND_OCx == IRSND_OC0 // use OC0\r
+ TCCR0 = (1<<WGM01); // CTC mode\r
+ TCCR0 |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
+# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
+ TCCR0A = (1<<WGM01); // CTC mode\r
+ TCCR0B |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
+# else\r
+# error wrong value of IRSND_OCx\r
+# endif\r
+ irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
+# endif //PIC_C18\r
#endif // DEBUG\r
}\r
\r
#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
case IRMP_SIRCS_PROTOCOL:\r
{\r
- uint8_t sircs_additional_command_len;\r
+ // uint8_t sircs_additional_command_len;\r
uint8_t sircs_additional_address_len;\r
\r
sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
\r
if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
{\r
- sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
+ // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
}\r
else\r
{\r
- sircs_additional_command_len = sircs_additional_bitlen;\r
+ // sircs_additional_command_len = sircs_additional_bitlen;\r
sircs_additional_address_len = 0;\r
}\r
\r
{\r
irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
- irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAACCC (2nd frame)\r
- irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // CCCCCCC\r
+ irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
+ irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
irsnd_busy = TRUE;\r
break;\r
}\r
case IRMP_IR60_PROTOCOL:\r
{\r
command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
+#if 0\r
irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
+#else\r
+ irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
+ irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
+#endif\r
\r
irsnd_busy = TRUE;\r
break;\r
static uint8_t last_bit_value;\r
#endif\r
static uint8_t pulse_len = 0xFF;\r
- static IRSND_PAUSE_LEN pause_len = 0xFF;\r
+ static IRSND_PAUSE_LEN pause_len = 0xFF;\r
\r
if (irsnd_busy)\r
{\r
{\r
auto_repetition_pause_counter++;\r
\r
+#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
+ if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
+ {\r
+ repeat_frame_pause_len--;\r
+ }\r
+#endif\r
+\r
if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
{\r
auto_repetition_pause_counter = 0;\r
\r
+#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
{\r
current_bit = 16;\r
complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
}\r
- else if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
+ else\r
+#endif\r
+#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
+ if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
{\r
current_bit = 15;\r
complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
}\r
- else if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
+ else\r
+#endif\r
+#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
+ if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
{\r
current_bit = 7;\r
complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
}\r
- else if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
+ else\r
+#endif\r
+#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
+ if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
{\r
if (auto_repetition_counter + 1 < n_auto_repetitions)\r
{\r
complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
}\r
}\r
+ else\r
+#endif\r
+ {\r
+ ;\r
+ }\r
}\r
else\r
{\r
}\r
else\r
{\r
- \r
if (send_trailer)\r
{\r
irsnd_busy = FALSE;\r
pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
- n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
- auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
- repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
+ n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
+ auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
+ repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
break;\r
}\r
IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r
{\r
+#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
+ if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
+ {\r
+ if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
+ {\r
+ auto_repetition_pause_len--;\r
+ }\r
+\r
+ if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
+ {\r
+ repeat_frame_pause_len--;\r
+ }\r
+ }\r
+#endif\r
+\r
if (pulse_counter == 0)\r
{\r
if (current_bit == 0xFF) // send start bit\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* irsnd.h\r
*\r
- * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irsnd.h,v 1.7 2012/02/16 12:39:36 fm Exp $\r
+ * $Id: irsnd.h,v 1.12 2012/05/23 12:26:26 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
-#ifndef _WC_IRSND_H_\r
-#define _WC_IRSND_H_\r
+#ifndef _IRSND_H_\r
+#define _IRSND_H_\r
\r
-#if defined(__18CXX) // Microchip C18 declaration of missing typedef\r
-typedef unsigned char uint8_t;\r
-typedef unsigned int uint16_t;\r
-#endif \r
+#include "irmpsystem.h"\r
+#ifndef IRSND_USE_AS_LIB\r
+# include "irsndconfig.h"\r
+#endif\r
\r
-#define IRSND_NO_REPETITIONS 0 // no repetitions\r
-#define IRSND_MAX_REPETITIONS 14 // max # of repetitions\r
-#define IRSND_ENDLESS_REPETITION 15 // endless repetions\r
-#define IRSND_REPETITION_MASK 0x0F // lower nibble of flags\r
+#if defined (ARM_STM32) // STM32\r
+# define _CONCAT(a,b) a##b\r
+# define CONCAT(a,b) _CONCAT(a,b)\r
+# define IRSND_PORT CONCAT(GPIO, IRSND_PORT_LETTER)\r
+# if defined (ARM_STM32L1XX)\r
+# define IRSND_PORT_RCC CONCAT(RCC_AHBPeriph_GPIO, IRSND_PORT_LETTER)\r
+# define IRSND_GPIO_AF CONCAT(GPIO_AF_TIM, IRSND_TIMER_NUMBER)\r
+# elif defined (ARM_STM32F10X)\r
+# define IRSND_PORT_RCC CONCAT(RCC_APB2Periph_GPIO, IRSND_PORT_LETTER)\r
+# elif defined (ARM_STM32F4XX)\r
+# define IRSND_PORT_RCC CONCAT(RCC_AHB1Periph_GPIO, IRSND_PORT_LETTER)\r
+# define IRSND_GPIO_AF CONCAT(GPIO_AF_TIM, IRSND_TIMER_NUMBER)\r
+# endif\r
+# define IRSND_BIT CONCAT(GPIO_Pin_, IRSND_BIT_NUMBER)\r
+# define IRSND_TIMER CONCAT(TIM, IRSND_TIMER_NUMBER)\r
+# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
+# define IRSND_TIMER_RCC CONCAT(RCC_APB1Periph_TIM, IRSND_TIMER_NUMBER)\r
+# elif (IRSND_TIMER_NUMBER == 1) || ((IRSND_TIMER_NUMBER >= 8) && (IRSND_TIMER_NUMBER <= 11))\r
+# define IRSND_TIMER_RCC CONCAT(RCC_APB2Periph_TIM, IRSND_TIMER_NUMBER)\r
+# else\r
+# error IRSND_TIMER_NUMBER not valid.\r
+# endif\r
+# ifndef USE_STDPERIPH_DRIVER\r
+# warning The STM32 port of IRSND uses the ST standard peripheral drivers which are not enabled in your build configuration.\r
+# endif\r
\r
-/**\r
- * Initialize ISND encoder\r
- * @details Configures ISDN output pin\r
- */\r
-extern void irsnd_init (void);\r
+#elif defined(PIC_C18)\r
+// Do not change lines below until you have a different HW. Example is for 18F2550/18F4550\r
+// setup macro for PWM used PWM module\r
+# if IRSND_OCx == IRSND_PIC_CCP2 \r
+# define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2\r
+# define SetDCPWM(x) SetDCPWM2(x) \r
+# define ClosePWM ClosePWM2\r
+# define OpenPWM(x) OpenPWM2(x) \r
+# endif\r
+# if IRSND_OCx == IRSND_PIC_CCP1 \r
+# define IRSND_PIN TRISCbits.TRISC2 // RC2 = PWM1\r
+# define SetDCPWM(x) SetDCPWM1(x)\r
+# define ClosePWM ClosePWM1\r
+# define OpenPWM(x) OpenPWM1(x)\r
+# endif\r
+//Setup macro for OpenTimer with defined Pre_Scaler\r
+# if Pre_Scaler == 1\r
+# define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_1); \r
+# elif Pre_Scaler == 4\r
+# define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_4); \r
+# elif Pre_Scaler == 16\r
+# define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_16); \r
+# else\r
+# error Incorrect value for Pre_Scaler\r
+# endif\r
+#endif // ARM_STM32\r
\r
-/**\r
- * Check if sender is busy\r
- * @details checks if sender is busy\r
- * @return TRUE: sender is busy, FALSE: sender is not busy\r
- */\r
-extern uint8_t irsnd_is_busy (void);\r
+#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
+# warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000)\r
+# undef IRSND_SUPPORT_SIEMENS_PROTOCOL\r
+# define IRSND_SUPPORT_SIEMENS_PROTOCOL 0\r
+#endif\r
\r
-/**\r
- * Send IRMP data\r
- * @details sends IRMP data\r
- * @param pointer to IRMP data structure\r
- * @return TRUE: successful, FALSE: failed\r
- */\r
-extern uint8_t irsnd_send_data (IRMP_DATA *, uint8_t);\r
+#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
+# warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 20000)\r
+# undef IRSND_SUPPORT_RECS80_PROTOCOL\r
+# define IRSND_SUPPORT_RECS80_PROTOCOL 0\r
+#endif\r
\r
-/**\r
- * Stop sending IRMP data\r
- * @details stops sending IRMP data\r
- */\r
-extern void irsnd_stop (void);\r
+#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
+# warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 20000)\r
+# undef IRSND_SUPPORT_RECS80EXT_PROTOCOL\r
+# define IRSND_SUPPORT_RECS80EXT_PROTOCOL 0\r
+#endif\r
\r
-/**\r
- * ISR routine\r
- * @details ISR routine, called 10000 times per second\r
- */\r
-extern uint8_t irsnd_ISR (void);\r
+#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
+# warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000)\r
+# undef IRSND_SUPPORT_LEGO_PROTOCOL\r
+# define IRSND_SUPPORT_LEGO_PROTOCOL 0\r
+#endif\r
+\r
+#include "irmpprotocols.h"\r
+\r
+#define IRSND_NO_REPETITIONS 0 // no repetitions\r
+#define IRSND_MAX_REPETITIONS 14 // max # of repetitions\r
+#define IRSND_ENDLESS_REPETITION 15 // endless repetions\r
+#define IRSND_REPETITION_MASK 0x0F // lower nibble of flags\r
+\r
+extern void irsnd_init (void);\r
+extern uint8_t irsnd_is_busy (void);\r
+extern uint8_t irsnd_send_data (IRMP_DATA *, uint8_t);\r
+extern void irsnd_stop (void);\r
+extern uint8_t irsnd_ISR (void);\r
\r
#if IRSND_USE_CALLBACK == 1\r
-extern void irsnd_set_callback_ptr (void (*cb)(uint8_t));\r
+extern void irsnd_set_callback_ptr (void (*cb)(uint8_t));\r
#endif // IRSND_USE_CALLBACK == 1\r
\r
-#endif /* _WC_IRSND_H_ */\r
+#endif /* _IRSND_H_ */\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* irsndconfig.h\r
*\r
+ * DO NOT INCLUDE THIS FILE, WILL BE INCLUDED BY IRSND.H!\r
+ *\r
* Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: irsndconfig.h,v 1.31 2012/02/24 15:00:18 fm Exp $\r
+ * $Id: irsndconfig.h,v 1.36 2012/05/23 12:26:26 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
+#ifndef _IRSNDCONFIG_H_\r
+#define _IRSNDCONFIG_H_\r
+\r
+#if !defined(_IRSND_H_)\r
+# error please include only irsnd.h, not irsndconfig.h\r
+#endif\r
+\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
#ifndef F_INTERRUPTS\r
-#define F_INTERRUPTS 15000 // interrupts per second\r
+# define F_INTERRUPTS 15000 // interrupts per second\r
#endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
// typical protocols, disable here! Enable Remarks F_INTERRUPTS Program Space\r
-#define IRSND_SUPPORT_SIRCS_PROTOCOL 1 // Sony SIRCS >= 10000 ~150 bytes\r
+#define IRSND_SUPPORT_SIRCS_PROTOCOL 1 // Sony SIRCS >= 10000 ~200 bytes\r
#define IRSND_SUPPORT_NEC_PROTOCOL 1 // NEC + APPLE >= 10000 ~100 bytes\r
#define IRSND_SUPPORT_SAMSUNG_PROTOCOL 1 // Samsung + Samsung32 >= 10000 ~300 bytes\r
#define IRSND_SUPPORT_MATSUSHITA_PROTOCOL 1 // Matsushita >= 10000 ~200 bytes\r
-#define IRSND_SUPPORT_KASEIKYO_PROTOCOL 1 // Kaseikyo >= 10000 ~150 bytes\r
+#define IRSND_SUPPORT_KASEIKYO_PROTOCOL 1 // Kaseikyo >= 10000 ~300 bytes\r
#define IRSND_SUPPORT_DENON_PROTOCOL 1 // DENON, Sharp >= 10000 ~200 bytes\r
\r
// more protocols, enable here! Enable Remarks F_INTERRUPTS Program Space\r
#define IRSND_SUPPORT_JVC_PROTOCOL 0 // JVC >= 10000 ~150 bytes\r
#define IRSND_SUPPORT_NEC16_PROTOCOL 0 // NEC16 >= 10000 ~150 bytes\r
#define IRSND_SUPPORT_NEC42_PROTOCOL 0 // NEC42 >= 10000 ~150 bytes\r
-#define IRSND_SUPPORT_IR60_PROTOCOL 1 // IR60 (SDA2008) >= 10000 ~250 bytes\r
-#define IRSND_SUPPORT_GRUNDIG_PROTOCOL 1 // Grundig >= 10000 ~300 bytes\r
+#define IRSND_SUPPORT_IR60_PROTOCOL 0 // IR60 (SDA2008) >= 10000 ~250 bytes\r
+#define IRSND_SUPPORT_GRUNDIG_PROTOCOL 0 // Grundig >= 10000 ~300 bytes\r
#define IRSND_SUPPORT_SIEMENS_PROTOCOL 0 // Siemens, Gigaset >= 15000 ~150 bytes\r
#define IRSND_SUPPORT_NOKIA_PROTOCOL 0 // Nokia >= 10000 ~400 bytes\r
\r
#define IRSND_SUPPORT_RUWIDO_PROTOCOL 0 // RUWIDO, T-Home >= 15000 DON'T CHANGE, NOT SUPPORTED YET!\r
#define IRSND_SUPPORT_LEGO_PROTOCOL 0 // LEGO Power RC >= 20000 ~150 bytes\r
\r
-\r
-/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * DO NOT CHANGE:\r
- *---------------------------------------------------------------------------------------------------------------------------------------------------\r
- */\r
-#define IRSND_OC2 0 // OC2\r
-#define IRSND_OC2A 1 // OC2A\r
-#define IRSND_OC2B 2 // OC2B\r
-#define IRSND_OC0 3 // OC0\r
-#define IRSND_OC0A 4 // OC0A\r
-#define IRSND_OC0B 5 // OC0B\r
-\r
-//PIC Microchip C18\r
-#define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module\r
-#define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module\r
-\r
-#ifndef PIC_C18 // AVR part\r
-\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * AVR\r
+ * AVR section:\r
*\r
* Change hardware pin here: IRSND_OC2 = OC2 on ATmegas supporting OC2, e.g. ATmega8\r
* IRSND_OC2A = OC2A on ATmegas supporting OC2A, e.g. ATmega88\r
* IRSND_OC0 = OC0 on ATmegas supporting OC0, e.g. ATmega162\r
* IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85\r
* IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85\r
- * IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
- * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-\r
-#define IRSND_OCx IRSND_OC2B // use OC2B\r
+#if defined(ATMEL_AVR)\r
+# define IRSND_OCx IRSND_OC2B // use OC2B\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * PIC C18\r
+ * PIC C18 section:\r
*\r
* Change hardware pin here: IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
- * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
+ * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-\r
-#else\r
-#define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC\r
+#elif defined(PIC_C18)\r
+# define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC\r
+ // change other PIC C18 specific settings:\r
+# define F_CPU 48000000UL // PIC frequency: set your freq here\r
+# define Pre_Scaler 4 // define prescaler for timer2 e.g. 1,4,16\r
+# define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
+# warning Timer2 used for IRSND (PWM out) ! Do not use/setup Timer 2 yourself !\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * PIC C18 - change other PIC specific settings - ignore it when using AVR\r
+ * ARM STM32 section:\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-\r
-#define F_CPU 48000000UL // PIC freq.; Set you Freq here\r
-#define Pre_Scaler 4 // define prescaler for Timer2 e.g. 1,4,16 !!!\r
-#define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
-#warning Timer2 used for IRSND (PWM out) ! Do not use/setup Timer 2 yourself !\r
-\r
-//Do not change lines below until you have a diffrent HW !! Example for 18F2550/18F4550\r
-//Setup macro for PWM used PWM module\r
-\r
-#if IRSND_OCx == IRSND_PIC_CCP2 \r
-#define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2\r
-\r
-#define SetDCPWM(x) SetDCPWM2(x) \r
-#define ClosePWM ClosePWM2\r
-#define OpenPWM(x) OpenPWM2(x) \r
-#endif\r
-\r
-#if IRSND_OCx == IRSND_PIC_CCP1 \r
-#define IRSND_PIN TRISCbits.TRISC2 // RC2 = PWM1\r
-\r
-#define SetDCPWM(x) SetDCPWM1(x)\r
-#define ClosePWM ClosePWM1\r
-#define OpenPWM(x) OpenPWM1(x)\r
-#endif\r
-\r
-//Setup macro for OpenTimer with defined Pre_Scaler\r
-#if Pre_Scaler == 1\r
-#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_1); \r
-#elif Pre_Scaler == 4\r
-#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_4); \r
-#elif Pre_Scaler == 16\r
-#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_16); \r
-#else\r
-#error Incorrect value for Pre_Scaler\r
-#endif\r
-\r
-#endif //PIC_C18\r
+#elif defined (ARM_STM32) // use C13 as IR input on STM32\r
+# define IRSND_PORT_LETTER A\r
+# define IRSND_BIT_NUMBER 6\r
+# define IRSND_TIMER_NUMBER 10\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * Use Callbacks to indicate output signal or something else\r
+ * Other target system\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#define IRSND_USE_CALLBACK 0 // flag: 0 = don't use callbacks, 1 = use callbacks, default is 0\r
+#elif !defined (UNIX_OR_WINDOWS)\r
+# error target system not defined.\r
+#endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * D O N O T C H A N G E T H E F O L L O W I N G L I N E S !\r
+ * Use Callbacks to indicate output signal or something else\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
-#warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000)\r
-#undef IRSND_SUPPORT_SIEMENS_PROTOCOL\r
-#define IRSND_SUPPORT_SIEMENS_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
-#endif\r
-\r
-#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
-#warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 20000)\r
-#undef IRSND_SUPPORT_RECS80_PROTOCOL\r
-#define IRSND_SUPPORT_RECS80_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
-#endif\r
-\r
-#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
-#warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 20000)\r
-#undef IRSND_SUPPORT_RECS80EXT_PROTOCOL\r
-#define IRSND_SUPPORT_RECS80EXT_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
+#ifndef IRSND_USE_CALLBACK\r
+# define IRSND_USE_CALLBACK 0 // flag: 0 = don't use callbacks, 1 = use callbacks, default is 0\r
#endif\r
\r
-#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
-#warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000)\r
-#undef IRSND_SUPPORT_LEGO_PROTOCOL\r
-#define IRSND_SUPPORT_LEGO_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
-#endif\r
+#endif // _IRSNDCONFIG_H_\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
- * irsndmain.c - demo main module to test irmp decoder\r
+ * irsndmain.c - demo main module to test irsnd encoder\r
*\r
- * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
* (at your option) any later version.\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
-\r
-#include <inttypes.h>\r
-#include <avr/io.h>\r
-#include <util/delay.h>\r
-#include <avr/pgmspace.h>\r
-#include <avr/interrupt.h>\r
-#include "irmp.h"\r
-#include "irsndconfig.h"\r
#include "irsnd.h"\r
\r
#ifndef F_CPU\r
-#error F_CPU unkown\r
+# error F_CPU unkown\r
#endif\r
\r
void\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
* main.c - demo main module to test irmp decoder\r
*\r
- * Copyright (c) 2009-2011 Frank Meyer - frank(at)fli4l.de\r
+ * Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de\r
*\r
- * $Id: main.c,v 1.12 2012/02/13 10:59:07 fm Exp $\r
+ * $Id: main.c,v 1.14 2012/05/15 10:25:21 fm Exp $\r
*\r
* ATMEGA88 @ 8 MHz\r
*\r
*---------------------------------------------------------------------------------------------------------------------------------------------------\r
*/\r
\r
-#include <inttypes.h>\r
-#include <avr/io.h>\r
-#include <util/delay.h>\r
-#include <avr/pgmspace.h>\r
-#include <avr/interrupt.h>\r
-\r
-#include "irmpconfig.h"\r
#include "irmp.h"\r
\r
#ifndef F_CPU\r
#----------------------------------------------------------------------------
all: irmp irmp-15kHz irmp-20kHz irsnd irsnd-15kHz irsnd-20kHz
-irmp: irmp.c irmp.h irmpconfig.h
+irmp: irmp.c irmp.h irmpconfig.h irmpsystem.h irmpprotocols.h
cc -Wall -DF_INTERRUPTS=10000 irmp.c -o irmp
-irmp-15kHz: irmp.c irmp.h irmpconfig.h
+irmp-15kHz: irmp.c irmp.h irmpconfig.h irmpsystem.h irmpprotocols.h
cc -Wall -DF_INTERRUPTS=15000 irmp.c -o irmp-15kHz
-irmp-20kHz: irmp.c irmp.h irmpconfig.h
+irmp-20kHz: irmp.c irmp.h irmpconfig.h irmpsystem.h irmpprotocols.h
cc -Wall -DF_INTERRUPTS=20000 irmp.c -o irmp-20kHz
-irsnd: irsnd.c irsnd.h irmp.h irsndconfig.h
+irsnd: irsnd.c irsnd.h irmp.h irsndconfig.h irmpsystem.h irmpprotocols.h
cc -Wall -DF_INTERRUPTS=10000 irsnd.c -o irsnd
-irsnd-15kHz: irsnd.c irsnd.h irmp.h irsndconfig.h
+irsnd-15kHz: irsnd.c irsnd.h irmp.h irsndconfig.h irmpsystem.h irmpprotocols.h
cc -Wall -DF_INTERRUPTS=15000 irsnd.c -o irsnd-15kHz
-irsnd-20kHz: irsnd.c irsnd.h irmp.h irsndconfig.h
+irsnd-20kHz: irsnd.c irsnd.h irmp.h irsndconfig.h irmpsystem.h irmpprotocols.h
cc -Wall -DF_INTERRUPTS=20000 irsnd.c -o irsnd-20kHz
test: all