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Version 2.9.0: added MERLIN and FAN protocol
[irmp.git] / irsnd.c
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4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
0834784c 4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
622f5f59 6 * Supported AVR mikrocontrollers:\r
7644ac04 7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
2ac088b2 10 * ATtiny44 ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
e664a9f3 13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
7644ac04 14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
0715cf5e 16 * $Id: irsnd.c,v 1.88 2015/05/27 09:33:14 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
2ac088b2 36#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
08f2dd9d 37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
ad4d3d41 46\r
08f2dd9d 47#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
48# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 49# define IRSND_PORT_LETTER B\r
50# define IRSND_BIT_NUMBER 0\r
08f2dd9d 51# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 52# define IRSND_PORT_LETTER B\r
53# define IRSND_BIT_NUMBER 1\r
08f2dd9d 54# else\r
55# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
56# endif // IRSND_OCx\r
ad4d3d41 57\r
21a4e0ee 58#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 59# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 60# define IRSND_PORT_LETTER A\r
61# define IRSND_BIT_NUMBER 2\r
90387f65 62# else\r
63# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
64# endif // IRSND_OCx\r
ad4d3d41 65\r
08f2dd9d 66#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
67# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 68# define IRSND_PORT_LETTER B\r
69# define IRSND_BIT_NUMBER 3\r
08f2dd9d 70# else\r
71# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
72# endif // IRSND_OCx\r
73#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
74# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 75# define IRSND_PORT_LETTER D\r
76# define IRSND_BIT_NUMBER 7\r
08f2dd9d 77# else\r
78# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
79# endif // IRSND_OCx\r
ad4d3d41 80\r
08f2dd9d 81#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
82# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 83# define IRSND_PORT_LETTER B\r
84# define IRSND_BIT_NUMBER 1\r
08f2dd9d 85# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 86# define IRSND_PORT_LETTER B\r
87# define IRSND_BIT_NUMBER 0\r
08f2dd9d 88# else\r
89# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
90# endif // IRSND_OCx\r
ad4d3d41 91\r
f50e01e7 92#elif defined (__AVR_ATmega164__) \\r
93 || defined (__AVR_ATmega324__) \\r
94 || defined (__AVR_ATmega644__) \\r
95 || defined (__AVR_ATmega644P__) \\r
0f700c8e 96 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
98# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 99# define IRSND_PORT_LETTER D\r
100# define IRSND_BIT_NUMBER 7\r
08f2dd9d 101# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 102# define IRSND_PORT_LETTER D\r
103# define IRSND_BIT_NUMBER 6\r
08f2dd9d 104# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 105# define IRSND_PORT_LETTER B\r
106# define IRSND_BIT_NUMBER 3\r
08f2dd9d 107# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 108# define IRSND_PORT_LETTER B\r
109# define IRSND_BIT_NUMBER 4\r
08f2dd9d 110# else\r
111# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
112# endif // IRSND_OCx\r
ad4d3d41 113\r
f50e01e7 114#elif defined (__AVR_ATmega48__) \\r
115 || defined (__AVR_ATmega88__) \\r
7644ac04 116 || defined (__AVR_ATmega88P__) \\r
f50e01e7 117 || defined (__AVR_ATmega168__) \\r
1f54e86c 118 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
120# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 121# define IRSND_PORT_LETTER B\r
122# define IRSND_BIT_NUMBER 3\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 3\r
08f2dd9d 126# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 127# define IRSND_PORT_LETTER D\r
128# define IRSND_BIT_NUMBER 6\r
08f2dd9d 129# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 130# define IRSND_PORT_LETTER D\r
131# define IRSND_BIT_NUMBER 5\r
08f2dd9d 132# else\r
133# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
134# endif // IRSND_OCx\r
ad4d3d41 135\r
f874da09 136#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 137# if IRSND_OCx == IRSND_OC0 \r
f874da09 138# define IRSND_PORT_LETTER B\r
139# define IRSND_BIT_NUMBER 0\r
08f2dd9d 140# elif IRSND_OCx == IRSND_OC1A \r
f874da09 141# define IRSND_PORT_LETTER D\r
142# define IRSND_BIT_NUMBER 5\r
08f2dd9d 143# elif IRSND_OCx == IRSND_OC1B \r
f874da09 144# define IRSND_PORT_LETTER E\r
145# define IRSND_BIT_NUMBER 2\r
ad4d3d41 146# endif // IRSND_OCx\r
147\r
148#elif defined (__AVR_ATxmega128A1U__) // ATxmega128A1U \r
ad4d3d41 149# if IRSND_OCx == IRSND_XMEGA_OC0A \r
150# define IRSND_BIT_NUMBER 0\r
151# elif IRSND_OCx == IRSND_XMEGA_OC0B\r
152# define IRSND_BIT_NUMBER 1\r
153# elif IRSND_OCx == IRSND_XMEGA_OC0C\r
154# define IRSND_BIT_NUMBER 2\r
155# elif IRSND_OCx == IRSND_XMEGA_OC0D\r
156# define IRSND_BIT_NUMBER 3\r
157# elif IRSND_OCx == IRSND_XMEGA_OC1A\r
158# define IRSND_BIT_NUMBER 4\r
159# elif IRSND_OCx == IRSND_XMEGA_OC1B\r
160# define IRSND_BIT_NUMBER 5\r
08f2dd9d 161# else\r
162# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
163# endif // IRSND_OCx\r
ad4d3d41 164\r
9c86ff1a 165#elif defined (PIC_C18) //Microchip C18 compiler\r
166 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 167#elif defined (ARM_STM32) //STM32\r
168 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 169#else\r
08f2dd9d 170# if !defined (unix) && !defined (WIN32)\r
171# error mikrocontroller not defined, please fill in definitions here.\r
172# endif // unix, WIN32\r
f50e01e7 173#endif // __AVR...\r
174\r
ad4d3d41 175#if defined(__AVR_XMEGA__)\r
176# define _CONCAT(a,b) a##b\r
177# define CONCAT(a,b) _CONCAT(a,b)\r
178# define IRSND_PORT IRSND_PORT_PRE.OUT\r
22a5040e 179# define IRSND_DDR IRSND_PORT_PRE.DIR\r
180# define IRSND_PIN IRSND_PORT_PRE.IN\r
ad4d3d41 181# define IRSND_BIT IRSND_BIT_NUMBER\r
ad4d3d41 182#elif defined(ATMEL_AVR)\r
f874da09 183# define _CONCAT(a,b) a##b\r
184# define CONCAT(a,b) _CONCAT(a,b)\r
185# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
186# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
187# define IRSND_BIT IRSND_BIT_NUMBER\r
188#endif\r
189\r
9405f84a 190#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 191 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 192#else\r
9c86ff1a 193 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 194#endif\r
195\r
f50e01e7 196/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
197 * IR timings\r
198 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
199 */\r
4225a882 200#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
201#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
202#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
203#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
204#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
9c07687e 205#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
206#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 207\r
208#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
209#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 210#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 211#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
212#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
213#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
9c07687e 214#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 215\r
216#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
217#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
218#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
219#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
220#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
9c07687e 221#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 222\r
9c07687e 223#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
224#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 225\r
ac8504f8 226#define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
227#define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
228\r
4225a882 229#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
230#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
231#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
232#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
233#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
9c07687e 234#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 235\r
770a1a9d 236#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
237#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
238#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
239#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
240#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
9c07687e 241#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
242#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
770a1a9d 243\r
4225a882 244#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
245#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
246#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
247#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
248#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
9c07687e 249#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 250\r
251#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
252#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
9c07687e 253#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 254\r
255#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
256#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
257#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
258#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
9c07687e 259#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 260\r
261#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
262#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
263#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
9c07687e 264#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
265#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 266\r
beda975f 267#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
268#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
269#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
9c07687e 270#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
271#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
beda975f 272\r
4225a882 273#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
274#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
275#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
276#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
277#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
9c07687e 278#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
279\r
280#define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)\r
281#define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)\r
282#define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)\r
283#define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)\r
284#define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)\r
285#define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
286#define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 287\r
288#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
289#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
290#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
291#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
292#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
293#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
9c07687e 294#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
295#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 296\r
0715cf5e 297#define FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5)\r
298#define FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5)\r
299#define FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5)\r
300#define FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5)\r
301#define FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5)\r
302#define FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5)\r
303#define FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
304#define FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
305\r
15dd9c32 306#define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)\r
307#define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)\r
308#define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)\r
309#define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)\r
310#define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)\r
311#define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)\r
9c07687e 312#define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
313#define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
15dd9c32 314\r
5481e9cd 315#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
316#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
317#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
318#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
319#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
320#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
321#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
322#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
323#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
324#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
325#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
9c07687e 326#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 327\r
9c86ff1a 328#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
329#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
9c07687e 330#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
331#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 332#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 333\r
9c07687e 334#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
a48187fa 335\r
02ccdb69 336#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
337#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
9c07687e 338#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 339\r
cb93f9e9 340#define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
341#define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)\r
342#define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
343#define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)\r
9c07687e 344#define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
cb93f9e9 345\r
08f2dd9d 346#ifdef PIC_C18 // PIC C18\r
347# define IRSND_FREQ_TYPE uint8_t\r
348# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
349# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
350# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
351# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
352# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
353# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
354# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
355#elif defined (ARM_STM32) // STM32\r
356# define IRSND_FREQ_TYPE uint32_t\r
357# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
358# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
359# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
360# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
361# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
362# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
363# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
364#else // AVR\r
a03ad359 365# if F_CPU >= 16000000L\r
366# define AVR_PRESCALER 8\r
367# else\r
368# define AVR_PRESCALER 1\r
369# endif\r
08f2dd9d 370# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 371# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
372# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
373# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
374# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
375# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
376# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
377# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 378#endif\r
4225a882 379\r
48664931 380#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
381#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
382#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
383#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
384#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
385#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 386\r
c7c9a4a1 387#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
388#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
389#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
390#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
391#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
392#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
393\r
c7a47e89 394#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
395#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
396#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
397#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
398#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
399#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
400#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
401\r
9405f84a 402#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
403#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
404#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
405#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
406#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
407#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 408#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
409\r
410#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
411#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
412#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
413#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
414#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
415#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
416#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 417\r
fa09ce10 418#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r
419#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r
420#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r
421#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r
422#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
423#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
424\r
c9b6916a 425#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r
426#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r
427#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r
428#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r
429#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r
430#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r
431#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
432\r
003c1008 433#define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)\r
434#define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)\r
435#define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
436#define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)\r
437#define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)\r
438#define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)\r
439#define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
440\r
9c86ff1a 441static volatile uint8_t irsnd_busy = 0;\r
442static volatile uint8_t irsnd_protocol = 0;\r
443static volatile uint8_t irsnd_buffer[6] = {0};\r
444static volatile uint8_t irsnd_repeat = 0;\r
4225a882 445static volatile uint8_t irsnd_is_on = FALSE;\r
446\r
f50e01e7 447#if IRSND_USE_CALLBACK == 1\r
448static void (*irsnd_callback_ptr) (uint8_t);\r
449#endif // IRSND_USE_CALLBACK == 1\r
450\r
4225a882 451/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
452 * Switch PWM on\r
4225a882 453 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
454 */\r
455static void\r
456irsnd_on (void)\r
457{\r
458 if (! irsnd_is_on)\r
459 {\r
cb93f9e9 460#ifndef ANALYZE\r
08f2dd9d 461# if defined(PIC_C18) // PIC C18\r
cb93f9e9 462 PWMon();\r
463 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
ad4d3d41 464\r
08f2dd9d 465# elif defined (ARM_STM32) // STM32\r
e664a9f3 466 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
467 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
468 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
ad4d3d41 469\r
470# elif defined (__AVR_XMEGA__) \r
ea585783 471# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A\r
472 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A \r
473# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B\r
474 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B \r
475# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
476 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C\r
477# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
478 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D\r
479# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
480 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A\r
481# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
482 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B\r
ad4d3d41 483# else\r
484# error wrong value of IRSND_OCx\r
485# endif // IRSND_OCx\r
486\r
08f2dd9d 487# else // AVR\r
488# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 489 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 490# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 491 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 492# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 493 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 494# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 495 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 496# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 497 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 498# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 499 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 500# else\r
501# error wrong value of IRSND_OCx\r
502# endif // IRSND_OCx\r
503# endif // C18\r
cb93f9e9 504#endif // ANALYZE\r
f50e01e7 505\r
506#if IRSND_USE_CALLBACK == 1\r
e664a9f3 507 if (irsnd_callback_ptr)\r
508 {\r
509 (*irsnd_callback_ptr) (TRUE);\r
510 }\r
f50e01e7 511#endif // IRSND_USE_CALLBACK == 1\r
512\r
e664a9f3 513 irsnd_is_on = TRUE;\r
4225a882 514 }\r
515}\r
516\r
517/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
518 * Switch PWM off\r
519 * @details Switches PWM off\r
520 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
521 */\r
522static void\r
523irsnd_off (void)\r
524{\r
525 if (irsnd_is_on)\r
526 {\r
cb93f9e9 527#ifndef ANALYZE\r
9c86ff1a 528 \r
08f2dd9d 529# if defined(PIC_C18) // PIC C18\r
cb93f9e9 530 PWMoff();\r
531 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
ad4d3d41 532\r
08f2dd9d 533# elif defined (ARM_STM32) // STM32\r
e664a9f3 534 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
535 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
536 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
537 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
ad4d3d41 538\r
539# elif defined (__AVR_XMEGA__)\r
22a5040e 540# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A \r
ad4d3d41 541 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected\r
22a5040e 542# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B \r
ad4d3d41 543 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected\r
544# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
545 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected\r
546# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
547 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected\r
22a5040e 548# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
549 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected\r
550# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
551 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected\r
ad4d3d41 552# else\r
553# error wrong value of IRSND_OCx\r
554# endif // IRSND_OCx\r
555\r
08f2dd9d 556# else //AVR\r
9c86ff1a 557\r
08f2dd9d 558# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 559 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 560# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 561 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 562# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 563 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 564# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 565 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 566# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 567 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 568# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 569 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 570# else\r
571# error wrong value of IRSND_OCx\r
572# endif // IRSND_OCx\r
e664a9f3 573 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 574# endif //C18\r
cb93f9e9 575#endif // ANALYZE\r
f50e01e7 576\r
577#if IRSND_USE_CALLBACK == 1\r
e664a9f3 578 if (irsnd_callback_ptr)\r
579 {\r
580 (*irsnd_callback_ptr) (FALSE);\r
581 }\r
f50e01e7 582#endif // IRSND_USE_CALLBACK == 1\r
583\r
e664a9f3 584 irsnd_is_on = FALSE;\r
4225a882 585 }\r
586}\r
587\r
588/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
589 * Set PWM frequency\r
590 * @details sets pwm frequency\r
591 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
592 */\r
7fe8188d 593#if defined(__12F1840)\r
594extern void pwm_init(uint16_t freq);\r
595#include <stdio.h>\r
596#endif\r
597\r
4225a882 598static void\r
08f2dd9d 599irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 600{\r
cb93f9e9 601#ifndef ANALYZE\r
7fe8188d 602# if defined(PIC_C18) // PIC C18 or XC8\r
603# if defined(__12F1840) // XC8\r
604 TRISA2=0; \r
605 PR2=freq;\r
606 CCP1M0=1;\r
607 CCP1M1=1;\r
608 CCP1M2=1;\r
609 CCP1M3=1;\r
610 DC1B0=1;\r
611 DC1B1=0;\r
612 CCPR1L = 0b01101001;\r
613 TMR2IF = 0;\r
614 TMR2ON=1;\r
615 CCP1CON &=(~0b0011); // p 197 "active high"\r
616# else // PIC C18\r
617 OpenPWM(freq); \r
618 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
619# endif\r
620 PWMoff();\r
08f2dd9d 621# elif defined (ARM_STM32) // STM32\r
e664a9f3 622 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 623\r
e664a9f3 624 if (TimeBaseFreq == 0)\r
625 {\r
626 RCC_ClocksTypeDef RCC_ClocksStructure;\r
627 /* Get system clocks and store timer clock in variable */\r
628 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
08f2dd9d 629# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 630 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
631 {\r
632 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
633 }\r
634 else\r
635 {\r
636 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
637 }\r
08f2dd9d 638# else\r
e664a9f3 639 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
640 {\r
641 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
642 }\r
643 else\r
644 {\r
645 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
646 }\r
08f2dd9d 647# endif\r
e664a9f3 648 }\r
08f2dd9d 649\r
e664a9f3 650 freq = TimeBaseFreq/freq;\r
08f2dd9d 651\r
e664a9f3 652 /* Set frequency */\r
653 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
654 /* Set duty cycle */\r
655 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
ad4d3d41 656\r
657# elif defined (__AVR_XMEGA__)\r
658 XMEGA_Timer.CCA = freq;\r
659\r
08f2dd9d 660# else // AVR\r
661\r
662# if IRSND_OCx == IRSND_OC2\r
e664a9f3 663 OCR2 = freq; // use register OCR2 for OC2\r
08f2dd9d 664# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 665 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 666# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 667 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 668# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 669 OCR0 = freq; // use register OCR2 for OC2\r
08f2dd9d 670# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 671 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 672# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 673 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 674# else\r
675# error wrong value of IRSND_OCx\r
676# endif\r
677# endif //PIC_C18\r
cb93f9e9 678#endif // ANALYZE\r
4225a882 679}\r
680\r
681/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
682 * Initialize the PWM\r
683 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
684 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
685 */\r
686void\r
687irsnd_init (void)\r
688{\r
cb93f9e9 689#ifndef ANALYZE\r
7fe8188d 690# if defined(PIC_C18) // PIC C18 or XC8 compiler\r
691# if ! defined(__12F1840) // only C18:\r
e664a9f3 692 OpenTimer;\r
7fe8188d 693# endif\r
cb93f9e9 694 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
695 IRSND_PIN = 0; // set IO to outout\r
696 PWMoff();\r
08f2dd9d 697# elif defined (ARM_STM32) // STM32\r
e664a9f3 698 GPIO_InitTypeDef GPIO_InitStructure;\r
699 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
700 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 701\r
702 /* GPIOx clock enable */\r
703# if defined (ARM_STM32L1XX)\r
e664a9f3 704 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 705# elif defined (ARM_STM32F10X)\r
e664a9f3 706 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
c6a60200 707 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 708# elif defined (ARM_STM32F4XX)\r
e664a9f3 709 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 710# endif\r
711\r
e664a9f3 712 /* GPIO Configuration */\r
713 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
08f2dd9d 714# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
e664a9f3 715 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
716 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
717 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
718 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
719 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
720 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
08f2dd9d 721# elif defined (ARM_STM32F10X)\r
e664a9f3 722 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
723 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
724 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
c6a60200 725 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 726# endif\r
727\r
e664a9f3 728 /* TIMx clock enable */\r
08f2dd9d 729# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 730 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 731# else\r
e664a9f3 732 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 733# endif\r
08f2dd9d 734\r
e664a9f3 735 /* Time base configuration */\r
736 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
737 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
738 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
739 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
740 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
741\r
742 /* PWM1 Mode configuration */\r
743 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
744 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
745 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
746 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
747 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
748\r
749 /* Preload configuration */\r
750 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
751 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
752\r
753 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
22a5040e 754\r
755# elif defined (__AVR_XMEGA__)\r
756 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
757 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
758\r
759 XMEGA_Timer.PER = 0xFFFF; //Topwert\r
760 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC\r
761\r
762# if AVR_PRESCALER == 8\r
763 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8\r
764# else\r
765 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1\r
766# endif\r
767 \r
768# else // AVR\r
e664a9f3 769 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
770 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
08f2dd9d 771\r
772# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 773 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 774# if AVR_PRESCALER == 8\r
e664a9f3 775 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 776# else\r
e664a9f3 777 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 778# endif\r
08f2dd9d 779# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
e664a9f3 780 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 781# if AVR_PRESCALER == 8\r
e664a9f3 782 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 783# else\r
e664a9f3 784 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 785# endif\r
08f2dd9d 786# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 787 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 788# if AVR_PRESCALER == 8\r
e664a9f3 789 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 790# else\r
e664a9f3 791 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 792# endif\r
08f2dd9d 793# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
e664a9f3 794 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 795# if AVR_PRESCALER == 8\r
e664a9f3 796 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 797# else\r
e664a9f3 798 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 799# endif\r
08f2dd9d 800# else\r
801# error wrong value of IRSND_OCx\r
802# endif\r
e664a9f3 803 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
08f2dd9d 804# endif //PIC_C18\r
cb93f9e9 805#endif // ANALYZE\r
4225a882 806}\r
807\r
f50e01e7 808#if IRSND_USE_CALLBACK == 1\r
809void\r
810irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
811{\r
812 irsnd_callback_ptr = cb;\r
813}\r
814#endif // IRSND_USE_CALLBACK == 1\r
815\r
4225a882 816uint8_t\r
817irsnd_is_busy (void)\r
818{\r
819 return irsnd_busy;\r
820}\r
821\r
822static uint16_t\r
823bitsrevervse (uint16_t x, uint8_t len)\r
824{\r
825 uint16_t xx = 0;\r
826\r
827 while(len)\r
828 {\r
e664a9f3 829 xx <<= 1;\r
830 if (x & 1)\r
831 {\r
832 xx |= 1;\r
833 }\r
834 x >>= 1;\r
835 len--;\r
4225a882 836 }\r
837 return xx;\r
838}\r
839\r
840\r
9547ee89 841#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
842static uint8_t sircs_additional_bitlen;\r
843#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
844\r
4225a882 845uint8_t\r
879b06c2 846irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 847{\r
848#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
849 static uint8_t toggle_bit_recs80;\r
850#endif\r
851#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
852 static uint8_t toggle_bit_recs80ext;\r
853#endif\r
854#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
855 static uint8_t toggle_bit_rc5;\r
9547ee89 856#endif\r
779fbc81 857#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 858 static uint8_t toggle_bit_rc6;\r
beda975f 859#endif\r
860#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
861 static uint8_t toggle_bit_thomson;\r
4225a882 862#endif\r
863 uint16_t address;\r
864 uint16_t command;\r
865\r
879b06c2 866 if (do_wait)\r
4225a882 867 {\r
e664a9f3 868 while (irsnd_busy)\r
869 {\r
870 // do nothing;\r
871 }\r
879b06c2 872 }\r
873 else if (irsnd_busy)\r
874 {\r
e664a9f3 875 return (FALSE);\r
4225a882 876 }\r
877\r
878 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 879 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 880\r
881 switch (irsnd_protocol)\r
882 {\r
883#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 884 case IRMP_SIRCS_PROTOCOL:\r
885 {\r
886 // uint8_t sircs_additional_command_len;\r
887 uint8_t sircs_additional_address_len;\r
888\r
889 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
890\r
891 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
892 {\r
893 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
894 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
895 }\r
896 else\r
897 {\r
898 // sircs_additional_command_len = sircs_additional_bitlen;\r
899 sircs_additional_address_len = 0;\r
900 }\r
901\r
902 command = bitsrevervse (irmp_data_p->command, 15);\r
903\r
904 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
905 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
906\r
907 if (sircs_additional_address_len > 0)\r
908 {\r
909 address = bitsrevervse (irmp_data_p->address, 5);\r
910 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
911 irsnd_buffer[2] = (address & 0x000F) << 4;\r
912 }\r
913 irsnd_busy = TRUE;\r
914 break;\r
915 }\r
4225a882 916#endif\r
917#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 918 case IRMP_APPLE_PROTOCOL:\r
919 {\r
920 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
921 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
922\r
923 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
924 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
925\r
926 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
927\r
928 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
929 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
930 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
931 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
932 irsnd_busy = TRUE;\r
933 break;\r
934 }\r
935 case IRMP_NEC_PROTOCOL:\r
936 {\r
937 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
938 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
939\r
940 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
941 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
942 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
943 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
944 irsnd_busy = TRUE;\r
945 break;\r
946 }\r
7644ac04 947#endif\r
948#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 949 case IRMP_NEC16_PROTOCOL:\r
950 {\r
951 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
952 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 953\r
e664a9f3 954 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
955 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
956 irsnd_busy = TRUE;\r
957 break;\r
958 }\r
7644ac04 959#endif\r
960#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 961 case IRMP_NEC42_PROTOCOL:\r
962 {\r
963 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
964 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
965\r
966 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
967 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
968 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
969 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
970 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
971 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
972 irsnd_busy = TRUE;\r
973 break;\r
974 }\r
4225a882 975#endif\r
c1dfa01f 976#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
977 case IRMP_LGAIR_PROTOCOL:\r
978 {\r
979 address = irmp_data_p->address;\r
980 command = irmp_data_p->command;\r
981\r
982 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA\r
983 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC\r
984 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC\r
985 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum\r
986 ((command & 0x0F00) >> 8) +\r
987 ((command & 0x00F0) >>4 ) +\r
988 ((command & 0x000F))) & 0x000F) << 4;\r
989 irsnd_busy = TRUE;\r
990 break;\r
991 }\r
992#endif\r
4225a882 993#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 994 case IRMP_SAMSUNG_PROTOCOL:\r
995 {\r
996 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
997 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
998\r
999 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1000 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1001 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
1002 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
1003 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
1004 irsnd_busy = TRUE;\r
1005 break;\r
1006 }\r
1007 case IRMP_SAMSUNG32_PROTOCOL:\r
1008 {\r
1009 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1010 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
1011\r
1012 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1013 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1014 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
1015 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
1016 irsnd_busy = TRUE;\r
1017 break;\r
1018 }\r
4225a882 1019#endif\r
ac8504f8 1020#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1021 case IRMP_SAMSUNG48_PROTOCOL:\r
1022 {\r
1023 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1024 command = bitsrevervse (irmp_data_p->command, 16);\r
1025\r
1026 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1027 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1028 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC\r
1029 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
1030 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC\r
1031 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc\r
1032 irsnd_busy = TRUE;\r
1033 break;\r
1034 }\r
1035#endif\r
4225a882 1036#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1037 case IRMP_MATSUSHITA_PROTOCOL:\r
1038 {\r
1039 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
1040 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
1041\r
1042 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
1043 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
1044 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
1045 irsnd_busy = TRUE;\r
1046 break;\r
1047 }\r
4225a882 1048#endif\r
770a1a9d 1049#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1050 case IRMP_KASEIKYO_PROTOCOL:\r
1051 {\r
1052 uint8_t xor_value;\r
1053 uint16_t genre2;\r
770a1a9d 1054\r
e664a9f3 1055 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
1056 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
1057 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 1058\r
e664a9f3 1059 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 1060\r
e664a9f3 1061 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1062 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1063 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
1064 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
1065 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
770a1a9d 1066\r
e664a9f3 1067 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 1068\r
e664a9f3 1069 irsnd_buffer[5] = xor_value;\r
1070 irsnd_busy = TRUE;\r
1071 break;\r
1072 }\r
770a1a9d 1073#endif\r
4225a882 1074#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1075 case IRMP_RECS80_PROTOCOL:\r
1076 {\r
1077 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
4225a882 1078\r
e664a9f3 1079 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
1080 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
1081 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
1082 irsnd_busy = TRUE;\r
1083 break;\r
1084 }\r
4225a882 1085#endif\r
1086#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1087 case IRMP_RECS80EXT_PROTOCOL:\r
1088 {\r
1089 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
4225a882 1090\r
e664a9f3 1091 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
1092 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
1093 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
1094 irsnd_busy = TRUE;\r
1095 break;\r
1096 }\r
4225a882 1097#endif\r
1098#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1099 case IRMP_RC5_PROTOCOL:\r
1100 {\r
1101 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
4225a882 1102\r
e664a9f3 1103 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
1104 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
1105 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
1106 irsnd_busy = TRUE;\r
1107 break;\r
1108 }\r
4225a882 1109#endif\r
9547ee89 1110#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1111 case IRMP_RC6_PROTOCOL:\r
1112 {\r
1113 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
9547ee89 1114\r
e664a9f3 1115 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
1116 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
1117 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
1118 irsnd_busy = TRUE;\r
1119 break;\r
1120 }\r
9547ee89 1121#endif\r
1122#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1123 case IRMP_RC6A_PROTOCOL:\r
1124 {\r
1125 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
1126\r
1127 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
1128 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
1129 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
1130 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1131 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
1132 irsnd_busy = TRUE;\r
1133 break;\r
1134 }\r
9547ee89 1135#endif\r
4225a882 1136#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1137 case IRMP_DENON_PROTOCOL:\r
1138 {\r
1139 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
1140 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
1141 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
1142 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
1143 irsnd_busy = TRUE;\r
1144 break;\r
1145 }\r
4225a882 1146#endif\r
beda975f 1147#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1148 case IRMP_THOMSON_PROTOCOL:\r
1149 {\r
1150 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
beda975f 1151\r
e664a9f3 1152 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
1153 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
1154 irsnd_busy = TRUE;\r
1155 break;\r
1156 }\r
beda975f 1157#endif\r
4225a882 1158#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1159 case IRMP_NUBERT_PROTOCOL:\r
1160 {\r
1161 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1162 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1163 irsnd_busy = TRUE;\r
1164 break;\r
1165 }\r
5481e9cd 1166#endif\r
0715cf5e 1167#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
1168 case IRMP_FAN_PROTOCOL:\r
1169 {\r
1170 irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC\r
1171 irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
1172 irsnd_busy = TRUE;\r
1173 break;\r
1174 }\r
1175#endif\r
15dd9c32 1176#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1177 case IRMP_SPEAKER_PROTOCOL:\r
1178 {\r
1179 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1180 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1181 irsnd_busy = TRUE;\r
1182 break;\r
1183 }\r
1184#endif\r
5481e9cd 1185#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1186 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1187 {\r
1188 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
1189 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
1190 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
1191 irsnd_busy = TRUE;\r
1192 break;\r
1193 }\r
4225a882 1194#endif\r
5b437ff6 1195#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1196 case IRMP_GRUNDIG_PROTOCOL:\r
1197 {\r
9c07687e 1198 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);\r
5b437ff6 1199\r
e664a9f3 1200 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
1201 irsnd_buffer[1] = 0xC0; // 11\r
1202 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
1203 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
d155e9ab 1204\r
e664a9f3 1205 irsnd_busy = TRUE;\r
1206 break;\r
1207 }\r
d155e9ab 1208#endif\r
9c07687e 1209#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1210 case IRMP_TELEFUNKEN_PROTOCOL:\r
1211 {\r
1212 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC\r
1213 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC\r
1214\r
1215 irsnd_busy = TRUE;\r
1216 break;\r
1217 }\r
1218#endif\r
a48187fa 1219#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1220 case IRMP_IR60_PROTOCOL:\r
1221 {\r
1222 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 1223#if 0\r
e664a9f3 1224 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
1225 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 1226#else\r
e664a9f3 1227 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
1228 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
08f2dd9d 1229#endif\r
a48187fa 1230\r
e664a9f3 1231 irsnd_busy = TRUE;\r
1232 break;\r
1233 }\r
a48187fa 1234#endif\r
d155e9ab 1235#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1236 case IRMP_NOKIA_PROTOCOL:\r
1237 {\r
1238 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1239 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1240\r
1241 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1242 irsnd_buffer[1] = 0xFF; // 11111111\r
1243 irsnd_buffer[2] = 0x80; // 1\r
1244 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1245 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1246 irsnd_buffer[5] = (address << 7); // A\r
1247\r
1248 irsnd_busy = TRUE;\r
1249 break;\r
1250 }\r
5b437ff6 1251#endif\r
a7054daf 1252#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1253 case IRMP_SIEMENS_PROTOCOL:\r
1254 {\r
cb93f9e9 1255 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA\r
1256 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC\r
1257 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
9405f84a 1258\r
e664a9f3 1259 irsnd_busy = TRUE;\r
1260 break;\r
1261 }\r
b5ea7869 1262#endif\r
cb93f9e9 1263#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1264 case IRMP_RUWIDO_PROTOCOL:\r
1265 {\r
1266 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA\r
1267 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC\r
1268 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c\r
1269 irsnd_busy = TRUE;\r
1270 break;\r
1271 }\r
1272#endif\r
48664931 1273#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1274 case IRMP_FDC_PROTOCOL:\r
1275 {\r
1276 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1277 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
1278\r
1279 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1280 irsnd_buffer[1] = 0; // 00000000\r
1281 irsnd_buffer[2] = 0; // 0000RRRR\r
1282 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1283 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1284 irsnd_busy = TRUE;\r
1285 break;\r
1286 }\r
c7c9a4a1 1287#endif\r
1288#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1289 case IRMP_RCCAR_PROTOCOL:\r
1290 {\r
1291 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1292 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1293\r
1294 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1295 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1296 \r
1297 irsnd_busy = TRUE;\r
1298 break;\r
1299 }\r
a7054daf 1300#endif\r
c7a47e89 1301#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1302 case IRMP_JVC_PROTOCOL:\r
1303 {\r
1304 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1305 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
c7a47e89 1306\r
e664a9f3 1307 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1308 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
c7a47e89 1309\r
e664a9f3 1310 irsnd_busy = TRUE;\r
1311 break;\r
1312 }\r
c7a47e89 1313#endif\r
9405f84a 1314#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1315 case IRMP_NIKON_PROTOCOL:\r
1316 {\r
1317 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1318 irsnd_busy = TRUE;\r
1319 break;\r
1320 }\r
f50e01e7 1321#endif\r
1322#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1323 case IRMP_LEGO_PROTOCOL:\r
1324 {\r
1325 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
fa09ce10 1326\r
e664a9f3 1327 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1328 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1329 irsnd_busy = TRUE;\r
1330 break;\r
1331 }\r
fa09ce10 1332#endif\r
1333#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1334 case IRMP_A1TVBOX_PROTOCOL:\r
1335 {\r
1336 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r
1337 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r
1338 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r
1339\r
1340 irsnd_busy = TRUE;\r
1341 break;\r
1342 }\r
1343#endif\r
c9b6916a 1344#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1345 case IRMP_ROOMBA_PROTOCOL:\r
1346 {\r
c9b6916a 1347 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r
1348 irsnd_busy = TRUE;\r
1349 break;\r
1350 }\r
1351#endif\r
003c1008 1352#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
1353 case IRMP_PENTAX_PROTOCOL:\r
1354 {\r
1355 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..\r
1356 irsnd_busy = TRUE;\r
1357 break;\r
1358 }\r
1359#endif\r
1360\r
e664a9f3 1361 default:\r
1362 {\r
1363 break;\r
1364 }\r
4225a882 1365 }\r
1366\r
1367 return irsnd_busy;\r
1368}\r
1369\r
beda975f 1370void\r
1371irsnd_stop (void)\r
1372{\r
acf7fb44 1373 irsnd_repeat = 0;\r
beda975f 1374}\r
1375\r
4225a882 1376/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1377 * ISR routine\r
1378 * @details ISR routine, called 10000 times per second\r
1379 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1380 */\r
1381uint8_t\r
1382irsnd_ISR (void)\r
1383{\r
a48187fa 1384 static uint8_t send_trailer = FALSE;\r
1385 static uint8_t current_bit = 0xFF;\r
1386 static uint8_t pulse_counter = 0;\r
1387 static IRSND_PAUSE_LEN pause_counter = 0;\r
1388 static uint8_t startbit_pulse_len = 0;\r
1389 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1390 static uint8_t pulse_1_len = 0;\r
1391 static uint8_t pause_1_len = 0;\r
1392 static uint8_t pulse_0_len = 0;\r
1393 static uint8_t pause_0_len = 0;\r
1394 static uint8_t has_stop_bit = 0;\r
1395 static uint8_t new_frame = TRUE;\r
1396 static uint8_t complete_data_len = 0;\r
1397 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1398 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1399 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1400 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1401 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1402 static uint8_t repeat_counter = 0; // repeat counter\r
1403 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1404 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1405#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1406 static uint8_t last_bit_value;\r
5481e9cd 1407#endif\r
a48187fa 1408 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1409 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1410\r
1411 if (irsnd_busy)\r
1412 {\r
e664a9f3 1413 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1414 {\r
1415 if (auto_repetition_counter > 0)\r
1416 {\r
1417 auto_repetition_pause_counter++;\r
4225a882 1418\r
08f2dd9d 1419#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1420 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1421 {\r
1422 repeat_frame_pause_len--;\r
1423 }\r
08f2dd9d 1424#endif\r
1425\r
e664a9f3 1426 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
1427 {\r
1428 auto_repetition_pause_counter = 0;\r
4225a882 1429\r
08f2dd9d 1430#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1431 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
1432 {\r
1433 current_bit = 16;\r
1434 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1435 }\r
1436 else\r
08f2dd9d 1437#endif\r
1438#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1439 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
1440 {\r
1441 current_bit = 15;\r
1442 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1443 }\r
1444 else\r
08f2dd9d 1445#endif\r
1446#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1447 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1448 {\r
1449 current_bit = 7;\r
1450 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1451 }\r
1452 else\r
08f2dd9d 1453#endif\r
1454#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1455 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
1456 {\r
1457 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
1458 {\r
1459 current_bit = 23;\r
1460 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1461 }\r
1462 else // nokia stop frame\r
1463 {\r
1464 current_bit = 0xFF;\r
1465 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1466 }\r
1467 }\r
1468 else\r
1469#endif\r
1470 {\r
1471 ;\r
1472 }\r
1473 }\r
1474 else\r
1475 {\r
cb93f9e9 1476#ifdef ANALYZE\r
e664a9f3 1477 if (irsnd_is_on)\r
1478 {\r
1479 putchar ('0');\r
1480 }\r
1481 else\r
1482 {\r
1483 putchar ('1');\r
1484 }\r
1485#endif\r
1486 return irsnd_busy;\r
1487 }\r
1488 }\r
e664a9f3 1489 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
e664a9f3 1490 {\r
1491 packet_repeat_pause_counter++;\r
cb93f9e9 1492#ifdef ANALYZE\r
e664a9f3 1493 if (irsnd_is_on)\r
1494 {\r
1495 putchar ('0');\r
1496 }\r
1497 else\r
1498 {\r
1499 putchar ('1');\r
1500 }\r
1501#endif\r
1502 return irsnd_busy;\r
1503 }\r
1504 else\r
1505 {\r
1506 if (send_trailer)\r
1507 {\r
1508 irsnd_busy = FALSE;\r
1509 send_trailer = FALSE;\r
1510 return irsnd_busy;\r
1511 }\r
1512 \r
1513 n_repeat_frames = irsnd_repeat;\r
1514\r
1515 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1516 {\r
1517 n_repeat_frames = 255;\r
1518 }\r
1519\r
1520 packet_repeat_pause_counter = 0;\r
1521 pulse_counter = 0;\r
1522 pause_counter = 0;\r
1523\r
1524 switch (irsnd_protocol)\r
1525 {\r
4225a882 1526#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1527 case IRMP_SIRCS_PROTOCOL:\r
1528 {\r
1529 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
1530 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
1531 pulse_1_len = SIRCS_1_PULSE_LEN;\r
1532 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
1533 pulse_0_len = SIRCS_0_PULSE_LEN;\r
1534 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
1535 has_stop_bit = SIRCS_STOP_BIT;\r
1536 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
1537 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1538 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1539 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
1540 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1541 break;\r
1542 }\r
4225a882 1543#endif\r
1544#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1545 case IRMP_NEC_PROTOCOL:\r
1546 {\r
1547 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1548\r
1549 if (repeat_counter > 0)\r
1550 {\r
1551 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
1552 complete_data_len = 0;\r
1553 }\r
1554 else\r
1555 {\r
1556 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1557 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1558 }\r
1559\r
1560 pulse_1_len = NEC_PULSE_LEN;\r
1561 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1562 pulse_0_len = NEC_PULSE_LEN;\r
1563 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1564 has_stop_bit = NEC_STOP_BIT;\r
1565 n_auto_repetitions = 1; // 1 frame\r
1566 auto_repetition_pause_len = 0;\r
1567 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1568 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1569 break;\r
1570 }\r
4225a882 1571#endif\r
7644ac04 1572#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1573 case IRMP_NEC16_PROTOCOL:\r
1574 {\r
1575 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1576 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1577 pulse_1_len = NEC_PULSE_LEN;\r
1578 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1579 pulse_0_len = NEC_PULSE_LEN;\r
1580 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1581 has_stop_bit = NEC_STOP_BIT;\r
1582 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1583 n_auto_repetitions = 1; // 1 frame\r
1584 auto_repetition_pause_len = 0;\r
1585 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1586 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1587 break;\r
1588 }\r
7644ac04 1589#endif\r
1590#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1591 case IRMP_NEC42_PROTOCOL:\r
1592 {\r
1593 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1594 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1595 pulse_1_len = NEC_PULSE_LEN;\r
1596 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1597 pulse_0_len = NEC_PULSE_LEN;\r
1598 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1599 has_stop_bit = NEC_STOP_BIT;\r
1600 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1601 n_auto_repetitions = 1; // 1 frame\r
1602 auto_repetition_pause_len = 0;\r
1603 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1604 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1605 break;\r
1606 }\r
7644ac04 1607#endif\r
c1dfa01f 1608#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
1609 case IRMP_LGAIR_PROTOCOL:\r
1610 {\r
1611 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1612 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1613 pulse_1_len = NEC_PULSE_LEN;\r
1614 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1615 pulse_0_len = NEC_PULSE_LEN;\r
1616 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1617 has_stop_bit = NEC_STOP_BIT;\r
1618 complete_data_len = LGAIR_COMPLETE_DATA_LEN;\r
1619 n_auto_repetitions = 1; // 1 frame\r
1620 auto_repetition_pause_len = 0;\r
1621 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1622 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1623 break;\r
1624 }\r
1625#endif\r
4225a882 1626#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1627 case IRMP_SAMSUNG_PROTOCOL:\r
1628 {\r
1629 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1630 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1631 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1632 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1633 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1634 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1635 has_stop_bit = SAMSUNG_STOP_BIT;\r
1636 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1637 n_auto_repetitions = 1; // 1 frame\r
1638 auto_repetition_pause_len = 0;\r
1639 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
1640 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1641 break;\r
1642 }\r
1643\r
1644 case IRMP_SAMSUNG32_PROTOCOL:\r
1645 {\r
1646 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1647 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1648 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1649 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1650 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1651 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1652 has_stop_bit = SAMSUNG_STOP_BIT;\r
1653 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
956ea3ea 1654 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame\r
e664a9f3 1655 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1656 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
1657 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1658 break;\r
1659 }\r
4225a882 1660#endif\r
ac8504f8 1661#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1662 case IRMP_SAMSUNG48_PROTOCOL:\r
1663 {\r
1664 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1665 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1666 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1667 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1668 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1669 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1670 has_stop_bit = SAMSUNG_STOP_BIT;\r
1671 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;\r
1672 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame\r
1673 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1674 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;\r
1675 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1676 break;\r
1677 }\r
1678#endif\r
4225a882 1679#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1680 case IRMP_MATSUSHITA_PROTOCOL:\r
1681 {\r
1682 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1683 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1684 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1685 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1686 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1687 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1688 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1689 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1690 n_auto_repetitions = 1; // 1 frame\r
1691 auto_repetition_pause_len = 0;\r
1692 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1693 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1694 break;\r
1695 }\r
4225a882 1696#endif\r
770a1a9d 1697#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1698 case IRMP_KASEIKYO_PROTOCOL:\r
1699 {\r
1700 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
1701 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
1702 pulse_1_len = KASEIKYO_PULSE_LEN;\r
1703 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
1704 pulse_0_len = KASEIKYO_PULSE_LEN;\r
1705 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
1706 has_stop_bit = KASEIKYO_STOP_BIT;\r
1707 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1708 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1709 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1710 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1711 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1712 break;\r
1713 }\r
770a1a9d 1714#endif\r
4225a882 1715#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1716 case IRMP_RECS80_PROTOCOL:\r
1717 {\r
1718 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
1719 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
1720 pulse_1_len = RECS80_PULSE_LEN;\r
1721 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
1722 pulse_0_len = RECS80_PULSE_LEN;\r
1723 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
1724 has_stop_bit = RECS80_STOP_BIT;\r
1725 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1726 n_auto_repetitions = 1; // 1 frame\r
1727 auto_repetition_pause_len = 0;\r
1728 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
1729 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1730 break;\r
1731 }\r
4225a882 1732#endif\r
1733#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1734 case IRMP_RECS80EXT_PROTOCOL:\r
1735 {\r
1736 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
1737 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
1738 pulse_1_len = RECS80EXT_PULSE_LEN;\r
1739 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
1740 pulse_0_len = RECS80EXT_PULSE_LEN;\r
1741 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
1742 has_stop_bit = RECS80EXT_STOP_BIT;\r
1743 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1744 n_auto_repetitions = 1; // 1 frame\r
1745 auto_repetition_pause_len = 0;\r
1746 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
1747 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1748 break;\r
1749 }\r
4225a882 1750#endif\r
9c07687e 1751#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1752 case IRMP_TELEFUNKEN_PROTOCOL:\r
1753 {\r
1754 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;\r
1755 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;\r
1756 pulse_1_len = TELEFUNKEN_PULSE_LEN;\r
1757 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;\r
1758 pulse_0_len = TELEFUNKEN_PULSE_LEN;\r
1759 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;\r
1760 has_stop_bit = TELEFUNKEN_STOP_BIT;\r
1761 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;\r
1762 n_auto_repetitions = 1; // 1 frames\r
1763 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause\r
1764 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1765 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1766 break;\r
1767 }\r
1768#endif\r
4225a882 1769#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1770 case IRMP_RC5_PROTOCOL:\r
1771 {\r
1772 startbit_pulse_len = RC5_BIT_LEN;\r
1773 startbit_pause_len = RC5_BIT_LEN;\r
1774 pulse_len = RC5_BIT_LEN;\r
1775 pause_len = RC5_BIT_LEN;\r
1776 has_stop_bit = RC5_STOP_BIT;\r
1777 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1778 n_auto_repetitions = 1; // 1 frame\r
1779 auto_repetition_pause_len = 0;\r
1780 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
1781 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1782 break;\r
1783 }\r
4225a882 1784#endif\r
9547ee89 1785#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1786 case IRMP_RC6_PROTOCOL:\r
1787 {\r
1788 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1789 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1790 pulse_len = RC6_BIT_LEN;\r
1791 pause_len = RC6_BIT_LEN;\r
1792 has_stop_bit = RC6_STOP_BIT;\r
1793 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1794 n_auto_repetitions = 1; // 1 frame\r
1795 auto_repetition_pause_len = 0;\r
1796 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1797 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1798 break;\r
1799 }\r
9547ee89 1800#endif\r
1801#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1802 case IRMP_RC6A_PROTOCOL:\r
1803 {\r
1804 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1805 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1806 pulse_len = RC6_BIT_LEN;\r
1807 pause_len = RC6_BIT_LEN;\r
1808 has_stop_bit = RC6_STOP_BIT;\r
1809 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1810 n_auto_repetitions = 1; // 1 frame\r
1811 auto_repetition_pause_len = 0;\r
1812 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1813 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1814 break;\r
1815 }\r
9547ee89 1816#endif\r
4225a882 1817#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1818 case IRMP_DENON_PROTOCOL:\r
1819 {\r
1820 startbit_pulse_len = 0x00;\r
1821 startbit_pause_len = 0x00;\r
1822 pulse_1_len = DENON_PULSE_LEN;\r
1823 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
1824 pulse_0_len = DENON_PULSE_LEN;\r
1825 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
1826 has_stop_bit = DENON_STOP_BIT;\r
1827 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1828 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1829 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1830 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1831 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
1832 break;\r
1833 }\r
4225a882 1834#endif\r
beda975f 1835#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1836 case IRMP_THOMSON_PROTOCOL:\r
1837 {\r
1838 startbit_pulse_len = 0x00;\r
1839 startbit_pause_len = 0x00;\r
1840 pulse_1_len = THOMSON_PULSE_LEN;\r
1841 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1842 pulse_0_len = THOMSON_PULSE_LEN;\r
1843 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1844 has_stop_bit = THOMSON_STOP_BIT;\r
1845 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1846 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1847 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1848 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1849 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1850 break;\r
1851 }\r
beda975f 1852#endif\r
4225a882 1853#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1854 case IRMP_NUBERT_PROTOCOL:\r
1855 {\r
1856 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
1857 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
1858 pulse_1_len = NUBERT_1_PULSE_LEN;\r
1859 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
1860 pulse_0_len = NUBERT_0_PULSE_LEN;\r
1861 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
1862 has_stop_bit = NUBERT_STOP_BIT;\r
1863 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1864 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1865 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1866 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
1867 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1868 break;\r
1869 }\r
5481e9cd 1870#endif\r
0715cf5e 1871#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
1872 case IRMP_FAN_PROTOCOL:\r
1873 {\r
1874 startbit_pulse_len = FAN_START_BIT_PULSE_LEN;\r
1875 startbit_pause_len = FAN_START_BIT_PAUSE_LEN - 1;\r
1876 pulse_1_len = FAN_1_PULSE_LEN;\r
1877 pause_1_len = FAN_1_PAUSE_LEN - 1;\r
1878 pulse_0_len = FAN_0_PULSE_LEN;\r
1879 pause_0_len = FAN_0_PAUSE_LEN - 1;\r
1880 has_stop_bit = FAN_STOP_BIT;\r
1881 complete_data_len = FAN_COMPLETE_DATA_LEN;\r
1882 n_auto_repetitions = FAN_FRAMES; // only 1 frame\r
1883 auto_repetition_pause_len = FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1884 repeat_frame_pause_len = FAN_FRAME_REPEAT_PAUSE_LEN;\r
1885 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1886 break;\r
1887 }\r
1888#endif\r
15dd9c32 1889#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1890 case IRMP_SPEAKER_PROTOCOL:\r
1891 {\r
1892 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;\r
1893 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;\r
1894 pulse_1_len = SPEAKER_1_PULSE_LEN;\r
1895 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;\r
1896 pulse_0_len = SPEAKER_0_PULSE_LEN;\r
1897 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;\r
1898 has_stop_bit = SPEAKER_STOP_BIT;\r
1899 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;\r
1900 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames\r
1901 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1902 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;\r
1903 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1904 break;\r
1905 }\r
1906#endif\r
5481e9cd 1907#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1908 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1909 {\r
1910 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
1911 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
1912 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
1913 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
1914 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
1915 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
1916 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1917 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1918 n_auto_repetitions = 1; // 1 frame\r
1919 auto_repetition_pause_len = 0;\r
1920 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1921 last_bit_value = 0;\r
1922 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1923 break;\r
1924 }\r
5b437ff6 1925#endif\r
1926#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1927 case IRMP_GRUNDIG_PROTOCOL:\r
1928 {\r
1929 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1930 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1931 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1932 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1933 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1934 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1935 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1936 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1937 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1938 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1939 break;\r
1940 }\r
a48187fa 1941#endif\r
1942#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1943 case IRMP_IR60_PROTOCOL:\r
1944 {\r
1945 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1946 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1947 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1948 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1949 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1950 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1951 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1952 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1953 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1954 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
1955 break;\r
1956 }\r
d155e9ab 1957#endif\r
1958#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1959 case IRMP_NOKIA_PROTOCOL:\r
1960 {\r
1961 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1962 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1963 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1964 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1965 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1966 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1967 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1968 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1969 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1970 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1971 break;\r
1972 }\r
a7054daf 1973#endif\r
1974#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1975 case IRMP_SIEMENS_PROTOCOL:\r
1976 {\r
1977 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1978 startbit_pause_len = SIEMENS_BIT_LEN;\r
1979 pulse_len = SIEMENS_BIT_LEN;\r
1980 pause_len = SIEMENS_BIT_LEN;\r
1981 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
cb93f9e9 1982 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;\r
e664a9f3 1983 n_auto_repetitions = 1; // 1 frame\r
1984 auto_repetition_pause_len = 0;\r
1985 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1986 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1987 break;\r
1988 }\r
b5ea7869 1989#endif\r
cb93f9e9 1990#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1991 case IRMP_RUWIDO_PROTOCOL:\r
1992 {\r
1993 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;\r
1994 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;\r
1995 pulse_len = RUWIDO_BIT_PULSE_LEN;\r
1996 pause_len = RUWIDO_BIT_PAUSE_LEN;\r
1997 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
1998 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;\r
1999 n_auto_repetitions = 1; // 1 frame\r
2000 auto_repetition_pause_len = 0;\r
2001 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;\r
2002 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
2003 break;\r
2004 }\r
2005#endif\r
48664931 2006#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2007 case IRMP_FDC_PROTOCOL:\r
2008 {\r
2009 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
2010 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
2011 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
2012 pulse_1_len = FDC_PULSE_LEN;\r
2013 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
2014 pulse_0_len = FDC_PULSE_LEN;\r
2015 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
2016 has_stop_bit = FDC_STOP_BIT;\r
2017 n_auto_repetitions = 1; // 1 frame\r
2018 auto_repetition_pause_len = 0;\r
2019 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
2020 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2021 break;\r
2022 }\r
c7c9a4a1 2023#endif\r
2024#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 2025 case IRMP_RCCAR_PROTOCOL:\r
2026 {\r
2027 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
2028 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
2029 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
2030 pulse_1_len = RCCAR_PULSE_LEN;\r
2031 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
2032 pulse_0_len = RCCAR_PULSE_LEN;\r
2033 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
2034 has_stop_bit = RCCAR_STOP_BIT;\r
2035 n_auto_repetitions = 1; // 1 frame\r
2036 auto_repetition_pause_len = 0;\r
2037 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
2038 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2039 break;\r
2040 }\r
4225a882 2041#endif\r
c7a47e89 2042#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2043 case IRMP_JVC_PROTOCOL:\r
2044 {\r
2045 if (repeat_counter != 0) // skip start bit if repetition frame\r
2046 {\r
2047 current_bit = 0;\r
2048 }\r
2049\r
2050 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
2051 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
2052 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
2053 pulse_1_len = JVC_PULSE_LEN;\r
2054 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
2055 pulse_0_len = JVC_PULSE_LEN;\r
2056 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
2057 has_stop_bit = JVC_STOP_BIT;\r
2058 n_auto_repetitions = 1; // 1 frame\r
2059 auto_repetition_pause_len = 0;\r
2060 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
2061 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2062 break;\r
2063 }\r
c7a47e89 2064#endif\r
9405f84a 2065#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2066 case IRMP_NIKON_PROTOCOL:\r
2067 {\r
2068 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
2069 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
2070 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
2071 pulse_1_len = NIKON_PULSE_LEN;\r
2072 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
2073 pulse_0_len = NIKON_PULSE_LEN;\r
2074 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
2075 has_stop_bit = NIKON_STOP_BIT;\r
2076 n_auto_repetitions = 1; // 1 frame\r
2077 auto_repetition_pause_len = 0;\r
2078 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
2079 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2080 break;\r
2081 }\r
9405f84a 2082#endif\r
f50e01e7 2083#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2084 case IRMP_LEGO_PROTOCOL:\r
2085 {\r
2086 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
2087 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
2088 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
2089 pulse_1_len = LEGO_PULSE_LEN;\r
2090 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
2091 pulse_0_len = LEGO_PULSE_LEN;\r
2092 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
2093 has_stop_bit = LEGO_STOP_BIT;\r
2094 n_auto_repetitions = 1; // 1 frame\r
2095 auto_repetition_pause_len = 0;\r
2096 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
2097 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2098 break;\r
2099 }\r
fa09ce10 2100#endif\r
2101#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2102 case IRMP_A1TVBOX_PROTOCOL:\r
2103 {\r
2104 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r
2105 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r
2106 pulse_len = A1TVBOX_BIT_PULSE_LEN;\r
2107 pause_len = A1TVBOX_BIT_PAUSE_LEN;\r
2108 has_stop_bit = A1TVBOX_STOP_BIT;\r
2109 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r
2110 n_auto_repetitions = 1; // 1 frame\r
2111 auto_repetition_pause_len = 0;\r
2112 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r
2113 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2114 break;\r
2115 }\r
c9b6916a 2116#endif\r
2117#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2118 case IRMP_ROOMBA_PROTOCOL:\r
2119 {\r
2120 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r
2121 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r
2122 pulse_1_len = ROOMBA_1_PULSE_LEN;\r
2123 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r
2124 pulse_0_len = ROOMBA_0_PULSE_LEN;\r
2125 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r
2126 has_stop_bit = ROOMBA_STOP_BIT;\r
2127 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r
cb93f9e9 2128 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames\r
2129 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
c9b6916a 2130 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
2131 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2132 break;\r
2133 }\r
003c1008 2134#endif\r
2135#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2136 case IRMP_PENTAX_PROTOCOL:\r
2137 {\r
2138 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;\r
2139 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;\r
2140 complete_data_len = PENTAX_COMPLETE_DATA_LEN;\r
2141 pulse_1_len = PENTAX_PULSE_LEN;\r
2142 pause_1_len = PENTAX_1_PAUSE_LEN - 1;\r
2143 pulse_0_len = PENTAX_PULSE_LEN;\r
2144 pause_0_len = PENTAX_0_PAUSE_LEN - 1;\r
2145 has_stop_bit = PENTAX_STOP_BIT;\r
2146 n_auto_repetitions = 1; // 1 frame\r
2147 auto_repetition_pause_len = 0;\r
2148 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;\r
2149 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2150 break;\r
2151 }\r
e664a9f3 2152#endif\r
2153 default:\r
2154 {\r
2155 irsnd_busy = FALSE;\r
2156 break;\r
2157 }\r
2158 }\r
2159 }\r
2160 }\r
2161\r
2162 if (irsnd_busy)\r
2163 {\r
2164 new_frame = FALSE;\r
2165\r
2166 switch (irsnd_protocol)\r
2167 {\r
4225a882 2168#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 2169 case IRMP_SIRCS_PROTOCOL:\r
4225a882 2170#endif\r
2171#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 2172 case IRMP_NEC_PROTOCOL:\r
4225a882 2173#endif\r
7644ac04 2174#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2175 case IRMP_NEC16_PROTOCOL:\r
7644ac04 2176#endif\r
2177#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 2178 case IRMP_NEC42_PROTOCOL:\r
7644ac04 2179#endif\r
c1dfa01f 2180#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
2181 case IRMP_LGAIR_PROTOCOL:\r
2182#endif\r
4225a882 2183#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2184 case IRMP_SAMSUNG_PROTOCOL:\r
2185 case IRMP_SAMSUNG32_PROTOCOL:\r
4225a882 2186#endif\r
ac8504f8 2187#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
2188 case IRMP_SAMSUNG48_PROTOCOL:\r
2189#endif\r
4225a882 2190#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 2191 case IRMP_MATSUSHITA_PROTOCOL:\r
4225a882 2192#endif\r
770a1a9d 2193#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 2194 case IRMP_KASEIKYO_PROTOCOL:\r
770a1a9d 2195#endif\r
4225a882 2196#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 2197 case IRMP_RECS80_PROTOCOL:\r
4225a882 2198#endif\r
2199#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 2200 case IRMP_RECS80EXT_PROTOCOL:\r
4225a882 2201#endif\r
9c07687e 2202#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
2203 case IRMP_TELEFUNKEN_PROTOCOL:\r
2204#endif\r
4225a882 2205#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2206 case IRMP_DENON_PROTOCOL:\r
4225a882 2207#endif\r
2208#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 2209 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 2210#endif\r
0715cf5e 2211#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
2212 case IRMP_FAN_PROTOCOL:\r
2213#endif\r
15dd9c32 2214#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
2215 case IRMP_SPEAKER_PROTOCOL:\r
2216#endif\r
5481e9cd 2217#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2218 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 2219#endif\r
c7c9a4a1 2220#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2221 case IRMP_FDC_PROTOCOL:\r
b5ea7869 2222#endif\r
c7c9a4a1 2223#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 2224 case IRMP_RCCAR_PROTOCOL:\r
c7c9a4a1 2225#endif\r
c7a47e89 2226#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2227 case IRMP_JVC_PROTOCOL:\r
c7a47e89 2228#endif\r
9405f84a 2229#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2230 case IRMP_NIKON_PROTOCOL:\r
9405f84a 2231#endif\r
f50e01e7 2232#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2233 case IRMP_LEGO_PROTOCOL:\r
f50e01e7 2234#endif\r
cb93f9e9 2235#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
2236 case IRMP_THOMSON_PROTOCOL:\r
2237#endif\r
c9b6916a 2238#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2239 case IRMP_ROOMBA_PROTOCOL:\r
2240#endif\r
003c1008 2241#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2242 case IRMP_PENTAX_PROTOCOL:\r
2243#endif\r
a7054daf 2244\r
7644ac04 2245#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
c1dfa01f 2246 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 2247 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
0715cf5e 2248 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \\r
2249 IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \\r
2250 IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \\r
2251 IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
e664a9f3 2252 {\r
08f2dd9d 2253#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2254 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
2255 {\r
2256 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
2257 {\r
2258 auto_repetition_pause_len--;\r
2259 }\r
2260\r
2261 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
2262 {\r
2263 repeat_frame_pause_len--;\r
2264 }\r
2265 }\r
2266#endif\r
2267\r
2268 if (pulse_counter == 0)\r
2269 {\r
2270 if (current_bit == 0xFF) // send start bit\r
2271 {\r
2272 pulse_len = startbit_pulse_len;\r
2273 pause_len = startbit_pause_len;\r
2274 }\r
2275 else if (current_bit < complete_data_len) // send n'th bit\r
2276 {\r
5481e9cd 2277#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2278 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
2279 {\r
2280 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
2281 {\r
2282 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2283 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2284 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2285 }\r
2286 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
2287 {\r
2288 pulse_len = SAMSUNG_PULSE_LEN;\r
2289 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
2290 }\r
2291 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
2292 {\r
2293 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2294\r
2295 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2296 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2297 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2298 }\r
2299 }\r
2300 else\r
5481e9cd 2301#endif\r
2302\r
7644ac04 2303#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2304 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
2305 {\r
2306 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
2307 {\r
2308 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2309 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2310 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2311 }\r
2312 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
2313 {\r
2314 pulse_len = NEC_PULSE_LEN;\r
2315 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
2316 }\r
2317 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
2318 {\r
2319 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2320\r
2321 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2322 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2323 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2324 }\r
2325 }\r
2326 else\r
7644ac04 2327#endif\r
2328\r
5481e9cd 2329#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2330 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
2331 {\r
2332 if (current_bit == 0) // send 2nd start bit\r
2333 {\r
2334 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2335 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2336 }\r
2337 else if (current_bit == 1) // send 3rd start bit\r
2338 {\r
2339 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
2340 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
2341 }\r
2342 else if (current_bit == 2) // send 4th start bit\r
2343 {\r
2344 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2345 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2346 }\r
2347 else if (current_bit == 19) // send trailer bit\r
2348 {\r
2349 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2350 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
2351 }\r
2352 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
2353 {\r
7fe8188d 2354 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;\r
e664a9f3 2355 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2356\r
2357 if (cur_bit_value == last_bit_value)\r
2358 {\r
2359 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
2360 }\r
2361 else\r
2362 {\r
2363 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
2364 last_bit_value = cur_bit_value;\r
2365 }\r
2366 }\r
2367 }\r
2368 else\r
2369#endif\r
7fe8188d 2370 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))\r
e664a9f3 2371 {\r
2372 pulse_len = pulse_1_len;\r
2373 pause_len = pause_1_len;\r
2374 }\r
2375 else\r
2376 {\r
2377 pulse_len = pulse_0_len;\r
2378 pause_len = pause_0_len;\r
2379 }\r
2380 }\r
2381 else if (has_stop_bit) // send stop bit\r
2382 {\r
2383 pulse_len = pulse_0_len;\r
2384\r
2385 if (auto_repetition_counter < n_auto_repetitions)\r
2386 {\r
2387 pause_len = pause_0_len;\r
2388 }\r
2389 else\r
2390 {\r
2391 pause_len = 255; // last frame: pause of 255\r
2392 }\r
2393 }\r
2394 }\r
2395\r
2396 if (pulse_counter < pulse_len)\r
2397 {\r
2398 if (pulse_counter == 0)\r
2399 {\r
2400 irsnd_on ();\r
2401 }\r
2402 pulse_counter++;\r
2403 }\r
2404 else if (pause_counter < pause_len)\r
2405 {\r
2406 if (pause_counter == 0)\r
2407 {\r
2408 irsnd_off ();\r
2409 }\r
2410 pause_counter++;\r
2411 }\r
2412 else\r
2413 {\r
2414 current_bit++;\r
2415\r
2416 if (current_bit >= complete_data_len + has_stop_bit)\r
2417 {\r
2418 current_bit = 0xFF;\r
2419 auto_repetition_counter++;\r
2420\r
2421 if (auto_repetition_counter == n_auto_repetitions)\r
2422 {\r
2423 irsnd_busy = FALSE;\r
2424 auto_repetition_counter = 0;\r
2425 }\r
2426 new_frame = TRUE;\r
2427 }\r
2428\r
2429 pulse_counter = 0;\r
2430 pause_counter = 0;\r
2431 }\r
2432 break;\r
2433 }\r
a7054daf 2434#endif\r
2435\r
4225a882 2436#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 2437 case IRMP_RC5_PROTOCOL:\r
a7054daf 2438#endif\r
9547ee89 2439#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 2440 case IRMP_RC6_PROTOCOL:\r
9547ee89 2441#endif\r
2442#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2443 case IRMP_RC6A_PROTOCOL:\r
9547ee89 2444#endif\r
a7054daf 2445#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2446 case IRMP_SIEMENS_PROTOCOL:\r
a7054daf 2447#endif\r
cb93f9e9 2448#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
2449 case IRMP_RUWIDO_PROTOCOL:\r
2450#endif\r
a7054daf 2451#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2452 case IRMP_GRUNDIG_PROTOCOL:\r
a7054daf 2453#endif\r
a48187fa 2454#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2455 case IRMP_IR60_PROTOCOL:\r
a48187fa 2456#endif\r
a7054daf 2457#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2458 case IRMP_NOKIA_PROTOCOL:\r
fa09ce10 2459#endif\r
2460#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2461 case IRMP_A1TVBOX_PROTOCOL:\r
a7054daf 2462#endif\r
4225a882 2463\r
cb93f9e9 2464#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \\r
2465 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \\r
2466 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \\r
2467 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \\r
2468 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
2469 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \\r
2470 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \\r
2471 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \\r
2472 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2473 {\r
2474 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
2475 {\r
2476 current_bit++;\r
4225a882 2477\r
e664a9f3 2478 if (current_bit >= complete_data_len)\r
2479 {\r
2480 current_bit = 0xFF;\r
a7054daf 2481\r
a48187fa 2482#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2483 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2484 {\r
2485 auto_repetition_counter++;\r
2486\r
2487 if (repeat_counter > 0)\r
2488 { // set 117 msec pause time\r
2489 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
2490 }\r
2491\r
2492 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2493 {\r
2494 n_auto_repetitions++; // increment number of auto repetitions\r
2495 repeat_counter++;\r
2496 }\r
2497 else if (auto_repetition_counter == n_auto_repetitions)\r
2498 {\r
2499 irsnd_busy = FALSE;\r
2500 auto_repetition_counter = 0;\r
2501 }\r
2502 }\r
2503 else\r
2504#endif\r
2505 {\r
2506 irsnd_busy = FALSE;\r
2507 }\r
2508\r
2509 new_frame = TRUE;\r
2510 irsnd_off ();\r
2511 }\r
2512\r
2513 pulse_counter = 0;\r
2514 pause_counter = 0;\r
2515 }\r
2516\r
2517 if (! new_frame)\r
2518 {\r
2519 uint8_t first_pulse;\r
5b437ff6 2520\r
a48187fa 2521#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2522 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2523 {\r
2524 if (current_bit == 0xFF || // start bit of start-frame\r
2525 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
2526 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
2527 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
2528 {\r
2529 pulse_len = startbit_pulse_len;\r
2530 pause_len = startbit_pause_len;\r
2531 first_pulse = TRUE;\r
2532 }\r
2533 else // send n'th bit\r
2534 {\r
2535 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2536 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
7fe8188d 2537 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2538 }\r
2539 }\r
2540 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
cb93f9e9 2541 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)\r
e664a9f3 2542#endif\r
2543 {\r
2544 if (current_bit == 0xFF) // 1 start bit\r
2545 {\r
9547ee89 2546#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2547 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2548 {\r
2549 pulse_len = startbit_pulse_len;\r
2550 pause_len = startbit_pause_len;\r
2551 }\r
2552 else\r
fa09ce10 2553#endif\r
2554#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2555 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r
2556 {\r
2557 current_bit = 0;\r
2558 }\r
2559 else\r
2560#endif\r
2561 {\r
2562 ;\r
2563 }\r
2564\r
2565 first_pulse = TRUE;\r
2566 }\r
2567 else // send n'th bit\r
2568 {\r
9547ee89 2569#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2570 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2571 {\r
2572 pulse_len = RC6_BIT_LEN;\r
2573 pause_len = RC6_BIT_LEN;\r
2574\r
2575 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2576 {\r
2577 if (current_bit == 4) // toggle bit (double len)\r
2578 {\r
2579 pulse_len = 2 * RC6_BIT_LEN;\r
2580 pause_len = 2 * RC6_BIT_LEN;\r
2581 }\r
2582 }\r
2583 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2584 {\r
2585 if (current_bit == 4) // toggle bit (double len)\r
2586 {\r
2587 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2588 pause_len = 2 * RC6_BIT_LEN;\r
2589 }\r
2590 else if (current_bit == 5) // toggle bit (double len)\r
2591 {\r
2592 pause_len = 2 * RC6_BIT_LEN;\r
2593 }\r
2594 }\r
2595 }\r
2596#endif\r
7fe8188d 2597 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2598 }\r
2599\r
2600 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2601 {\r
2602 first_pulse = first_pulse ? FALSE : TRUE;\r
2603 }\r
2604 }\r
2605\r
2606 if (first_pulse)\r
2607 {\r
2608 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2609\r
2610 if (pulse_counter < pulse_len)\r
2611 {\r
2612 if (pulse_counter == 0)\r
2613 {\r
2614 irsnd_on ();\r
2615 }\r
2616 pulse_counter++;\r
2617 }\r
2618 else // if (pause_counter < pause_len)\r
2619 {\r
2620 if (pause_counter == 0)\r
2621 {\r
2622 irsnd_off ();\r
2623 }\r
2624 pause_counter++;\r
2625 }\r
2626 }\r
2627 else\r
2628 {\r
2629 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2630\r
2631 if (pause_counter < pause_len)\r
2632 {\r
2633 if (pause_counter == 0)\r
2634 {\r
2635 irsnd_off ();\r
2636 }\r
2637 pause_counter++;\r
2638 }\r
2639 else // if (pulse_counter < pulse_len)\r
2640 {\r
2641 if (pulse_counter == 0)\r
2642 {\r
2643 irsnd_on ();\r
2644 }\r
2645 pulse_counter++;\r
2646 }\r
2647 }\r
2648 }\r
2649 break;\r
2650 }\r
9547ee89 2651#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
cb93f9e9 2652 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2653\r
e664a9f3 2654 default:\r
2655 {\r
2656 irsnd_busy = FALSE;\r
2657 break;\r
2658 }\r
2659 }\r
2660 }\r
2661\r
2662 if (! irsnd_busy)\r
2663 {\r
2664 if (repeat_counter < n_repeat_frames)\r
2665 {\r
c7c9a4a1 2666#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2667 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2668 {\r
2669 irsnd_buffer[2] |= 0x0F;\r
2670 }\r
2671#endif\r
2672 repeat_counter++;\r
2673 irsnd_busy = TRUE;\r
2674 }\r
2675 else\r
2676 {\r
2677 irsnd_busy = TRUE; //Rainer\r
2678 send_trailer = TRUE;\r
2679 n_repeat_frames = 0;\r
2680 repeat_counter = 0;\r
2681 }\r
2682 }\r
4225a882 2683 }\r
2684\r
cb93f9e9 2685#ifdef ANALYZE\r
4225a882 2686 if (irsnd_is_on)\r
2687 {\r
e664a9f3 2688 putchar ('0');\r
4225a882 2689 }\r
2690 else\r
2691 {\r
e664a9f3 2692 putchar ('1');\r
4225a882 2693 }\r
2694#endif\r
2695\r
2696 return irsnd_busy;\r
2697}\r
2698\r
cb93f9e9 2699#ifdef ANALYZE\r
4225a882 2700\r
2701// main function - for unix/linux + windows only!\r
2702// AVR: see main.c!\r
2703// Compile it under linux with:\r
2704// cc irsnd.c -o irsnd\r
2705//\r
2706// usage: ./irsnd protocol hex-address hex-command >filename\r
2707\r
2708int\r
2709main (int argc, char ** argv)\r
2710{\r
4225a882 2711 int protocol;\r
2712 int address;\r
2713 int command;\r
4225a882 2714 IRMP_DATA irmp_data;\r
2715\r
a7054daf 2716 if (argc != 4 && argc != 5)\r
4225a882 2717 {\r
e664a9f3 2718 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
2719 return 1;\r
4225a882 2720 }\r
2721\r
2722 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
e664a9f3 2723 sscanf (argv[2], "%x", &address) == 1 &&\r
2724 sscanf (argv[3], "%x", &command) == 1)\r
4225a882 2725 {\r
e664a9f3 2726 irmp_data.protocol = protocol;\r
2727 irmp_data.address = address;\r
2728 irmp_data.command = command;\r
4225a882 2729\r
e664a9f3 2730 if (argc == 5)\r
2731 {\r
2732 irmp_data.flags = atoi (argv[4]);\r
2733 }\r
2734 else\r
2735 {\r
2736 irmp_data.flags = 0;\r
2737 }\r
a7054daf 2738\r
e664a9f3 2739 irsnd_init ();\r
4225a882 2740\r
e664a9f3 2741 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2742\r
e664a9f3 2743 while (irsnd_busy)\r
2744 {\r
2745 irsnd_ISR ();\r
2746 }\r
beda975f 2747\r
e664a9f3 2748 putchar ('\n');\r
a03ad359 2749\r
f874da09 2750#if 1 // enable here to send twice\r
e664a9f3 2751 (void) irsnd_send_data (&irmp_data, TRUE);\r
a03ad359 2752\r
e664a9f3 2753 while (irsnd_busy)\r
2754 {\r
2755 irsnd_ISR ();\r
2756 }\r
a03ad359 2757\r
e664a9f3 2758 putchar ('\n');\r
f874da09 2759#endif\r
4225a882 2760 }\r
2761 else\r
2762 {\r
e664a9f3 2763 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2764 return 1;\r
4225a882 2765 }\r
2766 return 0;\r
2767}\r
2768\r
cb93f9e9 2769#endif // ANALYZE\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)