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Version 2.8.2: corrections of AVR XMEGA port
[irmp.git] / irsnd.c
CommitLineData
4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
0834784c 4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
622f5f59 6 * Supported AVR mikrocontrollers:\r
7644ac04 7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
2ac088b2 10 * ATtiny44 ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
e664a9f3 13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
7644ac04 14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
22a5040e 16 * $Id: irsnd.c,v 1.86 2015/05/07 06:51:10 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
2ac088b2 36#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
08f2dd9d 37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
ad4d3d41 46\r
08f2dd9d 47#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
48# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 49# define IRSND_PORT_LETTER B\r
50# define IRSND_BIT_NUMBER 0\r
08f2dd9d 51# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 52# define IRSND_PORT_LETTER B\r
53# define IRSND_BIT_NUMBER 1\r
08f2dd9d 54# else\r
55# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
56# endif // IRSND_OCx\r
ad4d3d41 57\r
21a4e0ee 58#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 59# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 60# define IRSND_PORT_LETTER A\r
61# define IRSND_BIT_NUMBER 2\r
90387f65 62# else\r
63# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
64# endif // IRSND_OCx\r
ad4d3d41 65\r
08f2dd9d 66#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
67# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 68# define IRSND_PORT_LETTER B\r
69# define IRSND_BIT_NUMBER 3\r
08f2dd9d 70# else\r
71# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
72# endif // IRSND_OCx\r
73#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
74# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 75# define IRSND_PORT_LETTER D\r
76# define IRSND_BIT_NUMBER 7\r
08f2dd9d 77# else\r
78# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
79# endif // IRSND_OCx\r
ad4d3d41 80\r
08f2dd9d 81#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
82# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 83# define IRSND_PORT_LETTER B\r
84# define IRSND_BIT_NUMBER 1\r
08f2dd9d 85# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 86# define IRSND_PORT_LETTER B\r
87# define IRSND_BIT_NUMBER 0\r
08f2dd9d 88# else\r
89# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
90# endif // IRSND_OCx\r
ad4d3d41 91\r
f50e01e7 92#elif defined (__AVR_ATmega164__) \\r
93 || defined (__AVR_ATmega324__) \\r
94 || defined (__AVR_ATmega644__) \\r
95 || defined (__AVR_ATmega644P__) \\r
0f700c8e 96 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
98# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 99# define IRSND_PORT_LETTER D\r
100# define IRSND_BIT_NUMBER 7\r
08f2dd9d 101# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 102# define IRSND_PORT_LETTER D\r
103# define IRSND_BIT_NUMBER 6\r
08f2dd9d 104# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 105# define IRSND_PORT_LETTER B\r
106# define IRSND_BIT_NUMBER 3\r
08f2dd9d 107# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 108# define IRSND_PORT_LETTER B\r
109# define IRSND_BIT_NUMBER 4\r
08f2dd9d 110# else\r
111# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
112# endif // IRSND_OCx\r
ad4d3d41 113\r
f50e01e7 114#elif defined (__AVR_ATmega48__) \\r
115 || defined (__AVR_ATmega88__) \\r
7644ac04 116 || defined (__AVR_ATmega88P__) \\r
f50e01e7 117 || defined (__AVR_ATmega168__) \\r
1f54e86c 118 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
120# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 121# define IRSND_PORT_LETTER B\r
122# define IRSND_BIT_NUMBER 3\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 3\r
08f2dd9d 126# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 127# define IRSND_PORT_LETTER D\r
128# define IRSND_BIT_NUMBER 6\r
08f2dd9d 129# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 130# define IRSND_PORT_LETTER D\r
131# define IRSND_BIT_NUMBER 5\r
08f2dd9d 132# else\r
133# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
134# endif // IRSND_OCx\r
ad4d3d41 135\r
f874da09 136#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 137# if IRSND_OCx == IRSND_OC0 \r
f874da09 138# define IRSND_PORT_LETTER B\r
139# define IRSND_BIT_NUMBER 0\r
08f2dd9d 140# elif IRSND_OCx == IRSND_OC1A \r
f874da09 141# define IRSND_PORT_LETTER D\r
142# define IRSND_BIT_NUMBER 5\r
08f2dd9d 143# elif IRSND_OCx == IRSND_OC1B \r
f874da09 144# define IRSND_PORT_LETTER E\r
145# define IRSND_BIT_NUMBER 2\r
ad4d3d41 146# endif // IRSND_OCx\r
147\r
148#elif defined (__AVR_ATxmega128A1U__) // ATxmega128A1U \r
ad4d3d41 149# if IRSND_OCx == IRSND_XMEGA_OC0A \r
150# define IRSND_BIT_NUMBER 0\r
151# elif IRSND_OCx == IRSND_XMEGA_OC0B\r
152# define IRSND_BIT_NUMBER 1\r
153# elif IRSND_OCx == IRSND_XMEGA_OC0C\r
154# define IRSND_BIT_NUMBER 2\r
155# elif IRSND_OCx == IRSND_XMEGA_OC0D\r
156# define IRSND_BIT_NUMBER 3\r
157# elif IRSND_OCx == IRSND_XMEGA_OC1A\r
158# define IRSND_BIT_NUMBER 4\r
159# elif IRSND_OCx == IRSND_XMEGA_OC1B\r
160# define IRSND_BIT_NUMBER 5\r
08f2dd9d 161# else\r
162# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
163# endif // IRSND_OCx\r
ad4d3d41 164\r
9c86ff1a 165#elif defined (PIC_C18) //Microchip C18 compiler\r
166 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 167#elif defined (ARM_STM32) //STM32\r
168 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 169#else\r
08f2dd9d 170# if !defined (unix) && !defined (WIN32)\r
171# error mikrocontroller not defined, please fill in definitions here.\r
172# endif // unix, WIN32\r
f50e01e7 173#endif // __AVR...\r
174\r
ad4d3d41 175#if defined(__AVR_XMEGA__)\r
176# define _CONCAT(a,b) a##b\r
177# define CONCAT(a,b) _CONCAT(a,b)\r
178# define IRSND_PORT IRSND_PORT_PRE.OUT\r
22a5040e 179# define IRSND_DDR IRSND_PORT_PRE.DIR\r
180# define IRSND_PIN IRSND_PORT_PRE.IN\r
ad4d3d41 181# define IRSND_BIT IRSND_BIT_NUMBER\r
ad4d3d41 182#elif defined(ATMEL_AVR)\r
f874da09 183# define _CONCAT(a,b) a##b\r
184# define CONCAT(a,b) _CONCAT(a,b)\r
185# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
186# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
187# define IRSND_BIT IRSND_BIT_NUMBER\r
188#endif\r
189\r
9405f84a 190#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 191 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 192#else\r
9c86ff1a 193 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 194#endif\r
195\r
f50e01e7 196/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
197 * IR timings\r
198 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
199 */\r
4225a882 200#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
201#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
202#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
203#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
204#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
9c07687e 205#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
206#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 207\r
208#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
209#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 210#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 211#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
212#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
213#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
9c07687e 214#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 215\r
216#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
217#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
218#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
219#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
220#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
9c07687e 221#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 222\r
9c07687e 223#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
224#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 225\r
ac8504f8 226#define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
227#define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
228\r
4225a882 229#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
230#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
231#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
232#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
233#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
9c07687e 234#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 235\r
770a1a9d 236#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
237#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
238#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
239#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
240#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
9c07687e 241#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
242#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
770a1a9d 243\r
4225a882 244#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
245#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
246#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
247#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
248#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
9c07687e 249#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 250\r
251#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
252#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
9c07687e 253#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 254\r
255#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
256#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
257#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
258#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
9c07687e 259#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 260\r
261#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
262#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
263#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
9c07687e 264#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
265#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 266\r
beda975f 267#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
268#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
269#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
9c07687e 270#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
271#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
beda975f 272\r
4225a882 273#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
274#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
275#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
276#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
277#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
9c07687e 278#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
279\r
280#define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)\r
281#define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)\r
282#define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)\r
283#define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)\r
284#define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)\r
285#define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
286#define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 287\r
288#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
289#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
290#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
291#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
292#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
293#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
9c07687e 294#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
295#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 296\r
15dd9c32 297#define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)\r
298#define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)\r
299#define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)\r
300#define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)\r
301#define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)\r
302#define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)\r
9c07687e 303#define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
304#define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
15dd9c32 305\r
5481e9cd 306#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
307#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
308#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
309#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
310#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
311#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
312#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
313#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
314#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
315#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
316#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
9c07687e 317#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 318\r
9c86ff1a 319#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
320#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
9c07687e 321#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
322#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 323#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 324\r
9c07687e 325#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
a48187fa 326\r
02ccdb69 327#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
328#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
9c07687e 329#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 330\r
cb93f9e9 331#define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
332#define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)\r
333#define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
334#define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)\r
9c07687e 335#define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
cb93f9e9 336\r
08f2dd9d 337#ifdef PIC_C18 // PIC C18\r
338# define IRSND_FREQ_TYPE uint8_t\r
339# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
340# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
341# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
342# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
343# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
344# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
345# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
346#elif defined (ARM_STM32) // STM32\r
347# define IRSND_FREQ_TYPE uint32_t\r
348# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
349# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
350# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
351# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
352# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
353# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
354# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
355#else // AVR\r
a03ad359 356# if F_CPU >= 16000000L\r
357# define AVR_PRESCALER 8\r
358# else\r
359# define AVR_PRESCALER 1\r
360# endif\r
08f2dd9d 361# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 362# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
363# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
364# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
365# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
366# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
367# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
368# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 369#endif\r
4225a882 370\r
48664931 371#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
372#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
373#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
374#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
375#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
376#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 377\r
c7c9a4a1 378#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
379#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
380#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
381#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
382#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
383#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
384\r
c7a47e89 385#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
386#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
387#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
388#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
389#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
390#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
391#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
392\r
9405f84a 393#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
394#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
395#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
396#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
397#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
398#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 399#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
400\r
401#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
402#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
403#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
404#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
405#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
406#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
407#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 408\r
fa09ce10 409#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r
410#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r
411#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r
412#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r
413#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
414#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
415\r
c9b6916a 416#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r
417#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r
418#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r
419#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r
420#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r
421#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r
422#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
423\r
003c1008 424#define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)\r
425#define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)\r
426#define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
427#define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)\r
428#define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)\r
429#define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)\r
430#define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
431\r
9c86ff1a 432static volatile uint8_t irsnd_busy = 0;\r
433static volatile uint8_t irsnd_protocol = 0;\r
434static volatile uint8_t irsnd_buffer[6] = {0};\r
435static volatile uint8_t irsnd_repeat = 0;\r
4225a882 436static volatile uint8_t irsnd_is_on = FALSE;\r
437\r
f50e01e7 438#if IRSND_USE_CALLBACK == 1\r
439static void (*irsnd_callback_ptr) (uint8_t);\r
440#endif // IRSND_USE_CALLBACK == 1\r
441\r
4225a882 442/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
443 * Switch PWM on\r
4225a882 444 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
445 */\r
446static void\r
447irsnd_on (void)\r
448{\r
449 if (! irsnd_is_on)\r
450 {\r
cb93f9e9 451#ifndef ANALYZE\r
08f2dd9d 452# if defined(PIC_C18) // PIC C18\r
cb93f9e9 453 PWMon();\r
454 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
ad4d3d41 455\r
08f2dd9d 456# elif defined (ARM_STM32) // STM32\r
e664a9f3 457 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
458 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
459 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
ad4d3d41 460\r
461# elif defined (__AVR_XMEGA__) \r
22a5040e 462# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A\r
ad4d3d41 463 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A \r
22a5040e 464# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B\r
ad4d3d41 465 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B \r
466# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
467 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C\r
468# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
469 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D\r
22a5040e 470# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC1C\r
471 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A\r
472# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC1D\r
473 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B\r
ad4d3d41 474# else\r
475# error wrong value of IRSND_OCx\r
476# endif // IRSND_OCx\r
477\r
08f2dd9d 478# else // AVR\r
479# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 480 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 481# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 482 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 483# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 484 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 485# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 486 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 487# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 488 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 489# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 490 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 491# else\r
492# error wrong value of IRSND_OCx\r
493# endif // IRSND_OCx\r
494# endif // C18\r
cb93f9e9 495#endif // ANALYZE\r
f50e01e7 496\r
497#if IRSND_USE_CALLBACK == 1\r
e664a9f3 498 if (irsnd_callback_ptr)\r
499 {\r
500 (*irsnd_callback_ptr) (TRUE);\r
501 }\r
f50e01e7 502#endif // IRSND_USE_CALLBACK == 1\r
503\r
e664a9f3 504 irsnd_is_on = TRUE;\r
4225a882 505 }\r
506}\r
507\r
508/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
509 * Switch PWM off\r
510 * @details Switches PWM off\r
511 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
512 */\r
513static void\r
514irsnd_off (void)\r
515{\r
516 if (irsnd_is_on)\r
517 {\r
cb93f9e9 518#ifndef ANALYZE\r
9c86ff1a 519 \r
08f2dd9d 520# if defined(PIC_C18) // PIC C18\r
cb93f9e9 521 PWMoff();\r
522 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
ad4d3d41 523\r
08f2dd9d 524# elif defined (ARM_STM32) // STM32\r
e664a9f3 525 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
526 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
527 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
528 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
ad4d3d41 529\r
530# elif defined (__AVR_XMEGA__)\r
22a5040e 531# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A \r
ad4d3d41 532 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected\r
22a5040e 533# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B \r
ad4d3d41 534 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected\r
535# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
536 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected\r
537# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
538 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected\r
22a5040e 539# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
540 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected\r
541# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
542 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected\r
ad4d3d41 543# else\r
544# error wrong value of IRSND_OCx\r
545# endif // IRSND_OCx\r
546\r
08f2dd9d 547# else //AVR\r
9c86ff1a 548\r
08f2dd9d 549# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 550 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 551# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 552 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 553# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 554 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 555# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 556 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 557# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 558 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 559# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 560 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 561# else\r
562# error wrong value of IRSND_OCx\r
563# endif // IRSND_OCx\r
e664a9f3 564 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 565# endif //C18\r
cb93f9e9 566#endif // ANALYZE\r
f50e01e7 567\r
568#if IRSND_USE_CALLBACK == 1\r
e664a9f3 569 if (irsnd_callback_ptr)\r
570 {\r
571 (*irsnd_callback_ptr) (FALSE);\r
572 }\r
f50e01e7 573#endif // IRSND_USE_CALLBACK == 1\r
574\r
e664a9f3 575 irsnd_is_on = FALSE;\r
4225a882 576 }\r
577}\r
578\r
579/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
580 * Set PWM frequency\r
581 * @details sets pwm frequency\r
582 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
583 */\r
7fe8188d 584#if defined(__12F1840)\r
585extern void pwm_init(uint16_t freq);\r
586#include <stdio.h>\r
587#endif\r
588\r
4225a882 589static void\r
08f2dd9d 590irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 591{\r
cb93f9e9 592#ifndef ANALYZE\r
7fe8188d 593# if defined(PIC_C18) // PIC C18 or XC8\r
594# if defined(__12F1840) // XC8\r
595 TRISA2=0; \r
596 PR2=freq;\r
597 CCP1M0=1;\r
598 CCP1M1=1;\r
599 CCP1M2=1;\r
600 CCP1M3=1;\r
601 DC1B0=1;\r
602 DC1B1=0;\r
603 CCPR1L = 0b01101001;\r
604 TMR2IF = 0;\r
605 TMR2ON=1;\r
606 CCP1CON &=(~0b0011); // p 197 "active high"\r
607# else // PIC C18\r
608 OpenPWM(freq); \r
609 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
610# endif\r
611 PWMoff();\r
08f2dd9d 612# elif defined (ARM_STM32) // STM32\r
e664a9f3 613 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 614\r
e664a9f3 615 if (TimeBaseFreq == 0)\r
616 {\r
617 RCC_ClocksTypeDef RCC_ClocksStructure;\r
618 /* Get system clocks and store timer clock in variable */\r
619 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
08f2dd9d 620# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 621 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
622 {\r
623 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
624 }\r
625 else\r
626 {\r
627 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
628 }\r
08f2dd9d 629# else\r
e664a9f3 630 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
631 {\r
632 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
633 }\r
634 else\r
635 {\r
636 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
637 }\r
08f2dd9d 638# endif\r
e664a9f3 639 }\r
08f2dd9d 640\r
e664a9f3 641 freq = TimeBaseFreq/freq;\r
08f2dd9d 642\r
e664a9f3 643 /* Set frequency */\r
644 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
645 /* Set duty cycle */\r
646 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
ad4d3d41 647\r
648# elif defined (__AVR_XMEGA__)\r
649 XMEGA_Timer.CCA = freq;\r
650\r
08f2dd9d 651# else // AVR\r
652\r
653# if IRSND_OCx == IRSND_OC2\r
e664a9f3 654 OCR2 = freq; // use register OCR2 for OC2\r
08f2dd9d 655# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 656 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 657# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 658 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 659# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 660 OCR0 = freq; // use register OCR2 for OC2\r
08f2dd9d 661# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 662 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 663# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 664 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 665# else\r
666# error wrong value of IRSND_OCx\r
667# endif\r
668# endif //PIC_C18\r
cb93f9e9 669#endif // ANALYZE\r
4225a882 670}\r
671\r
672/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
673 * Initialize the PWM\r
674 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
675 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
676 */\r
677void\r
678irsnd_init (void)\r
679{\r
cb93f9e9 680#ifndef ANALYZE\r
7fe8188d 681# if defined(PIC_C18) // PIC C18 or XC8 compiler\r
682# if ! defined(__12F1840) // only C18:\r
e664a9f3 683 OpenTimer;\r
7fe8188d 684# endif\r
cb93f9e9 685 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
686 IRSND_PIN = 0; // set IO to outout\r
687 PWMoff();\r
08f2dd9d 688# elif defined (ARM_STM32) // STM32\r
e664a9f3 689 GPIO_InitTypeDef GPIO_InitStructure;\r
690 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
691 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 692\r
693 /* GPIOx clock enable */\r
694# if defined (ARM_STM32L1XX)\r
e664a9f3 695 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 696# elif defined (ARM_STM32F10X)\r
e664a9f3 697 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
c6a60200 698 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 699# elif defined (ARM_STM32F4XX)\r
e664a9f3 700 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 701# endif\r
702\r
e664a9f3 703 /* GPIO Configuration */\r
704 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
08f2dd9d 705# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
e664a9f3 706 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
707 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
708 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
709 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
710 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
711 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
08f2dd9d 712# elif defined (ARM_STM32F10X)\r
e664a9f3 713 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
714 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
715 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
c6a60200 716 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 717# endif\r
718\r
e664a9f3 719 /* TIMx clock enable */\r
08f2dd9d 720# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 721 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 722# else\r
e664a9f3 723 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 724# endif\r
08f2dd9d 725\r
e664a9f3 726 /* Time base configuration */\r
727 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
728 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
729 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
730 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
731 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
732\r
733 /* PWM1 Mode configuration */\r
734 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
735 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
736 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
737 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
738 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
739\r
740 /* Preload configuration */\r
741 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
742 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
743\r
744 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
22a5040e 745\r
746# elif defined (__AVR_XMEGA__)\r
747 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
748 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
749\r
750 XMEGA_Timer.PER = 0xFFFF; //Topwert\r
751 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC\r
752\r
753# if AVR_PRESCALER == 8\r
754 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8\r
755# else\r
756 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1\r
757# endif\r
758 \r
759# else // AVR\r
e664a9f3 760 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
761 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
08f2dd9d 762\r
763# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 764 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 765# if AVR_PRESCALER == 8\r
e664a9f3 766 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 767# else\r
e664a9f3 768 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 769# endif\r
08f2dd9d 770# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
e664a9f3 771 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 772# if AVR_PRESCALER == 8\r
e664a9f3 773 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 774# else\r
e664a9f3 775 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 776# endif\r
08f2dd9d 777# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 778 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 779# if AVR_PRESCALER == 8\r
e664a9f3 780 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 781# else\r
e664a9f3 782 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 783# endif\r
08f2dd9d 784# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
e664a9f3 785 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 786# if AVR_PRESCALER == 8\r
e664a9f3 787 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 788# else\r
e664a9f3 789 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 790# endif\r
08f2dd9d 791# else\r
792# error wrong value of IRSND_OCx\r
793# endif\r
e664a9f3 794 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
08f2dd9d 795# endif //PIC_C18\r
cb93f9e9 796#endif // ANALYZE\r
4225a882 797}\r
798\r
f50e01e7 799#if IRSND_USE_CALLBACK == 1\r
800void\r
801irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
802{\r
803 irsnd_callback_ptr = cb;\r
804}\r
805#endif // IRSND_USE_CALLBACK == 1\r
806\r
4225a882 807uint8_t\r
808irsnd_is_busy (void)\r
809{\r
810 return irsnd_busy;\r
811}\r
812\r
813static uint16_t\r
814bitsrevervse (uint16_t x, uint8_t len)\r
815{\r
816 uint16_t xx = 0;\r
817\r
818 while(len)\r
819 {\r
e664a9f3 820 xx <<= 1;\r
821 if (x & 1)\r
822 {\r
823 xx |= 1;\r
824 }\r
825 x >>= 1;\r
826 len--;\r
4225a882 827 }\r
828 return xx;\r
829}\r
830\r
831\r
9547ee89 832#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
833static uint8_t sircs_additional_bitlen;\r
834#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
835\r
4225a882 836uint8_t\r
879b06c2 837irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 838{\r
839#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
840 static uint8_t toggle_bit_recs80;\r
841#endif\r
842#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
843 static uint8_t toggle_bit_recs80ext;\r
844#endif\r
845#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
846 static uint8_t toggle_bit_rc5;\r
9547ee89 847#endif\r
779fbc81 848#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 849 static uint8_t toggle_bit_rc6;\r
beda975f 850#endif\r
851#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
852 static uint8_t toggle_bit_thomson;\r
4225a882 853#endif\r
854 uint16_t address;\r
855 uint16_t command;\r
856\r
879b06c2 857 if (do_wait)\r
4225a882 858 {\r
e664a9f3 859 while (irsnd_busy)\r
860 {\r
861 // do nothing;\r
862 }\r
879b06c2 863 }\r
864 else if (irsnd_busy)\r
865 {\r
e664a9f3 866 return (FALSE);\r
4225a882 867 }\r
868\r
869 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 870 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 871\r
872 switch (irsnd_protocol)\r
873 {\r
874#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 875 case IRMP_SIRCS_PROTOCOL:\r
876 {\r
877 // uint8_t sircs_additional_command_len;\r
878 uint8_t sircs_additional_address_len;\r
879\r
880 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
881\r
882 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
883 {\r
884 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
885 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
886 }\r
887 else\r
888 {\r
889 // sircs_additional_command_len = sircs_additional_bitlen;\r
890 sircs_additional_address_len = 0;\r
891 }\r
892\r
893 command = bitsrevervse (irmp_data_p->command, 15);\r
894\r
895 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
896 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
897\r
898 if (sircs_additional_address_len > 0)\r
899 {\r
900 address = bitsrevervse (irmp_data_p->address, 5);\r
901 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
902 irsnd_buffer[2] = (address & 0x000F) << 4;\r
903 }\r
904 irsnd_busy = TRUE;\r
905 break;\r
906 }\r
4225a882 907#endif\r
908#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 909 case IRMP_APPLE_PROTOCOL:\r
910 {\r
911 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
912 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
913\r
914 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
915 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
916\r
917 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
918\r
919 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
920 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
921 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
922 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
923 irsnd_busy = TRUE;\r
924 break;\r
925 }\r
926 case IRMP_NEC_PROTOCOL:\r
927 {\r
928 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
929 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
930\r
931 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
932 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
933 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
934 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
935 irsnd_busy = TRUE;\r
936 break;\r
937 }\r
7644ac04 938#endif\r
939#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 940 case IRMP_NEC16_PROTOCOL:\r
941 {\r
942 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
943 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 944\r
e664a9f3 945 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
946 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
947 irsnd_busy = TRUE;\r
948 break;\r
949 }\r
7644ac04 950#endif\r
951#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 952 case IRMP_NEC42_PROTOCOL:\r
953 {\r
954 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
955 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
956\r
957 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
958 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
959 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
960 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
961 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
962 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
963 irsnd_busy = TRUE;\r
964 break;\r
965 }\r
4225a882 966#endif\r
c1dfa01f 967#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
968 case IRMP_LGAIR_PROTOCOL:\r
969 {\r
970 address = irmp_data_p->address;\r
971 command = irmp_data_p->command;\r
972\r
973 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA\r
974 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC\r
975 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC\r
976 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum\r
977 ((command & 0x0F00) >> 8) +\r
978 ((command & 0x00F0) >>4 ) +\r
979 ((command & 0x000F))) & 0x000F) << 4;\r
980 irsnd_busy = TRUE;\r
981 break;\r
982 }\r
983#endif\r
4225a882 984#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 985 case IRMP_SAMSUNG_PROTOCOL:\r
986 {\r
987 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
988 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
989\r
990 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
991 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
992 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
993 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
994 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
995 irsnd_busy = TRUE;\r
996 break;\r
997 }\r
998 case IRMP_SAMSUNG32_PROTOCOL:\r
999 {\r
1000 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1001 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
1002\r
1003 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1004 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1005 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
1006 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
1007 irsnd_busy = TRUE;\r
1008 break;\r
1009 }\r
4225a882 1010#endif\r
ac8504f8 1011#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1012 case IRMP_SAMSUNG48_PROTOCOL:\r
1013 {\r
1014 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1015 command = bitsrevervse (irmp_data_p->command, 16);\r
1016\r
1017 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1018 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1019 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC\r
1020 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
1021 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC\r
1022 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc\r
1023 irsnd_busy = TRUE;\r
1024 break;\r
1025 }\r
1026#endif\r
4225a882 1027#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1028 case IRMP_MATSUSHITA_PROTOCOL:\r
1029 {\r
1030 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
1031 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
1032\r
1033 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
1034 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
1035 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
1036 irsnd_busy = TRUE;\r
1037 break;\r
1038 }\r
4225a882 1039#endif\r
770a1a9d 1040#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1041 case IRMP_KASEIKYO_PROTOCOL:\r
1042 {\r
1043 uint8_t xor_value;\r
1044 uint16_t genre2;\r
770a1a9d 1045\r
e664a9f3 1046 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
1047 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
1048 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 1049\r
e664a9f3 1050 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 1051\r
e664a9f3 1052 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1053 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1054 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
1055 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
1056 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
770a1a9d 1057\r
e664a9f3 1058 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 1059\r
e664a9f3 1060 irsnd_buffer[5] = xor_value;\r
1061 irsnd_busy = TRUE;\r
1062 break;\r
1063 }\r
770a1a9d 1064#endif\r
4225a882 1065#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1066 case IRMP_RECS80_PROTOCOL:\r
1067 {\r
1068 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
4225a882 1069\r
e664a9f3 1070 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
1071 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
1072 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
1073 irsnd_busy = TRUE;\r
1074 break;\r
1075 }\r
4225a882 1076#endif\r
1077#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1078 case IRMP_RECS80EXT_PROTOCOL:\r
1079 {\r
1080 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
4225a882 1081\r
e664a9f3 1082 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
1083 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
1084 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
1085 irsnd_busy = TRUE;\r
1086 break;\r
1087 }\r
4225a882 1088#endif\r
1089#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1090 case IRMP_RC5_PROTOCOL:\r
1091 {\r
1092 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
4225a882 1093\r
e664a9f3 1094 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
1095 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
1096 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
1097 irsnd_busy = TRUE;\r
1098 break;\r
1099 }\r
4225a882 1100#endif\r
9547ee89 1101#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1102 case IRMP_RC6_PROTOCOL:\r
1103 {\r
1104 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
9547ee89 1105\r
e664a9f3 1106 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
1107 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
1108 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
1109 irsnd_busy = TRUE;\r
1110 break;\r
1111 }\r
9547ee89 1112#endif\r
1113#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1114 case IRMP_RC6A_PROTOCOL:\r
1115 {\r
1116 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
1117\r
1118 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
1119 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
1120 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
1121 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1122 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
1123 irsnd_busy = TRUE;\r
1124 break;\r
1125 }\r
9547ee89 1126#endif\r
4225a882 1127#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1128 case IRMP_DENON_PROTOCOL:\r
1129 {\r
1130 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
1131 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
1132 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
1133 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
1134 irsnd_busy = TRUE;\r
1135 break;\r
1136 }\r
4225a882 1137#endif\r
beda975f 1138#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1139 case IRMP_THOMSON_PROTOCOL:\r
1140 {\r
1141 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
beda975f 1142\r
e664a9f3 1143 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
1144 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
1145 irsnd_busy = TRUE;\r
1146 break;\r
1147 }\r
beda975f 1148#endif\r
4225a882 1149#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1150 case IRMP_NUBERT_PROTOCOL:\r
1151 {\r
1152 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1153 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1154 irsnd_busy = TRUE;\r
1155 break;\r
1156 }\r
5481e9cd 1157#endif\r
15dd9c32 1158#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1159 case IRMP_SPEAKER_PROTOCOL:\r
1160 {\r
1161 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1162 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1163 irsnd_busy = TRUE;\r
1164 break;\r
1165 }\r
1166#endif\r
5481e9cd 1167#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1168 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1169 {\r
1170 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
1171 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
1172 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
1173 irsnd_busy = TRUE;\r
1174 break;\r
1175 }\r
4225a882 1176#endif\r
5b437ff6 1177#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1178 case IRMP_GRUNDIG_PROTOCOL:\r
1179 {\r
9c07687e 1180 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);\r
5b437ff6 1181\r
e664a9f3 1182 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
1183 irsnd_buffer[1] = 0xC0; // 11\r
1184 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
1185 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
d155e9ab 1186\r
e664a9f3 1187 irsnd_busy = TRUE;\r
1188 break;\r
1189 }\r
d155e9ab 1190#endif\r
9c07687e 1191#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1192 case IRMP_TELEFUNKEN_PROTOCOL:\r
1193 {\r
1194 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC\r
1195 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC\r
1196\r
1197 irsnd_busy = TRUE;\r
1198 break;\r
1199 }\r
1200#endif\r
a48187fa 1201#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1202 case IRMP_IR60_PROTOCOL:\r
1203 {\r
1204 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 1205#if 0\r
e664a9f3 1206 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
1207 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 1208#else\r
e664a9f3 1209 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
1210 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
08f2dd9d 1211#endif\r
a48187fa 1212\r
e664a9f3 1213 irsnd_busy = TRUE;\r
1214 break;\r
1215 }\r
a48187fa 1216#endif\r
d155e9ab 1217#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1218 case IRMP_NOKIA_PROTOCOL:\r
1219 {\r
1220 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1221 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1222\r
1223 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1224 irsnd_buffer[1] = 0xFF; // 11111111\r
1225 irsnd_buffer[2] = 0x80; // 1\r
1226 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1227 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1228 irsnd_buffer[5] = (address << 7); // A\r
1229\r
1230 irsnd_busy = TRUE;\r
1231 break;\r
1232 }\r
5b437ff6 1233#endif\r
a7054daf 1234#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1235 case IRMP_SIEMENS_PROTOCOL:\r
1236 {\r
cb93f9e9 1237 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA\r
1238 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC\r
1239 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
9405f84a 1240\r
e664a9f3 1241 irsnd_busy = TRUE;\r
1242 break;\r
1243 }\r
b5ea7869 1244#endif\r
cb93f9e9 1245#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1246 case IRMP_RUWIDO_PROTOCOL:\r
1247 {\r
1248 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA\r
1249 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC\r
1250 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c\r
1251 irsnd_busy = TRUE;\r
1252 break;\r
1253 }\r
1254#endif\r
48664931 1255#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1256 case IRMP_FDC_PROTOCOL:\r
1257 {\r
1258 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1259 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
1260\r
1261 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1262 irsnd_buffer[1] = 0; // 00000000\r
1263 irsnd_buffer[2] = 0; // 0000RRRR\r
1264 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1265 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1266 irsnd_busy = TRUE;\r
1267 break;\r
1268 }\r
c7c9a4a1 1269#endif\r
1270#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1271 case IRMP_RCCAR_PROTOCOL:\r
1272 {\r
1273 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1274 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1275\r
1276 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1277 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1278 \r
1279 irsnd_busy = TRUE;\r
1280 break;\r
1281 }\r
a7054daf 1282#endif\r
c7a47e89 1283#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1284 case IRMP_JVC_PROTOCOL:\r
1285 {\r
1286 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1287 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
c7a47e89 1288\r
e664a9f3 1289 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1290 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
c7a47e89 1291\r
e664a9f3 1292 irsnd_busy = TRUE;\r
1293 break;\r
1294 }\r
c7a47e89 1295#endif\r
9405f84a 1296#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1297 case IRMP_NIKON_PROTOCOL:\r
1298 {\r
1299 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1300 irsnd_busy = TRUE;\r
1301 break;\r
1302 }\r
f50e01e7 1303#endif\r
1304#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1305 case IRMP_LEGO_PROTOCOL:\r
1306 {\r
1307 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
fa09ce10 1308\r
e664a9f3 1309 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1310 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1311 irsnd_busy = TRUE;\r
1312 break;\r
1313 }\r
fa09ce10 1314#endif\r
1315#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1316 case IRMP_A1TVBOX_PROTOCOL:\r
1317 {\r
1318 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r
1319 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r
1320 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r
1321\r
1322 irsnd_busy = TRUE;\r
1323 break;\r
1324 }\r
1325#endif\r
c9b6916a 1326#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1327 case IRMP_ROOMBA_PROTOCOL:\r
1328 {\r
c9b6916a 1329 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r
1330 irsnd_busy = TRUE;\r
1331 break;\r
1332 }\r
1333#endif\r
003c1008 1334#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
1335 case IRMP_PENTAX_PROTOCOL:\r
1336 {\r
1337 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..\r
1338 irsnd_busy = TRUE;\r
1339 break;\r
1340 }\r
1341#endif\r
1342\r
e664a9f3 1343 default:\r
1344 {\r
1345 break;\r
1346 }\r
4225a882 1347 }\r
1348\r
1349 return irsnd_busy;\r
1350}\r
1351\r
beda975f 1352void\r
1353irsnd_stop (void)\r
1354{\r
acf7fb44 1355 irsnd_repeat = 0;\r
beda975f 1356}\r
1357\r
4225a882 1358/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1359 * ISR routine\r
1360 * @details ISR routine, called 10000 times per second\r
1361 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1362 */\r
1363uint8_t\r
1364irsnd_ISR (void)\r
1365{\r
a48187fa 1366 static uint8_t send_trailer = FALSE;\r
1367 static uint8_t current_bit = 0xFF;\r
1368 static uint8_t pulse_counter = 0;\r
1369 static IRSND_PAUSE_LEN pause_counter = 0;\r
1370 static uint8_t startbit_pulse_len = 0;\r
1371 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1372 static uint8_t pulse_1_len = 0;\r
1373 static uint8_t pause_1_len = 0;\r
1374 static uint8_t pulse_0_len = 0;\r
1375 static uint8_t pause_0_len = 0;\r
1376 static uint8_t has_stop_bit = 0;\r
1377 static uint8_t new_frame = TRUE;\r
1378 static uint8_t complete_data_len = 0;\r
1379 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1380 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1381 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1382 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1383 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1384 static uint8_t repeat_counter = 0; // repeat counter\r
1385 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1386 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1387#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1388 static uint8_t last_bit_value;\r
5481e9cd 1389#endif\r
a48187fa 1390 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1391 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1392\r
1393 if (irsnd_busy)\r
1394 {\r
e664a9f3 1395 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1396 {\r
1397 if (auto_repetition_counter > 0)\r
1398 {\r
1399 auto_repetition_pause_counter++;\r
4225a882 1400\r
08f2dd9d 1401#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1402 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1403 {\r
1404 repeat_frame_pause_len--;\r
1405 }\r
08f2dd9d 1406#endif\r
1407\r
e664a9f3 1408 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
1409 {\r
1410 auto_repetition_pause_counter = 0;\r
4225a882 1411\r
08f2dd9d 1412#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1413 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
1414 {\r
1415 current_bit = 16;\r
1416 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1417 }\r
1418 else\r
08f2dd9d 1419#endif\r
1420#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1421 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
1422 {\r
1423 current_bit = 15;\r
1424 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1425 }\r
1426 else\r
08f2dd9d 1427#endif\r
1428#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1429 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1430 {\r
1431 current_bit = 7;\r
1432 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1433 }\r
1434 else\r
08f2dd9d 1435#endif\r
1436#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1437 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
1438 {\r
1439 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
1440 {\r
1441 current_bit = 23;\r
1442 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1443 }\r
1444 else // nokia stop frame\r
1445 {\r
1446 current_bit = 0xFF;\r
1447 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1448 }\r
1449 }\r
1450 else\r
1451#endif\r
1452 {\r
1453 ;\r
1454 }\r
1455 }\r
1456 else\r
1457 {\r
cb93f9e9 1458#ifdef ANALYZE\r
e664a9f3 1459 if (irsnd_is_on)\r
1460 {\r
1461 putchar ('0');\r
1462 }\r
1463 else\r
1464 {\r
1465 putchar ('1');\r
1466 }\r
1467#endif\r
1468 return irsnd_busy;\r
1469 }\r
1470 }\r
e664a9f3 1471 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
e664a9f3 1472 {\r
1473 packet_repeat_pause_counter++;\r
cb93f9e9 1474#ifdef ANALYZE\r
e664a9f3 1475 if (irsnd_is_on)\r
1476 {\r
1477 putchar ('0');\r
1478 }\r
1479 else\r
1480 {\r
1481 putchar ('1');\r
1482 }\r
1483#endif\r
1484 return irsnd_busy;\r
1485 }\r
1486 else\r
1487 {\r
1488 if (send_trailer)\r
1489 {\r
1490 irsnd_busy = FALSE;\r
1491 send_trailer = FALSE;\r
1492 return irsnd_busy;\r
1493 }\r
1494 \r
1495 n_repeat_frames = irsnd_repeat;\r
1496\r
1497 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1498 {\r
1499 n_repeat_frames = 255;\r
1500 }\r
1501\r
1502 packet_repeat_pause_counter = 0;\r
1503 pulse_counter = 0;\r
1504 pause_counter = 0;\r
1505\r
1506 switch (irsnd_protocol)\r
1507 {\r
4225a882 1508#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1509 case IRMP_SIRCS_PROTOCOL:\r
1510 {\r
1511 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
1512 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
1513 pulse_1_len = SIRCS_1_PULSE_LEN;\r
1514 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
1515 pulse_0_len = SIRCS_0_PULSE_LEN;\r
1516 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
1517 has_stop_bit = SIRCS_STOP_BIT;\r
1518 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
1519 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1520 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1521 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
1522 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1523 break;\r
1524 }\r
4225a882 1525#endif\r
1526#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1527 case IRMP_NEC_PROTOCOL:\r
1528 {\r
1529 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1530\r
1531 if (repeat_counter > 0)\r
1532 {\r
1533 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
1534 complete_data_len = 0;\r
1535 }\r
1536 else\r
1537 {\r
1538 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1539 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1540 }\r
1541\r
1542 pulse_1_len = NEC_PULSE_LEN;\r
1543 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1544 pulse_0_len = NEC_PULSE_LEN;\r
1545 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1546 has_stop_bit = NEC_STOP_BIT;\r
1547 n_auto_repetitions = 1; // 1 frame\r
1548 auto_repetition_pause_len = 0;\r
1549 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1550 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1551 break;\r
1552 }\r
4225a882 1553#endif\r
7644ac04 1554#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1555 case IRMP_NEC16_PROTOCOL:\r
1556 {\r
1557 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1558 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1559 pulse_1_len = NEC_PULSE_LEN;\r
1560 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1561 pulse_0_len = NEC_PULSE_LEN;\r
1562 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1563 has_stop_bit = NEC_STOP_BIT;\r
1564 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1565 n_auto_repetitions = 1; // 1 frame\r
1566 auto_repetition_pause_len = 0;\r
1567 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1568 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1569 break;\r
1570 }\r
7644ac04 1571#endif\r
1572#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1573 case IRMP_NEC42_PROTOCOL:\r
1574 {\r
1575 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1576 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1577 pulse_1_len = NEC_PULSE_LEN;\r
1578 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1579 pulse_0_len = NEC_PULSE_LEN;\r
1580 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1581 has_stop_bit = NEC_STOP_BIT;\r
1582 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1583 n_auto_repetitions = 1; // 1 frame\r
1584 auto_repetition_pause_len = 0;\r
1585 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1586 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1587 break;\r
1588 }\r
7644ac04 1589#endif\r
c1dfa01f 1590#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
1591 case IRMP_LGAIR_PROTOCOL:\r
1592 {\r
1593 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1594 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1595 pulse_1_len = NEC_PULSE_LEN;\r
1596 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1597 pulse_0_len = NEC_PULSE_LEN;\r
1598 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1599 has_stop_bit = NEC_STOP_BIT;\r
1600 complete_data_len = LGAIR_COMPLETE_DATA_LEN;\r
1601 n_auto_repetitions = 1; // 1 frame\r
1602 auto_repetition_pause_len = 0;\r
1603 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1604 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1605 break;\r
1606 }\r
1607#endif\r
4225a882 1608#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1609 case IRMP_SAMSUNG_PROTOCOL:\r
1610 {\r
1611 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1612 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1613 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1614 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1615 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1616 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1617 has_stop_bit = SAMSUNG_STOP_BIT;\r
1618 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1619 n_auto_repetitions = 1; // 1 frame\r
1620 auto_repetition_pause_len = 0;\r
1621 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
1622 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1623 break;\r
1624 }\r
1625\r
1626 case IRMP_SAMSUNG32_PROTOCOL:\r
1627 {\r
1628 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1629 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1630 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1631 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1632 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1633 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1634 has_stop_bit = SAMSUNG_STOP_BIT;\r
1635 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
956ea3ea 1636 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame\r
e664a9f3 1637 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1638 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
1639 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1640 break;\r
1641 }\r
4225a882 1642#endif\r
ac8504f8 1643#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1644 case IRMP_SAMSUNG48_PROTOCOL:\r
1645 {\r
1646 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1647 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1648 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1649 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1650 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1651 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1652 has_stop_bit = SAMSUNG_STOP_BIT;\r
1653 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;\r
1654 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame\r
1655 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1656 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;\r
1657 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1658 break;\r
1659 }\r
1660#endif\r
4225a882 1661#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1662 case IRMP_MATSUSHITA_PROTOCOL:\r
1663 {\r
1664 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1665 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1666 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1667 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1668 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1669 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1670 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1671 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1672 n_auto_repetitions = 1; // 1 frame\r
1673 auto_repetition_pause_len = 0;\r
1674 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1675 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1676 break;\r
1677 }\r
4225a882 1678#endif\r
770a1a9d 1679#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1680 case IRMP_KASEIKYO_PROTOCOL:\r
1681 {\r
1682 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
1683 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
1684 pulse_1_len = KASEIKYO_PULSE_LEN;\r
1685 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
1686 pulse_0_len = KASEIKYO_PULSE_LEN;\r
1687 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
1688 has_stop_bit = KASEIKYO_STOP_BIT;\r
1689 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1690 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1691 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1692 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1693 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1694 break;\r
1695 }\r
770a1a9d 1696#endif\r
4225a882 1697#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1698 case IRMP_RECS80_PROTOCOL:\r
1699 {\r
1700 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
1701 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
1702 pulse_1_len = RECS80_PULSE_LEN;\r
1703 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
1704 pulse_0_len = RECS80_PULSE_LEN;\r
1705 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
1706 has_stop_bit = RECS80_STOP_BIT;\r
1707 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1708 n_auto_repetitions = 1; // 1 frame\r
1709 auto_repetition_pause_len = 0;\r
1710 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
1711 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1712 break;\r
1713 }\r
4225a882 1714#endif\r
1715#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1716 case IRMP_RECS80EXT_PROTOCOL:\r
1717 {\r
1718 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
1719 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
1720 pulse_1_len = RECS80EXT_PULSE_LEN;\r
1721 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
1722 pulse_0_len = RECS80EXT_PULSE_LEN;\r
1723 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
1724 has_stop_bit = RECS80EXT_STOP_BIT;\r
1725 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1726 n_auto_repetitions = 1; // 1 frame\r
1727 auto_repetition_pause_len = 0;\r
1728 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
1729 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1730 break;\r
1731 }\r
4225a882 1732#endif\r
9c07687e 1733#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1734 case IRMP_TELEFUNKEN_PROTOCOL:\r
1735 {\r
1736 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;\r
1737 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;\r
1738 pulse_1_len = TELEFUNKEN_PULSE_LEN;\r
1739 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;\r
1740 pulse_0_len = TELEFUNKEN_PULSE_LEN;\r
1741 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;\r
1742 has_stop_bit = TELEFUNKEN_STOP_BIT;\r
1743 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;\r
1744 n_auto_repetitions = 1; // 1 frames\r
1745 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause\r
1746 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1747 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1748 break;\r
1749 }\r
1750#endif\r
4225a882 1751#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1752 case IRMP_RC5_PROTOCOL:\r
1753 {\r
1754 startbit_pulse_len = RC5_BIT_LEN;\r
1755 startbit_pause_len = RC5_BIT_LEN;\r
1756 pulse_len = RC5_BIT_LEN;\r
1757 pause_len = RC5_BIT_LEN;\r
1758 has_stop_bit = RC5_STOP_BIT;\r
1759 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1760 n_auto_repetitions = 1; // 1 frame\r
1761 auto_repetition_pause_len = 0;\r
1762 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
1763 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1764 break;\r
1765 }\r
4225a882 1766#endif\r
9547ee89 1767#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1768 case IRMP_RC6_PROTOCOL:\r
1769 {\r
1770 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1771 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1772 pulse_len = RC6_BIT_LEN;\r
1773 pause_len = RC6_BIT_LEN;\r
1774 has_stop_bit = RC6_STOP_BIT;\r
1775 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1776 n_auto_repetitions = 1; // 1 frame\r
1777 auto_repetition_pause_len = 0;\r
1778 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1779 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1780 break;\r
1781 }\r
9547ee89 1782#endif\r
1783#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1784 case IRMP_RC6A_PROTOCOL:\r
1785 {\r
1786 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1787 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1788 pulse_len = RC6_BIT_LEN;\r
1789 pause_len = RC6_BIT_LEN;\r
1790 has_stop_bit = RC6_STOP_BIT;\r
1791 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1792 n_auto_repetitions = 1; // 1 frame\r
1793 auto_repetition_pause_len = 0;\r
1794 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1795 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1796 break;\r
1797 }\r
9547ee89 1798#endif\r
4225a882 1799#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1800 case IRMP_DENON_PROTOCOL:\r
1801 {\r
1802 startbit_pulse_len = 0x00;\r
1803 startbit_pause_len = 0x00;\r
1804 pulse_1_len = DENON_PULSE_LEN;\r
1805 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
1806 pulse_0_len = DENON_PULSE_LEN;\r
1807 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
1808 has_stop_bit = DENON_STOP_BIT;\r
1809 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1810 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1811 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1812 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1813 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
1814 break;\r
1815 }\r
4225a882 1816#endif\r
beda975f 1817#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1818 case IRMP_THOMSON_PROTOCOL:\r
1819 {\r
1820 startbit_pulse_len = 0x00;\r
1821 startbit_pause_len = 0x00;\r
1822 pulse_1_len = THOMSON_PULSE_LEN;\r
1823 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1824 pulse_0_len = THOMSON_PULSE_LEN;\r
1825 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1826 has_stop_bit = THOMSON_STOP_BIT;\r
1827 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1828 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1829 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1830 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1831 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1832 break;\r
1833 }\r
beda975f 1834#endif\r
4225a882 1835#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1836 case IRMP_NUBERT_PROTOCOL:\r
1837 {\r
1838 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
1839 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
1840 pulse_1_len = NUBERT_1_PULSE_LEN;\r
1841 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
1842 pulse_0_len = NUBERT_0_PULSE_LEN;\r
1843 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
1844 has_stop_bit = NUBERT_STOP_BIT;\r
1845 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1846 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1847 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1848 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
1849 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1850 break;\r
1851 }\r
5481e9cd 1852#endif\r
15dd9c32 1853#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1854 case IRMP_SPEAKER_PROTOCOL:\r
1855 {\r
1856 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;\r
1857 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;\r
1858 pulse_1_len = SPEAKER_1_PULSE_LEN;\r
1859 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;\r
1860 pulse_0_len = SPEAKER_0_PULSE_LEN;\r
1861 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;\r
1862 has_stop_bit = SPEAKER_STOP_BIT;\r
1863 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;\r
1864 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames\r
1865 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1866 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;\r
1867 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1868 break;\r
1869 }\r
1870#endif\r
5481e9cd 1871#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1872 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1873 {\r
1874 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
1875 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
1876 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
1877 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
1878 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
1879 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
1880 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1881 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1882 n_auto_repetitions = 1; // 1 frame\r
1883 auto_repetition_pause_len = 0;\r
1884 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1885 last_bit_value = 0;\r
1886 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1887 break;\r
1888 }\r
5b437ff6 1889#endif\r
1890#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1891 case IRMP_GRUNDIG_PROTOCOL:\r
1892 {\r
1893 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1894 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1895 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1896 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1897 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1898 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1899 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1900 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1901 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1902 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1903 break;\r
1904 }\r
a48187fa 1905#endif\r
1906#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1907 case IRMP_IR60_PROTOCOL:\r
1908 {\r
1909 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1910 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1911 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1912 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1913 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1914 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1915 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1916 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1917 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1918 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
1919 break;\r
1920 }\r
d155e9ab 1921#endif\r
1922#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1923 case IRMP_NOKIA_PROTOCOL:\r
1924 {\r
1925 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1926 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1927 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1928 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1929 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1930 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1931 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1932 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1933 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1934 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1935 break;\r
1936 }\r
a7054daf 1937#endif\r
1938#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1939 case IRMP_SIEMENS_PROTOCOL:\r
1940 {\r
1941 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1942 startbit_pause_len = SIEMENS_BIT_LEN;\r
1943 pulse_len = SIEMENS_BIT_LEN;\r
1944 pause_len = SIEMENS_BIT_LEN;\r
1945 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
cb93f9e9 1946 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;\r
e664a9f3 1947 n_auto_repetitions = 1; // 1 frame\r
1948 auto_repetition_pause_len = 0;\r
1949 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1950 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1951 break;\r
1952 }\r
b5ea7869 1953#endif\r
cb93f9e9 1954#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1955 case IRMP_RUWIDO_PROTOCOL:\r
1956 {\r
1957 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;\r
1958 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;\r
1959 pulse_len = RUWIDO_BIT_PULSE_LEN;\r
1960 pause_len = RUWIDO_BIT_PAUSE_LEN;\r
1961 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
1962 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;\r
1963 n_auto_repetitions = 1; // 1 frame\r
1964 auto_repetition_pause_len = 0;\r
1965 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;\r
1966 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1967 break;\r
1968 }\r
1969#endif\r
48664931 1970#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1971 case IRMP_FDC_PROTOCOL:\r
1972 {\r
1973 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
1974 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
1975 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
1976 pulse_1_len = FDC_PULSE_LEN;\r
1977 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
1978 pulse_0_len = FDC_PULSE_LEN;\r
1979 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
1980 has_stop_bit = FDC_STOP_BIT;\r
1981 n_auto_repetitions = 1; // 1 frame\r
1982 auto_repetition_pause_len = 0;\r
1983 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
1984 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1985 break;\r
1986 }\r
c7c9a4a1 1987#endif\r
1988#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1989 case IRMP_RCCAR_PROTOCOL:\r
1990 {\r
1991 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
1992 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
1993 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
1994 pulse_1_len = RCCAR_PULSE_LEN;\r
1995 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
1996 pulse_0_len = RCCAR_PULSE_LEN;\r
1997 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
1998 has_stop_bit = RCCAR_STOP_BIT;\r
1999 n_auto_repetitions = 1; // 1 frame\r
2000 auto_repetition_pause_len = 0;\r
2001 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
2002 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2003 break;\r
2004 }\r
4225a882 2005#endif\r
c7a47e89 2006#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2007 case IRMP_JVC_PROTOCOL:\r
2008 {\r
2009 if (repeat_counter != 0) // skip start bit if repetition frame\r
2010 {\r
2011 current_bit = 0;\r
2012 }\r
2013\r
2014 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
2015 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
2016 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
2017 pulse_1_len = JVC_PULSE_LEN;\r
2018 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
2019 pulse_0_len = JVC_PULSE_LEN;\r
2020 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
2021 has_stop_bit = JVC_STOP_BIT;\r
2022 n_auto_repetitions = 1; // 1 frame\r
2023 auto_repetition_pause_len = 0;\r
2024 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
2025 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2026 break;\r
2027 }\r
c7a47e89 2028#endif\r
9405f84a 2029#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2030 case IRMP_NIKON_PROTOCOL:\r
2031 {\r
2032 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
2033 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
2034 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
2035 pulse_1_len = NIKON_PULSE_LEN;\r
2036 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
2037 pulse_0_len = NIKON_PULSE_LEN;\r
2038 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
2039 has_stop_bit = NIKON_STOP_BIT;\r
2040 n_auto_repetitions = 1; // 1 frame\r
2041 auto_repetition_pause_len = 0;\r
2042 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
2043 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2044 break;\r
2045 }\r
9405f84a 2046#endif\r
f50e01e7 2047#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2048 case IRMP_LEGO_PROTOCOL:\r
2049 {\r
2050 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
2051 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
2052 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
2053 pulse_1_len = LEGO_PULSE_LEN;\r
2054 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
2055 pulse_0_len = LEGO_PULSE_LEN;\r
2056 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
2057 has_stop_bit = LEGO_STOP_BIT;\r
2058 n_auto_repetitions = 1; // 1 frame\r
2059 auto_repetition_pause_len = 0;\r
2060 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
2061 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2062 break;\r
2063 }\r
fa09ce10 2064#endif\r
2065#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2066 case IRMP_A1TVBOX_PROTOCOL:\r
2067 {\r
2068 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r
2069 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r
2070 pulse_len = A1TVBOX_BIT_PULSE_LEN;\r
2071 pause_len = A1TVBOX_BIT_PAUSE_LEN;\r
2072 has_stop_bit = A1TVBOX_STOP_BIT;\r
2073 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r
2074 n_auto_repetitions = 1; // 1 frame\r
2075 auto_repetition_pause_len = 0;\r
2076 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r
2077 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2078 break;\r
2079 }\r
c9b6916a 2080#endif\r
2081#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2082 case IRMP_ROOMBA_PROTOCOL:\r
2083 {\r
2084 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r
2085 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r
2086 pulse_1_len = ROOMBA_1_PULSE_LEN;\r
2087 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r
2088 pulse_0_len = ROOMBA_0_PULSE_LEN;\r
2089 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r
2090 has_stop_bit = ROOMBA_STOP_BIT;\r
2091 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r
cb93f9e9 2092 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames\r
2093 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
c9b6916a 2094 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
2095 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2096 break;\r
2097 }\r
003c1008 2098#endif\r
2099#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2100 case IRMP_PENTAX_PROTOCOL:\r
2101 {\r
2102 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;\r
2103 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;\r
2104 complete_data_len = PENTAX_COMPLETE_DATA_LEN;\r
2105 pulse_1_len = PENTAX_PULSE_LEN;\r
2106 pause_1_len = PENTAX_1_PAUSE_LEN - 1;\r
2107 pulse_0_len = PENTAX_PULSE_LEN;\r
2108 pause_0_len = PENTAX_0_PAUSE_LEN - 1;\r
2109 has_stop_bit = PENTAX_STOP_BIT;\r
2110 n_auto_repetitions = 1; // 1 frame\r
2111 auto_repetition_pause_len = 0;\r
2112 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;\r
2113 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2114 break;\r
2115 }\r
e664a9f3 2116#endif\r
2117 default:\r
2118 {\r
2119 irsnd_busy = FALSE;\r
2120 break;\r
2121 }\r
2122 }\r
2123 }\r
2124 }\r
2125\r
2126 if (irsnd_busy)\r
2127 {\r
2128 new_frame = FALSE;\r
2129\r
2130 switch (irsnd_protocol)\r
2131 {\r
4225a882 2132#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 2133 case IRMP_SIRCS_PROTOCOL:\r
4225a882 2134#endif\r
2135#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 2136 case IRMP_NEC_PROTOCOL:\r
4225a882 2137#endif\r
7644ac04 2138#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2139 case IRMP_NEC16_PROTOCOL:\r
7644ac04 2140#endif\r
2141#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 2142 case IRMP_NEC42_PROTOCOL:\r
7644ac04 2143#endif\r
c1dfa01f 2144#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
2145 case IRMP_LGAIR_PROTOCOL:\r
2146#endif\r
4225a882 2147#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2148 case IRMP_SAMSUNG_PROTOCOL:\r
2149 case IRMP_SAMSUNG32_PROTOCOL:\r
4225a882 2150#endif\r
ac8504f8 2151#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
2152 case IRMP_SAMSUNG48_PROTOCOL:\r
2153#endif\r
4225a882 2154#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 2155 case IRMP_MATSUSHITA_PROTOCOL:\r
4225a882 2156#endif\r
770a1a9d 2157#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 2158 case IRMP_KASEIKYO_PROTOCOL:\r
770a1a9d 2159#endif\r
4225a882 2160#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 2161 case IRMP_RECS80_PROTOCOL:\r
4225a882 2162#endif\r
2163#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 2164 case IRMP_RECS80EXT_PROTOCOL:\r
4225a882 2165#endif\r
9c07687e 2166#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
2167 case IRMP_TELEFUNKEN_PROTOCOL:\r
2168#endif\r
4225a882 2169#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2170 case IRMP_DENON_PROTOCOL:\r
4225a882 2171#endif\r
2172#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 2173 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 2174#endif\r
15dd9c32 2175#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
2176 case IRMP_SPEAKER_PROTOCOL:\r
2177#endif\r
5481e9cd 2178#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2179 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 2180#endif\r
c7c9a4a1 2181#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2182 case IRMP_FDC_PROTOCOL:\r
b5ea7869 2183#endif\r
c7c9a4a1 2184#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 2185 case IRMP_RCCAR_PROTOCOL:\r
c7c9a4a1 2186#endif\r
c7a47e89 2187#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2188 case IRMP_JVC_PROTOCOL:\r
c7a47e89 2189#endif\r
9405f84a 2190#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2191 case IRMP_NIKON_PROTOCOL:\r
9405f84a 2192#endif\r
f50e01e7 2193#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2194 case IRMP_LEGO_PROTOCOL:\r
f50e01e7 2195#endif\r
cb93f9e9 2196#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
2197 case IRMP_THOMSON_PROTOCOL:\r
2198#endif\r
c9b6916a 2199#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2200 case IRMP_ROOMBA_PROTOCOL:\r
2201#endif\r
003c1008 2202#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2203 case IRMP_PENTAX_PROTOCOL:\r
2204#endif\r
a7054daf 2205\r
7644ac04 2206#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
c1dfa01f 2207 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 2208 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
15dd9c32 2209 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
cb93f9e9 2210 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || \\r
003c1008 2211 IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
e664a9f3 2212 {\r
08f2dd9d 2213#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2214 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
2215 {\r
2216 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
2217 {\r
2218 auto_repetition_pause_len--;\r
2219 }\r
2220\r
2221 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
2222 {\r
2223 repeat_frame_pause_len--;\r
2224 }\r
2225 }\r
2226#endif\r
2227\r
2228 if (pulse_counter == 0)\r
2229 {\r
2230 if (current_bit == 0xFF) // send start bit\r
2231 {\r
2232 pulse_len = startbit_pulse_len;\r
2233 pause_len = startbit_pause_len;\r
2234 }\r
2235 else if (current_bit < complete_data_len) // send n'th bit\r
2236 {\r
5481e9cd 2237#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2238 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
2239 {\r
2240 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
2241 {\r
2242 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2243 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2244 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2245 }\r
2246 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
2247 {\r
2248 pulse_len = SAMSUNG_PULSE_LEN;\r
2249 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
2250 }\r
2251 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
2252 {\r
2253 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2254\r
2255 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2256 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2257 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2258 }\r
2259 }\r
2260 else\r
5481e9cd 2261#endif\r
2262\r
7644ac04 2263#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2264 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
2265 {\r
2266 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
2267 {\r
2268 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2269 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2270 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2271 }\r
2272 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
2273 {\r
2274 pulse_len = NEC_PULSE_LEN;\r
2275 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
2276 }\r
2277 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
2278 {\r
2279 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2280\r
2281 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2282 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2283 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2284 }\r
2285 }\r
2286 else\r
7644ac04 2287#endif\r
2288\r
5481e9cd 2289#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2290 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
2291 {\r
2292 if (current_bit == 0) // send 2nd start bit\r
2293 {\r
2294 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2295 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2296 }\r
2297 else if (current_bit == 1) // send 3rd start bit\r
2298 {\r
2299 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
2300 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
2301 }\r
2302 else if (current_bit == 2) // send 4th start bit\r
2303 {\r
2304 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2305 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2306 }\r
2307 else if (current_bit == 19) // send trailer bit\r
2308 {\r
2309 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2310 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
2311 }\r
2312 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
2313 {\r
7fe8188d 2314 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;\r
e664a9f3 2315 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2316\r
2317 if (cur_bit_value == last_bit_value)\r
2318 {\r
2319 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
2320 }\r
2321 else\r
2322 {\r
2323 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
2324 last_bit_value = cur_bit_value;\r
2325 }\r
2326 }\r
2327 }\r
2328 else\r
2329#endif\r
7fe8188d 2330 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))\r
e664a9f3 2331 {\r
2332 pulse_len = pulse_1_len;\r
2333 pause_len = pause_1_len;\r
2334 }\r
2335 else\r
2336 {\r
2337 pulse_len = pulse_0_len;\r
2338 pause_len = pause_0_len;\r
2339 }\r
2340 }\r
2341 else if (has_stop_bit) // send stop bit\r
2342 {\r
2343 pulse_len = pulse_0_len;\r
2344\r
2345 if (auto_repetition_counter < n_auto_repetitions)\r
2346 {\r
2347 pause_len = pause_0_len;\r
2348 }\r
2349 else\r
2350 {\r
2351 pause_len = 255; // last frame: pause of 255\r
2352 }\r
2353 }\r
2354 }\r
2355\r
2356 if (pulse_counter < pulse_len)\r
2357 {\r
2358 if (pulse_counter == 0)\r
2359 {\r
2360 irsnd_on ();\r
2361 }\r
2362 pulse_counter++;\r
2363 }\r
2364 else if (pause_counter < pause_len)\r
2365 {\r
2366 if (pause_counter == 0)\r
2367 {\r
2368 irsnd_off ();\r
2369 }\r
2370 pause_counter++;\r
2371 }\r
2372 else\r
2373 {\r
2374 current_bit++;\r
2375\r
2376 if (current_bit >= complete_data_len + has_stop_bit)\r
2377 {\r
2378 current_bit = 0xFF;\r
2379 auto_repetition_counter++;\r
2380\r
2381 if (auto_repetition_counter == n_auto_repetitions)\r
2382 {\r
2383 irsnd_busy = FALSE;\r
2384 auto_repetition_counter = 0;\r
2385 }\r
2386 new_frame = TRUE;\r
2387 }\r
2388\r
2389 pulse_counter = 0;\r
2390 pause_counter = 0;\r
2391 }\r
2392 break;\r
2393 }\r
a7054daf 2394#endif\r
2395\r
4225a882 2396#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 2397 case IRMP_RC5_PROTOCOL:\r
a7054daf 2398#endif\r
9547ee89 2399#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 2400 case IRMP_RC6_PROTOCOL:\r
9547ee89 2401#endif\r
2402#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2403 case IRMP_RC6A_PROTOCOL:\r
9547ee89 2404#endif\r
a7054daf 2405#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2406 case IRMP_SIEMENS_PROTOCOL:\r
a7054daf 2407#endif\r
cb93f9e9 2408#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
2409 case IRMP_RUWIDO_PROTOCOL:\r
2410#endif\r
a7054daf 2411#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2412 case IRMP_GRUNDIG_PROTOCOL:\r
a7054daf 2413#endif\r
a48187fa 2414#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2415 case IRMP_IR60_PROTOCOL:\r
a48187fa 2416#endif\r
a7054daf 2417#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2418 case IRMP_NOKIA_PROTOCOL:\r
fa09ce10 2419#endif\r
2420#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2421 case IRMP_A1TVBOX_PROTOCOL:\r
a7054daf 2422#endif\r
4225a882 2423\r
cb93f9e9 2424#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \\r
2425 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \\r
2426 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \\r
2427 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \\r
2428 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
2429 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \\r
2430 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \\r
2431 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \\r
2432 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2433 {\r
2434 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
2435 {\r
2436 current_bit++;\r
4225a882 2437\r
e664a9f3 2438 if (current_bit >= complete_data_len)\r
2439 {\r
2440 current_bit = 0xFF;\r
a7054daf 2441\r
a48187fa 2442#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2443 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2444 {\r
2445 auto_repetition_counter++;\r
2446\r
2447 if (repeat_counter > 0)\r
2448 { // set 117 msec pause time\r
2449 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
2450 }\r
2451\r
2452 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2453 {\r
2454 n_auto_repetitions++; // increment number of auto repetitions\r
2455 repeat_counter++;\r
2456 }\r
2457 else if (auto_repetition_counter == n_auto_repetitions)\r
2458 {\r
2459 irsnd_busy = FALSE;\r
2460 auto_repetition_counter = 0;\r
2461 }\r
2462 }\r
2463 else\r
2464#endif\r
2465 {\r
2466 irsnd_busy = FALSE;\r
2467 }\r
2468\r
2469 new_frame = TRUE;\r
2470 irsnd_off ();\r
2471 }\r
2472\r
2473 pulse_counter = 0;\r
2474 pause_counter = 0;\r
2475 }\r
2476\r
2477 if (! new_frame)\r
2478 {\r
2479 uint8_t first_pulse;\r
5b437ff6 2480\r
a48187fa 2481#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2482 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2483 {\r
2484 if (current_bit == 0xFF || // start bit of start-frame\r
2485 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
2486 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
2487 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
2488 {\r
2489 pulse_len = startbit_pulse_len;\r
2490 pause_len = startbit_pause_len;\r
2491 first_pulse = TRUE;\r
2492 }\r
2493 else // send n'th bit\r
2494 {\r
2495 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2496 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
7fe8188d 2497 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2498 }\r
2499 }\r
2500 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
cb93f9e9 2501 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)\r
e664a9f3 2502#endif\r
2503 {\r
2504 if (current_bit == 0xFF) // 1 start bit\r
2505 {\r
9547ee89 2506#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2507 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2508 {\r
2509 pulse_len = startbit_pulse_len;\r
2510 pause_len = startbit_pause_len;\r
2511 }\r
2512 else\r
fa09ce10 2513#endif\r
2514#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2515 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r
2516 {\r
2517 current_bit = 0;\r
2518 }\r
2519 else\r
2520#endif\r
2521 {\r
2522 ;\r
2523 }\r
2524\r
2525 first_pulse = TRUE;\r
2526 }\r
2527 else // send n'th bit\r
2528 {\r
9547ee89 2529#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2530 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2531 {\r
2532 pulse_len = RC6_BIT_LEN;\r
2533 pause_len = RC6_BIT_LEN;\r
2534\r
2535 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2536 {\r
2537 if (current_bit == 4) // toggle bit (double len)\r
2538 {\r
2539 pulse_len = 2 * RC6_BIT_LEN;\r
2540 pause_len = 2 * RC6_BIT_LEN;\r
2541 }\r
2542 }\r
2543 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2544 {\r
2545 if (current_bit == 4) // toggle bit (double len)\r
2546 {\r
2547 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2548 pause_len = 2 * RC6_BIT_LEN;\r
2549 }\r
2550 else if (current_bit == 5) // toggle bit (double len)\r
2551 {\r
2552 pause_len = 2 * RC6_BIT_LEN;\r
2553 }\r
2554 }\r
2555 }\r
2556#endif\r
7fe8188d 2557 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2558 }\r
2559\r
2560 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2561 {\r
2562 first_pulse = first_pulse ? FALSE : TRUE;\r
2563 }\r
2564 }\r
2565\r
2566 if (first_pulse)\r
2567 {\r
2568 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2569\r
2570 if (pulse_counter < pulse_len)\r
2571 {\r
2572 if (pulse_counter == 0)\r
2573 {\r
2574 irsnd_on ();\r
2575 }\r
2576 pulse_counter++;\r
2577 }\r
2578 else // if (pause_counter < pause_len)\r
2579 {\r
2580 if (pause_counter == 0)\r
2581 {\r
2582 irsnd_off ();\r
2583 }\r
2584 pause_counter++;\r
2585 }\r
2586 }\r
2587 else\r
2588 {\r
2589 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2590\r
2591 if (pause_counter < pause_len)\r
2592 {\r
2593 if (pause_counter == 0)\r
2594 {\r
2595 irsnd_off ();\r
2596 }\r
2597 pause_counter++;\r
2598 }\r
2599 else // if (pulse_counter < pulse_len)\r
2600 {\r
2601 if (pulse_counter == 0)\r
2602 {\r
2603 irsnd_on ();\r
2604 }\r
2605 pulse_counter++;\r
2606 }\r
2607 }\r
2608 }\r
2609 break;\r
2610 }\r
9547ee89 2611#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
cb93f9e9 2612 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2613\r
e664a9f3 2614 default:\r
2615 {\r
2616 irsnd_busy = FALSE;\r
2617 break;\r
2618 }\r
2619 }\r
2620 }\r
2621\r
2622 if (! irsnd_busy)\r
2623 {\r
2624 if (repeat_counter < n_repeat_frames)\r
2625 {\r
c7c9a4a1 2626#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2627 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2628 {\r
2629 irsnd_buffer[2] |= 0x0F;\r
2630 }\r
2631#endif\r
2632 repeat_counter++;\r
2633 irsnd_busy = TRUE;\r
2634 }\r
2635 else\r
2636 {\r
2637 irsnd_busy = TRUE; //Rainer\r
2638 send_trailer = TRUE;\r
2639 n_repeat_frames = 0;\r
2640 repeat_counter = 0;\r
2641 }\r
2642 }\r
4225a882 2643 }\r
2644\r
cb93f9e9 2645#ifdef ANALYZE\r
4225a882 2646 if (irsnd_is_on)\r
2647 {\r
e664a9f3 2648 putchar ('0');\r
4225a882 2649 }\r
2650 else\r
2651 {\r
e664a9f3 2652 putchar ('1');\r
4225a882 2653 }\r
2654#endif\r
2655\r
2656 return irsnd_busy;\r
2657}\r
2658\r
cb93f9e9 2659#ifdef ANALYZE\r
4225a882 2660\r
2661// main function - for unix/linux + windows only!\r
2662// AVR: see main.c!\r
2663// Compile it under linux with:\r
2664// cc irsnd.c -o irsnd\r
2665//\r
2666// usage: ./irsnd protocol hex-address hex-command >filename\r
2667\r
2668int\r
2669main (int argc, char ** argv)\r
2670{\r
4225a882 2671 int protocol;\r
2672 int address;\r
2673 int command;\r
4225a882 2674 IRMP_DATA irmp_data;\r
2675\r
a7054daf 2676 if (argc != 4 && argc != 5)\r
4225a882 2677 {\r
e664a9f3 2678 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
2679 return 1;\r
4225a882 2680 }\r
2681\r
2682 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
e664a9f3 2683 sscanf (argv[2], "%x", &address) == 1 &&\r
2684 sscanf (argv[3], "%x", &command) == 1)\r
4225a882 2685 {\r
e664a9f3 2686 irmp_data.protocol = protocol;\r
2687 irmp_data.address = address;\r
2688 irmp_data.command = command;\r
4225a882 2689\r
e664a9f3 2690 if (argc == 5)\r
2691 {\r
2692 irmp_data.flags = atoi (argv[4]);\r
2693 }\r
2694 else\r
2695 {\r
2696 irmp_data.flags = 0;\r
2697 }\r
a7054daf 2698\r
e664a9f3 2699 irsnd_init ();\r
4225a882 2700\r
e664a9f3 2701 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2702\r
e664a9f3 2703 while (irsnd_busy)\r
2704 {\r
2705 irsnd_ISR ();\r
2706 }\r
beda975f 2707\r
e664a9f3 2708 putchar ('\n');\r
a03ad359 2709\r
f874da09 2710#if 1 // enable here to send twice\r
e664a9f3 2711 (void) irsnd_send_data (&irmp_data, TRUE);\r
a03ad359 2712\r
e664a9f3 2713 while (irsnd_busy)\r
2714 {\r
2715 irsnd_ISR ();\r
2716 }\r
a03ad359 2717\r
e664a9f3 2718 putchar ('\n');\r
f874da09 2719#endif\r
4225a882 2720 }\r
2721 else\r
2722 {\r
e664a9f3 2723 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2724 return 1;\r
4225a882 2725 }\r
2726 return 0;\r
2727}\r
2728\r
cb93f9e9 2729#endif // ANALYZE\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)