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Version 2.9.5: added TECHNICS protocol
[irmp.git] / irsnd.c
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4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
0834784c 4 * Copyright (c) 2010-2015 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
622f5f59 6 * Supported AVR mikrocontrollers:\r
7644ac04 7 *\r
21a4e0ee 8 * ATtiny87, ATtiny167\r
476267f4 9 * ATtiny45, ATtiny85\r
2ac088b2 10 * ATtiny44 ATtiny84\r
7644ac04 11 * ATmega8, ATmega16, ATmega32\r
12 * ATmega162\r
e664a9f3 13 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r
7644ac04 14 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
15 *\r
3d2da98a 16 * $Id: irsnd.c,v 1.91 2015/09/20 10:51:37 fm Exp $\r
5481e9cd 17 *\r
4225a882 18 * This program is free software; you can redistribute it and/or modify\r
19 * it under the terms of the GNU General Public License as published by\r
20 * the Free Software Foundation; either version 2 of the License, or\r
21 * (at your option) any later version.\r
22 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
23 */\r
24\r
4225a882 25#include "irsnd.h"\r
26\r
a03ad359 27#ifndef F_CPU\r
28# error F_CPU unkown\r
29#endif\r
30\r
1f54e86c 31/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
32 * ATtiny pin definition of OC0A / OC0B\r
33 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
34 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
35 */\r
2ac088b2 36#if defined (__AVR_ATtiny44__) || defined (__AVR_ATtiny84__) // ATtiny44/84 uses OC0A = PB2 or OC0B = PA7\r
08f2dd9d 37# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 38# define IRSND_PORT_LETTER B\r
39# define IRSND_BIT_NUMBER 2\r
08f2dd9d 40# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 41# define IRSND_PORT_LETTER A\r
42# define IRSND_BIT_NUMBER 7\r
08f2dd9d 43# else\r
44# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
45# endif // IRSND_OCx\r
ad4d3d41 46\r
08f2dd9d 47#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
48# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 49# define IRSND_PORT_LETTER B\r
50# define IRSND_BIT_NUMBER 0\r
08f2dd9d 51# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 52# define IRSND_PORT_LETTER B\r
53# define IRSND_BIT_NUMBER 1\r
08f2dd9d 54# else\r
55# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
56# endif // IRSND_OCx\r
ad4d3d41 57\r
21a4e0ee 58#elif defined (__AVR_ATtiny87__) || defined (__AVR_ATtiny167__) // ATtiny87/167 uses OC0A = PA2\r
90387f65 59# if IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 60# define IRSND_PORT_LETTER A\r
61# define IRSND_BIT_NUMBER 2\r
90387f65 62# else\r
63# error Wrong value for IRSND_OCx, choose IRSND_OC0A in irsndconfig.h\r
64# endif // IRSND_OCx\r
ad4d3d41 65\r
08f2dd9d 66#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
67# if IRSND_OCx == IRSND_OC2 // OC0A\r
f874da09 68# define IRSND_PORT_LETTER B\r
69# define IRSND_BIT_NUMBER 3\r
08f2dd9d 70# else\r
71# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
72# endif // IRSND_OCx\r
73#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
74# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 75# define IRSND_PORT_LETTER D\r
76# define IRSND_BIT_NUMBER 7\r
08f2dd9d 77# else\r
78# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
79# endif // IRSND_OCx\r
ad4d3d41 80\r
08f2dd9d 81#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
82# if IRSND_OCx == IRSND_OC2 // OC2\r
f874da09 83# define IRSND_PORT_LETTER B\r
84# define IRSND_BIT_NUMBER 1\r
08f2dd9d 85# elif IRSND_OCx == IRSND_OC0 // OC0\r
f874da09 86# define IRSND_PORT_LETTER B\r
87# define IRSND_BIT_NUMBER 0\r
08f2dd9d 88# else\r
89# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
90# endif // IRSND_OCx\r
ad4d3d41 91\r
f50e01e7 92#elif defined (__AVR_ATmega164__) \\r
93 || defined (__AVR_ATmega324__) \\r
94 || defined (__AVR_ATmega644__) \\r
95 || defined (__AVR_ATmega644P__) \\r
0f700c8e 96 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 97 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
98# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 99# define IRSND_PORT_LETTER D\r
100# define IRSND_BIT_NUMBER 7\r
08f2dd9d 101# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 102# define IRSND_PORT_LETTER D\r
103# define IRSND_BIT_NUMBER 6\r
08f2dd9d 104# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 105# define IRSND_PORT_LETTER B\r
106# define IRSND_BIT_NUMBER 3\r
08f2dd9d 107# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 108# define IRSND_PORT_LETTER B\r
109# define IRSND_BIT_NUMBER 4\r
08f2dd9d 110# else\r
111# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
112# endif // IRSND_OCx\r
ad4d3d41 113\r
f50e01e7 114#elif defined (__AVR_ATmega48__) \\r
115 || defined (__AVR_ATmega88__) \\r
7644ac04 116 || defined (__AVR_ATmega88P__) \\r
f50e01e7 117 || defined (__AVR_ATmega168__) \\r
1f54e86c 118 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 119 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
120# if IRSND_OCx == IRSND_OC2A // OC2A\r
f874da09 121# define IRSND_PORT_LETTER B\r
122# define IRSND_BIT_NUMBER 3\r
08f2dd9d 123# elif IRSND_OCx == IRSND_OC2B // OC2B\r
f874da09 124# define IRSND_PORT_LETTER D\r
125# define IRSND_BIT_NUMBER 3\r
08f2dd9d 126# elif IRSND_OCx == IRSND_OC0A // OC0A\r
f874da09 127# define IRSND_PORT_LETTER D\r
128# define IRSND_BIT_NUMBER 6\r
08f2dd9d 129# elif IRSND_OCx == IRSND_OC0B // OC0B\r
f874da09 130# define IRSND_PORT_LETTER D\r
131# define IRSND_BIT_NUMBER 5\r
08f2dd9d 132# else\r
133# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
134# endif // IRSND_OCx\r
ad4d3d41 135\r
f874da09 136#elif defined (__AVR_ATmega8515__) // ATmega8515 uses OC0 = PB0 or OC1A = PD5 or OC1B = PE2\r
08f2dd9d 137# if IRSND_OCx == IRSND_OC0 \r
f874da09 138# define IRSND_PORT_LETTER B\r
139# define IRSND_BIT_NUMBER 0\r
08f2dd9d 140# elif IRSND_OCx == IRSND_OC1A \r
f874da09 141# define IRSND_PORT_LETTER D\r
142# define IRSND_BIT_NUMBER 5\r
08f2dd9d 143# elif IRSND_OCx == IRSND_OC1B \r
f874da09 144# define IRSND_PORT_LETTER E\r
145# define IRSND_BIT_NUMBER 2\r
ad4d3d41 146# endif // IRSND_OCx\r
147\r
c2b70f0b 148#elif defined (__AVR_XMEGA__) // ATxmega\r
ad4d3d41 149# if IRSND_OCx == IRSND_XMEGA_OC0A \r
150# define IRSND_BIT_NUMBER 0\r
151# elif IRSND_OCx == IRSND_XMEGA_OC0B\r
152# define IRSND_BIT_NUMBER 1\r
153# elif IRSND_OCx == IRSND_XMEGA_OC0C\r
154# define IRSND_BIT_NUMBER 2\r
155# elif IRSND_OCx == IRSND_XMEGA_OC0D\r
156# define IRSND_BIT_NUMBER 3\r
157# elif IRSND_OCx == IRSND_XMEGA_OC1A\r
158# define IRSND_BIT_NUMBER 4\r
159# elif IRSND_OCx == IRSND_XMEGA_OC1B\r
160# define IRSND_BIT_NUMBER 5\r
08f2dd9d 161# else\r
c2b70f0b 162# error Wrong value for IRSND_OCx, choose IRSND_XMEGA_OC0A, IRSND_XMEGA_OC0B, IRSND_XMEGA_OC0C, IRSND_XMEGA_OC0D, IRSND_XMEGA_OC1A, or IRSND_XMEGA_OC1B in irsndconfig.h\r
08f2dd9d 163# endif // IRSND_OCx\r
ad4d3d41 164\r
9c86ff1a 165#elif defined (PIC_C18) //Microchip C18 compiler\r
166 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 167#elif defined (ARM_STM32) //STM32\r
168 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 169#else\r
08f2dd9d 170# if !defined (unix) && !defined (WIN32)\r
171# error mikrocontroller not defined, please fill in definitions here.\r
172# endif // unix, WIN32\r
f50e01e7 173#endif // __AVR...\r
174\r
ad4d3d41 175#if defined(__AVR_XMEGA__)\r
176# define _CONCAT(a,b) a##b\r
177# define CONCAT(a,b) _CONCAT(a,b)\r
178# define IRSND_PORT IRSND_PORT_PRE.OUT\r
22a5040e 179# define IRSND_DDR IRSND_PORT_PRE.DIR\r
180# define IRSND_PIN IRSND_PORT_PRE.IN\r
ad4d3d41 181# define IRSND_BIT IRSND_BIT_NUMBER\r
ad4d3d41 182#elif defined(ATMEL_AVR)\r
f874da09 183# define _CONCAT(a,b) a##b\r
184# define CONCAT(a,b) _CONCAT(a,b)\r
185# define IRSND_PORT CONCAT(PORT, IRSND_PORT_LETTER)\r
186# define IRSND_DDR CONCAT(DDR, IRSND_PORT_LETTER)\r
187# define IRSND_BIT IRSND_BIT_NUMBER\r
188#endif\r
189\r
9405f84a 190#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 191 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 192#else\r
9c86ff1a 193 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 194#endif\r
195\r
f50e01e7 196/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
197 * IR timings\r
198 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
199 */\r
4225a882 200#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
201#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
202#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
203#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
204#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
9c07687e 205#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
206#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 207\r
208#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
209#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 210#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 211#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
212#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
213#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
9c07687e 214#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 215\r
216#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
217#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
218#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
219#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
220#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
9c07687e 221#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 222\r
9c07687e 223#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
224#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 225\r
ac8504f8 226#define SAMSUNG48_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
227#define SAMSUNG48_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG48_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
228\r
4225a882 229#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
230#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
231#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
232#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
233#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
9c07687e 234#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 235\r
770a1a9d 236#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
237#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
238#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
239#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
240#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
9c07687e 241#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
242#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
770a1a9d 243\r
4225a882 244#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
245#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
246#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
247#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
248#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
9c07687e 249#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 250\r
251#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
252#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
9c07687e 253#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 254\r
255#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
256#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
257#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
258#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
9c07687e 259#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 260\r
261#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
262#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
263#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
9c07687e 264#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
265#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 266\r
beda975f 267#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
268#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
269#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
9c07687e 270#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
271#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
beda975f 272\r
4225a882 273#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
274#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
275#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
276#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
277#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
9c07687e 278#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
279\r
280#define TELEFUNKEN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME + 0.5)\r
281#define TELEFUNKEN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PAUSE_TIME + 0.5)\r
282#define TELEFUNKEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME + 0.5)\r
283#define TELEFUNKEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME + 0.5)\r
284#define TELEFUNKEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME + 0.5)\r
285#define TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
286#define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 287\r
288#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
289#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
290#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
291#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
292#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
293#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
9c07687e 294#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
295#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 296\r
0715cf5e 297#define FAN_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME + 0.5)\r
298#define FAN_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME + 0.5)\r
299#define FAN_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME + 0.5)\r
300#define FAN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME + 0.5)\r
301#define FAN_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME + 0.5)\r
302#define FAN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME + 0.5)\r
303#define FAN_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
304#define FAN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FAN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
305\r
15dd9c32 306#define SPEAKER_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME + 0.5)\r
307#define SPEAKER_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME + 0.5)\r
308#define SPEAKER_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME + 0.5)\r
309#define SPEAKER_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME + 0.5)\r
310#define SPEAKER_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME + 0.5)\r
311#define SPEAKER_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME + 0.5)\r
9c07687e 312#define SPEAKER_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
313#define SPEAKER_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SPEAKER_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
15dd9c32 314\r
5481e9cd 315#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
316#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
317#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
318#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
319#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
320#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
321#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
322#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
323#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
324#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
325#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
9c07687e 326#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 327\r
9c86ff1a 328#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
329#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
9c07687e 330#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
331#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 332#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 333\r
9c07687e 334#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
a48187fa 335\r
02ccdb69 336#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
337#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
9c07687e 338#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 339\r
cb93f9e9 340#define RUWIDO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
341#define RUWIDO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME + 0.5)\r
342#define RUWIDO_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
343#define RUWIDO_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME + 0.5)\r
9c07687e 344#define RUWIDO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
cb93f9e9 345\r
08f2dd9d 346#ifdef PIC_C18 // PIC C18\r
347# define IRSND_FREQ_TYPE uint8_t\r
348# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
349# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
350# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
351# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
352# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
353# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
354# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
355#elif defined (ARM_STM32) // STM32\r
356# define IRSND_FREQ_TYPE uint32_t\r
357# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
358# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
359# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
360# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
361# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
362# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
363# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
364#else // AVR\r
a03ad359 365# if F_CPU >= 16000000L\r
366# define AVR_PRESCALER 8\r
367# else\r
368# define AVR_PRESCALER 1\r
369# endif\r
08f2dd9d 370# define IRSND_FREQ_TYPE uint8_t\r
a03ad359 371# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / AVR_PRESCALER / 2) - 1)\r
372# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / AVR_PRESCALER / 2) - 1)\r
373# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / AVR_PRESCALER / 2) - 1)\r
374# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / AVR_PRESCALER / 2) - 1)\r
375# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / AVR_PRESCALER / 2) - 1)\r
376# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / AVR_PRESCALER / 2) - 1)\r
377# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / AVR_PRESCALER / 2) - 1)\r
9c86ff1a 378#endif\r
4225a882 379\r
48664931 380#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
381#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
382#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
383#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
384#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
385#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 386\r
c7c9a4a1 387#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
388#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
389#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
390#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
391#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
392#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
393\r
c7a47e89 394#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
395#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
396#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
397#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
398#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
399#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
400#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
401\r
9405f84a 402#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
403#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
404#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
405#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
406#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
407#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 408#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
409\r
410#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
411#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
412#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
413#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
414#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
415#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
416#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 417\r
fa09ce10 418#define A1TVBOX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME + 0.5)\r
419#define A1TVBOX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME + 0.5)\r
420#define A1TVBOX_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME + 0.5)\r
421#define A1TVBOX_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME + 0.5)\r
422#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
423#define A1TVBOX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * A1TVBOX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
424\r
c9b6916a 425#define ROOMBA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME + 0.5)\r
426#define ROOMBA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME + 0.5)\r
427#define ROOMBA_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME + 0.5)\r
428#define ROOMBA_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME + 0.5)\r
429#define ROOMBA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5)\r
430#define ROOMBA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME + 0.5)\r
431#define ROOMBA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ROOMBA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
432\r
003c1008 433#define PENTAX_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME + 0.5)\r
434#define PENTAX_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME + 0.5)\r
435#define PENTAX_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
436#define PENTAX_PULSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME + 0.5)\r
437#define PENTAX_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5)\r
438#define PENTAX_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME + 0.5)\r
439#define PENTAX_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * PENTAX_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
440\r
43c535be 441#define ACP24_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME + 0.5)\r
442#define ACP24_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME + 0.5)\r
443#define ACP24_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
444#define ACP24_PULSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_PULSE_TIME + 0.5)\r
445#define ACP24_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME + 0.5)\r
446#define ACP24_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME + 0.5)\r
447#define ACP24_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * ACP24_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
448\r
9c86ff1a 449static volatile uint8_t irsnd_busy = 0;\r
450static volatile uint8_t irsnd_protocol = 0;\r
43c535be 451static volatile uint8_t irsnd_buffer[9] = {0};\r
9c86ff1a 452static volatile uint8_t irsnd_repeat = 0;\r
4225a882 453static volatile uint8_t irsnd_is_on = FALSE;\r
454\r
f50e01e7 455#if IRSND_USE_CALLBACK == 1\r
456static void (*irsnd_callback_ptr) (uint8_t);\r
457#endif // IRSND_USE_CALLBACK == 1\r
458\r
4225a882 459/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
460 * Switch PWM on\r
4225a882 461 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
462 */\r
463static void\r
464irsnd_on (void)\r
465{\r
466 if (! irsnd_is_on)\r
467 {\r
cb93f9e9 468#ifndef ANALYZE\r
08f2dd9d 469# if defined(PIC_C18) // PIC C18\r
cb93f9e9 470 PWMon();\r
471 // IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
ad4d3d41 472\r
08f2dd9d 473# elif defined (ARM_STM32) // STM32\r
e664a9f3 474 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode\r
475 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
476 TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter\r
ad4d3d41 477\r
478# elif defined (__AVR_XMEGA__) \r
ea585783 479# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A\r
480 XMEGA_Timer.CTRLB |= (1<<TC0_CCAEN_bp); // Compare A \r
481# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B\r
482 XMEGA_Timer.CTRLB |= (1<<TC0_CCBEN_bp); // Compare B \r
483# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
484 XMEGA_Timer.CTRLB |= (1<<TC0_CCCEN_bp); // Compare C\r
485# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
486 XMEGA_Timer.CTRLB |= (1<<TC0_CCDEN_bp); // Compare D\r
487# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
488 XMEGA_Timer.CTRLB |= (1<<TC1_CCAEN_bp); // Compare A\r
489# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
490 XMEGA_Timer.CTRLB |= (1<<TC1_CCBEN_bp); // Compare B\r
ad4d3d41 491# else\r
492# error wrong value of IRSND_OCx\r
493# endif // IRSND_OCx\r
494\r
08f2dd9d 495# else // AVR\r
496# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 497 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 498# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 499 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 500# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 501 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 502# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 503 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 504# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 505 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 506# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 507 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 508# else\r
509# error wrong value of IRSND_OCx\r
510# endif // IRSND_OCx\r
511# endif // C18\r
cb93f9e9 512#endif // ANALYZE\r
f50e01e7 513\r
514#if IRSND_USE_CALLBACK == 1\r
e664a9f3 515 if (irsnd_callback_ptr)\r
516 {\r
517 (*irsnd_callback_ptr) (TRUE);\r
518 }\r
f50e01e7 519#endif // IRSND_USE_CALLBACK == 1\r
520\r
e664a9f3 521 irsnd_is_on = TRUE;\r
4225a882 522 }\r
523}\r
524\r
525/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
526 * Switch PWM off\r
527 * @details Switches PWM off\r
528 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
529 */\r
530static void\r
531irsnd_off (void)\r
532{\r
533 if (irsnd_is_on)\r
534 {\r
cb93f9e9 535#ifndef ANALYZE\r
9c86ff1a 536 \r
08f2dd9d 537# if defined(PIC_C18) // PIC C18\r
cb93f9e9 538 PWMoff();\r
539 // IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
ad4d3d41 540\r
08f2dd9d 541# elif defined (ARM_STM32) // STM32\r
e664a9f3 542 TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter\r
543 TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive\r
544 TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())\r
545 TIM_SetCounter(IRSND_TIMER, 0); // reset counter value\r
ad4d3d41 546\r
547# elif defined (__AVR_XMEGA__)\r
22a5040e 548# if (IRSND_OCx == IRSND_XMEGA_OC0A) // use OC0A \r
ad4d3d41 549 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCAEN_bp); // Compare A disconnected\r
22a5040e 550# elif (IRSND_OCx == IRSND_XMEGA_OC0B) // use OC0B \r
ad4d3d41 551 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCBEN_bp); // Compare B disconnected\r
552# elif IRSND_OCx == IRSND_XMEGA_OC0C // use OC0C\r
553 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCCEN_bp); // Compare C disconnected\r
554# elif IRSND_OCx == IRSND_XMEGA_OC0D // use OC0D\r
555 XMEGA_Timer.CTRLB &= ~(1<<TC0_CCDEN_bp); // Compare D disconnected\r
22a5040e 556# elif IRSND_OCx == IRSND_XMEGA_OC1A // use OC1A\r
557 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCAEN_bp); // Compare A disconnected\r
558# elif IRSND_OCx == IRSND_XMEGA_OC1B // use OC1B\r
559 XMEGA_Timer.CTRLB &= ~(1<<TC1_CCBEN_bp); // Compare B disconnected\r
ad4d3d41 560# else\r
561# error wrong value of IRSND_OCx\r
562# endif // IRSND_OCx\r
563\r
08f2dd9d 564# else //AVR\r
9c86ff1a 565\r
08f2dd9d 566# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 567 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 568# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 569 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 570# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 571 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 572# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 573 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 574# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 575 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 576# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 577 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 578# else\r
579# error wrong value of IRSND_OCx\r
580# endif // IRSND_OCx\r
e664a9f3 581 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 582# endif //C18\r
cb93f9e9 583#endif // ANALYZE\r
f50e01e7 584\r
585#if IRSND_USE_CALLBACK == 1\r
e664a9f3 586 if (irsnd_callback_ptr)\r
587 {\r
588 (*irsnd_callback_ptr) (FALSE);\r
589 }\r
f50e01e7 590#endif // IRSND_USE_CALLBACK == 1\r
591\r
e664a9f3 592 irsnd_is_on = FALSE;\r
4225a882 593 }\r
594}\r
595\r
596/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
597 * Set PWM frequency\r
598 * @details sets pwm frequency\r
599 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
600 */\r
7fe8188d 601#if defined(__12F1840)\r
602extern void pwm_init(uint16_t freq);\r
603#include <stdio.h>\r
604#endif\r
605\r
4225a882 606static void\r
08f2dd9d 607irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 608{\r
cb93f9e9 609#ifndef ANALYZE\r
7fe8188d 610# if defined(PIC_C18) // PIC C18 or XC8\r
611# if defined(__12F1840) // XC8\r
612 TRISA2=0; \r
613 PR2=freq;\r
614 CCP1M0=1;\r
615 CCP1M1=1;\r
616 CCP1M2=1;\r
617 CCP1M3=1;\r
618 DC1B0=1;\r
619 DC1B1=0;\r
620 CCPR1L = 0b01101001;\r
621 TMR2IF = 0;\r
622 TMR2ON=1;\r
623 CCP1CON &=(~0b0011); // p 197 "active high"\r
624# else // PIC C18\r
625 OpenPWM(freq); \r
626 SetDCPWM( (uint16_t) (freq * 2) + 1); // freq*2 = Duty cycles 50%\r
627# endif\r
628 PWMoff();\r
08f2dd9d 629# elif defined (ARM_STM32) // STM32\r
e664a9f3 630 static uint32_t TimeBaseFreq = 0;\r
08f2dd9d 631\r
e664a9f3 632 if (TimeBaseFreq == 0)\r
633 {\r
634 RCC_ClocksTypeDef RCC_ClocksStructure;\r
635 /* Get system clocks and store timer clock in variable */\r
636 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
08f2dd9d 637# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 638 if (RCC_ClocksStructure.PCLK1_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
639 {\r
640 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
641 }\r
642 else\r
643 {\r
644 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency * 2;\r
645 }\r
08f2dd9d 646# else\r
e664a9f3 647 if (RCC_ClocksStructure.PCLK2_Frequency == RCC_ClocksStructure.HCLK_Frequency)\r
648 {\r
649 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
650 }\r
651 else\r
652 {\r
653 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency * 2;\r
654 }\r
08f2dd9d 655# endif\r
e664a9f3 656 }\r
08f2dd9d 657\r
e664a9f3 658 freq = TimeBaseFreq/freq;\r
08f2dd9d 659\r
e664a9f3 660 /* Set frequency */\r
661 TIM_SetAutoreload(IRSND_TIMER, freq - 1);\r
662 /* Set duty cycle */\r
663 TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);\r
ad4d3d41 664\r
665# elif defined (__AVR_XMEGA__)\r
666 XMEGA_Timer.CCA = freq;\r
667\r
08f2dd9d 668# else // AVR\r
669\r
670# if IRSND_OCx == IRSND_OC2\r
e664a9f3 671 OCR2 = freq; // use register OCR2 for OC2\r
08f2dd9d 672# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
e664a9f3 673 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 674# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
e664a9f3 675 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
08f2dd9d 676# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 677 OCR0 = freq; // use register OCR2 for OC2\r
08f2dd9d 678# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
e664a9f3 679 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 680# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
e664a9f3 681 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
08f2dd9d 682# else\r
683# error wrong value of IRSND_OCx\r
684# endif\r
685# endif //PIC_C18\r
cb93f9e9 686#endif // ANALYZE\r
4225a882 687}\r
688\r
689/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
690 * Initialize the PWM\r
691 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
692 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
693 */\r
694void\r
695irsnd_init (void)\r
696{\r
cb93f9e9 697#ifndef ANALYZE\r
7fe8188d 698# if defined(PIC_C18) // PIC C18 or XC8 compiler\r
699# if ! defined(__12F1840) // only C18:\r
e664a9f3 700 OpenTimer;\r
7fe8188d 701# endif\r
cb93f9e9 702 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
703 IRSND_PIN = 0; // set IO to outout\r
704 PWMoff();\r
08f2dd9d 705# elif defined (ARM_STM32) // STM32\r
e664a9f3 706 GPIO_InitTypeDef GPIO_InitStructure;\r
707 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
708 TIM_OCInitTypeDef TIM_OCInitStructure;\r
08f2dd9d 709\r
710 /* GPIOx clock enable */\r
711# if defined (ARM_STM32L1XX)\r
e664a9f3 712 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 713# elif defined (ARM_STM32F10X)\r
e664a9f3 714 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
c6a60200 715 // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 716# elif defined (ARM_STM32F4XX)\r
e664a9f3 717 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
08f2dd9d 718# endif\r
719\r
e664a9f3 720 /* GPIO Configuration */\r
721 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
08f2dd9d 722# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
e664a9f3 723 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
724 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
725 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
726 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
727 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
728 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
08f2dd9d 729# elif defined (ARM_STM32F10X)\r
e664a9f3 730 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
731 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
732 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
c6a60200 733 // GPIO_PinRemapConfig(GPIO_*Remap*_TIM[IRSND_TIMER_NUMBER], ENABLE); // only in case of remapping, not necessary for default port-timer mapping\r
08f2dd9d 734# endif\r
735\r
e664a9f3 736 /* TIMx clock enable */\r
08f2dd9d 737# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
e664a9f3 738 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 739# else\r
e664a9f3 740 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
08f2dd9d 741# endif\r
08f2dd9d 742\r
e664a9f3 743 /* Time base configuration */\r
744 TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later\r
745 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
746 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
747 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
748 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
749\r
750 /* PWM1 Mode configuration */\r
751 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
752 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
753 TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later\r
754 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
755 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
756\r
757 /* Preload configuration */\r
758 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
759 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
760\r
761 irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency\r
22a5040e 762\r
763# elif defined (__AVR_XMEGA__)\r
764 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
765 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
766\r
767 XMEGA_Timer.PER = 0xFFFF; //Topwert\r
768 XMEGA_Timer.CTRLB |= TC_WGMODE_FRQ_gc; //Modus: Frequenz entspricht CTC\r
769\r
770# if AVR_PRESCALER == 8\r
771 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV8_gc; // start Timer prescaler = 8\r
772# else\r
773 XMEGA_Timer.CTRLA |= TC_CLKSEL_DIV1_gc; // start Timer prescaler = 1\r
774# endif\r
775 \r
776# else // AVR\r
e664a9f3 777 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
778 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
08f2dd9d 779\r
780# if IRSND_OCx == IRSND_OC2 // use OC2\r
e664a9f3 781 TCCR2 = (1<<WGM21); // CTC mode\r
a03ad359 782# if AVR_PRESCALER == 8\r
e664a9f3 783 TCCR2 |= (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 784# else\r
e664a9f3 785 TCCR2 |= (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 786# endif\r
08f2dd9d 787# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
e664a9f3 788 TCCR2A = (1<<WGM21); // CTC mode\r
a03ad359 789# if AVR_PRESCALER == 8\r
e664a9f3 790 TCCR2B = (1<<CS21); // start Timer 2, prescaler = 8\r
a03ad359 791# else\r
e664a9f3 792 TCCR2B = (1<<CS20); // start Timer 2, prescaler = 1\r
a03ad359 793# endif\r
08f2dd9d 794# elif IRSND_OCx == IRSND_OC0 // use OC0\r
e664a9f3 795 TCCR0 = (1<<WGM01); // CTC mode\r
a03ad359 796# if AVR_PRESCALER == 8\r
e664a9f3 797 TCCR0 |= (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 798# else\r
e664a9f3 799 TCCR0 |= (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 800# endif\r
08f2dd9d 801# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
e664a9f3 802 TCCR0A = (1<<WGM01); // CTC mode\r
a03ad359 803# if AVR_PRESCALER == 8\r
e664a9f3 804 TCCR0B = (1<<CS01); // start Timer 0, prescaler = 8\r
a03ad359 805# else\r
e664a9f3 806 TCCR0B = (1<<CS00); // start Timer 0, prescaler = 1\r
a03ad359 807# endif\r
08f2dd9d 808# else\r
809# error wrong value of IRSND_OCx\r
810# endif\r
e664a9f3 811 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
08f2dd9d 812# endif //PIC_C18\r
cb93f9e9 813#endif // ANALYZE\r
4225a882 814}\r
815\r
f50e01e7 816#if IRSND_USE_CALLBACK == 1\r
817void\r
818irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
819{\r
820 irsnd_callback_ptr = cb;\r
821}\r
822#endif // IRSND_USE_CALLBACK == 1\r
823\r
4225a882 824uint8_t\r
825irsnd_is_busy (void)\r
826{\r
827 return irsnd_busy;\r
828}\r
829\r
830static uint16_t\r
831bitsrevervse (uint16_t x, uint8_t len)\r
832{\r
833 uint16_t xx = 0;\r
834\r
835 while(len)\r
836 {\r
e664a9f3 837 xx <<= 1;\r
838 if (x & 1)\r
839 {\r
840 xx |= 1;\r
841 }\r
842 x >>= 1;\r
843 len--;\r
4225a882 844 }\r
845 return xx;\r
846}\r
847\r
848\r
9547ee89 849#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
850static uint8_t sircs_additional_bitlen;\r
851#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
852\r
4225a882 853uint8_t\r
879b06c2 854irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 855{\r
856#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
857 static uint8_t toggle_bit_recs80;\r
858#endif\r
859#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
860 static uint8_t toggle_bit_recs80ext;\r
861#endif\r
862#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
863 static uint8_t toggle_bit_rc5;\r
9547ee89 864#endif\r
779fbc81 865#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 866 static uint8_t toggle_bit_rc6;\r
beda975f 867#endif\r
868#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
869 static uint8_t toggle_bit_thomson;\r
4225a882 870#endif\r
871 uint16_t address;\r
872 uint16_t command;\r
873\r
879b06c2 874 if (do_wait)\r
4225a882 875 {\r
e664a9f3 876 while (irsnd_busy)\r
877 {\r
878 // do nothing;\r
879 }\r
879b06c2 880 }\r
881 else if (irsnd_busy)\r
882 {\r
e664a9f3 883 return (FALSE);\r
4225a882 884 }\r
885\r
886 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 887 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 888\r
889 switch (irsnd_protocol)\r
890 {\r
891#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 892 case IRMP_SIRCS_PROTOCOL:\r
893 {\r
894 // uint8_t sircs_additional_command_len;\r
895 uint8_t sircs_additional_address_len;\r
896\r
897 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
898\r
899 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
900 {\r
901 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
902 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
903 }\r
904 else\r
905 {\r
906 // sircs_additional_command_len = sircs_additional_bitlen;\r
907 sircs_additional_address_len = 0;\r
908 }\r
909\r
910 command = bitsrevervse (irmp_data_p->command, 15);\r
911\r
912 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
913 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
914\r
915 if (sircs_additional_address_len > 0)\r
916 {\r
917 address = bitsrevervse (irmp_data_p->address, 5);\r
918 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
919 irsnd_buffer[2] = (address & 0x000F) << 4;\r
920 }\r
921 irsnd_busy = TRUE;\r
922 break;\r
923 }\r
4225a882 924#endif\r
925#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 926 case IRMP_APPLE_PROTOCOL:\r
927 {\r
928 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
929 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
930\r
931 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
932 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
933\r
934 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
935\r
936 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
937 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
938 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
939 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
940 irsnd_busy = TRUE;\r
941 break;\r
942 }\r
943 case IRMP_NEC_PROTOCOL:\r
944 {\r
945 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
946 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
947\r
948 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
949 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
950 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
951 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
952 irsnd_busy = TRUE;\r
953 break;\r
954 }\r
7644ac04 955#endif\r
956#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 957 case IRMP_NEC16_PROTOCOL:\r
958 {\r
959 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
960 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 961\r
e664a9f3 962 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
963 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
964 irsnd_busy = TRUE;\r
965 break;\r
966 }\r
7644ac04 967#endif\r
968#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 969 case IRMP_NEC42_PROTOCOL:\r
970 {\r
971 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
972 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
973\r
974 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
975 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
976 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
977 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
978 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
979 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
980 irsnd_busy = TRUE;\r
981 break;\r
982 }\r
4225a882 983#endif\r
c1dfa01f 984#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
985 case IRMP_LGAIR_PROTOCOL:\r
986 {\r
987 address = irmp_data_p->address;\r
988 command = irmp_data_p->command;\r
989\r
990 irsnd_buffer[0] = ( (address & 0x00FF)); // AAAAAAAA\r
991 irsnd_buffer[1] = ( (command & 0xFF00) >> 8); // CCCCCCCC\r
992 irsnd_buffer[2] = ( (command & 0x00FF)); // CCCCCCCC\r
993 irsnd_buffer[3] = (( ((command & 0xF000) >> 12) + // checksum\r
994 ((command & 0x0F00) >> 8) +\r
995 ((command & 0x00F0) >>4 ) +\r
996 ((command & 0x000F))) & 0x000F) << 4;\r
997 irsnd_busy = TRUE;\r
998 break;\r
999 }\r
1000#endif\r
4225a882 1001#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1002 case IRMP_SAMSUNG_PROTOCOL:\r
1003 {\r
1004 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1005 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
1006\r
1007 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1008 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1009 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
1010 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
1011 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
1012 irsnd_busy = TRUE;\r
1013 break;\r
1014 }\r
1015 case IRMP_SAMSUNG32_PROTOCOL:\r
1016 {\r
1017 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1018 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
1019\r
1020 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1021 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1022 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
1023 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
1024 irsnd_busy = TRUE;\r
1025 break;\r
1026 }\r
4225a882 1027#endif\r
ac8504f8 1028#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1029 case IRMP_SAMSUNG48_PROTOCOL:\r
1030 {\r
1031 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
1032 command = bitsrevervse (irmp_data_p->command, 16);\r
1033\r
1034 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1035 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1036 irsnd_buffer[2] = ((command & 0xFF00) >> 8); // CCCCCCCC\r
1037 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
1038 irsnd_buffer[4] = (command & 0x00FF); // CCCCCCCC\r
1039 irsnd_buffer[5] = ~(command & 0x00FF); // cccccccc\r
1040 irsnd_busy = TRUE;\r
1041 break;\r
1042 }\r
1043#endif\r
4225a882 1044#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1045 case IRMP_MATSUSHITA_PROTOCOL:\r
1046 {\r
1047 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
1048 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
1049\r
1050 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
1051 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
1052 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
1053 irsnd_busy = TRUE;\r
1054 break;\r
1055 }\r
4225a882 1056#endif\r
3d2da98a 1057#if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1\r
1058 case IRMP_TECHNICS_PROTOCOL:\r
1059 {\r
1060 command = bitsrevervse (irmp_data_p->command, TECHNICS_COMMAND_LEN);\r
1061\r
1062 irsnd_buffer[0] = (command & 0x07FC) >> 3; // CCCCCCCC\r
1063 irsnd_buffer[1] = ((command & 0x0007) << 5) | ((~command & 0x07C0) >> 6); // CCCccccc\r
1064 irsnd_buffer[2] = (~command & 0x003F) << 2; // cccccc\r
1065 irsnd_busy = TRUE;\r
1066 break;\r
1067 }\r
1068#endif\r
770a1a9d 1069#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1070 case IRMP_KASEIKYO_PROTOCOL:\r
1071 {\r
1072 uint8_t xor_value;\r
1073 uint16_t genre2;\r
770a1a9d 1074\r
e664a9f3 1075 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
1076 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
1077 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 1078\r
e664a9f3 1079 xor_value = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
770a1a9d 1080\r
e664a9f3 1081 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
1082 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
1083 irsnd_buffer[2] = xor_value << 4 | (command & 0x000F); // XXXXCCCC\r
1084 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
1085 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
770a1a9d 1086\r
e664a9f3 1087 xor_value = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
770a1a9d 1088\r
e664a9f3 1089 irsnd_buffer[5] = xor_value;\r
1090 irsnd_busy = TRUE;\r
1091 break;\r
1092 }\r
770a1a9d 1093#endif\r
4225a882 1094#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1095 case IRMP_RECS80_PROTOCOL:\r
1096 {\r
1097 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
4225a882 1098\r
e664a9f3 1099 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
1100 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
1101 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
1102 irsnd_busy = TRUE;\r
1103 break;\r
1104 }\r
4225a882 1105#endif\r
1106#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1107 case IRMP_RECS80EXT_PROTOCOL:\r
1108 {\r
1109 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
4225a882 1110\r
e664a9f3 1111 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
1112 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
1113 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
1114 irsnd_busy = TRUE;\r
1115 break;\r
1116 }\r
4225a882 1117#endif\r
1118#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1119 case IRMP_RC5_PROTOCOL:\r
1120 {\r
1121 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
4225a882 1122\r
e664a9f3 1123 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
1124 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
1125 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
1126 irsnd_busy = TRUE;\r
1127 break;\r
1128 }\r
4225a882 1129#endif\r
9547ee89 1130#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1131 case IRMP_RC6_PROTOCOL:\r
1132 {\r
1133 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
9547ee89 1134\r
e664a9f3 1135 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
1136 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
1137 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
1138 irsnd_busy = TRUE;\r
1139 break;\r
1140 }\r
9547ee89 1141#endif\r
1142#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1143 case IRMP_RC6A_PROTOCOL:\r
1144 {\r
1145 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
1146\r
1147 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
1148 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
1149 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
1150 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1151 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
1152 irsnd_busy = TRUE;\r
1153 break;\r
1154 }\r
9547ee89 1155#endif\r
4225a882 1156#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1157 case IRMP_DENON_PROTOCOL:\r
1158 {\r
1159 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
1160 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
1161 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
1162 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
1163 irsnd_busy = TRUE;\r
1164 break;\r
1165 }\r
4225a882 1166#endif\r
beda975f 1167#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1168 case IRMP_THOMSON_PROTOCOL:\r
1169 {\r
1170 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
beda975f 1171\r
e664a9f3 1172 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
1173 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
1174 irsnd_busy = TRUE;\r
1175 break;\r
1176 }\r
beda975f 1177#endif\r
4225a882 1178#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1179 case IRMP_NUBERT_PROTOCOL:\r
1180 {\r
1181 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1182 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1183 irsnd_busy = TRUE;\r
1184 break;\r
1185 }\r
5481e9cd 1186#endif\r
0715cf5e 1187#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
1188 case IRMP_FAN_PROTOCOL:\r
1189 {\r
1190 irsnd_buffer[0] = irmp_data_p->command >> 3; // CCCCCCCC\r
1191 irsnd_buffer[1] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
1192 irsnd_busy = TRUE;\r
1193 break;\r
1194 }\r
1195#endif\r
15dd9c32 1196#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1197 case IRMP_SPEAKER_PROTOCOL:\r
1198 {\r
1199 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
1200 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
1201 irsnd_busy = TRUE;\r
1202 break;\r
1203 }\r
1204#endif\r
5481e9cd 1205#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1206 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1207 {\r
1208 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
1209 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
1210 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
1211 irsnd_busy = TRUE;\r
1212 break;\r
1213 }\r
4225a882 1214#endif\r
5b437ff6 1215#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1216 case IRMP_GRUNDIG_PROTOCOL:\r
1217 {\r
9c07687e 1218 command = bitsrevervse (irmp_data_p->command, TELEFUNKEN_COMMAND_LEN);\r
5b437ff6 1219\r
e664a9f3 1220 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
1221 irsnd_buffer[1] = 0xC0; // 11\r
1222 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
1223 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
d155e9ab 1224\r
e664a9f3 1225 irsnd_busy = TRUE;\r
1226 break;\r
1227 }\r
d155e9ab 1228#endif\r
9c07687e 1229#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1230 case IRMP_TELEFUNKEN_PROTOCOL:\r
1231 {\r
1232 irsnd_buffer[0] = irmp_data_p->command >> 7; // CCCCCCCC\r
1233 irsnd_buffer[1] = (irmp_data_p->command << 1) & 0xff; // CCCCCCC\r
1234\r
1235 irsnd_busy = TRUE;\r
1236 break;\r
1237 }\r
1238#endif\r
a48187fa 1239#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1240 case IRMP_IR60_PROTOCOL:\r
1241 {\r
1242 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 1243#if 0\r
e664a9f3 1244 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
1245 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 1246#else\r
e664a9f3 1247 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
1248 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
08f2dd9d 1249#endif\r
a48187fa 1250\r
e664a9f3 1251 irsnd_busy = TRUE;\r
1252 break;\r
1253 }\r
a48187fa 1254#endif\r
d155e9ab 1255#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1256 case IRMP_NOKIA_PROTOCOL:\r
1257 {\r
1258 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
1259 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
1260\r
1261 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
1262 irsnd_buffer[1] = 0xFF; // 11111111\r
1263 irsnd_buffer[2] = 0x80; // 1\r
1264 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
1265 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
1266 irsnd_buffer[5] = (address << 7); // A\r
1267\r
1268 irsnd_busy = TRUE;\r
1269 break;\r
1270 }\r
5b437ff6 1271#endif\r
a7054daf 1272#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 1273 case IRMP_SIEMENS_PROTOCOL:\r
1274 {\r
cb93f9e9 1275 irsnd_buffer[0] = ((irmp_data_p->address & 0x07FF) >> 3); // AAAAAAAA\r
1276 irsnd_buffer[1] = ((irmp_data_p->address & 0x0007) << 5) | ((irmp_data_p->command >> 5) & 0x1F); // AAACCCCC\r
1277 irsnd_buffer[2] = ((irmp_data_p->command & 0x001F) << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
9405f84a 1278\r
e664a9f3 1279 irsnd_busy = TRUE;\r
1280 break;\r
1281 }\r
b5ea7869 1282#endif\r
cb93f9e9 1283#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
1284 case IRMP_RUWIDO_PROTOCOL:\r
1285 {\r
1286 irsnd_buffer[0] = ((irmp_data_p->address & 0x01FF) >> 1); // AAAAAAAA\r
1287 irsnd_buffer[1] = ((irmp_data_p->address & 0x0001) << 7) | ((irmp_data_p->command & 0x7F)); // ACCCCCCC\r
1288 irsnd_buffer[2] = ((~irmp_data_p->command & 0x01) << 7); // c\r
1289 irsnd_busy = TRUE;\r
1290 break;\r
1291 }\r
1292#endif\r
48664931 1293#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 1294 case IRMP_FDC_PROTOCOL:\r
1295 {\r
1296 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
1297 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
1298\r
1299 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
1300 irsnd_buffer[1] = 0; // 00000000\r
1301 irsnd_buffer[2] = 0; // 0000RRRR\r
1302 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
1303 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
1304 irsnd_busy = TRUE;\r
1305 break;\r
1306 }\r
c7c9a4a1 1307#endif\r
1308#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 1309 case IRMP_RCCAR_PROTOCOL:\r
1310 {\r
1311 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1312 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1313\r
1314 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1315 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1316 \r
1317 irsnd_busy = TRUE;\r
1318 break;\r
1319 }\r
a7054daf 1320#endif\r
c7a47e89 1321#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 1322 case IRMP_JVC_PROTOCOL:\r
1323 {\r
1324 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1325 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
c7a47e89 1326\r
e664a9f3 1327 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1328 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
c7a47e89 1329\r
e664a9f3 1330 irsnd_busy = TRUE;\r
1331 break;\r
1332 }\r
c7a47e89 1333#endif\r
9405f84a 1334#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 1335 case IRMP_NIKON_PROTOCOL:\r
1336 {\r
1337 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1338 irsnd_busy = TRUE;\r
1339 break;\r
1340 }\r
f50e01e7 1341#endif\r
1342#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 1343 case IRMP_LEGO_PROTOCOL:\r
1344 {\r
1345 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
fa09ce10 1346\r
e664a9f3 1347 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1348 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1349 irsnd_busy = TRUE;\r
1350 break;\r
1351 }\r
fa09ce10 1352#endif\r
1353#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 1354 case IRMP_A1TVBOX_PROTOCOL:\r
1355 {\r
1356 irsnd_buffer[0] = 0x80 | (irmp_data_p->address >> 2); // 10AAAAAA\r
1357 irsnd_buffer[1] = (irmp_data_p->address << 6) | (irmp_data_p->command >> 2); // AACCCCCC\r
1358 irsnd_buffer[2] = (irmp_data_p->command << 6); // CC\r
1359\r
1360 irsnd_busy = TRUE;\r
1361 break;\r
1362 }\r
1363#endif\r
c9b6916a 1364#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
1365 case IRMP_ROOMBA_PROTOCOL:\r
1366 {\r
c9b6916a 1367 irsnd_buffer[0] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC.\r
1368 irsnd_busy = TRUE;\r
1369 break;\r
1370 }\r
1371#endif\r
003c1008 1372#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
1373 case IRMP_PENTAX_PROTOCOL:\r
1374 {\r
1375 irsnd_buffer[0] = (irmp_data_p->command & 0x3F) << 2; // CCCCCC..\r
1376 irsnd_busy = TRUE;\r
1377 break;\r
1378 }\r
1379#endif\r
43c535be 1380#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
1381# define ACP_SET_BIT(acp24_bitno, c, irmp_bitno) \\r
1382 do \\r
1383 { \\r
1384 if ((c) & (1<<(irmp_bitno))) \\r
1385 { \\r
1386 irsnd_buffer[((acp24_bitno)>>3)] |= 1 << (((7 - (acp24_bitno)) & 0x07)); \\r
1387 } \\r
1388 } while (0)\r
1389\r
1390 case IRMP_ACP24_PROTOCOL:\r
1391 {\r
1392 uint16_t cmd = irmp_data_p->command;\r
1393 uint8_t i;\r
1394\r
1395 address = bitsrevervse (irmp_data_p->address, ACP24_ADDRESS_LEN);\r
1396\r
1397 for (i = 0; i < 8; i++)\r
1398 {\r
1399 irsnd_buffer[i] = 0x00; // CCCCCCCC\r
1400 }\r
1401\r
1402 // ACP24-Frame:\r
1403 // 1 2 3 4 5 6\r
1404 // 0123456789012345678901234567890123456789012345678901234567890123456789\r
1405 // N VVMMM ? ??? t vmA x y TTTT\r
1406 // \r
1407 // irmp_data_p->command:\r
1408 // \r
1409 // 5432109876543210\r
1410 // NAVVvMMMmtxyTTTT\r
1411\r
1412 ACP_SET_BIT( 0, cmd, 15);\r
1413 ACP_SET_BIT(24, cmd, 14);\r
1414 ACP_SET_BIT( 2, cmd, 13);\r
1415 ACP_SET_BIT( 3, cmd, 12);\r
1416 ACP_SET_BIT(22, cmd, 11);\r
1417 ACP_SET_BIT( 4, cmd, 10);\r
1418 ACP_SET_BIT( 5, cmd, 9);\r
1419 ACP_SET_BIT( 6, cmd, 8);\r
1420 ACP_SET_BIT(23, cmd, 7);\r
1421 ACP_SET_BIT(20, cmd, 6);\r
1422 ACP_SET_BIT(26, cmd, 5);\r
1423 ACP_SET_BIT(44, cmd, 4);\r
1424 ACP_SET_BIT(66, cmd, 3);\r
1425 ACP_SET_BIT(67, cmd, 2);\r
1426 ACP_SET_BIT(68, cmd, 1);\r
1427 ACP_SET_BIT(69, cmd, 0);\r
1428\r
1429 irsnd_busy = TRUE;\r
1430 break;\r
1431 }\r
1432#endif\r
003c1008 1433\r
e664a9f3 1434 default:\r
1435 {\r
1436 break;\r
1437 }\r
4225a882 1438 }\r
1439\r
1440 return irsnd_busy;\r
1441}\r
1442\r
beda975f 1443void\r
1444irsnd_stop (void)\r
1445{\r
acf7fb44 1446 irsnd_repeat = 0;\r
beda975f 1447}\r
1448\r
4225a882 1449/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1450 * ISR routine\r
1451 * @details ISR routine, called 10000 times per second\r
1452 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1453 */\r
1454uint8_t\r
1455irsnd_ISR (void)\r
1456{\r
a48187fa 1457 static uint8_t send_trailer = FALSE;\r
1458 static uint8_t current_bit = 0xFF;\r
1459 static uint8_t pulse_counter = 0;\r
1460 static IRSND_PAUSE_LEN pause_counter = 0;\r
1461 static uint8_t startbit_pulse_len = 0;\r
1462 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1463 static uint8_t pulse_1_len = 0;\r
1464 static uint8_t pause_1_len = 0;\r
1465 static uint8_t pulse_0_len = 0;\r
1466 static uint8_t pause_0_len = 0;\r
1467 static uint8_t has_stop_bit = 0;\r
1468 static uint8_t new_frame = TRUE;\r
1469 static uint8_t complete_data_len = 0;\r
1470 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1471 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1472 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1473 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1474 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1475 static uint8_t repeat_counter = 0; // repeat counter\r
1476 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1477 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1478#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1479 static uint8_t last_bit_value;\r
5481e9cd 1480#endif\r
a48187fa 1481 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1482 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1483\r
1484 if (irsnd_busy)\r
1485 {\r
e664a9f3 1486 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1487 {\r
1488 if (auto_repetition_counter > 0)\r
1489 {\r
1490 auto_repetition_pause_counter++;\r
4225a882 1491\r
08f2dd9d 1492#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1493 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1494 {\r
1495 repeat_frame_pause_len--;\r
1496 }\r
08f2dd9d 1497#endif\r
1498\r
e664a9f3 1499 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
1500 {\r
1501 auto_repetition_pause_counter = 0;\r
4225a882 1502\r
08f2dd9d 1503#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1504 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
1505 {\r
1506 current_bit = 16;\r
1507 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1508 }\r
1509 else\r
08f2dd9d 1510#endif\r
1511#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 1512 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
1513 {\r
1514 current_bit = 15;\r
1515 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1516 }\r
1517 else\r
08f2dd9d 1518#endif\r
1519#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 1520 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
1521 {\r
1522 current_bit = 7;\r
1523 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1524 }\r
1525 else\r
08f2dd9d 1526#endif\r
1527#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 1528 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
1529 {\r
1530 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
1531 {\r
1532 current_bit = 23;\r
1533 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1534 }\r
1535 else // nokia stop frame\r
1536 {\r
1537 current_bit = 0xFF;\r
1538 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1539 }\r
1540 }\r
1541 else\r
1542#endif\r
1543 {\r
1544 ;\r
1545 }\r
1546 }\r
1547 else\r
1548 {\r
cb93f9e9 1549#ifdef ANALYZE\r
e664a9f3 1550 if (irsnd_is_on)\r
1551 {\r
1552 putchar ('0');\r
1553 }\r
1554 else\r
1555 {\r
1556 putchar ('1');\r
1557 }\r
1558#endif\r
1559 return irsnd_busy;\r
1560 }\r
1561 }\r
e664a9f3 1562 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
e664a9f3 1563 {\r
1564 packet_repeat_pause_counter++;\r
cb93f9e9 1565#ifdef ANALYZE\r
e664a9f3 1566 if (irsnd_is_on)\r
1567 {\r
1568 putchar ('0');\r
1569 }\r
1570 else\r
1571 {\r
1572 putchar ('1');\r
1573 }\r
1574#endif\r
1575 return irsnd_busy;\r
1576 }\r
1577 else\r
1578 {\r
1579 if (send_trailer)\r
1580 {\r
1581 irsnd_busy = FALSE;\r
1582 send_trailer = FALSE;\r
1583 return irsnd_busy;\r
1584 }\r
1585 \r
1586 n_repeat_frames = irsnd_repeat;\r
1587\r
1588 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1589 {\r
1590 n_repeat_frames = 255;\r
1591 }\r
1592\r
1593 packet_repeat_pause_counter = 0;\r
1594 pulse_counter = 0;\r
1595 pause_counter = 0;\r
1596\r
1597 switch (irsnd_protocol)\r
1598 {\r
4225a882 1599#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 1600 case IRMP_SIRCS_PROTOCOL:\r
1601 {\r
1602 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
1603 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
1604 pulse_1_len = SIRCS_1_PULSE_LEN;\r
1605 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
1606 pulse_0_len = SIRCS_0_PULSE_LEN;\r
1607 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
1608 has_stop_bit = SIRCS_STOP_BIT;\r
1609 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
1610 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1611 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1612 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
1613 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1614 break;\r
1615 }\r
4225a882 1616#endif\r
1617#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 1618 case IRMP_NEC_PROTOCOL:\r
1619 {\r
1620 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1621\r
1622 if (repeat_counter > 0)\r
1623 {\r
1624 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
1625 complete_data_len = 0;\r
1626 }\r
1627 else\r
1628 {\r
1629 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1630 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1631 }\r
1632\r
1633 pulse_1_len = NEC_PULSE_LEN;\r
1634 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1635 pulse_0_len = NEC_PULSE_LEN;\r
1636 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1637 has_stop_bit = NEC_STOP_BIT;\r
1638 n_auto_repetitions = 1; // 1 frame\r
1639 auto_repetition_pause_len = 0;\r
1640 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1641 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1642 break;\r
1643 }\r
4225a882 1644#endif\r
7644ac04 1645#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 1646 case IRMP_NEC16_PROTOCOL:\r
1647 {\r
1648 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1649 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1650 pulse_1_len = NEC_PULSE_LEN;\r
1651 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1652 pulse_0_len = NEC_PULSE_LEN;\r
1653 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1654 has_stop_bit = NEC_STOP_BIT;\r
1655 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1656 n_auto_repetitions = 1; // 1 frame\r
1657 auto_repetition_pause_len = 0;\r
1658 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1659 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1660 break;\r
1661 }\r
7644ac04 1662#endif\r
1663#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 1664 case IRMP_NEC42_PROTOCOL:\r
1665 {\r
1666 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1667 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1668 pulse_1_len = NEC_PULSE_LEN;\r
1669 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1670 pulse_0_len = NEC_PULSE_LEN;\r
1671 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1672 has_stop_bit = NEC_STOP_BIT;\r
1673 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1674 n_auto_repetitions = 1; // 1 frame\r
1675 auto_repetition_pause_len = 0;\r
1676 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1677 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1678 break;\r
1679 }\r
7644ac04 1680#endif\r
c1dfa01f 1681#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
1682 case IRMP_LGAIR_PROTOCOL:\r
1683 {\r
1684 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1685 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1686 pulse_1_len = NEC_PULSE_LEN;\r
1687 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1688 pulse_0_len = NEC_PULSE_LEN;\r
1689 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1690 has_stop_bit = NEC_STOP_BIT;\r
1691 complete_data_len = LGAIR_COMPLETE_DATA_LEN;\r
1692 n_auto_repetitions = 1; // 1 frame\r
1693 auto_repetition_pause_len = 0;\r
1694 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1695 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1696 break;\r
1697 }\r
1698#endif\r
4225a882 1699#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 1700 case IRMP_SAMSUNG_PROTOCOL:\r
1701 {\r
1702 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1703 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1704 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1705 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1706 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1707 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1708 has_stop_bit = SAMSUNG_STOP_BIT;\r
1709 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1710 n_auto_repetitions = 1; // 1 frame\r
1711 auto_repetition_pause_len = 0;\r
1712 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
1713 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1714 break;\r
1715 }\r
1716\r
1717 case IRMP_SAMSUNG32_PROTOCOL:\r
1718 {\r
1719 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1720 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1721 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1722 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1723 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1724 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1725 has_stop_bit = SAMSUNG_STOP_BIT;\r
1726 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
956ea3ea 1727 n_auto_repetitions = SAMSUNG32_FRAMES; // 1 frame\r
e664a9f3 1728 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1729 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
1730 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1731 break;\r
1732 }\r
4225a882 1733#endif\r
ac8504f8 1734#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
1735 case IRMP_SAMSUNG48_PROTOCOL:\r
1736 {\r
1737 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
1738 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
1739 pulse_1_len = SAMSUNG_PULSE_LEN;\r
1740 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
1741 pulse_0_len = SAMSUNG_PULSE_LEN;\r
1742 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
1743 has_stop_bit = SAMSUNG_STOP_BIT;\r
1744 complete_data_len = SAMSUNG48_COMPLETE_DATA_LEN;\r
1745 n_auto_repetitions = SAMSUNG48_FRAMES; // 1 frame\r
1746 auto_repetition_pause_len = SAMSUNG48_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1747 repeat_frame_pause_len = SAMSUNG48_FRAME_REPEAT_PAUSE_LEN;\r
1748 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1749 break;\r
1750 }\r
1751#endif\r
4225a882 1752#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 1753 case IRMP_MATSUSHITA_PROTOCOL:\r
1754 {\r
1755 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1756 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1757 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1758 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1759 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1760 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1761 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1762 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1763 n_auto_repetitions = 1; // 1 frame\r
1764 auto_repetition_pause_len = 0;\r
1765 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1766 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1767 break;\r
1768 }\r
4225a882 1769#endif\r
3d2da98a 1770#if IRSND_SUPPORT_TECHNICS_PROTOCOL == 1\r
1771 case IRMP_TECHNICS_PROTOCOL:\r
1772 {\r
1773 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
1774 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
1775 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
1776 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
1777 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
1778 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
1779 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1780 complete_data_len = TECHNICS_COMPLETE_DATA_LEN; // here TECHNICS\r
1781 n_auto_repetitions = 1; // 1 frame\r
1782 auto_repetition_pause_len = 0;\r
1783 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
1784 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1785 break;\r
1786 }\r
1787#endif\r
770a1a9d 1788#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 1789 case IRMP_KASEIKYO_PROTOCOL:\r
1790 {\r
1791 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
1792 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
1793 pulse_1_len = KASEIKYO_PULSE_LEN;\r
1794 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
1795 pulse_0_len = KASEIKYO_PULSE_LEN;\r
1796 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
1797 has_stop_bit = KASEIKYO_STOP_BIT;\r
1798 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1799 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1800 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1801 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1802 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1803 break;\r
1804 }\r
770a1a9d 1805#endif\r
4225a882 1806#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 1807 case IRMP_RECS80_PROTOCOL:\r
1808 {\r
1809 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
1810 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
1811 pulse_1_len = RECS80_PULSE_LEN;\r
1812 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
1813 pulse_0_len = RECS80_PULSE_LEN;\r
1814 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
1815 has_stop_bit = RECS80_STOP_BIT;\r
1816 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1817 n_auto_repetitions = 1; // 1 frame\r
1818 auto_repetition_pause_len = 0;\r
1819 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
1820 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1821 break;\r
1822 }\r
4225a882 1823#endif\r
1824#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 1825 case IRMP_RECS80EXT_PROTOCOL:\r
1826 {\r
1827 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
1828 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
1829 pulse_1_len = RECS80EXT_PULSE_LEN;\r
1830 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
1831 pulse_0_len = RECS80EXT_PULSE_LEN;\r
1832 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
1833 has_stop_bit = RECS80EXT_STOP_BIT;\r
1834 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1835 n_auto_repetitions = 1; // 1 frame\r
1836 auto_repetition_pause_len = 0;\r
1837 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
1838 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1839 break;\r
1840 }\r
4225a882 1841#endif\r
9c07687e 1842#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
1843 case IRMP_TELEFUNKEN_PROTOCOL:\r
1844 {\r
1845 startbit_pulse_len = TELEFUNKEN_START_BIT_PULSE_LEN;\r
1846 startbit_pause_len = TELEFUNKEN_START_BIT_PAUSE_LEN - 1;\r
1847 pulse_1_len = TELEFUNKEN_PULSE_LEN;\r
1848 pause_1_len = TELEFUNKEN_1_PAUSE_LEN - 1;\r
1849 pulse_0_len = TELEFUNKEN_PULSE_LEN;\r
1850 pause_0_len = TELEFUNKEN_0_PAUSE_LEN - 1;\r
1851 has_stop_bit = TELEFUNKEN_STOP_BIT;\r
1852 complete_data_len = TELEFUNKEN_COMPLETE_DATA_LEN;\r
1853 n_auto_repetitions = 1; // 1 frames\r
1854 auto_repetition_pause_len = 0; // TELEFUNKEN_AUTO_REPETITION_PAUSE_LEN; // xx ms pause\r
1855 repeat_frame_pause_len = TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1856 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1857 break;\r
1858 }\r
1859#endif\r
4225a882 1860#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 1861 case IRMP_RC5_PROTOCOL:\r
1862 {\r
1863 startbit_pulse_len = RC5_BIT_LEN;\r
1864 startbit_pause_len = RC5_BIT_LEN;\r
1865 pulse_len = RC5_BIT_LEN;\r
1866 pause_len = RC5_BIT_LEN;\r
1867 has_stop_bit = RC5_STOP_BIT;\r
1868 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1869 n_auto_repetitions = 1; // 1 frame\r
1870 auto_repetition_pause_len = 0;\r
1871 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
1872 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1873 break;\r
1874 }\r
4225a882 1875#endif\r
9547ee89 1876#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 1877 case IRMP_RC6_PROTOCOL:\r
1878 {\r
1879 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1880 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1881 pulse_len = RC6_BIT_LEN;\r
1882 pause_len = RC6_BIT_LEN;\r
1883 has_stop_bit = RC6_STOP_BIT;\r
1884 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1885 n_auto_repetitions = 1; // 1 frame\r
1886 auto_repetition_pause_len = 0;\r
1887 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1888 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1889 break;\r
1890 }\r
9547ee89 1891#endif\r
1892#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 1893 case IRMP_RC6A_PROTOCOL:\r
1894 {\r
1895 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
1896 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
1897 pulse_len = RC6_BIT_LEN;\r
1898 pause_len = RC6_BIT_LEN;\r
1899 has_stop_bit = RC6_STOP_BIT;\r
1900 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1901 n_auto_repetitions = 1; // 1 frame\r
1902 auto_repetition_pause_len = 0;\r
1903 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1904 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1905 break;\r
1906 }\r
9547ee89 1907#endif\r
4225a882 1908#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 1909 case IRMP_DENON_PROTOCOL:\r
1910 {\r
1911 startbit_pulse_len = 0x00;\r
1912 startbit_pause_len = 0x00;\r
1913 pulse_1_len = DENON_PULSE_LEN;\r
1914 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
1915 pulse_0_len = DENON_PULSE_LEN;\r
1916 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
1917 has_stop_bit = DENON_STOP_BIT;\r
1918 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1919 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1920 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1921 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1922 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
1923 break;\r
1924 }\r
4225a882 1925#endif\r
beda975f 1926#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
e664a9f3 1927 case IRMP_THOMSON_PROTOCOL:\r
1928 {\r
1929 startbit_pulse_len = 0x00;\r
1930 startbit_pause_len = 0x00;\r
1931 pulse_1_len = THOMSON_PULSE_LEN;\r
1932 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1933 pulse_0_len = THOMSON_PULSE_LEN;\r
1934 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1935 has_stop_bit = THOMSON_STOP_BIT;\r
1936 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1937 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1938 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1939 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1940 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1941 break;\r
1942 }\r
beda975f 1943#endif\r
4225a882 1944#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 1945 case IRMP_NUBERT_PROTOCOL:\r
1946 {\r
1947 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
1948 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
1949 pulse_1_len = NUBERT_1_PULSE_LEN;\r
1950 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
1951 pulse_0_len = NUBERT_0_PULSE_LEN;\r
1952 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
1953 has_stop_bit = NUBERT_STOP_BIT;\r
1954 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1955 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1956 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1957 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
1958 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1959 break;\r
1960 }\r
5481e9cd 1961#endif\r
0715cf5e 1962#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
1963 case IRMP_FAN_PROTOCOL:\r
1964 {\r
1965 startbit_pulse_len = FAN_START_BIT_PULSE_LEN;\r
1966 startbit_pause_len = FAN_START_BIT_PAUSE_LEN - 1;\r
1967 pulse_1_len = FAN_1_PULSE_LEN;\r
1968 pause_1_len = FAN_1_PAUSE_LEN - 1;\r
1969 pulse_0_len = FAN_0_PULSE_LEN;\r
1970 pause_0_len = FAN_0_PAUSE_LEN - 1;\r
1971 has_stop_bit = FAN_STOP_BIT;\r
1972 complete_data_len = FAN_COMPLETE_DATA_LEN;\r
1973 n_auto_repetitions = FAN_FRAMES; // only 1 frame\r
1974 auto_repetition_pause_len = FAN_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1975 repeat_frame_pause_len = FAN_FRAME_REPEAT_PAUSE_LEN;\r
1976 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1977 break;\r
1978 }\r
1979#endif\r
15dd9c32 1980#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
1981 case IRMP_SPEAKER_PROTOCOL:\r
1982 {\r
1983 startbit_pulse_len = SPEAKER_START_BIT_PULSE_LEN;\r
1984 startbit_pause_len = SPEAKER_START_BIT_PAUSE_LEN - 1;\r
1985 pulse_1_len = SPEAKER_1_PULSE_LEN;\r
1986 pause_1_len = SPEAKER_1_PAUSE_LEN - 1;\r
1987 pulse_0_len = SPEAKER_0_PULSE_LEN;\r
1988 pause_0_len = SPEAKER_0_PAUSE_LEN - 1;\r
1989 has_stop_bit = SPEAKER_STOP_BIT;\r
1990 complete_data_len = SPEAKER_COMPLETE_DATA_LEN;\r
1991 n_auto_repetitions = SPEAKER_FRAMES; // 2 frames\r
1992 auto_repetition_pause_len = SPEAKER_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1993 repeat_frame_pause_len = SPEAKER_FRAME_REPEAT_PAUSE_LEN;\r
1994 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1995 break;\r
1996 }\r
1997#endif\r
5481e9cd 1998#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 1999 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
2000 {\r
2001 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
2002 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
2003 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
2004 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
2005 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
2006 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
2007 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
2008 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
2009 n_auto_repetitions = 1; // 1 frame\r
2010 auto_repetition_pause_len = 0;\r
2011 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
2012 last_bit_value = 0;\r
2013 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
2014 break;\r
2015 }\r
5b437ff6 2016#endif\r
2017#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2018 case IRMP_GRUNDIG_PROTOCOL:\r
2019 {\r
2020 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2021 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
2022 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2023 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2024 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
2025 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
2026 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
2027 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
2028 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
2029 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2030 break;\r
2031 }\r
a48187fa 2032#endif\r
2033#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2034 case IRMP_IR60_PROTOCOL:\r
2035 {\r
2036 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2037 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
2038 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2039 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2040 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
2041 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
2042 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
2043 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
2044 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
2045 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
2046 break;\r
2047 }\r
d155e9ab 2048#endif\r
2049#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2050 case IRMP_NOKIA_PROTOCOL:\r
2051 {\r
2052 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2053 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
2054 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2055 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2056 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
2057 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
2058 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
2059 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
2060 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
2061 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2062 break;\r
2063 }\r
a7054daf 2064#endif\r
2065#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2066 case IRMP_SIEMENS_PROTOCOL:\r
2067 {\r
2068 startbit_pulse_len = SIEMENS_BIT_LEN;\r
2069 startbit_pause_len = SIEMENS_BIT_LEN;\r
2070 pulse_len = SIEMENS_BIT_LEN;\r
2071 pause_len = SIEMENS_BIT_LEN;\r
2072 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
cb93f9e9 2073 complete_data_len = SIEMENS_COMPLETE_DATA_LEN;\r
e664a9f3 2074 n_auto_repetitions = 1; // 1 frame\r
2075 auto_repetition_pause_len = 0;\r
2076 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
2077 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
2078 break;\r
2079 }\r
b5ea7869 2080#endif\r
cb93f9e9 2081#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
2082 case IRMP_RUWIDO_PROTOCOL:\r
2083 {\r
2084 startbit_pulse_len = RUWIDO_START_BIT_PULSE_LEN;\r
2085 startbit_pause_len = RUWIDO_START_BIT_PAUSE_LEN;\r
2086 pulse_len = RUWIDO_BIT_PULSE_LEN;\r
2087 pause_len = RUWIDO_BIT_PAUSE_LEN;\r
2088 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
2089 complete_data_len = RUWIDO_COMPLETE_DATA_LEN;\r
2090 n_auto_repetitions = 1; // 1 frame\r
2091 auto_repetition_pause_len = 0;\r
2092 repeat_frame_pause_len = RUWIDO_FRAME_REPEAT_PAUSE_LEN;\r
2093 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
2094 break;\r
2095 }\r
2096#endif\r
48664931 2097#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2098 case IRMP_FDC_PROTOCOL:\r
2099 {\r
2100 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
2101 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
2102 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
2103 pulse_1_len = FDC_PULSE_LEN;\r
2104 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
2105 pulse_0_len = FDC_PULSE_LEN;\r
2106 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
2107 has_stop_bit = FDC_STOP_BIT;\r
2108 n_auto_repetitions = 1; // 1 frame\r
2109 auto_repetition_pause_len = 0;\r
2110 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
2111 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2112 break;\r
2113 }\r
c7c9a4a1 2114#endif\r
2115#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 2116 case IRMP_RCCAR_PROTOCOL:\r
2117 {\r
2118 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
2119 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
2120 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
2121 pulse_1_len = RCCAR_PULSE_LEN;\r
2122 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
2123 pulse_0_len = RCCAR_PULSE_LEN;\r
2124 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
2125 has_stop_bit = RCCAR_STOP_BIT;\r
2126 n_auto_repetitions = 1; // 1 frame\r
2127 auto_repetition_pause_len = 0;\r
2128 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
2129 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2130 break;\r
2131 }\r
4225a882 2132#endif\r
c7a47e89 2133#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2134 case IRMP_JVC_PROTOCOL:\r
2135 {\r
2136 if (repeat_counter != 0) // skip start bit if repetition frame\r
2137 {\r
2138 current_bit = 0;\r
2139 }\r
2140\r
2141 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
2142 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
2143 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
2144 pulse_1_len = JVC_PULSE_LEN;\r
2145 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
2146 pulse_0_len = JVC_PULSE_LEN;\r
2147 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
2148 has_stop_bit = JVC_STOP_BIT;\r
2149 n_auto_repetitions = 1; // 1 frame\r
2150 auto_repetition_pause_len = 0;\r
2151 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
2152 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2153 break;\r
2154 }\r
c7a47e89 2155#endif\r
9405f84a 2156#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2157 case IRMP_NIKON_PROTOCOL:\r
2158 {\r
2159 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
2160 startbit_pause_len = NIKON_START_BIT_PAUSE_LEN;\r
2161 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
2162 pulse_1_len = NIKON_PULSE_LEN;\r
2163 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
2164 pulse_0_len = NIKON_PULSE_LEN;\r
2165 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
2166 has_stop_bit = NIKON_STOP_BIT;\r
2167 n_auto_repetitions = 1; // 1 frame\r
2168 auto_repetition_pause_len = 0;\r
2169 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
2170 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2171 break;\r
2172 }\r
9405f84a 2173#endif\r
f50e01e7 2174#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2175 case IRMP_LEGO_PROTOCOL:\r
2176 {\r
2177 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
2178 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
2179 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
2180 pulse_1_len = LEGO_PULSE_LEN;\r
2181 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
2182 pulse_0_len = LEGO_PULSE_LEN;\r
2183 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
2184 has_stop_bit = LEGO_STOP_BIT;\r
2185 n_auto_repetitions = 1; // 1 frame\r
2186 auto_repetition_pause_len = 0;\r
2187 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
2188 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2189 break;\r
2190 }\r
fa09ce10 2191#endif\r
2192#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2193 case IRMP_A1TVBOX_PROTOCOL:\r
2194 {\r
2195 startbit_pulse_len = A1TVBOX_BIT_PULSE_LEN; // don't use A1TVBOX_START_BIT_PULSE_LEN\r
2196 startbit_pause_len = A1TVBOX_BIT_PAUSE_LEN; // don't use A1TVBOX_START_BIT_PAUSE_LEN\r
2197 pulse_len = A1TVBOX_BIT_PULSE_LEN;\r
2198 pause_len = A1TVBOX_BIT_PAUSE_LEN;\r
2199 has_stop_bit = A1TVBOX_STOP_BIT;\r
2200 complete_data_len = A1TVBOX_COMPLETE_DATA_LEN + 1; // we send stop bit as data\r
2201 n_auto_repetitions = 1; // 1 frame\r
2202 auto_repetition_pause_len = 0;\r
2203 repeat_frame_pause_len = A1TVBOX_FRAME_REPEAT_PAUSE_LEN;\r
2204 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2205 break;\r
2206 }\r
c9b6916a 2207#endif\r
2208#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2209 case IRMP_ROOMBA_PROTOCOL:\r
2210 {\r
2211 startbit_pulse_len = ROOMBA_START_BIT_PULSE_LEN;\r
2212 startbit_pause_len = ROOMBA_START_BIT_PAUSE_LEN;\r
2213 pulse_1_len = ROOMBA_1_PULSE_LEN;\r
2214 pause_1_len = ROOMBA_1_PAUSE_LEN - 1;\r
2215 pulse_0_len = ROOMBA_0_PULSE_LEN;\r
2216 pause_0_len = ROOMBA_0_PAUSE_LEN - 1;\r
2217 has_stop_bit = ROOMBA_STOP_BIT;\r
2218 complete_data_len = ROOMBA_COMPLETE_DATA_LEN;\r
cb93f9e9 2219 n_auto_repetitions = ROOMBA_FRAMES; // 8 frames\r
2220 auto_repetition_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
c9b6916a 2221 repeat_frame_pause_len = ROOMBA_FRAME_REPEAT_PAUSE_LEN;\r
2222 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2223 break;\r
2224 }\r
003c1008 2225#endif\r
2226#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2227 case IRMP_PENTAX_PROTOCOL:\r
2228 {\r
2229 startbit_pulse_len = PENTAX_START_BIT_PULSE_LEN;\r
2230 startbit_pause_len = PENTAX_START_BIT_PAUSE_LEN;\r
2231 complete_data_len = PENTAX_COMPLETE_DATA_LEN;\r
2232 pulse_1_len = PENTAX_PULSE_LEN;\r
2233 pause_1_len = PENTAX_1_PAUSE_LEN - 1;\r
2234 pulse_0_len = PENTAX_PULSE_LEN;\r
2235 pause_0_len = PENTAX_0_PAUSE_LEN - 1;\r
2236 has_stop_bit = PENTAX_STOP_BIT;\r
2237 n_auto_repetitions = 1; // 1 frame\r
2238 auto_repetition_pause_len = 0;\r
2239 repeat_frame_pause_len = PENTAX_FRAME_REPEAT_PAUSE_LEN;\r
2240 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2241 break;\r
2242 }\r
43c535be 2243#endif\r
2244#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
2245 case IRMP_ACP24_PROTOCOL:\r
2246 {\r
2247 startbit_pulse_len = ACP24_START_BIT_PULSE_LEN;\r
2248 startbit_pause_len = ACP24_START_BIT_PAUSE_LEN - 1;\r
2249 complete_data_len = ACP24_COMPLETE_DATA_LEN;\r
2250 pulse_1_len = ACP24_PULSE_LEN;\r
2251 pause_1_len = ACP24_1_PAUSE_LEN - 1;\r
2252 pulse_0_len = ACP24_PULSE_LEN;\r
2253 pause_0_len = ACP24_0_PAUSE_LEN - 1;\r
2254 has_stop_bit = ACP24_STOP_BIT;\r
2255 n_auto_repetitions = 1; // 1 frame\r
2256 auto_repetition_pause_len = 0;\r
2257 repeat_frame_pause_len = ACP24_FRAME_REPEAT_PAUSE_LEN;\r
2258 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
2259 break;\r
2260 }\r
e664a9f3 2261#endif\r
2262 default:\r
2263 {\r
2264 irsnd_busy = FALSE;\r
2265 break;\r
2266 }\r
2267 }\r
2268 }\r
2269 }\r
2270\r
2271 if (irsnd_busy)\r
2272 {\r
2273 new_frame = FALSE;\r
2274\r
2275 switch (irsnd_protocol)\r
2276 {\r
4225a882 2277#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
e664a9f3 2278 case IRMP_SIRCS_PROTOCOL:\r
4225a882 2279#endif\r
2280#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
e664a9f3 2281 case IRMP_NEC_PROTOCOL:\r
4225a882 2282#endif\r
7644ac04 2283#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2284 case IRMP_NEC16_PROTOCOL:\r
7644ac04 2285#endif\r
2286#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
e664a9f3 2287 case IRMP_NEC42_PROTOCOL:\r
7644ac04 2288#endif\r
c1dfa01f 2289#if IRSND_SUPPORT_LGAIR_PROTOCOL == 1\r
2290 case IRMP_LGAIR_PROTOCOL:\r
2291#endif\r
4225a882 2292#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2293 case IRMP_SAMSUNG_PROTOCOL:\r
2294 case IRMP_SAMSUNG32_PROTOCOL:\r
4225a882 2295#endif\r
ac8504f8 2296#if IRSND_SUPPORT_SAMSUNG48_PROTOCOL == 1\r
2297 case IRMP_SAMSUNG48_PROTOCOL:\r
2298#endif\r
4225a882 2299#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
e664a9f3 2300 case IRMP_MATSUSHITA_PROTOCOL:\r
4225a882 2301#endif\r
3d2da98a 2302#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
2303 case IRMP_TECHNICS_PROTOCOL:\r
2304#endif\r
770a1a9d 2305#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
e664a9f3 2306 case IRMP_KASEIKYO_PROTOCOL:\r
770a1a9d 2307#endif\r
4225a882 2308#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
e664a9f3 2309 case IRMP_RECS80_PROTOCOL:\r
4225a882 2310#endif\r
2311#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
e664a9f3 2312 case IRMP_RECS80EXT_PROTOCOL:\r
4225a882 2313#endif\r
9c07687e 2314#if IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r
2315 case IRMP_TELEFUNKEN_PROTOCOL:\r
2316#endif\r
4225a882 2317#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2318 case IRMP_DENON_PROTOCOL:\r
4225a882 2319#endif\r
2320#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
e664a9f3 2321 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 2322#endif\r
0715cf5e 2323#if IRSND_SUPPORT_FAN_PROTOCOL == 1\r
2324 case IRMP_FAN_PROTOCOL:\r
2325#endif\r
15dd9c32 2326#if IRSND_SUPPORT_SPEAKER_PROTOCOL == 1\r
2327 case IRMP_SPEAKER_PROTOCOL:\r
2328#endif\r
5481e9cd 2329#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2330 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 2331#endif\r
c7c9a4a1 2332#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2333 case IRMP_FDC_PROTOCOL:\r
b5ea7869 2334#endif\r
c7c9a4a1 2335#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
e664a9f3 2336 case IRMP_RCCAR_PROTOCOL:\r
c7c9a4a1 2337#endif\r
c7a47e89 2338#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
e664a9f3 2339 case IRMP_JVC_PROTOCOL:\r
c7a47e89 2340#endif\r
9405f84a 2341#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
e664a9f3 2342 case IRMP_NIKON_PROTOCOL:\r
9405f84a 2343#endif\r
f50e01e7 2344#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
e664a9f3 2345 case IRMP_LEGO_PROTOCOL:\r
f50e01e7 2346#endif\r
cb93f9e9 2347#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
2348 case IRMP_THOMSON_PROTOCOL:\r
2349#endif\r
c9b6916a 2350#if IRSND_SUPPORT_ROOMBA_PROTOCOL == 1\r
2351 case IRMP_ROOMBA_PROTOCOL:\r
2352#endif\r
003c1008 2353#if IRSND_SUPPORT_PENTAX_PROTOCOL == 1\r
2354 case IRMP_PENTAX_PROTOCOL:\r
2355#endif\r
43c535be 2356#if IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
2357 case IRMP_ACP24_PROTOCOL:\r
2358#endif\r
a7054daf 2359\r
7644ac04 2360#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
3d2da98a 2361 IRSND_SUPPORT_LGAIR_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || IRSND_SUPPORT_TECHNICS_PROTOCOL == 1 || \\r
770a1a9d 2362 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
0715cf5e 2363 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_FAN_PROTOCOL == 1 || IRSND_SUPPORT_SPEAKER_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || \\r
2364 IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || \\r
2365 IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 || IRSND_SUPPORT_ROOMBA_PROTOCOL == 1 || IRSND_SUPPORT_TELEFUNKEN_PROTOCOL == 1 || \\r
43c535be 2366 IRSND_SUPPORT_PENTAX_PROTOCOL == 1 || IRSND_SUPPORT_ACP24_PROTOCOL == 1\r
e664a9f3 2367 {\r
08f2dd9d 2368#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
e664a9f3 2369 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
2370 {\r
2371 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
2372 {\r
2373 auto_repetition_pause_len--;\r
2374 }\r
2375\r
2376 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
2377 {\r
2378 repeat_frame_pause_len--;\r
2379 }\r
2380 }\r
2381#endif\r
2382\r
2383 if (pulse_counter == 0)\r
2384 {\r
2385 if (current_bit == 0xFF) // send start bit\r
2386 {\r
2387 pulse_len = startbit_pulse_len;\r
2388 pause_len = startbit_pause_len;\r
2389 }\r
2390 else if (current_bit < complete_data_len) // send n'th bit\r
2391 {\r
5481e9cd 2392#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
e664a9f3 2393 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
2394 {\r
2395 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
2396 {\r
2397 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2398 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2399 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2400 }\r
2401 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
2402 {\r
2403 pulse_len = SAMSUNG_PULSE_LEN;\r
2404 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
2405 }\r
2406 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
2407 {\r
2408 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2409\r
2410 pulse_len = SAMSUNG_PULSE_LEN;\r
7fe8188d 2411 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2412 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
2413 }\r
2414 }\r
2415 else\r
5481e9cd 2416#endif\r
2417\r
7644ac04 2418#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
e664a9f3 2419 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
2420 {\r
2421 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
2422 {\r
2423 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2424 pause_len = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ?\r
e664a9f3 2425 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2426 }\r
2427 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
2428 {\r
2429 pulse_len = NEC_PULSE_LEN;\r
2430 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
2431 }\r
2432 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
2433 {\r
2434 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
2435\r
2436 pulse_len = NEC_PULSE_LEN;\r
7fe8188d 2437 pause_len = (irsnd_buffer[cur_bit >> 3] & (1<<(7-(cur_bit & 7)))) ?\r
e664a9f3 2438 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
2439 }\r
2440 }\r
2441 else\r
7644ac04 2442#endif\r
2443\r
5481e9cd 2444#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
e664a9f3 2445 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
2446 {\r
2447 if (current_bit == 0) // send 2nd start bit\r
2448 {\r
2449 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2450 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2451 }\r
2452 else if (current_bit == 1) // send 3rd start bit\r
2453 {\r
2454 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
2455 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
2456 }\r
2457 else if (current_bit == 2) // send 4th start bit\r
2458 {\r
2459 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
2460 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
2461 }\r
2462 else if (current_bit == 19) // send trailer bit\r
2463 {\r
2464 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2465 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
2466 }\r
2467 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
2468 {\r
7fe8188d 2469 uint8_t cur_bit_value = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? 1 : 0;\r
e664a9f3 2470 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
2471\r
2472 if (cur_bit_value == last_bit_value)\r
2473 {\r
2474 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
2475 }\r
2476 else\r
2477 {\r
2478 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
2479 last_bit_value = cur_bit_value;\r
2480 }\r
2481 }\r
2482 }\r
2483 else\r
2484#endif\r
7fe8188d 2485 if (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7))))\r
e664a9f3 2486 {\r
2487 pulse_len = pulse_1_len;\r
2488 pause_len = pause_1_len;\r
2489 }\r
2490 else\r
2491 {\r
2492 pulse_len = pulse_0_len;\r
2493 pause_len = pause_0_len;\r
2494 }\r
2495 }\r
2496 else if (has_stop_bit) // send stop bit\r
2497 {\r
2498 pulse_len = pulse_0_len;\r
2499\r
2500 if (auto_repetition_counter < n_auto_repetitions)\r
2501 {\r
2502 pause_len = pause_0_len;\r
2503 }\r
2504 else\r
2505 {\r
2506 pause_len = 255; // last frame: pause of 255\r
2507 }\r
2508 }\r
2509 }\r
2510\r
2511 if (pulse_counter < pulse_len)\r
2512 {\r
2513 if (pulse_counter == 0)\r
2514 {\r
2515 irsnd_on ();\r
2516 }\r
2517 pulse_counter++;\r
2518 }\r
2519 else if (pause_counter < pause_len)\r
2520 {\r
2521 if (pause_counter == 0)\r
2522 {\r
2523 irsnd_off ();\r
2524 }\r
2525 pause_counter++;\r
2526 }\r
2527 else\r
2528 {\r
2529 current_bit++;\r
2530\r
2531 if (current_bit >= complete_data_len + has_stop_bit)\r
2532 {\r
2533 current_bit = 0xFF;\r
2534 auto_repetition_counter++;\r
2535\r
2536 if (auto_repetition_counter == n_auto_repetitions)\r
2537 {\r
2538 irsnd_busy = FALSE;\r
2539 auto_repetition_counter = 0;\r
2540 }\r
2541 new_frame = TRUE;\r
2542 }\r
2543\r
2544 pulse_counter = 0;\r
2545 pause_counter = 0;\r
2546 }\r
2547 break;\r
2548 }\r
a7054daf 2549#endif\r
2550\r
4225a882 2551#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
e664a9f3 2552 case IRMP_RC5_PROTOCOL:\r
a7054daf 2553#endif\r
9547ee89 2554#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
e664a9f3 2555 case IRMP_RC6_PROTOCOL:\r
9547ee89 2556#endif\r
2557#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2558 case IRMP_RC6A_PROTOCOL:\r
9547ee89 2559#endif\r
a7054daf 2560#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
e664a9f3 2561 case IRMP_SIEMENS_PROTOCOL:\r
a7054daf 2562#endif\r
cb93f9e9 2563#if IRSND_SUPPORT_RUWIDO_PROTOCOL == 1\r
2564 case IRMP_RUWIDO_PROTOCOL:\r
2565#endif\r
a7054daf 2566#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
e664a9f3 2567 case IRMP_GRUNDIG_PROTOCOL:\r
a7054daf 2568#endif\r
a48187fa 2569#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
e664a9f3 2570 case IRMP_IR60_PROTOCOL:\r
a48187fa 2571#endif\r
a7054daf 2572#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2573 case IRMP_NOKIA_PROTOCOL:\r
fa09ce10 2574#endif\r
2575#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2576 case IRMP_A1TVBOX_PROTOCOL:\r
a7054daf 2577#endif\r
4225a882 2578\r
cb93f9e9 2579#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || \\r
2580 IRSND_SUPPORT_RC6_PROTOCOL == 1 || \\r
2581 IRSND_SUPPORT_RC6A_PROTOCOL == 1 || \\r
2582 IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || \\r
2583 IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
2584 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || \\r
2585 IRSND_SUPPORT_IR60_PROTOCOL == 1 || \\r
2586 IRSND_SUPPORT_NOKIA_PROTOCOL == 1 || \\r
2587 IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2588 {\r
2589 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
2590 {\r
2591 current_bit++;\r
4225a882 2592\r
e664a9f3 2593 if (current_bit >= complete_data_len)\r
2594 {\r
2595 current_bit = 0xFF;\r
a7054daf 2596\r
a48187fa 2597#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2598 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2599 {\r
2600 auto_repetition_counter++;\r
2601\r
2602 if (repeat_counter > 0)\r
2603 { // set 117 msec pause time\r
2604 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
2605 }\r
2606\r
2607 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
2608 {\r
2609 n_auto_repetitions++; // increment number of auto repetitions\r
2610 repeat_counter++;\r
2611 }\r
2612 else if (auto_repetition_counter == n_auto_repetitions)\r
2613 {\r
2614 irsnd_busy = FALSE;\r
2615 auto_repetition_counter = 0;\r
2616 }\r
2617 }\r
2618 else\r
2619#endif\r
2620 {\r
2621 irsnd_busy = FALSE;\r
2622 }\r
2623\r
2624 new_frame = TRUE;\r
2625 irsnd_off ();\r
2626 }\r
2627\r
2628 pulse_counter = 0;\r
2629 pause_counter = 0;\r
2630 }\r
2631\r
2632 if (! new_frame)\r
2633 {\r
2634 uint8_t first_pulse;\r
5b437ff6 2635\r
a48187fa 2636#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
e664a9f3 2637 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
2638 {\r
2639 if (current_bit == 0xFF || // start bit of start-frame\r
2640 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
2641 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
2642 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
2643 {\r
2644 pulse_len = startbit_pulse_len;\r
2645 pause_len = startbit_pause_len;\r
2646 first_pulse = TRUE;\r
2647 }\r
2648 else // send n'th bit\r
2649 {\r
2650 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2651 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
7fe8188d 2652 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2653 }\r
2654 }\r
2655 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
cb93f9e9 2656 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL || irsnd_protocol == IRMP_RUWIDO_PROTOCOL)\r
e664a9f3 2657#endif\r
2658 {\r
2659 if (current_bit == 0xFF) // 1 start bit\r
2660 {\r
9547ee89 2661#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2662 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2663 {\r
2664 pulse_len = startbit_pulse_len;\r
2665 pause_len = startbit_pause_len;\r
2666 }\r
2667 else\r
fa09ce10 2668#endif\r
2669#if IRSND_SUPPORT_A1TVBOX_PROTOCOL == 1\r
e664a9f3 2670 if (irsnd_protocol == IRMP_A1TVBOX_PROTOCOL)\r
2671 {\r
2672 current_bit = 0;\r
2673 }\r
2674 else\r
2675#endif\r
2676 {\r
2677 ;\r
2678 }\r
2679\r
2680 first_pulse = TRUE;\r
2681 }\r
2682 else // send n'th bit\r
2683 {\r
9547ee89 2684#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
e664a9f3 2685 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2686 {\r
2687 pulse_len = RC6_BIT_LEN;\r
2688 pause_len = RC6_BIT_LEN;\r
2689\r
2690 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2691 {\r
2692 if (current_bit == 4) // toggle bit (double len)\r
2693 {\r
2694 pulse_len = 2 * RC6_BIT_LEN;\r
2695 pause_len = 2 * RC6_BIT_LEN;\r
2696 }\r
2697 }\r
2698 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2699 {\r
2700 if (current_bit == 4) // toggle bit (double len)\r
2701 {\r
2702 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2703 pause_len = 2 * RC6_BIT_LEN;\r
2704 }\r
2705 else if (current_bit == 5) // toggle bit (double len)\r
2706 {\r
2707 pause_len = 2 * RC6_BIT_LEN;\r
2708 }\r
2709 }\r
2710 }\r
2711#endif\r
7fe8188d 2712 first_pulse = (irsnd_buffer[current_bit >> 3] & (1<<(7-(current_bit & 7)))) ? TRUE : FALSE;\r
e664a9f3 2713 }\r
2714\r
2715 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2716 {\r
2717 first_pulse = first_pulse ? FALSE : TRUE;\r
2718 }\r
2719 }\r
2720\r
2721 if (first_pulse)\r
2722 {\r
2723 // printf ("first_pulse: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2724\r
2725 if (pulse_counter < pulse_len)\r
2726 {\r
2727 if (pulse_counter == 0)\r
2728 {\r
2729 irsnd_on ();\r
2730 }\r
2731 pulse_counter++;\r
2732 }\r
2733 else // if (pause_counter < pause_len)\r
2734 {\r
2735 if (pause_counter == 0)\r
2736 {\r
2737 irsnd_off ();\r
2738 }\r
2739 pause_counter++;\r
2740 }\r
2741 }\r
2742 else\r
2743 {\r
2744 // printf ("first_pause: current_bit: %d %d < %d %d < %d\n", current_bit, pause_counter, pause_len, pulse_counter, pulse_len);\r
2745\r
2746 if (pause_counter < pause_len)\r
2747 {\r
2748 if (pause_counter == 0)\r
2749 {\r
2750 irsnd_off ();\r
2751 }\r
2752 pause_counter++;\r
2753 }\r
2754 else // if (pulse_counter < pulse_len)\r
2755 {\r
2756 if (pulse_counter == 0)\r
2757 {\r
2758 irsnd_on ();\r
2759 }\r
2760 pulse_counter++;\r
2761 }\r
2762 }\r
2763 }\r
2764 break;\r
2765 }\r
9547ee89 2766#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
cb93f9e9 2767 // IRSND_SUPPORT_RUWIDO_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2768\r
e664a9f3 2769 default:\r
2770 {\r
2771 irsnd_busy = FALSE;\r
2772 break;\r
2773 }\r
2774 }\r
2775 }\r
2776\r
2777 if (! irsnd_busy)\r
2778 {\r
2779 if (repeat_counter < n_repeat_frames)\r
2780 {\r
c7c9a4a1 2781#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
e664a9f3 2782 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2783 {\r
2784 irsnd_buffer[2] |= 0x0F;\r
2785 }\r
2786#endif\r
2787 repeat_counter++;\r
2788 irsnd_busy = TRUE;\r
2789 }\r
2790 else\r
2791 {\r
2792 irsnd_busy = TRUE; //Rainer\r
2793 send_trailer = TRUE;\r
2794 n_repeat_frames = 0;\r
2795 repeat_counter = 0;\r
2796 }\r
2797 }\r
4225a882 2798 }\r
2799\r
cb93f9e9 2800#ifdef ANALYZE\r
4225a882 2801 if (irsnd_is_on)\r
2802 {\r
e664a9f3 2803 putchar ('0');\r
4225a882 2804 }\r
2805 else\r
2806 {\r
e664a9f3 2807 putchar ('1');\r
4225a882 2808 }\r
2809#endif\r
2810\r
2811 return irsnd_busy;\r
2812}\r
2813\r
cb93f9e9 2814#ifdef ANALYZE\r
4225a882 2815\r
2816// main function - for unix/linux + windows only!\r
2817// AVR: see main.c!\r
2818// Compile it under linux with:\r
2819// cc irsnd.c -o irsnd\r
2820//\r
2821// usage: ./irsnd protocol hex-address hex-command >filename\r
2822\r
2823int\r
2824main (int argc, char ** argv)\r
2825{\r
4225a882 2826 int protocol;\r
2827 int address;\r
2828 int command;\r
4225a882 2829 IRMP_DATA irmp_data;\r
2830\r
a7054daf 2831 if (argc != 4 && argc != 5)\r
4225a882 2832 {\r
e664a9f3 2833 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
2834 return 1;\r
4225a882 2835 }\r
2836\r
2837 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
e664a9f3 2838 sscanf (argv[2], "%x", &address) == 1 &&\r
2839 sscanf (argv[3], "%x", &command) == 1)\r
4225a882 2840 {\r
e664a9f3 2841 irmp_data.protocol = protocol;\r
2842 irmp_data.address = address;\r
2843 irmp_data.command = command;\r
4225a882 2844\r
e664a9f3 2845 if (argc == 5)\r
2846 {\r
2847 irmp_data.flags = atoi (argv[4]);\r
2848 }\r
2849 else\r
2850 {\r
2851 irmp_data.flags = 0;\r
2852 }\r
a7054daf 2853\r
e664a9f3 2854 irsnd_init ();\r
4225a882 2855\r
e664a9f3 2856 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2857\r
e664a9f3 2858 while (irsnd_busy)\r
2859 {\r
2860 irsnd_ISR ();\r
2861 }\r
beda975f 2862\r
e664a9f3 2863 putchar ('\n');\r
a03ad359 2864\r
f874da09 2865#if 1 // enable here to send twice\r
e664a9f3 2866 (void) irsnd_send_data (&irmp_data, TRUE);\r
a03ad359 2867\r
e664a9f3 2868 while (irsnd_busy)\r
2869 {\r
2870 irsnd_ISR ();\r
2871 }\r
a03ad359 2872\r
e664a9f3 2873 putchar ('\n');\r
f874da09 2874#endif\r
4225a882 2875 }\r
2876 else\r
2877 {\r
e664a9f3 2878 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2879 return 1;\r
4225a882 2880 }\r
2881 return 0;\r
2882}\r
2883\r
cb93f9e9 2884#endif // ANALYZE\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)