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Commit | Line | Data |
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a16ba2b0 L |
1 | page 255\r |
2 | .z80\r | |
3 | \r | |
4 | extrn ddtz,bpent\r | |
5 | extrn $stack\r | |
30d1329e | 6 | extrn charini,?const,?conin\r |
8df5b655 | 7 | extrn ?cono,?conos\r |
a16ba2b0 L |
8 | extrn romend\r |
9 | \r | |
10 | \r | |
64cc2207 | 11 | global iobyte\r |
a16ba2b0 L |
12 | global isv_sw\r |
13 | \r | |
14 | include config.inc\r | |
fecee241 L |
15 | if CPU_Z180\r |
16 | include z180reg.inc\r | |
17 | include z180.lib\r | |
18 | endif\r | |
815c1735 | 19 | \r |
a16ba2b0 L |
20 | \r |
21 | \r | |
22 | \r | |
23 | ;----------------------------------------------------------------------\r | |
24 | \r | |
25 | cseg\r | |
8df5b655 | 26 | romstart equ $\r |
a16ba2b0 | 27 | \r |
8df5b655 | 28 | org romstart+0\r |
815c1735 | 29 | jp start\r |
a16ba2b0 | 30 | \r |
64cc2207 L |
31 | iobyte: db 2\r |
32 | \r | |
a16ba2b0 L |
33 | ; restart vectors\r |
34 | \r | |
35 | rsti defl 1\r | |
36 | rept 7\r | |
8df5b655 | 37 | org 8*rsti + romstart\r |
fecee241 L |
38 | jp bpent\r |
39 | rsti defl rsti+1\r | |
a16ba2b0 L |
40 | endm\r |
41 | \r | |
42 | ;----------------------------------------------------------------------\r | |
fecee241 L |
43 | ; Config space\r |
44 | ;\r | |
45 | \r | |
8df5b655 | 46 | org romstart+40h\r |
349c01b1 L |
47 | \r |
48 | dw 0\r | |
49 | db 0\r | |
50 | \r | |
a16ba2b0 | 51 | \r |
fecee241 L |
52 | if ROMSYS\r |
53 | $crom: defb c$rom ;\r | |
54 | else\r | |
55 | db 0 ;\r | |
56 | endif\r | |
a16ba2b0 | 57 | \r |
8df5b655 | 58 | INIWAITS defl CWAITIO\r |
fecee241 | 59 | if ROMSYS\r |
8df5b655 | 60 | INIWAITS defl INIWAITS+CWAITROM\r |
fecee241 | 61 | endif\r |
8df5b655 L |
62 | \r |
63 | ;----------------------------------------------------------------------\r | |
64 | \r | |
65 | org romstart+50h\r | |
66 | start:\r | |
67 | jp cstart\r | |
68 | jp wstart\r | |
69 | jp ?const\r | |
70 | jp ?conin\r | |
71 | jp ?cono\r | |
72 | jp ?conos\r | |
73 | jp charini\r | |
74 | \r | |
75 | ;----------------------------------------------------------------------\r | |
76 | \r | |
fecee241 L |
77 | hwini0:\r |
78 | if CPU_Z180\r | |
fecee241 L |
79 | db 3 ;count\r |
80 | db rcr,CREFSH ;configure DRAM refresh\r | |
81 | db dcntl,INIWAITS ;wait states\r | |
82 | db cbar,SYS$CBAR\r | |
fecee241 | 83 | endif\r |
2fe44122 | 84 | db 0\r |
fecee241 L |
85 | \r |
86 | if CPU_Z180\r | |
a16ba2b0 L |
87 | dmclrt: ;clear ram per dma\r |
88 | db dmct_e-dmclrt-2 ;\r | |
89 | db sar0l ;first port\r | |
815c1735 | 90 | dw nullbyte ;src (fixed)\r |
a16ba2b0 L |
91 | nullbyte:\r |
92 | db 000h ;src\r | |
93 | dw romend ;dst (inc), start after "rom" code\r | |
94 | db 00h ;dst\r | |
95 | dw 0-romend ;count (64k)\r | |
96 | dmct_e:\r | |
2fe44122 | 97 | db 0\r |
fecee241 L |
98 | endif\r |
99 | \r | |
a16ba2b0 | 100 | \r |
8df5b655 | 101 | cstart:\r |
fecee241 | 102 | if CPU_Z180\r |
a16ba2b0 | 103 | \r |
30d1329e L |
104 | push af\r |
105 | in0 a,(itc) ;Illegal opcode trap?\r | |
106 | jp m,??st01\r | |
107 | ld a,i ;I register == 0 ?\r | |
fecee241 | 108 | jr z,hw_reset ; yes, harware reset\r |
a16ba2b0 L |
109 | \r |
110 | ??st01:\r | |
fecee241 | 111 | ; TODO: SYS$CBR\r |
30d1329e L |
112 | ld a,(syscbr)\r |
113 | out0 (cbr),a\r | |
114 | pop af ;restore registers\r | |
30d1329e | 115 | jp bpent ;\r |
a16ba2b0 | 116 | \r |
fecee241 | 117 | hw_reset:\r |
a16ba2b0 L |
118 | di ;0058\r |
119 | ld a,CREFSH\r | |
120 | out0 (rcr),a ; configure DRAM refresh\r | |
121 | ld a,CWAITIO\r | |
122 | out0 (dcntl),a ; wait states\r | |
123 | \r | |
815c1735 L |
124 | ld a,M_NCD ;No Clock Divide\r |
125 | out0 (ccr),a\r | |
bad2d92d L |
126 | ; ld a,M_X2CM ;X2 Clock Multiplier\r |
127 | ; out0 (cmr),a\r | |
fecee241 | 128 | else\r |
8df5b655 L |
129 | di\r |
130 | xor a\r | |
131 | ld (@cbnk),a\r | |
fecee241 | 132 | endif\r |
815c1735 | 133 | \r |
fecee241 | 134 | ; check warm start mark\r |
a16ba2b0 | 135 | \r |
8df5b655 L |
136 | ld ix,mark_55AA ; top of common area\r |
137 | ld a,0aah ;\r | |
138 | cp (ix+000h) ;\r | |
139 | jr nz,kstart ;\r | |
140 | cp (ix+002h) ;\r | |
141 | jr nz,kstart ;\r | |
142 | cpl ;\r | |
143 | cp (ix+001h) ;\r | |
144 | jr nz,kstart ;\r | |
145 | cp (ix+003h) ;\r | |
146 | jr nz,kstart ;\r | |
147 | ld sp,$stack ; mark found, check\r | |
148 | jp z,wstart ; check ok,\r | |
fecee241 | 149 | \r |
a16ba2b0 L |
150 | ; ram not ok, initialize -- kstart --\r |
151 | \r | |
152 | kstart:\r | |
fecee241 L |
153 | if CPU_Z180\r |
154 | ld a,SYS$CBAR\r | |
155 | out0 (cbar),a\r | |
156 | ld a,SYS$CBR\r | |
8df5b655 | 157 | out0 (cbr),a\r |
fecee241 | 158 | endif\r |
a16ba2b0 | 159 | \r |
a16ba2b0 | 160 | ld sp,$stack ;01e1\r |
815c1735 | 161 | \r |
a16ba2b0 L |
162 | ; Clear RAM using DMA0\r |
163 | \r | |
fecee241 L |
164 | if CPU_Z180\r |
165 | if 0\r | |
cdc4625b | 166 | \r |
a16ba2b0 | 167 | ld hl,dmclrt ;load DMA registers\r |
2fe44122 | 168 | call ioiniml\r |
a16ba2b0 L |
169 | ld a,0cbh ;01ef dst +1, src fixed, burst\r |
170 | out0 (dmode),a ;01f1\r | |
171 | \r | |
172 | ld b,512/64\r | |
815c1735 | 173 | ld a,062h ;01f4 enable dma0,\r |
a16ba2b0 L |
174 | ??cl_1:\r |
175 | out0 (dstat),a ;01f9 clear (up to) 64k\r | |
176 | djnz ??cl_1 ; end of RAM?\r | |
cdc4625b | 177 | \r |
fecee241 L |
178 | endif\r |
179 | endif\r | |
a16ba2b0 L |
180 | \r |
181 | ld hl,055AAh ;set warm start mark\r | |
fecee241 L |
182 | ld (mark_55AA),hl\r |
183 | ld (mark_55AA+2),hl\r | |
184 | \r | |
185 | ; -- wstart --\r | |
a16ba2b0 | 186 | \r |
a16ba2b0 | 187 | wstart:\r |
cdc4625b | 188 | call sysram_init\r |
a16ba2b0 | 189 | call ivtab_init\r |
fecee241 | 190 | if CPU_Z180\r |
cdc4625b | 191 | ; call prt0_init\r |
fecee241 | 192 | endif\r |
a16ba2b0 | 193 | \r |
30d1329e | 194 | call charini\r |
bad2d92d | 195 | call bufferinit\r |
a16ba2b0 | 196 | \r |
fecee241 L |
197 | if CPU_Z80\r |
198 | ld a,0\r | |
199 | call selbnk\r | |
200 | endif\r | |
a16ba2b0 | 201 | \r |
cdc4625b L |
202 | ld a,INIDONEVAL ;tell others (CP/M) that hardware and fifos\r |
203 | ld (INIDONE),a ; are allready initialized\r | |
204 | \r | |
205 | im 2\r | |
206 | ei\r | |
a16ba2b0 | 207 | \r |
cdc4625b L |
208 | call ?const\r |
209 | call ?const\r | |
210 | or a\r | |
211 | call nz,?conin\r | |
815c1735 | 212 | \r |
fecee241 L |
213 | if CPU_Z180\r |
214 | ld e,0 ;Sys$Bank\r | |
215 | else\r | |
8df5b655 | 216 | ; TODO:\r |
fecee241 | 217 | endif\r |
cdc4625b | 218 | jp ddtz\r |
815c1735 | 219 | \r |
30d1329e | 220 | \r |
fecee241 | 221 | if CPU_Z180\r |
8df5b655 | 222 | ; TODO: SYS$CBR\r |
30d1329e | 223 | syscbr: db 1\r |
fecee241 | 224 | endif\r |
30d1329e | 225 | \r |
a16ba2b0 L |
226 | ;\r |
227 | ;----------------------------------------------------------------------\r | |
228 | ;\r | |
229 | \r | |
a16ba2b0 | 230 | global buf.init\r |
815c1735 | 231 | \r |
a16ba2b0 L |
232 | buf.init:\r |
233 | ld (ix+o.in_idx),0\r | |
234 | ld (ix+o.out_idx),0\r | |
235 | ld (ix+o.mask),a\r | |
cdc4625b L |
236 | \r |
237 | ld a,(ix+o.id)\r | |
238 | cp 4\r | |
239 | ret nc\r | |
240 | \r | |
241 | push de\r | |
242 | push hl\r | |
243 | ld hl,fifo_list\r | |
244 | push hl ;save fifo_list\r | |
245 | ld e,a\r | |
246 | ld d,0\r | |
247 | add hl,de\r | |
248 | add hl,de\r | |
249 | add hl,de\r | |
250 | push ix\r | |
251 | pop de\r | |
089ca8cc | 252 | ; TODO: address translation\r |
cdc4625b L |
253 | ld (hl),e\r |
254 | inc hl\r | |
255 | ld (hl),d\r | |
256 | pop hl ;get fifo_list back\r | |
257 | or a\r | |
258 | jr nz,bufi_ex\r | |
259 | \r | |
260 | ld (040h),hl\r | |
261 | ld (040h+2),a\r | |
262 | bufi_ex:\r | |
263 | pop hl\r | |
264 | pop de\r | |
265 | \r | |
a16ba2b0 L |
266 | ret\r |
267 | \r | |
cdc4625b L |
268 | \r |
269 | fifo_list:\r | |
270 | rept 4\r | |
271 | dw 0\r | |
272 | db 0\r | |
273 | endm\r | |
274 | \r | |
349c01b1 | 275 | ;----------------------------------------------------------------------\r |
4caee1ec | 276 | \r |
6a4e9540 L |
277 | extrn msginit,msg.sout\r |
278 | extrn mtx.fifo,mrx.fifo\r | |
279 | extrn co.fifo,ci.fifo\r | |
4caee1ec L |
280 | \r |
281 | \r | |
a16ba2b0 | 282 | bufferinit:\r |
fecee241 L |
283 | if CPU_Z180\r |
284 | call msginit\r | |
815c1735 | 285 | \r |
a16ba2b0 | 286 | ld hl,buffers\r |
6a4e9540 | 287 | ld b,buftablen\r |
a16ba2b0 | 288 | bfi_1:\r |
6a4e9540 L |
289 | ld a,(hl)\r |
290 | inc hl\r | |
291 | ld (bufdat+0),a\r | |
a16ba2b0 L |
292 | ld e,(hl)\r |
293 | inc hl\r | |
294 | ld d,(hl)\r | |
295 | inc hl\r | |
2fa1a706 | 296 | ex de,hl\r |
6a4e9540 L |
297 | \r |
298 | or a\r | |
299 | jr nz,bfi_2\r | |
cdc4625b L |
300 | ; call hwl2phy\r |
301 | ; ld (40h+0),hl\r | |
302 | ; ld (40h+2),a\r | |
2fa1a706 | 303 | out (AVRINT5),a\r |
cdc4625b | 304 | jr bfi_3\r |
6a4e9540 | 305 | bfi_2:\r |
2fa1a706 | 306 | call hwl2phy\r |
a16ba2b0 L |
307 | ld (bufdat+1),hl\r |
308 | ld (bufdat+3),a\r | |
a16ba2b0 L |
309 | ld hl,inimsg\r |
310 | call msg.sout\r | |
6a4e9540 | 311 | bfi_3:\r |
2fa1a706 | 312 | ex de,hl\r |
a16ba2b0 L |
313 | djnz bfi_1\r |
314 | ret\r | |
fecee241 | 315 | \r |
2fa1a706 | 316 | else ;CPU_Z180\r |
fecee241 L |
317 | \r |
318 | call msginit\r | |
8df5b655 L |
319 | \r |
320 | ld hl,buffers\r | |
321 | ld b,buftablen\r | |
322 | bfi_1:\r | |
323 | ld a,(hl)\r | |
324 | inc hl\r | |
325 | ld (bufdat+0),a\r | |
326 | ld e,(hl)\r | |
327 | inc hl\r | |
328 | ld d,(hl)\r | |
329 | inc hl\r | |
330 | ex de,hl\r | |
331 | \r | |
332 | or a\r | |
333 | jr nz,bfi_2\r | |
334 | \r | |
335 | ld a,(@cbnk)\r | |
2fa1a706 | 336 | call bnk2phy\r |
8df5b655 L |
337 | \r |
338 | ld (40h+0),hl\r | |
339 | ld (40h+2),a\r | |
340 | out (AVRINT5),a\r | |
341 | jr bfi_3\r | |
342 | bfi_2:\r | |
343 | \r | |
344 | ld a,(@cbnk)\r | |
2fa1a706 | 345 | call bnk2phy\r |
8df5b655 L |
346 | \r |
347 | ld (bufdat+1),hl\r | |
348 | ld (bufdat+3),a\r | |
349 | ld hl,inimsg\r | |
350 | call msg.sout\r | |
351 | bfi_3:\r | |
352 | ex de,hl\r | |
353 | djnz bfi_1\r | |
354 | ret\r | |
fecee241 | 355 | endif\r |
a16ba2b0 | 356 | \r |
a16ba2b0 | 357 | buffers:\r |
6a4e9540 L |
358 | db 0\r |
359 | dw mtx.fifo\r | |
360 | db 1\r | |
361 | dw mrx.fifo\r | |
362 | db 2\r | |
363 | dw co.fifo\r | |
364 | db 3\r | |
365 | dw ci.fifo\r | |
366 | buftablen equ ($ - buffers)/3\r | |
815c1735 L |
367 | \r |
368 | inimsg:\r | |
6a4e9540 | 369 | db inimsg_e - $ -1\r |
3531528e | 370 | db 0AEh\r |
a16ba2b0 L |
371 | db inimsg_e - $ -1\r |
372 | db 0\r | |
373 | bufdat:\r | |
374 | db 0\r | |
375 | dw 0\r | |
376 | db 0\r | |
e598b357 | 377 | inimsg_e:\r |
a16ba2b0 | 378 | \r |
4caee1ec | 379 | \r |
a16ba2b0 L |
380 | ;\r |
381 | ;----------------------------------------------------------------------\r | |
382 | ;\r | |
383 | \r | |
384 | sysram_init:\r | |
385 | ld hl,sysramw\r | |
386 | ld de,topcodsys\r | |
387 | ld bc,sysrame-sysramw\r | |
388 | ldir\r | |
389 | \r | |
390 | ret\r | |
391 | \r | |
392 | ;----------------------------------------------------------------------\r | |
393 | \r | |
394 | ivtab_init:\r | |
395 | ld hl,ivtab ;\r | |
396 | ld a,h ;\r | |
397 | ld i,a ;\r | |
fecee241 | 398 | if CPU_Z180\r |
a16ba2b0 | 399 | out0 (il),l ;\r |
fecee241 | 400 | endif\r |
a16ba2b0 L |
401 | \r |
402 | ; Let all vectors point to spurious int routines.\r | |
403 | \r | |
404 | ld d,high sp.int0\r | |
405 | ld a,low sp.int0\r | |
406 | ld b,9\r | |
815c1735 | 407 | ivt_i1:\r |
a16ba2b0 L |
408 | ld (hl),a\r |
409 | inc l\r | |
410 | ld (hl),d\r | |
411 | inc l\r | |
412 | add a,sp.int.len\r | |
413 | djnz ivt_i1\r | |
414 | ret\r | |
415 | \r | |
4caee1ec | 416 | ;----------------------------------------------------------------------\r |
a16ba2b0 | 417 | \r |
fecee241 | 418 | if CPU_Z180\r |
a16ba2b0 L |
419 | prt0_init:\r |
420 | ld a,i\r | |
421 | ld h,a\r | |
422 | in0 a,(il)\r | |
423 | and 0E0h\r | |
424 | or IV$PRT0\r | |
425 | ld l,a\r | |
426 | ld (hl),low iprt0\r | |
427 | inc hl\r | |
428 | ld (hl),high iprt0\r | |
429 | ld hl,prt0itab\r | |
2fe44122 | 430 | call ioiniml\r |
a16ba2b0 | 431 | ret\r |
815c1735 | 432 | \r |
a16ba2b0 L |
433 | prt0itab:\r |
434 | db prt0it_e-prt0itab-2\r | |
435 | db tmdr0l\r | |
436 | dw PRT_TC10MS\r | |
437 | dw PRT_TC10MS\r | |
438 | db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r | |
439 | prt0it_e:\r | |
2fe44122 | 440 | db 0\r |
fecee241 | 441 | endif\r |
a16ba2b0 | 442 | \r |
4caee1ec | 443 | \r |
a16ba2b0 L |
444 | ;\r |
445 | ;----------------------------------------------------------------------\r | |
446 | ;\r | |
447 | \r | |
2fe44122 | 448 | if CPU_Z180\r |
a16ba2b0 | 449 | io.ini:\r |
2fe44122 | 450 | if 0\r |
a16ba2b0 L |
451 | push bc\r |
452 | ld b,0 ;high byte port adress\r | |
2fe44122 | 453 | ioi_nxt:\r |
a16ba2b0 L |
454 | ld a,(hl) ;count\r |
455 | inc hl\r | |
8df5b655 L |
456 | or a\r |
457 | jr z,ioi_e\r | |
2fe44122 | 458 | \r |
a16ba2b0 L |
459 | ld c,(hl) ;port address\r |
460 | inc hl\r | |
2fe44122 | 461 | ioi_r:\r |
a16ba2b0 L |
462 | outi\r |
463 | inc b ;outi decrements b\r | |
464 | dec a\r | |
2fe44122 L |
465 | jr nz,ioi_r\r |
466 | jr ioi_nxt\r | |
cdc4625b | 467 | ioi_e:\r |
2fe44122 L |
468 | pop bc\r |
469 | ret\r | |
cdc4625b | 470 | \r |
2fe44122 | 471 | else ;(if 1/0)\r |
cdc4625b | 472 | \r |
2fe44122 L |
473 | push bc\r |
474 | jr ioi_nxt\r | |
475 | ioi_l:\r | |
476 | ld c,(hl) ;port address\r | |
477 | inc hl\r | |
478 | inc c\r | |
479 | ioi_r:\r | |
480 | dec c ;otim increments c\r | |
481 | otim\r | |
482 | jr z,ioi_r\r | |
483 | ioi_nxt:\r | |
484 | ld b,(hl) ;count\r | |
485 | inc hl\r | |
486 | inc b ;stop if count == 0\r | |
487 | djnz ioi_l\r | |
488 | pop bc\r | |
489 | ret\r | |
cdc4625b | 490 | \r |
2fe44122 L |
491 | endif ;(1/0)\r |
492 | \r | |
fecee241 | 493 | else\r |
2fe44122 L |
494 | \r |
495 | io.ini:\r | |
496 | push bc\r | |
8df5b655 L |
497 | jr ioi_nxt\r |
498 | ioi_l:\r | |
499 | ld c,(hl) ;port address\r | |
500 | inc hl\r | |
501 | otir\r | |
502 | ioi_nxt:\r | |
503 | ld b,(hl) ;count\r | |
504 | inc hl\r | |
505 | inc b\r | |
506 | djnz ioi_l\r | |
fecee241 | 507 | endif\r |
a16ba2b0 L |
508 | pop bc\r |
509 | ret\r | |
510 | \r | |
2fe44122 L |
511 | ;----------------------------------------------------------------------\r |
512 | \r | |
fecee241 | 513 | if CPU_Z180\r |
2fe44122 L |
514 | \r |
515 | global ioiniml\r | |
516 | \r | |
517 | ioiniml:\r | |
a16ba2b0 | 518 | push bc\r |
2fe44122 L |
519 | xor a\r |
520 | ioml_lp:\r | |
a16ba2b0 L |
521 | ld b,(hl)\r |
522 | inc hl\r | |
2fe44122 L |
523 | cp b\r |
524 | jr z,ioml_e\r | |
cdc4625b | 525 | \r |
a16ba2b0 L |
526 | ld c,(hl)\r |
527 | inc hl\r | |
815c1735 | 528 | otimr\r |
2fe44122 L |
529 | jr ioml_lp\r |
530 | ioml_e:\r | |
815c1735 | 531 | pop bc\r |
2fe44122 | 532 | ret z\r |
fecee241 | 533 | endif\r |
815c1735 | 534 | \r |
a16ba2b0 L |
535 | io.ini.l:\r |
536 | ;\r | |
537 | \r | |
a16ba2b0 | 538 | \r |
a16ba2b0 | 539 | \r |
4caee1ec | 540 | ;----------------------------------------------------------------------\r |
a16ba2b0 | 541 | ;\r |
fecee241 | 542 | if CPU_Z180\r |
a16ba2b0 | 543 | \r |
2fa1a706 L |
544 | ;--------------------------------------------------------------------\r |
545 | ; Return the BBR value for the given bank number\r | |
fecee241 | 546 | ;\r |
2fa1a706 | 547 | ; in a: Bank number\r |
fecee241 | 548 | ; out a: bbr value\r |
a16ba2b0 | 549 | \r |
fecee241 | 550 | bnk2log:\r |
2fa1a706 L |
551 | or a ;\r |
552 | ret z ; Bank 0 is at physical address 0\r | |
553 | \r | |
554 | push bc ;\r | |
555 | ld b,a ;\r | |
556 | ld c,CA ;\r | |
557 | mlt bc ;\r | |
558 | ld a,c ;\r | |
559 | add a,10h ;\r | |
560 | pop bc ;\r | |
561 | ret ;\r | |
562 | \r | |
563 | ;--------------------------------------------------------------\r | |
a16ba2b0 | 564 | \r |
2fa1a706 L |
565 | ;in hl: Log. Address\r |
566 | ; a: Bank number\r | |
a16ba2b0 L |
567 | ;\r |
568 | ;out ahl: Phys. (linear) Address\r | |
569 | \r | |
570 | \r | |
2fa1a706 | 571 | bnk2phy:\r |
fecee241 | 572 | call bnk2log\r |
a16ba2b0 | 573 | ; fall thru\r |
2fa1a706 | 574 | \r |
a16ba2b0 L |
575 | ;--------------------------------------------------------------\r |
576 | ;\r | |
2fa1a706 | 577 | ; hl: Log. Address\r |
fecee241 | 578 | ; a: Bank base (bbr)\r |
a16ba2b0 | 579 | ;\r |
2fa1a706 L |
580 | ; 2 0 0\r |
581 | ; 0 6 8 0\r | |
582 | ; hl hhhhhhhhllllllll\r | |
583 | ; a + bbbbbbbb\r | |
584 | ;\r | |
585 | ; OP: ahl = (a<<12) + (h<<8) + l\r | |
a16ba2b0 | 586 | ;\r |
4caee1ec | 587 | ;out ahl: Phys. (linear) Address\r |
a16ba2b0 | 588 | \r |
2fa1a706 | 589 | log2phy:\r |
a16ba2b0 | 590 | push bc ;\r |
2fa1a706 | 591 | l2p_i:\r |
a16ba2b0 L |
592 | ld c,a ;\r |
593 | ld b,16 ;\r | |
fecee241 | 594 | mlt bc ; bc = a<<4\r |
2fa1a706 L |
595 | ld a,c ;\r |
596 | add a,h ;\r | |
597 | ld h,a ;\r | |
598 | ld a,b ;\r | |
599 | adc a,0 ;\r | |
fecee241 L |
600 | pop bc ;\r |
601 | ret ;\r | |
602 | \r | |
8df5b655 L |
603 | ;--------------------------------------------------------------\r |
604 | ;\r | |
2fa1a706 L |
605 | ; hl: Log. Address\r |
606 | ;\r | |
8df5b655 L |
607 | ;\r |
608 | ; OP: ahl = (bankbase<<12) + (d<<8) + e\r | |
609 | ;\r | |
610 | ;out ahl: Phys. (linear) Address\r | |
611 | \r | |
612 | \r | |
2fa1a706 | 613 | hwl2phy:\r |
8df5b655 | 614 | push bc ;\r |
2fa1a706 L |
615 | in0 c,(cbar) ;\r |
616 | ld a,h ;\r | |
617 | or 00fh ; log. addr in common1?\r | |
8df5b655 L |
618 | cp c\r |
619 | jr c,hlp_1\r | |
2fa1a706 L |
620 | \r |
621 | in0 a,(cbr) ; yes, cbr is address base\r | |
622 | jr hl2p_x\r | |
8df5b655 | 623 | hlp_1:\r |
2fa1a706 | 624 | ld b,16 ; log. address in baked area?\r |
8df5b655 | 625 | mlt bc\r |
2fa1a706 | 626 | ld a,h\r |
8df5b655 | 627 | cp c\r |
2fa1a706 L |
628 | jr c,hlp_2\r |
629 | in0 a,(bbr) ; yes, bbr is address base\r | |
630 | jr hl2p_x\r | |
631 | hlp_2:\r | |
632 | xor a ; common1\r | |
633 | hl2p_x:\r | |
634 | jr nz,l2p_i\r | |
635 | \r | |
636 | pop bc ; bank part is 0, no translation\r | |
8df5b655 L |
637 | ret ;\r |
638 | \r | |
8df5b655 | 639 | \r |
2fa1a706 L |
640 | \r |
641 | else ;CPU_Z180\r | |
642 | \r | |
8df5b655 L |
643 | ;----------------------------------------------------------------------\r |
644 | ;\r | |
645 | \r | |
2fa1a706 | 646 | bnk2phy:\r |
8df5b655 L |
647 | sla h\r |
648 | jr nc,b2p_1 ;A15=1 --> common\r | |
649 | ld a,3\r | |
650 | b2p_1:\r | |
651 | srl a\r | |
652 | rr h\r | |
653 | ret\r | |
654 | \r | |
fecee241 | 655 | endif\r |
a16ba2b0 L |
656 | \r |
657 | ;--------------------------------------------------------------\r | |
658 | ;\r | |
659 | ;return:\r | |
660 | ; hl = hl + a\r | |
661 | ; Flags undefined\r | |
662 | ;\r | |
663 | \r | |
664 | add_hl_a:\r | |
815c1735 L |
665 | add a,l\r |
666 | ld l,a\r | |
667 | ret nc\r | |
668 | inc h\r | |
669 | ret\r | |
a16ba2b0 L |
670 | \r |
671 | ; ---------------------------------------------------------\r | |
672 | \r | |
673 | sysramw:\r | |
674 | \r | |
675 | .phase isvsw_loc\r | |
676 | topcodsys:\r | |
677 | \r | |
678 | ; Trampoline for interrupt routines in banked ram.\r | |
679 | ; Switch stack pointer to "system" stack in top ram\r | |
680 | ; Save cbar\r | |
815c1735 | 681 | \r |
a16ba2b0 | 682 | isv_sw: ;\r |
2fa1a706 | 683 | ex (sp),hl ;save hl, 'return adr' in hl\r |
a16ba2b0 L |
684 | push de ;\r |
685 | push af ;\r | |
2fa1a706 | 686 | ex de,hl ;'return address' in de\r |
a16ba2b0 L |
687 | ld hl,0 ;\r |
688 | add hl,sp ;\r | |
689 | ld a,h ;\r | |
690 | cp 0f8h ;\r | |
2fa1a706 | 691 | jr nc,isw_1 ;stack allready in top ram\r |
a16ba2b0 L |
692 | ld sp,$stack ;\r |
693 | isw_1:\r | |
2fa1a706 | 694 | push hl ;save user stack pointer\r |
a16ba2b0 L |
695 | in0 h,(cbar) ;\r |
696 | push hl ;\r | |
697 | ld a,SYS$CBAR ;\r | |
698 | out0 (cbar),a ;\r | |
699 | ex de,hl ;\r | |
700 | ld e,(hl) ;\r | |
701 | inc hl ;\r | |
702 | ld d,(hl) ;\r | |
703 | ex de,hl ;\r | |
704 | push bc ;\r | |
705 | call jphl ;\r | |
706 | \r | |
707 | pop bc ;\r | |
708 | pop hl ;\r | |
709 | out0 (cbar),h ;\r | |
710 | pop hl ;\r | |
711 | ld sp,hl ;\r | |
712 | pop af ;\r | |
713 | pop de ;\r | |
714 | pop hl ;\r | |
715 | ei ;\r | |
716 | ret ;\r | |
717 | jphl:\r | |
718 | jp (hl) ;\r | |
719 | \r | |
720 | ; ---------------------------------------------------------\r | |
721 | \r | |
fecee241 | 722 | if CPU_Z180\r |
4caee1ec | 723 | \r |
a16ba2b0 L |
724 | iprt0:\r |
725 | push af\r | |
726 | push hl\r | |
727 | in0 a,(tcr)\r | |
728 | in0 a,(tmdr0l)\r | |
729 | in0 a,(tmdr0h)\r | |
730 | ld a,(tim_ms)\r | |
731 | inc a\r | |
732 | cp 100\r | |
733 | jr nz,iprt_1\r | |
734 | xor a\r | |
735 | ld hl,(tim_s)\r | |
736 | inc hl\r | |
737 | ld (tim_s),hl\r | |
738 | iprt_1:\r | |
739 | ld (tim_ms),a\r | |
740 | pop hl\r | |
741 | pop af\r | |
742 | ei\r | |
743 | ret\r | |
744 | \r | |
fecee241 | 745 | endif\r |
8df5b655 | 746 | \r |
a16ba2b0 L |
747 | ; ---------------------------------------------------------\r |
748 | \r | |
749 | sp.int0:\r | |
750 | ld a,0d0h\r | |
751 | jr sp.i.1\r | |
752 | sp.int.len equ $-sp.int0\r | |
753 | ld a,0d1h\r | |
754 | jr sp.i.1\r | |
755 | ld a,0d2h\r | |
756 | jr sp.i.1\r | |
757 | ld a,0d3h\r | |
758 | jr sp.i.1\r | |
759 | ld a,0d4h\r | |
760 | jr sp.i.1\r | |
761 | ld a,0d5h\r | |
762 | jr sp.i.1\r | |
763 | ld a,0d6h\r | |
764 | jr sp.i.1\r | |
765 | ld a,0d7h\r | |
766 | jr sp.i.1\r | |
767 | ld a,0d8h\r | |
768 | sp.i.1:\r | |
769 | ; out (80h),a\r | |
770 | halt\r | |
771 | \r | |
8df5b655 L |
772 | ; ---------------------------------------------------------\r |
773 | \r | |
fecee241 | 774 | if CPU_Z80\r |
8df5b655 L |
775 | \r |
776 | ; Get IFF2\r | |
777 | ; This routine may not be loaded in page zero\r | |
778 | ;\r | |
779 | ; return Carry clear, if INTs are enabled.\r | |
780 | ;\r | |
781 | global getiff\r | |
782 | getiff:\r | |
783 | xor a ;clear accu and carry\r | |
784 | push af ;stack bottom := 00xxh\r | |
785 | pop af\r | |
786 | ld a,i ;P flag := IFF2\r | |
787 | ret pe ;exit carry clear, if enabled\r | |
788 | dec sp\r | |
789 | dec sp ;has stack bottom been overwritten?\r | |
790 | pop af\r | |
791 | and a ;if not 00xxh, INTs were\r | |
792 | ret nz ;actually enabled\r | |
793 | scf ;Otherwise, they really are disabled\r | |
794 | ret\r | |
795 | \r | |
796 | ;----------------------------------------------------------------------\r | |
797 | \r | |
798 | global selbnk\r | |
799 | \r | |
800 | ; a: bank (0..2)\r | |
801 | \r | |
802 | selbnk:\r | |
803 | push bc\r | |
804 | ld c,a\r | |
805 | call getiff\r | |
806 | push af\r | |
807 | \r | |
808 | ld a,c\r | |
809 | di\r | |
810 | ld (@cbnk),a\r | |
811 | ld a,5\r | |
812 | out (SIOAC),a\r | |
813 | ld a,(mm_sio0)\r | |
814 | rla\r | |
815 | srl c\r | |
816 | rra\r | |
817 | out (SIOAC),a\r | |
818 | ld (mm_sio0),a\r | |
819 | \r | |
820 | ld a,5\r | |
821 | out (SIOBC),a\r | |
822 | ld a,(mm_sio1)\r | |
823 | rla\r | |
824 | srl c\r | |
825 | rra\r | |
826 | out (SIOBC),a\r | |
827 | ld (mm_sio1),a\r | |
828 | pop af\r | |
829 | pop bc\r | |
830 | ret c ;INTs were disabled\r | |
831 | ei\r | |
832 | ret\r | |
833 | \r | |
834 | ;----------------------------------------------------------------------\r | |
835 | \r | |
836 | ; c: bank (0..2)\r | |
837 | \r | |
fecee241 | 838 | if 0\r |
8df5b655 L |
839 | \r |
840 | selbnk:\r | |
841 | ld a,(@cbnk)\r | |
842 | xor c\r | |
843 | and 3\r | |
844 | ret z ;no change\r | |
845 | \r | |
846 | call getiff\r | |
847 | push af\r | |
848 | ld a,c\r | |
849 | di\r | |
850 | ld (@cbnk),a\r | |
851 | ld a,5\r | |
852 | out (SIOAC),a\r | |
853 | ld a,(mm_sio0)\r | |
854 | rla\r | |
855 | srl c\r | |
856 | rra\r | |
857 | out (SIOAC),a\r | |
858 | ld (mm_sio0),a\r | |
859 | \r | |
860 | ld a,5\r | |
861 | out (SIOBC),a\r | |
862 | ld a,(mm_sio1)\r | |
863 | rla\r | |
864 | srl c\r | |
865 | rra\r | |
866 | out (SIOBC),a\r | |
867 | ld (mm_sio1),a\r | |
868 | pop af\r | |
869 | ret nc ;INTs were disabled\r | |
870 | ei\r | |
871 | ret\r | |
872 | \r | |
fecee241 | 873 | endif\r |
8df5b655 L |
874 | \r |
875 | ;----------------------------------------------------------------------\r | |
876 | \r | |
fecee241 | 877 | if 0\r |
8df5b655 L |
878 | ex af,af'\r |
879 | push af\r | |
880 | ex af,af'\r | |
881 | \r | |
882 | rra\r | |
883 | jr nc,stbk1\r | |
884 | ex af,af'\r | |
885 | ld a,5\r | |
886 | out (SIOAC),a\r | |
887 | ld a,(mm_sio0)\r | |
888 | rla\r | |
889 | srl c\r | |
890 | rra\r | |
891 | out (SIOAC),a\r | |
892 | ld (mm_sio1),a\r | |
893 | ex af,af'\r | |
894 | \r | |
895 | stbk1:\r | |
896 | rra\r | |
897 | jr nc,stbk2\r | |
898 | ex af,af'\r | |
899 | ld a,5\r | |
900 | out (SIOBC),a\r | |
901 | ld a,(mm_sio1)\r | |
902 | rla\r | |
903 | srl c\r | |
904 | rra\r | |
905 | out (SIOBC),a\r | |
906 | ld (mm_sio1),a\r | |
907 | ex af,af'\r | |
908 | \r | |
909 | stbk2:\r | |
fecee241 | 910 | endif\r |
8df5b655 L |
911 | \r |
912 | global @cbnk\r | |
913 | global mm_sio0, mm_sio1\r | |
914 | \r | |
915 | @cbnk: db 0 ; current bank (0..2)\r | |
916 | mm_sio0:\r | |
917 | ds 1\r | |
918 | mm_sio1:\r | |
919 | ds 1\r | |
920 | \r | |
921 | \r | |
fecee241 | 922 | endif\r |
8df5b655 L |
923 | \r |
924 | ;----------------------------------------------------------------------\r | |
925 | \r | |
a16ba2b0 L |
926 | curph defl $\r |
927 | .dephase\r | |
928 | sysrame:\r | |
929 | .phase curph\r | |
930 | tim_ms: db 0\r | |
931 | tim_s: dw 0\r | |
932 | .dephase\r | |
815c1735 | 933 | \r |
a16ba2b0 L |
934 | ;-----------------------------------------------------\r |
935 | \r | |
8df5b655 | 936 | \r |
a16ba2b0 L |
937 | cseg\r |
938 | \r | |
939 | ;.phase 0ffc0h\r | |
940 | ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table\r | |
941 | ;.dephase\r | |
942 | \r | |
fecee241 L |
943 | ;.phase 0fffah\r |
944 | mark_55AA equ 0 - 2 - 4 ;2 byte for trap stack\r | |
945 | ;ds 4\r | |
a16ba2b0 L |
946 | ;.dephase\r |
947 | \r | |
948 | \r | |
949 | end\r |